JP2007235106A5

JP2007235106A5 -

Info

Publication number: JP2007235106A5
Application number: JP2007009139A
Authority: JP
Filing date: 2007-01-18
Publication date: 2010-03-04
Anticipated expiration: 2027-01-18

Claims

A substrate in which a first region and a second region provided in the first region are defined;
A first circuit provided in the second region and having a first transistor, a second transistor, a gate signal line, a data signal line, and a power supply line, and light emission electrically connected to the first circuit A pixel having an element;
A test element group provided in the first region outside the second region, for testing the first transistor and the second transistor in the second region, and
The test element group includes a second circuit having a third transistor, a fourth transistor, a gate signal line, a data signal line, and a power supply line,
In the first transistor, a gate is electrically connected to the gate signal line, one of a source and a drain is electrically connected to the data signal line, and the other is electrically connected to a gate of the second transistor. One of the source and drain of the second transistor is electrically connected to the power supply line, and the other is electrically connected to the light emitting element,
In the third transistor, a gate is electrically connected to the gate signal line, one of a source and a drain is electrically connected to the data signal line, and the other is electrically connected to a gate of the fourth transistor. One of the source and drain of the fourth transistor is electrically connected to the power line,
A semiconductor device, wherein the potential of the gate signal line of the second circuit is constant.

A substrate in which a first region and a second region provided in the first region are defined;
A first circuit provided in the second region and having a first transistor, a second transistor, a gate signal line, a data signal line, and a power supply line, and light emission electrically connected to the first circuit A pixel having an element;
A test element group provided in the first region outside the second region, for testing the first transistor and the second transistor in the second region, and
The test element group includes a second circuit having a third transistor, a fourth transistor, a gate signal line, a data signal line, and a power supply line,
In the first transistor, a gate is electrically connected to the gate signal line, one of a source and a drain is electrically connected to the data signal line, and the other is electrically connected to a gate of the second transistor. One of the source and drain of the second transistor is electrically connected to the power supply line, and the other is electrically connected to the light emitting element,
In the third transistor, a gate is electrically connected to the gate signal line, one of a source and a drain is electrically connected to the data signal line, and the other is electrically connected to a gate of the fourth transistor. One of the source and drain of the fourth transistor is electrically connected to the power line,
A semiconductor device, wherein the potential of the gate signal line of the second circuit is made constant by using a buffer.

A substrate in which a first region and a second region provided in the first region are defined;
A first circuit provided in the second region and having a first transistor, a second transistor, a gate signal line, a data signal line, and a power supply line, and light emission electrically connected to the first circuit A pixel having an element;
A test element group provided at four corners of the first region outside the second region, and for testing the first transistor and the second transistor in the second region;
The test element group includes a second circuit having a third transistor, a fourth transistor, a gate signal line, a data signal line, and a power supply line,
In the first transistor, a gate is electrically connected to the gate signal line, one of a source and a drain is electrically connected to the data signal line, and the other is electrically connected to a gate of the second transistor. One of the source and drain of the second transistor is electrically connected to the power supply line, and the other is electrically connected to the light emitting element,
In the third transistor, a gate is electrically connected to the gate signal line, one of a source and a drain is electrically connected to the data signal line, and the other is electrically connected to a gate of the fourth transistor. A semiconductor device is connected, wherein one of a source and a drain of the fourth transistor is electrically connected to the power supply line.

A substrate in which a first region and a second region provided in the first region are defined;
A first circuit provided in the second region and having a first transistor, a second transistor, a gate signal line, a data signal line, and a power supply line, and light emission electrically connected to the first circuit A pixel having an element;
A test element group provided at four corners of the first region outside the second region, and for testing the first transistor and the second transistor in the second region;
The test element group includes a second circuit having a third transistor, a fourth transistor, a gate signal line, a data signal line, and a power supply line,
In the first transistor, a gate is electrically connected to the gate signal line, one of a source and a drain is electrically connected to the data signal line, and the other is electrically connected to a gate of the second transistor. One of the source and drain of the second transistor is electrically connected to the power supply line, and the other is electrically connected to the light emitting element,
In the third transistor, a gate is electrically connected to the gate signal line, one of a source and a drain is electrically connected to the data signal line, and the other is electrically connected to a gate of the fourth transistor. One of the source and drain of the fourth transistor is electrically connected to the power line,
A semiconductor device, wherein the potential of the gate signal line of the second circuit is constant.

A substrate in which a first region and a second region provided in the first region are defined;
A first circuit provided in the second region and having a first transistor, a second transistor, a gate signal line, a data signal line, and a power supply line, and light emission electrically connected to the first circuit A pixel having an element;
A test element group provided in the first region outside the second region, for testing the first transistor and the second transistor in the second region;
And at least one terminal provided outside the first region,
The test element group includes a second circuit having a third transistor, a fourth transistor, a gate signal line, a data signal line, and a power supply line,
In the first transistor, a gate is electrically connected to the gate signal line, one of a source and a drain is electrically connected to the data signal line, and the other is electrically connected to a gate of the second transistor. One of the source and drain of the second transistor is electrically connected to the power supply line, and the other is electrically connected to the light emitting element,
At least one of a third transistor or a fourth transistor is electrically connected to the terminal;
A semiconductor device, wherein the potential of the gate signal line of the second circuit is constant.

Have another substrate,
The other substrate is fixed by a sealing material so as to face the substrate, and the first region is sealed,
The semiconductor device according to claim 5 , wherein the terminal is provided outside a region sealed by the substrate, the other substrate, and the sealing material.

In addition, it has three terminals,
5. The semiconductor device according to claim 1, wherein at least one of a third transistor and a fourth transistor is electrically connected to the three terminals. 6.

5. The semiconductor device according to claim 1, wherein a source and a drain of the third transistor or the fourth transistor are electrically connected to two terminals, respectively.

Said first region, the semiconductor device according to any one of claims 1 to 8, characterized in that film by a vapor deposition method is an evaporation region which is provided.