JP2007234803A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a manufacturing method of a semiconductor device capable of making a semiconductor device such as a high frequency element having a gate recess structure with a good yield. <P>SOLUTION: The thickness of depositing a second insulation film 4 is specified as a predetermined thickness in advance, and time for etching the second insulation film is specified as a predetermined time period, thereby adjusting a sectional width of a sidewall 5 formed around an opening 3 and controlling a width of an exposed region 6 of a semiconductor substrate 1 on which a recess 7 is formed in a subsequent step to a desired value. In addition, when the recess is to be formed on the exposed region 6 of the substrate 1, the depth of the recess 7 to be formed is controlled to a desired value by controlling the etching time. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device such as a high-frequency element having a gate recess structure.

  As a high-output and low-noise semiconductor device having excellent microwave characteristics and operating in the microwave band, for example, a field effect transistor (hereinafter referred to as FET) using gallium arsenide (hereinafter referred to as GaAs) or the like. ) Is widely used. In recent years, a gate recess structure in which a recess is provided in the gate electrode portion has been used in order to further improve characteristics such as output and efficiency of the FET.

  An example of a conventional FET having a gate recess structure is shown in FIG. FIG. 4 is a cross-sectional view showing an example of a conventional FET having a gate recess structure. In the conventional FET 40 shown in FIG. 4, for example, a drain electrode 42 and a source electrode 43 are formed on a semiconductor substrate 41 such as GaAs, and a gate electrode is provided in a recess 44 provided between these two electrodes. 45 is formed.

  5 and 6 illustrate a conventional method for manufacturing a semiconductor device for forming an FET or the like having such a gate recess structure. These drawings particularly illustrate the manufacturing method of the gate recess structure in the order of forming steps, and FIGS. 5 and 6 are cross-sectional views showing the first stage and the second stage, respectively.

  First, as shown in FIG. 5A, an insulating film 52 such as silicon nitride (SiN) is deposited on a semiconductor substrate 51 such as GaAs. Next, as shown in FIG. 5B, an opening 53 is formed by dry etching at a portion corresponding to the recess formation position of the insulating film 52. During this dry etching, the exposed portion 51a of the semiconductor substrate 51 exposed through the opening 53 is subjected to plasma damage.

  Next, as shown in FIG. 5C, the recess 54 is formed by performing wet etching from the opening 53. The exposed portion 51a of the semiconductor substrate 51 that has been damaged by plasma is removed during the wet etching.

  Next, as shown in FIG. 5D, a photoresist film 55 having an opening 56 at the formation site of the recess 54 is formed on the insulating film 52. Then, in order to enable lift-off in a later process, as shown in FIG. 6A, the opening 53 of the insulating film 52 is widened by dry etching from this opening 56 to form an overhang structure. During this dry etching, the exposed portion 51b of the semiconductor substrate 51 exposed through the opening 53 is subjected to plasma damage.

  Next, as shown in FIG. 6B, a metal film 57 is formed by evaporating, for example, gold or the like from the surface of the substrate, and then, as shown in FIG. The metal film 57 deposited thereon is removed, and a gate electrode 58 is formed. Then, as shown in FIG. 6D, the insulating film 52 is removed, and a gate recess structure is obtained in which a gate electrode 58 is provided at the formation site of the recess 54.

Examples of a method for manufacturing a semiconductor device having such a gate recess structure are disclosed in, for example, Patent Document 1 and Patent Document 2.
Japanese Patent Laid-Open No. 5-13459 (7th page, FIG. 1) JP-A-8-22997 (7th page, FIG. 5)

  In a semiconductor device such as an FET having a gate recess structure, the shape of the recess determines the amount of current between the drain electrode and the source electrode, and is closely related to the current amount adjustment capability of the gate electrode. In particular, the distance d (same as d in FIG. 4) between the edge of the gate electrode and the recess edge shown in FIG. 6D and the depth e of the recess shown in FIG. Are important parameters that determine the characteristics of the semiconductor device. At the time of formation, it is required that these values always maintain good accuracy.

  Here, in the conventional method of manufacturing a semiconductor device illustrated in FIGS. 5 and 6, the distance d is a photoresist film having an opening 56 formed on the insulating film 52 in the step of FIG. 5D. Depends on the formation position of 55. The depth e of the recess depends on the etching time in the process of FIG.

  However, the formation of the photoresist film 55 is accompanied by misalignment of the photomask and variation in the size of the opening 56. For this reason, it is difficult to form a photoresist film having a predetermined position and opening size with good accuracy, and the distance d between both edges also depends on the accuracy at the time of forming the photoresist film 55 and is good. It was difficult to maintain accuracy. In addition, it is difficult to stabilize the recess depth e to a predetermined value in consideration of the removal of the exposed portion 51a of the semiconductor substrate 51 that has undergone plasma damage and the difference in etching rate due to plasma damage.

  Furthermore, the exposed portion 51b of the semiconductor substrate 51 that has been plasma damaged in the process of FIG. 6A remains in the periphery of the recess even after the formation of the semiconductor device, affecting the composition of the channel layer of the element. For this reason, there are many variations in the characteristics of the semiconductor device after the formation, the yield at the time of manufacturing is lowered, and the manufacturing process is also unstable.

  The present invention has been made in consideration of the above-described circumstances, and an object of the present invention is to provide a method of manufacturing a semiconductor device capable of manufacturing a semiconductor device such as a high-frequency element having a gate recess structure with a good yield. .

  In order to achieve the above object, a semiconductor manufacturing method of the present invention is a method of forming a gate by a self-alignment method, a step of depositing a first insulating film on a semiconductor substrate, and a gate electrode of the semiconductor substrate. A step of forming an opening in a portion of the first insulating film facing the region to be formed, and a step of depositing a second insulating film in a predetermined film thickness on the entire surface of the first insulating film including the opening Then, the second insulating film is anisotropically etched for a predetermined etching time, and the second insulating film is removed while leaving the second insulating film on the side wall of the first insulating film facing the opening. A step of exposing the first insulating film and the semiconductor substrate in the opening, a step of isotropically etching the exposed portion of the exposed semiconductor substrate for a predetermined etching time, and forming the recess, Two layers of film on the first insulating film. Forming a resist film, forming an overhang-shaped opening so as to expose the recess-formed portion in the two-layer photoresist film, and including the recess exposed in the overhang-shaped opening. A step of depositing a metal film on the two-layer photoresist film, and peeling off the two-layer photoresist film and the metal film deposited thereon using a lift-off method, and the metal deposited in the recess And a step of using the film as a gate electrode.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the semiconductor device which can manufacture semiconductor devices, such as a high frequency element which has a gate recess structure, with a favorable yield can be obtained.

  The best mode for carrying out the method for manufacturing a semiconductor device according to the present invention will be described below with reference to FIGS.

  1 to 3 are cross-sectional views showing an embodiment of a method of manufacturing a semiconductor device according to the present invention in the order of steps. 1 shows the first stage, FIG. 2 shows the second stage, and FIG. 3 shows the third stage. In the present embodiment, for example, the high frequency element is an FET having a gate electrode, and the gate recess structure is manufactured.

  First, as shown in FIG. 1A, a first insulating film 2 is deposited on a semiconductor substrate 1. In this embodiment, the material of the semiconductor substrate 1 is GaAs. The material of the first insulating film 2 is silicon nitride (SiN) and is deposited on the semiconductor substrate 1 using a CVD method or the like.

  Next, as shown in FIG. 1B, an opening 3 is formed in a portion of the first insulating film 2 facing the gate electrode formation scheduled region of the semiconductor substrate 1. The opening 3 is formed, for example, by forming a photoresist film having an opening corresponding to the position where the opening 3 is formed on the insulating film 2 and performing anisotropic etching through the opening. It is formed by removing.

  Next, as shown in FIG. 1C, a second insulating film 4 is deposited to a predetermined film thickness L over the entire surface of the first insulating film 2 including the opening 3. In this embodiment, the material of the second insulating film 4 is silicon oxide (SiO 2) and is deposited by the CVD method or the like.

  Next, as shown in FIG. 1D, the second insulating film 4 is subjected to anisotropic etching for a predetermined etching time, so that a second insulating film is formed on the side wall of the first insulating film 2 facing the opening 3. While leaving the film 4, the second insulating film 4 is removed to expose the first insulating film 2 and the semiconductor substrate 1 in the opening 3. In this embodiment, dry etching such as RIE is performed as anisotropic etching.

  In this step, a sidewall 5 is formed on the periphery of the opening 3 by the second insulating film 4 left during etching. Further, the exposed portion 6 of the semiconductor substrate 1 exposed in the sidewall 5 corresponds to the width of the recess formed in a later process. This width can be controlled by adjusting the cross-sectional width of the sidewall 5. In this embodiment, the sectional width (L1) of the sidewall 5 is controlled by the film thickness L of the second insulating film formed in the immediately preceding process and the dry etching time in this process.

  That is, in the case of dry etching, the etching amount can be well controlled by the etching time. Therefore, in this embodiment, the dry etching time for the second insulating film 4 is removed by an amount corresponding to the film thickness L. By setting the time required for this, the cross-sectional width of the sidewall 5 formed at the periphery of the opening 3 is made equal to the film thickness L of the second insulating film 4.

  Next, as shown in FIG. 2A, a recess 7 is formed by isotropically etching the exposed portion 6 of the semiconductor substrate 1 exposed in the opening 3 for a predetermined etching time. In this embodiment, wet etching is performed as isotropic etching, and the depth of the recess 7 to be formed is controlled by controlling the etching time.

  When dry etching is used in the process illustrated in FIG. 1D immediately before, the exposed portion 6 of the semiconductor substrate 1 may be subjected to plasma damage due to dry etching. When the recess 7 is formed in this process, however. In addition, the plasma damaged part is removed by etching.

  Next, as shown in FIG. 2B, a two-layer photoresist film 8 is formed on the first insulating film 2, and a two-layer photoresist is formed so as to expose the portion where the recess 7 is formed. An overhang-shaped opening 9 is formed in the film 8. Then, as shown in FIG. 2C, a metal film 10 such as gold is deposited on the two-layer photoresist film 8 including the recess 7 exposed in the overhang-shaped opening 9 by vapor deposition or the like.

  Next, as shown in FIG. 2D, the two-layer photoresist film 8 and the metal film 10 deposited thereon are peeled off using a lift-off method. By this lift-off, the metal film 10 deposited through the opening 9 in the immediately preceding process remains, and a prototype of the gate electrode 11 is formed.

  Next, as shown in FIG. 3A, the sidewall 5 made of the second insulating film 4 is removed by isotropic etching. Then, as shown in FIG. 3B, the first insulating film 2 is similarly removed by wet etching to obtain a desired gate recess structure.

  As described above, in this embodiment, the film thickness for depositing the second insulating film 4 is set to a predetermined thickness in advance, and the time for etching the second insulating film is set to a predetermined time. The width of the exposed portion 6 of the semiconductor substrate 1 in which the recess 7 is formed is controlled to a desired value in a later step by adjusting the cross-sectional width of the sidewall 5 formed at the peripheral edge of 3. Further, when forming the recess in the exposed portion 6 of the semiconductor substrate 1, the depth of the recess 7 formed is controlled to a desired value by controlling the etching time. Therefore, a gate recess structure can be formed with good accuracy, and a semiconductor device manufacturing method capable of manufacturing a semiconductor device such as a high-frequency element having a gate recess structure with a good yield can be obtained.

  Further, when the recess 7 is formed in the exposed portion 6 of the semiconductor substrate 1, a lot of plasma damaged portions are also removed by etching, and the influence of the plasma damage on the characteristics of the semiconductor device can be greatly reduced. .

  In addition, after forming the recess 7, the metal film 10 is deposited on the surface of the substrate including the recess 7 while leaving the sidewall 5, and then the metal film 10 is peeled off by a lift-off method to form the gate electrode 11. . As a result, the positional relationship between the recess 7 and the gate electrode 10 is self-aligned, a gate recess structure can be formed while always maintaining the distance stably, and a semiconductor device such as a high-frequency element having a gate recess structure with a good yield. Can be manufactured.

  In the present embodiment, the material of the first insulating film 2 is silicon nitride (SiN) and the material of the second insulating film is silicon oxide (SiO 2). The material of the insulating film 2 can be silicon oxide (SiO2), and the material of the second insulating film can be silicon nitride (SiN). In this case, the same effect as described above can be obtained.

Sectional drawing which shows the 1st step of one Example of the manufacturing method of the semiconductor device which concerns on this invention in process order. Sectional drawing which shows the 2nd step of one Example of the manufacturing method of the semiconductor device which concerns on this invention in process order. Sectional drawing which shows the 3rd step of one Example of the manufacturing method of the semiconductor device which concerns on this invention in process order. Sectional drawing which shows an example of conventional FET etc. which have a gate recess structure. Sectional drawing which illustrates the 1st step of the manufacturing method of the conventional semiconductor device which has a gate recess structure in process order. Sectional drawing which illustrates the 2nd step of the manufacturing method of the conventional semiconductor device which has a gate recess structure in process order.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 1st insulating film 3 Opening 4 2nd insulating film 5 Side wall 6 Exposed part 7 Recess 8 Two-layer photoresist film 9 Overhang-shaped opening 10 Metal film 11 Gate electrode

Claims (3)

Depositing a first insulating film on the semiconductor substrate;
Forming an opening in a portion of the first insulating film facing the gate electrode formation scheduled region of the semiconductor substrate;
Depositing a second insulating film in a predetermined thickness on the entire surface of the first insulating film including the opening;
The second insulating film is anisotropically etched for a predetermined etching time, and the second insulating film is removed while leaving the second insulating film on the side wall of the first insulating film facing the opening. Exposing the first insulating film and the semiconductor substrate in the opening;
A step of isotropically etching the exposed portion of the exposed semiconductor substrate for a predetermined etching time to form a recess;
Forming a two-layer photoresist film on the first insulating film, and forming an overhang-shaped opening so as to expose the recess-formed portion in the two-layer photoresist film;
Depositing a metal film on the two-layer photoresist film including the recess exposed in the overhang-shaped opening;
A step of peeling the two-layer photoresist film and the metal film deposited thereon using a lift-off method, and using the metal film deposited in the recess as a gate electrode. Manufacturing method.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the predetermined etching time is set to a time necessary for removing a predetermined film thickness of the second insulating film.   The method of manufacturing a semiconductor device according to claim 1, wherein the anisotropic etching is dry etching, and the isotropic etching is wet etching.

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