WO2021208997A1

WO2021208997A1 - Electrode manufacturing method, electrode, and semiconductor device

Info

Publication number: WO2021208997A1
Application number: PCT/CN2021/087442
Authority: WO
Inventors: 宋晰
Original assignee: 苏州能讯高能半导体有限公司
Priority date: 2020-04-15
Filing date: 2021-04-15
Publication date: 2021-10-21
Also published as: CN113539806A

Abstract

The present application provides an electrode manufacturing method, an electrode, and a semiconductor device, pertaining to the technical field of semiconductor manufacturing. The method comprises: forming an etch layer on a surface of a semiconductor layer, and forming an etch pattern on the etch layer, the etch pattern comprising a first aperture located at a surface of the etch layer away from a semiconductor side and communicated with a surface of the semiconductor layer; etching the surface of the semiconductor layer via the first aperture, so as to form a depression on the surface of the semiconductor layer; etching the corresponding first aperture above the depression, and etching two opposite edges of the first aperture in a width direction thereof, so as to increase the width of the first aperture; and filling, via a second aperture, the depression with a metal material until the metal material completely covers the depression. In this way, the invention enables the depression to be completely covered by the metal material in the width direction, and the metal material provides corrosion resistance to electrodes, thereby improving electrical properties.

Description

Manufacturing method of electrode, electrode and semiconductor device

This application claims the priority of the Chinese patent application No. 202010296432.7 filed on April 15, 2020, and the content of the above-mentioned Chinese patent application is quoted here in full as a part of this application.

Technical field

This application relates to the field of semiconductor manufacturing technology, in particular to a manufacturing method of an electrode, an electrode and a semiconductor device.

Background technique

The third-generation semiconductor material gallium nitride has the characteristics of large forbidden band width, high electron saturation drift speed, high breakdown field strength, good thermal conductivity, etc., and has strong spontaneous and piezoelectric polarization effects. The first-generation semiconductor materials and the second-generation semiconductor materials are more suitable for manufacturing high-frequency, high-voltage, and high-temperature-resistant high-power electronic devices, especially in the field of radio frequency and power supply, which have become the current research hotspot.

At present, 5G communication has high requirements for the bandwidth and high frequency of semiconductor devices, and the design and process flow of the metal electrode structure are closely related to the bandwidth and frequency characteristics of the semiconductor device. The metal electrode manufacturing process is the key to GaN-based electronic devices. In one of the processes, the quality of the formed metal electrode will directly affect the electrical performance of the gallium nitride semiconductor device.

Summary of the invention

The first aspect of the present application provides a method for manufacturing an electrode. The electrode needs to be formed on a semiconductor layer. The manufacturing method includes: providing a semiconductor layer, the surface of the semiconductor layer is formed with a recess; and filling the recess with a metal raw material, and the metal raw material extends to the surface of the semiconductor layer where the recess is not formed. The metal raw material is used to form electrodes.

In a specific implementation of the first aspect of the present application, forming the recess and filling the metal raw material in the recess may include the following steps S1 to S3.

S1, an etching layer is formed on the upper surface of the semiconductor layer, and the etching layer is etched to obtain an etching pattern, wherein the etching pattern includes a first layer located on the surface of the etching layer away from the semiconductor layer and communicating with the surface of the semiconductor layer. Opening; the surface of the semiconductor layer is etched through the first opening, thereby forming a depression on the surface of the semiconductor layer close to the etching layer. For example, the orthographic projection of the first opening on the surface of the semiconductor layer coincides with the orthographic projection of the recess on the surface of the semiconductor layer.

S2, etch the corresponding first opening of the etching layer above the recess, and etch the edges on opposite sides of the first opening in the width direction, so as to expand the width of the first opening to form a second opening. For example, the orthographic projection of the recess on the surface where the semiconductor layer is located is within the orthographic projection of the second opening on the surface where the semiconductor layer is located.

S3: Fill the recess with metal material through the second opening until the metal material completely covers the recess. For example, the orthographic projection of the second opening on the surface of the semiconductor layer coincides with the orthographic projection of the metal material on the surface of the semiconductor layer.

In a specific implementation of the first aspect of the present application, further, in step S2, the width of the side edge of the first opening is expanded by 0.05um-0.5um.

In a specific implementation of the first aspect of the present application, further, the etching pattern further includes a third opening located between the first opening and the recess of the etching layer, and the width of the second opening is larger than the width of the first opening and smaller than the width of the third opening. Opening width.

In a specific implementation of the first aspect of the present application, further, in step S2, plasma is used to etch the corresponding first opening above the recess to form the second opening, that is, the second opening is etched by plasma. The layer is etched to form a second opening.

In a specific implementation of the first aspect of the present application, further, the material of the semiconductor layer is a semiconductor material based on a group III-V compound.

In a specific implementation of the first aspect of the present application, further, the electrode manufacturing method may further include step S4: peeling off the etching layer.

In a specific implementation of the first aspect of the present application, further, the manufacturing method of the electrode may further include step S5: annealing the metal raw material deposited above the recess.

A second aspect of the present application provides an electrode, which is prepared using the electrode manufacturing method in the first aspect described above, wherein the metal raw material is used to form the electrode. A semiconductor layer is provided on one side of the electrode, and a recess is provided on the side of the semiconductor layer close to the electrode. The electrode is formed by filling the recess with a metal raw material, and the metal raw material of the electrode completely covers the recess.

In a specific implementation of the second aspect of the present application, further, the angle between the side surface of the recess and the bottom surface is greater than 90 degrees, and there is no gap between the electrode metal raw material and the recess at the junction of the surface of the semiconductor layer and the recess. For example, the portion of the metal raw material located in the recess is conformal to the recess.

A third aspect of the present application provides a semiconductor device including the above-mentioned electrode.

In the semiconductor device provided by a specific embodiment of the third aspect of the present application, the semiconductor device includes a semiconductor layer and a metal raw material, the surface of the semiconductor layer is provided with recesses, and the metal raw material fills the recesses and extends to the semiconductor layer that is not provided with recesses. On the surface.

In the semiconductor device provided by a specific embodiment of the third aspect of the present application, the recesses and the metal material are formed by using an etching layer. When the recesses and the metal material are formed, the etching layer is located on the side of the semiconductor layer where the recesses are provided. The etching layer includes a second opening formed by expanding the first opening corresponding to the recess, and the recess is formed by using the etching layer formed with the first opening as a mask.

In the semiconductor device provided by a specific implementation of the third aspect of the present application, the orthographic projection of the first opening on the surface where the semiconductor layer is located coincides with the orthographic projection of the recess on the surface where the semiconductor layer is located; The orthographic projection is located within the orthographic projection of the second opening on the surface where the semiconductor layer is located; and the orthographic projection of the second opening on the surface where the semiconductor layer is located coincides with the orthographic projection of the metal material on the surface where the semiconductor layer is located.

In the semiconductor device provided by a specific implementation of the third aspect of the present application, the distance from the edge of the orthographic projection of the second opening on the surface of the semiconductor layer to the edge of the orthographic projection of the recess on the surface of the semiconductor layer is 0.05um- 0.5um.

In the semiconductor device provided by a specific embodiment of the third aspect of the present application, the etching layer further includes a third opening, and the third opening is located between the second opening and the recess. The orthographic projection of the second opening on the surface where the semiconductor layer is located is within the orthographic projection of the third opening on the surface where the semiconductor layer is located. Within the projection.

In the semiconductor device provided by a specific implementation of the third aspect of the present application, the material of the semiconductor layer is a semiconductor material based on a group III-V compound.

In the semiconductor device provided by a specific embodiment of the third aspect of the present application, the angle between the side surface of the recess and the bottom surface is greater than 90 degrees, and the metal material and the recess are at the junction of the surface of the semiconductor layer (the surface facing the metal material) and the recess Seamless. For example, the portion of the metal raw material located in the recess is conformal to the recess.

A fourth aspect of the present application provides a method for manufacturing a semiconductor device, the manufacturing method includes: providing a semiconductor layer, the surface of the semiconductor layer is formed with a recess; On the sunken surface. The method of forming the recess and the metal raw material can be based on the manufacturing method mentioned in the first aspect.

The embodiments of the present application provide an electrode, which is prepared by using the above-mentioned manufacturing method of a semiconductor device, the electrode completely covers the recess, the contact surface of the electrode metal and the recess is larger, and the electrode is tightly attached at the junction of the semiconductor layer and the recess, The corrosion resistance and electrical performance of the electrode can be improved.

An embodiment of the present application provides a semiconductor device including the above-mentioned electrode. Because the semiconductor device provided by the embodiment of the present application quotes the foregoing electrode, the semiconductor device provided by the embodiment of the present application also has the advantage of an electrode.

The electrode manufacturing method, electrode and semiconductor device provided in this application can be widely used in the fields of radio frequency microwave, power supply electronics and the like.

Description of the drawings

In order to more clearly describe the technical solutions in the specific embodiments of the present application, the following will briefly introduce the drawings that need to be used in the description of the specific embodiments. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, without creative work, other drawings can be obtained based on these drawings.

FIG. 1 is a flowchart of a method for manufacturing an electrode provided by an embodiment of the application;

2 is a cross-sectional view of the electrode after step S1 in the method for manufacturing an electrode according to an embodiment of the application;

3 is a cross-sectional view of the electrode after step S2 in the method for manufacturing an electrode according to an embodiment of the application;

4A is a cross-sectional view of the electrode after step S3 in the method for manufacturing an electrode according to an embodiment of the application;

4B is a cross-sectional view of the electrode after step S4 in the method for manufacturing an electrode according to an embodiment of the application;

5 is a cross-sectional view of the electrode after step S1 in another electrode manufacturing method provided by an embodiment of the application;

6 is a cross-sectional view of the electrode after step S2 in another electrode manufacturing method according to an embodiment of the application;

FIG. 7 is a cross-sectional view of the electrode after step S3 in another electrode manufacturing method provided by an embodiment of the application.

Reference signs: 100—substrate; 200—semiconductor layer; 210—recess; 300—etching layer; 310—first opening; 320—second opening; 330—third opening; 400—metal raw material.

Detailed ways

The technical solutions of the present application will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of this application.

An etching layer is processed on the semiconductor layer, and an etching pattern is processed on the etching layer. The etching pattern has an opening facing the semiconductor layer, and a depression is formed on the semiconductor layer through the opening, and then the depression is made through the opening On the evaporated metal raw material, but the evaporated metal raw material is offset relative to the recess, and the fit is not tight, that is, the solidified metal raw material cannot completely cover the recess, and a gap will be formed at the opening of the recess, resulting in offset As a result, the electrical reliability of the metal electrode is low, the corrosion resistance is low, and the service life is low, so that the quality of the formed metal electrode cannot meet the increasingly high semiconductor performance requirements.

The purpose of this application is to provide a method for manufacturing an electrode, an electrode and a semiconductor device, in particular to an electrode in a semiconductor device and a method for manufacturing the electrode in the semiconductor device, so as to provide a metal electrode with high reliability, long life, Metal electrodes and semiconductor devices with stable performance can be widely used in radio frequency, microwave, power electronics and other fields, especially suitable for electrode production of third-generation semiconductor devices, which can effectively improve the reliability and stability of gallium nitride devices. The electrode manufacturing method, electrode and semiconductor device provided in this application alleviate the existing metal raw material electrode preparation process, the metal raw material deviation caused by the metal raw material cannot completely cover the depression, resulting in low electrical reliability of the electrode and corrosion resistance performance Technical problems of low and low service life.

At least one embodiment is disclosed to provide an electrode and a semiconductor device including the electrode. The semiconductor device includes a semiconductor layer and a metal raw material. The surface of the semiconductor layer is provided with depressions. On the surface. For example, the recess and the metal material are formed by using an etching layer. When the recess and the metal material are formed, the etching layer is located on the side of the semiconductor layer where the recess is provided. The etching layer includes the first opening corresponding to the recess and is formed by expanding The second opening, the recess is formed by using the etching layer formed with the first opening as a mask. Metal raw materials are used to form electrodes.

The embodiment of the present application provides a method for manufacturing an electrode, the electrode is formed on a semiconductor layer, and the semiconductor layer has a recess. The method of forming recesses and electrodes on the semiconductor layer may include: first forming an etching layer on the upper surface of the semiconductor layer, and preparing an etching pattern on the etching layer, wherein the etching pattern includes the etching pattern on the surface of the etching layer and A first opening connected to the surface of the semiconductor layer; etching the surface of the semiconductor layer through the first opening to form a depression on the surface of the semiconductor layer, the outline size of the depression corresponding to the outline size of the first opening on the etched layer; then Etch the corresponding first opening above the recess, etch the edges on opposite sides of the width direction of the first opening to enlarge the width of the first opening; Fill the metal material inside. After the above steps, the metal material can be stacked above the recess. Because the first opening of the etched pattern is expanded before the metal material is filled, the width of the stacked metal material is larger than the width of the recess. In this way, the recess can be completely covered in the width direction, the problem that the electrode metal and the edge of the groove are not closely attached is solved, and the corrosion resistance and electrical performance of the electrode after preparation can be improved.

Hereinafter, a method for manufacturing an electrode, an electrode, and a semiconductor device according to at least one embodiment of the present application will be described in conjunction with the description of the accompanying drawings. In addition, in this at least one embodiment, the structure of the semiconductor device will be described in conjunction with the electrode manufacturing method.

At least one embodiment of the present application provides a method for manufacturing an electrode. The method for manufacturing the electrode includes the following steps S1 to S3.

S1, an etching layer 300 is formed on the surface of the semiconductor layer 200, and the etching layer 300 is etched to obtain an etching pattern, wherein the etching pattern includes the etching layer 300 located far away from the semiconductor layer A first opening 310 connected to the surface of the semiconductor layer 200 on the surface of the semiconductor layer 200; the surface of the semiconductor layer 200 is etched through the first opening 310, that is, the etching layer 300 having the first opening 310 is used as a mask The film etches the surface of the semiconductor layer 200 so as to form a recess 210 on the surface of the semiconductor layer 200 close to the etching layer 300. In this way, the width of the first opening 310 is equal to the width of the recess 210, and the direction of the width is parallel to the surface where the semiconductor layer 200 is located, that is, the orthographic projection of the first opening 310 on the surface where the semiconductor layer 200 is located and the recess 210 on the semiconductor layer 200 The orthographic projections on the surface coincide.

For example, in at least one embodiment of the present application, the material of the etching layer 300 may be photoresist. In the step S1, the etching layer 300 is exposed and developed to obtain an etching pattern.

Exemplarily, as shown in FIGS. 1 and 2, on the side of the semiconductor layer 200 away from the substrate 100, a photoresist is applied on the surface of the semiconductor layer 200 to form an etching layer 300. The etching pattern with openings is obtained by exposure and development. The etching pattern includes a first opening 310 located on the surface of the etching layer 300 away from the semiconductor layer 200 and communicating with the surface of the semiconductor layer 200. The upper surface of the semiconductor layer 200 is etched through the first opening 310 to form a recess 210 on the upper surface of the semiconductor layer 200. The outline size of the recess 210 corresponds to the outline size of the first opening 310 on the etching layer 300. For example, in some embodiments of the present application, the etching pattern is straight, that is, from the side of the etching layer 300 facing the semiconductor layer 200 to the side of the etching layer 300 facing away from the semiconductor layer 200, the etching pattern ( The width of the first opening 310) is unchanged. For example, in some other embodiments of the present application, the etching pattern may also be in the shape of "convex" or "earth" represented by Chinese characters, for example, the word "convex" or "earth" For the undercut structure, the size of the end of the etching pattern facing the semiconductor layer 200 (opening size) is larger than the size of the end of the etching pattern facing away from the semiconductor layer 200 (opening size).

S2, the corresponding first opening 310 above the recess 210 is etched, and opposite sides of the first opening 310 in the width direction are etched, so as to expand the width of the first opening 310 to form the second opening 320. In this way, the width of the second opening 320 is greater than the width of the recess 210, that is, the orthographic projection of the recess 210 on the surface where the semiconductor layer 200 is located is within the orthographic projection of the second opening 320 on the surface where the semiconductor layer 200 is located.

For example, in at least one embodiment of the present application, as shown in FIG. 3, the second opening 320 may be formed by etching the opposite sides of the first opening 310 in the width direction by plasma. For example, oxygen plasma may be used to The width of the first opening 310 is enlarged. For example, the width of the two opposite sides of the first opening 310 in the width direction has the same expanded size.

S3: Fill the recess 210 with the metal raw material 400 through the second opening 320 until the metal raw material 400 completely covers the recess 210. Because the size of the second opening 320 is larger than the size of the recess 210, the metal raw material 400 can extend beyond the recess 210, that is, the metal raw material 400 can extend to the portion of the semiconductor layer 200 where the recess 210 is not provided, thereby ensuring that the metal raw material 400 can The recess 210 is completely covered.

As shown in FIG. 4A, along the etching layer 300 toward the semiconductor layer 200, the metal material 400 is filled into the recess 210 through the second opening 320, and the metal material will gradually pass through the widened second opening 320. Stacked in the recess 210 and part of the surface of the semiconductor layer 200. After the above steps, the metal raw material 400 can be stacked above the recess 210, because the first opening 310 of the etched pattern is expanded before the metal raw material 400 is filled, that is, the width of the second opening 320 is larger than the width of the recess 210. Therefore, the width covered by the stacked metal raw material 400 should be greater than the width of the recess 210, which effectively avoids the problem of insufficient bonding between the metal raw material and the semiconductor layer at the edge of the groove and the gap, so that the recess 210 can be completely covered in the width direction. Therefore, the corrosion resistance and electrical performance of the electrode formed by the metal raw material 400 after preparation can be improved.

In the step S2, the expanded width of the first opening 310 will affect the contact resistance and electrode stability of the electrode. The side edge width of the first opening 310 is expanded by 0.05-0.5um to form the second opening 320, then the same as in step S1 Compared with the width of the first opening 310 in, after step S2, the width of the second opening 320 is increased by 0.1-1 um compared to the width of the first opening 310. It is found through research that filling the metal raw material 400 through the second opening 320 with a width of 0.1-1um can effectively avoid the problem of the gap between the metal raw material and the semiconductor layer at the edge of the groove, even if the metal raw material 400 occurs during the filling process. With the offset, the metal raw material 400 stacked in the recess 210 can also completely cover the recess 210 in the width direction, thereby improving the electrical performance of the electrode. For example, the width of the side edge of the first opening 310 is enlarged by 0.1-0.3um, which is more conducive to reducing the contact resistance of the electrode and improving the stability of the electrode.

For example, in some embodiments of this application, as shown in FIGS. 5-7, the etching pattern is in the shape of "convex" according to Chinese characters. In the embodiment of this application, the "convex" The font can be expressed as an undercut structure, that is, the size of the end of the etching pattern facing the semiconductor layer 200 (opening size) is larger than the size of the end of the etching pattern facing away from the semiconductor layer 200 (opening size). In this way, the width of the part facing (closer to) the semiconductor layer 200 in the etching pattern is large, and the width of the part facing (further away from) the semiconductor layer 200 is small, that is, the etching pattern also includes the first part located in the etching layer 300 The third opening 330 between the opening 310 and the recess 210. In order to improve the contact resistance and electrode stability of the electrode, the width of the second opening 320 should be greater than the width of the first opening 310 and less than the width of the third opening 330, that is, the orthographic projection of the first opening 310 on the surface where the semiconductor layer 200 is located. Located within the orthographic projection of the second opening 320 on the surface where the semiconductor layer 200 is located, and the orthographic projection of the second opening 320 on the surface where the semiconductor layer 200 is located is within the orthographic projection of the third opening 330 on the surface where the semiconductor layer 200 is located .

For example, in the electrode manufacturing process where the bottom of the electrode and the semiconductor layer have an inclination, because the recess and the semiconductor layer have an inclination (the angle between the side surface of the recess and the bottom surface is greater than 90 degrees), the length of the side surface of the recess is increased, that is, along the In a direction perpendicular to the surface where the semiconductor layer is located, the recess may have a trapezoidal cross-section, the top of the trapezoid is the bottom of the recess, and the sides of the trapezoid are the sides of the recess. In this way, in the process of filling the metal to form the electrode formed of the metal material, it is easy to form a gap at the interface between the side surface of the recess and the surface of the semiconductor layer, causing the electrode formed of the metal material and the recess to shift, which makes the electrode Cannot cover the depression completely. Using the electrode manufacturing method of the present application can effectively solve the above-mentioned problem of electrodes with inclined sides.

For example, in some embodiments of the present application, in the process of forming an electrode made of metal raw materials, the same etching layer may be etched three times in succession:

First, an etching material can be used to etch on the etching layer to obtain an etching pattern having a first opening;

Then, another etching material is used to etch the semiconductor layer, thereby obtaining depressions on the upper surface of the semiconductor layer;

Then, the first opening of the above-mentioned etching layer is etched by an etching material, so that the first opening is widened to form a second opening;

Wherein, the etching material used for the second etching of the semiconductor layer is different from the etching material used in other steps. Further, the etching material used for the third etching of the first opening of the etching layer is plasma.

Finally, the metal material is filled into the recess through the second opening until the metal material completely covers the recess, forming the electrode of the present application.

In the embodiment of the present application, by re-etching the first opening of the etching layer with the etching pattern, the width of the first opening is increased to form the second opening, so that the width of the second opening can be controlled by controlling the width of the second opening. The width of the metal electrode (electrode formed of metal raw material), and the metal electrode completely falls on the recessed area and completely covers the recess. In addition, the types of the etching materials used to etch the etching layer and the semiconductor layer are different, and the comparison with the same layer has no effect, that is, the etching materials used to etch the etching layer will not etch the semiconductor layer. Yes, the etching materials used to etch the semiconductor layer will not etch the etching layer.

The manufacturing method of the electrode includes step S4: peeling off the etching layer 300, and the remaining structure may be as shown in FIG. 4B.

After the metal raw material 400 is filled, a sufficient volume of the metal raw material 400 is stacked in the recess 210 so that the metal raw material 400 completely covers the recess 210, and the etching layer 300 is removed before the stacked metal raw material 400 is further processed.

When the electrode formed of a metal raw material is an ohmic metal electrode, the method for manufacturing the electrode may further include step S5: annealing the metal raw material 400 deposited above the recess 210, and the annealing temperature may be 700 to 900 degrees. In between, for example, the annealing temperature can be 800 degrees.

For example, in at least one embodiment of the present application, the semiconductor layer 200 may include a multilayer structure arranged one above the other. For example, the material of the layer structure is a semiconductor material based on III-V compounds, which may be gallium arsenide, indium phosphide, gallium aluminum gallium nitride, indium gallium nitride, and the like.

For example, the material of the metal raw material may be one or a multi-layer alloy of titanium, aluminum, nickel, gold, and silicon. The metal process of the electrode formed from the metal raw material may include one or a combination of a metal electron beam evaporation process, a metal sputtering process, or a metal plating process.

In the field of third-generation semiconductors, the metal electrode manufacturing process is one of the key processes for gallium nitride-based electronic devices. The performance of the metal electrode will affect the performance stability of the entire semiconductor device. After research, it has been found that in the actual manufacturing process, the ohmic electrode is often slightly offset or not in close contact with the electrode recess, which greatly affects the performance of the electrode. The metal electrode (formed from metal raw materials) produced by the above-mentioned electrode production method can greatly improve the electrical performance and stability of the metal electrode, can also accurately control the size of the metal electrode, and can also reduce the use of intermediate materials and greatly save costs, thereby reducing The overall cost of semiconductor devices is suitable for industrial production.

In the actual process, in the process of forming the metal electrode, it is difficult for the electrode to completely fit the recess according to the expected structure, and the formed electrode will have a gap or offset at the edge of the recess, which greatly affects the quality and electrical performance of the electrode. Finally, the overall performance of the semiconductor device is degraded, especially for electrodes with an inclination angle greater than 90 degrees between the side and bottom of the electrode, the offset or gap at the edge of the recess is more obvious, and even the electrical performance of the semiconductor device is drastically degraded.

An embodiment of the present application provides an electrode formed on a semiconductor layer, and the semiconductor layer includes a recess. The electrode is prepared by the above-mentioned electrode manufacturing method, wherein a semiconductor layer is provided on one side of the electrode, and a recess is provided on the side of the semiconductor layer close to the electrode. The electrode is formed by solidifying the metal raw material on the recess, and the metal raw material of the electrode completely covers the recess. The electrode includes a metal raw material that completely covers the recess. The metal electrode prepared by the electrode preparation method of the present application has a larger contact surface with the recess, closely adheres to the semiconductor layer, and the corrosion resistance and electrical performance of the electrode can be improved. Especially for electrodes formed by using the recessed side surface and the bottom surface at an angle greater than 90 degrees, that is, the electrode side surface and the bottom surface have an inclination angle greater than 90 degrees, the electrode metal material formed by the manufacturing method of the present application and recessed on the surface of the semiconductor layer There is no gap at the interface with the depression, that is, the portion of the metal raw material located in the depression conforms to the depression. Exemplarily, the shape of the cross section of the recess (along the direction perpendicular to the surface where the semiconductor layer is located) is a trapezoid, and the top of the trapezoid is the bottom surface of the recess, because the shape of the metal raw material (electrode) in the recess is conformal to the shape of the recess , The shape of the metal raw material (electrode) in the recessed part of the shape of the cross-section (along the direction perpendicular to the surface where the semiconductor layer is located) is also a trapezoid, and the top of the trapezoid faces the bottom of the recess, that is, the trapezoid faces the recessed The edge of the bottom surface is the top of the trapezoid.

An embodiment of the present application provides a semiconductor device including the above-mentioned electrode. Because the semiconductor device provided in the embodiment of the present application quotes the above-mentioned electrode, the semiconductor device provided in the embodiment of the present application also has the advantage of an electrode. The semiconductor devices of this application include, but are not limited to: high-power gallium nitride high-electron mobility transistors (High Electron Mobility Transistor, HEMT) that work in a high-voltage and high-current environment, and silicon on an insulating substrate (Silicon-On) -Insulator, SOI for short) structure transistors, GaAs based transistors, Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET for short), and Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET for short), and Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET for short), and Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET for short), and Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET for short), and Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET for short), and Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET for short), and MOSFET for short. Metal-Semiconductor Field-Effect Transistor (MISFET), Double Heterojunction Field-Effect Transistor (DHFET), Junction Field-Effect Transistor (JFET), Metal Semiconductor Field Metal-Semiconductor Field-Effect Transistor (MESFET), Metal-Semiconductor Heterojunction Field-Effect Transistor (MISHFET) or other field effect transistors.

The electrode manufacturing method, electrode and semiconductor device provided in this application can be widely used in the fields of radio frequency microwave, power supply electronics and the like. Especially for GaN electronic devices with large forbidden band width, high electron mobility, high breakdown field strength, and good thermal conductivity, the advantages are more obvious. The quality of the formed metal electrode is good, the electrode stability is good, and the electrical performance of the electrode is significantly improved. It can better meet the high-performance requirements of the rapidly developing electronic communications and other fields.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, not to limit them. The words above, upper surface, and above appearing in this application are for convenience of expression and are not limitations on the technical solutions themselves. Although the application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions described in the foregoing embodiments, or make equivalents to some or all of the technical features Replacement; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

A method for manufacturing an electrode, the electrode being formed on a semiconductor layer (200), characterized in that the manufacturing method includes the following steps:

S1. An etching layer (300) is formed on the surface of the semiconductor layer (200), and the etching layer (300) is etched to obtain an etching pattern, wherein the etching pattern includes The first opening (310) of the etching layer (300) away from the surface of the semiconductor layer (200) and communicating with the surface of the semiconductor layer (200); Etching the surface of the semiconductor layer (200), thereby forming the recess (210) on the surface of the semiconductor layer (200) close to the etching layer (300);

S2, etching the first opening (310) of the etching layer (300) corresponding to the top of the recess (210), and etching the edges on opposite sides of the first opening (310) in the width direction , Thereby expanding the width of the first opening (310) to form a second opening (320);

S3: Fill the recess (210) with a metal material (400) through the second opening (320) until the metal material (400) covers the recess (210).
The method of manufacturing an electrode according to claim 1, wherein:

The orthographic projection of the first opening (310) on the surface where the semiconductor layer (200) is located coincides with the orthographic projection of the recess (210) on the surface where the semiconductor layer (200) is located;

The orthographic projection of the recess (210) on the surface where the semiconductor layer (200) is located is within the orthographic projection of the second opening (320) on the surface where the semiconductor layer (200) is located; and

The orthographic projection of the second opening (320) on the surface where the semiconductor layer (200) is located coincides with the orthographic projection of the metal material (400) on the surface where the semiconductor layer (200) is located.
The electrode manufacturing method according to claim 1 or 2, characterized in that, in the step S2, the width of the side edge of the first opening (310) is expanded by 0.05um-0.5um.
The method of manufacturing an electrode according to any one of claims 1 to 3, wherein the etching pattern further comprises the first opening (310) and the first opening (310) in the etching layer (300). The width of the third opening (330) between the recesses (210) is larger than the width of the first opening (310) and smaller than the width of the third opening (330).
The method of manufacturing an electrode according to claim 4, wherein:

The orthographic projection of the second opening (320) on the surface where the semiconductor layer (200) is located is within the orthographic projection of the third opening (330) on the surface where the semiconductor layer (200) is located, and The orthographic projection of the recess (210) on the surface where the semiconductor layer (200) is located is within the orthographic projection of the third opening (330) on the surface where the semiconductor layer (200) is located.
The method for manufacturing an electrode according to any one of claims 1-5, wherein in the step S2, the etching layer (300) having the first opening (310) is etched by plasma. ) To form the second opening (320).
The method for manufacturing an electrode according to any one of claims 1 to 6, characterized in that the material of the semiconductor layer (200) is a semiconductor material based on a group III-V compound.
The method of manufacturing an electrode according to any one of claims 1-7, further comprising:

Step S4, peel off the etching layer (300).
The method of manufacturing an electrode according to claim 8, further comprising:

In step S5, the metal raw material (400) deposited above the recess (210) is annealed.
An electrode, the electrode is arranged to be formed on a semiconductor layer (200), the semiconductor layer (200) includes a recess (210), characterized in that the electrode according to any one of claims 1-9 is used The manufacturing method prepares the electrode on the semiconductor layer (200), wherein the electrode is located on the side of the semiconductor layer (200) where the recess (210) is provided, and the electrode is made of a metal raw material (400). ) Is filled on the recess (210), and the metal material (400) of the electrode completely covers the recess (210).
The electrode according to claim 10, wherein the angle between the side surface of the recess (210) and the bottom surface is greater than 90 degrees, and the metal raw material (400) and the recess (210) are in the semiconductor layer. There is no gap at the interface between the surface of the (200) and the recess (210), and the part of the metal raw material (400) located in the recess (210) is conformal to the recess (210).
A semiconductor device, characterized in that the semiconductor device comprises a semiconductor layer (200) and the electrode according to claim 10 or 11.