JP2007227644A - Support structure for semiconductor wafer dicing, semiconductor wafer dicing apparatus, and its dicing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a support structure for semiconductor wafer dicing which can prevent the warpage of a dicing sheet, or the relative displacement of a dicing blade and a chip caused by the displacement of the dicing sheet to a stage, and the occurrence of crack in the side or rear of the chips by dicing. <P>SOLUTION: On the stage 5 of a dicing portion, a dicing sheet 2 is laid on which a wafer is mounted through a glass wafer 3. The lower surface (the surface which is not wafer-mounted) and the upper surface of the glass wafer 3 are adhered through the layer of a binding material. Moreover, the lower surface of the glass wafer 3 is fixed to the stage 5 by vacuum absorption through a pore formed on the stage 5. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a dicing support structure for a semiconductor wafer, a semiconductor dicing apparatus, and a dicing method thereof, and more particularly to a dicing support structure for a semiconductor wafer, a semiconductor dicing apparatus, and a dicing method that are suitable for dicing a semiconductor chip that is becoming smaller.

  In a semiconductor chip dicing process, a wafer is mounted on a dicing sheet, and the dicing sheet on which the wafer is mounted is fixed on a stage of a dicing apparatus by vacuum suction, and dicing is performed. Due to the recent miniaturization of semiconductor chips, particularly when a semiconductor wafer on which a one-dimensional CCD sensor having a minimum width is formed is diced into chips, the chip may be displaced on the dicing sheet during dicing. At this time, cracks are generated on the side surface and the back surface of the chip, and silicon scraps adhere to the chip. And the silicon | silicone waste adhering on a chip | tip will make the electrical property of a chip | tip defective, and will cause a yield fall and a quality fall. Therefore, it is desired to develop a semiconductor wafer dicing support structure, a semiconductor dicing apparatus, and a dicing method thereof that reduce the generation of cracks and silicon scraps on the chip.

  FIG. 1 shows a schematic configuration of a conventional dicing apparatus. The conventional dicing apparatus 50 includes a wafer ring cassette storage portion 12a for storing a wafer ring cassette in which a dicing sheet and a wafer 4 to be diced are aligned and mounted with respect to the ring 1, and a dicing blade. A dicing unit 9 for dicing the wafer and a spinner unit 10 for cleaning the diced chip and removing moisture at the time of cleaning are provided.

  In the conventional dicing apparatus 50, before the dicing process of the wafer 4 is started, the wafer 4 bonded to the dicing sheet 2 set in the wafer ring cassette housing portion 12a is prepared. First, in the wafer mount apparatus 100 shown in FIG. 2, the wafer 4 accommodated in the wafer cassette is set in the wafer cassette accommodating portion 7, and the ring 1 and the dicing sheet 2 are set at predetermined positions. Next, in the wafer mount unit 8, the ring 1 and the dicing sheet 2 are taken out one by one from the storage destination, the dicing sheet 2 and the wafer 4 are bonded onto the ring 1, and stored in the wafer ring cassette storage unit 12b. Is done. The wafer ring cassette is transported to the wafer ring cassette storage portion 12a of the dicing apparatus 50. In the dicing apparatus 50 of FIG. 1, the wafer 1 to be diced in the wafer ring cassette storage unit 12a is taken out from the wafer ring cassette one by one until the ring 1 is transported to the wafer ring cassette storage unit 12a and the dicing unit 9. The stage 5 (refer to FIG. 3 showing the dicing support structure of the wafer 4 in the dicing part 9 for the stage 5) moves to the intermediate part of the ring 1 to align the ring 1 and the stage 5. Thereafter, the stage 5 moves and transports to the dicing unit 9.

  A dicing support structure for a semiconductor wafer in the dicing unit 9 of the conventional dicing apparatus 50 is shown in FIG. In the dicing unit 9, the ring 1 and the wafer 4 are mounted on the dicing sheet 2, and the unmounted surface of the dicing sheet 2 is directly fixed on the stage 5 of the dicing unit 9 by vacuum suction. Yes. This fixing is performed when the ring 1 and the stage 5 are aligned before being conveyed to the dicing unit. Next, as shown in FIG. 4, the wafer 4 is cut into single chips 17 by the dicing blade 18. When the dicing process is completed, the chip 17 and the ring 1 bonded on the dicing sheet are respectively conveyed to the spinner unit 10. In the spinner unit 10, the surface of the wafer (exactly in a state diced into a plurality of chips) is washed with pure water while being rotated at about 1000 rpm, and dried at a high speed of 2000 to 3000 rpm. Thereafter, the chip 17 and the ring 1 bonded on the dicing sheet 2 are accommodated in the original wafer ring cassette accommodating portion 12a.

  FIG. 5 shows a schematic configuration of a UV irradiation apparatus 150 for irradiating the wafer 4 after dicing with UV and peeling the chips 17 from the dicing sheet 2. The chip 17 and the ring 1 bonded on the dicing sheet 2 are transported from the wafer ring cassette storage unit 12c to the transport preparation unit 20 of the UV irradiation apparatus 150. After that, the UV irradiation lamp unit 21 carries the UV irradiation by the UV irradiation lamp 22 from the back surface direction where the dicing sheet 2 is not mounted. The dicing sheet 2 includes a UV curable pressure-sensitive adhesive layer on the mounting surface, and the adhesive force to the wafer 4 and the ring 1 is reduced by UV irradiation of about 100 mj, for example. For this reason, the UV irradiation in the UV irradiation lamp unit 21 reduces the adhesive force of the UV curable pressure-sensitive adhesive layer of the dicing sheet 2 and makes it easy to peel the chip 17 from the dicing sheet 2. In this state, the chip 17 and the ring 1 bonded on the dicing sheet are stored again in the wafer ring cassette storage unit 12c.

  In relation to the above-described technology, the following proposals have been made.

  In “a manufacturing method of a semiconductor chip” disclosed in Japanese Patent Application Laid-Open No. 2003-086538, a dicing tape having a tape base material and an adhesive layer for holding the semiconductor wafer is attached to a dicing tape and then before dicing. A method of manufacturing a semiconductor chip in which the adhesive layer is cured, the semiconductor wafer is diced in this state, and then the adhesive force of the adhesive layer is reduced before the semiconductor wafer and the dicing tape are peeled off, and the semiconductor chip is peeled from the dicing tape. Has been proposed.

  In addition, in the “wafer processing tape and method for manufacturing the same” disclosed in Japanese Patent Application Laid-Open No. 2005-203749, the wafer is fixed, diced, and overlapped with a lead frame or a semiconductor chip when manufacturing the semiconductor device. A wafer processing tape having an adhesive layer and a pressure-sensitive adhesive layer provided on at least one surface of a base film, wherein the pressure-sensitive adhesive layer does not exist on the surface to be bonded to the wafer; Provide an area that exists, and when picking up, in the area where the adhesive layer does not exist, the adhesive layer moves to the chip side, and when peeling the tape, the adhesive layer remains on the base film side in the area where the adhesive layer exists A wafer processing tape has been proposed.

JP 2003-086538 A JP 2005-203749 A

  In the conventional dicing apparatus 50 shown in FIG. 1, dicing is performed in the dicing unit 9 by directly fixing the back surface of the dicing sheet 2 on which the wafer 4 is mounted on the stage 5 by vacuum suction. In the dicing unit 9, as shown in FIG. 4, since the back surface of the dicing sheet 2 is not completely fixed to the stage 5 of the dicing apparatus 50 during dicing, the dicing sheet 2 is bent or the stage 5 of the dicing sheet 2. Due to the misalignment with respect to the dicing blade 18, the chip 17 is misaligned with respect to the dicing blade 18, and cracks 23 are generated on the side surface and the back surface of the chip. Further, in order to reduce chip cracks, the dicing sheet 2 can be bent or the dicing sheet 2 can be cut in two steps using a blade having a wide dicing blade and a thin blade when dicing. The positional deviation with respect to the stage 5 occurs, and a crack 23 is generated in the chip. For this reason, silicon scraps adhere to the chip, resulting in poor electrical characteristics, resulting in a decrease in yield and quality. Further, in the conventional dicing process, the dicing apparatus 50, the wafer mount apparatus 100, and the UV irradiation apparatus 150 are configured independently of each other. As a result, the man-hours for transporting the wafer ring cassette between the apparatuses are required.

  In the following, means for solving the problem will be described using reference numerals with parentheses used in [Best Mode for Carrying Out the Invention]. These symbols are added in order to clarify the correspondence between the description of [Claims] and the description of the best mode for carrying out the invention. ] Should not be used for interpretation of the technical scope of the invention described in the above.

  The dicing support structure for a semiconductor wafer according to the present invention is a dicing support structure for a semiconductor wafer when the semiconductor wafer is diced by a semiconductor dicing apparatus (300, 350), and is a stage provided in a dicing section (9) of the semiconductor dicing apparatus. (5) A glass wafer (3) fixed on the top and a dicing sheet (2) bonded onto the glass wafer and onto which a semiconductor wafer to be diced is bonded are provided.

  According to the present invention, a semiconductor wafer dicing support structure, a semiconductor dicing apparatus, and a dicing method thereof, which are suitable for dicing semiconductor chips whose size has been reduced in size, especially when dicing a semiconductor wafer, suppressing the occurrence of cracks on the side and back surfaces of the chip. Can be provided.

  With reference to the accompanying drawings, a semiconductor wafer dicing support structure, a semiconductor dicing apparatus, and a dicing method thereof according to the present invention will be described below.

  In the semiconductor dicing apparatus of the present invention, a wafer-mounted dicing sheet is placed on the stage of the dicing part via a glass wafer. The lower surface of the dicing sheet (the surface not mounted on the wafer) and the upper surface of the glass wafer are bonded through an adhesive layer. The glass wafer is fixed to the stage by vacuum suction of the lower surface of the glass wafer through the pores formed on the stage. Thereby, at the time of dicing, the lower surface of the dicing sheet is completely fixed to the glass wafer, and the glass wafer itself is also fixed to the stage.

  In the semiconductor dicing apparatus of the present invention, by having the semiconductor wafer dicing support structure in the dicing section as described above, the dicing sheet bends even when dicing particularly for semiconductor chips that are becoming smaller in size. There is no. Further, the occurrence of cracks on the side surface and the back surface of the semiconductor chip due to the displacement of the position of the dicing sheet with respect to the glass wafer and the position of the semiconductor chip with respect to the dicing blade is suppressed. Accordingly, it is possible to provide a semiconductor wafer dicing support structure, a dicing apparatus, and a dicing method thereof that maintain reliability and improve production efficiency even when dicing a semiconductor chip that has been further downsized in recent years. Can do.

(Embodiment 1) Semiconductor wafer dicing support structure, semiconductor dicing apparatus FIG. 6 shows a schematic configuration of a semiconductor dicing apparatus according to Embodiment 1 of the present invention. A semiconductor dicing apparatus 300 according to the present embodiment stores a storage unit that stores the ring 1 and the dicing sheet 2, a wafer cassette storage unit 7 that stores a wafer 4 before dicing, and a glass wafer 3. A glass wafer storage unit 3 ′, and a wafer ring cassette storage unit 12 in which the wafer 4 and the dicing sheet 2 stored in the wafer cassette are stored in a state of being bonded to the ring 1. In this embodiment, the dicing sheet 2 is attached to the ring 1 and then the glass wafer 3 is bonded to the back surface of the wafer mounting surface of the dicing sheet 2 or the back surface of the ring 1 and the wafer 4 is turned up. The wafer mounting portion 8 is provided for bonding the dicing sheet 2 to the ring 1 and the wafer 4 at the same time, and then bonding the glass wafer 3 to the back surface of the wafer mounting surface of the dicing sheet 2. ing. Further, a dicing part 9 for dicing the wafer 4 in a wafer-mounted state, a spinner part 10 for cleaning the wafer 4 after dicing, and a UV curable adhesive layer interposed between the dicing sheet 2 and the wafer 4 Alternatively, in order to reduce the adhesive strength of the UV curable pressure-sensitive adhesive layer interposed between the dicing sheet 2 and the glass wafer 3, a UV irradiation unit 11 for performing UV irradiation on the pressure-sensitive adhesive layer is provided. I have.

  In the dicing unit 9 of the semiconductor dicing apparatus 300 according to the present embodiment, as shown in FIG. 7E in particular, the dicing sheet is mounted on the stage 5 of the dicing unit 9 via the glass wafer 3. 2 is placed. As shown in FIG. 8, the dicing sheet 2 has a pressure-sensitive adhesive 15 (acrylic UV curable pressure-sensitive adhesive) laminated on both sides of a dicing sheet base material 14 (polyvinyl chloride (PVC), polyolefin, etc.). The pressure-sensitive adhesive layers are each covered with a release sheet (polyester or the like) and peeled off during use. The thickness of the dicing sheet 2 is optimally about 100 μm excluding the release sheet portion. The lower surface of the dicing sheet 2 and the upper surface of the glass wafer 3 are bonded via a layer of the adhesive 15. In addition, the glass wafer 3 is fixed to the stage 5 by vacuum suction of the surface not bonded to the dicing sheet 2 through the pores formed on the stage 5. Thereby, the lower surface of the dicing sheet 2 is completely fixed to the glass wafer 3, that is, the stage 5 at the time of dicing. Moreover, in the dicing part 9 of this Embodiment, as shown in FIG.7 (f), the glass wafer 3 is further fixed with respect to the stage (not shown) of the dicing part 9 with respect to the said stage. Therefore, the dicing sheet 2 bonded to the glass wafer 3 may be more securely fixed by way of the glass wafer guide 5 ′.

  The diameter of the glass wafer 3 in the present embodiment is larger than the diameter of the wafer 4 to be diced. For example, the diameter of the glass wafer 3 is about 120 mm larger than the diameter of the wafer 4 to be diced. Is optimal. Further, the glass wafer 3 in the present embodiment has a thickness that is thicker than the thickness of the wafer 4 to be diced, and for example, the thickness is about the thickness of the wafer 4 to be diced. The one of about 1.5 times is optimal. Specifically, when the diameter of the wafer 4 to be diced is 150 mm, the glass wafer 3 having a diameter of about 270 mm is suitable. The dicing sheet 2 in the present embodiment is particularly limited as long as the dicing sheet 2 is formed based on the outer peripheral shape of the ring 1 and has a size that covers the entire surface of the glass wafer 3. There is nothing. Furthermore, in the present embodiment, the outer diameter of the ring 1 that fixes the glass wafer 3 and the dicing sheet 2 is optimally about 290 mm, for example, when the diameter of the wafer 4 to be diced is 150 mm.

  In the present embodiment, since the semiconductor wafer has a dicing support structure as described above, the dicing sheet bonded to the lower surface bends even when dicing is performed on a semiconductor chip that is particularly downsized. There is nothing. In addition, by providing the glass wafer 2 and fixing the dicing sheet 2 to the glass wafer 3 via an adhesive, the occurrence of cracks on the chip side surface and the back surface due to the displacement of the dicing sheet is suppressed. Further, in this embodiment, as shown in FIG. 6, the dicing apparatus 300 has a wafer mounting function, a spinner function, and a UV irradiation function in a lump. As a result, in the present embodiment, the conventional configuration of the individual devices having independent functions such as the wafer mount function, the spinner function, and the UV irradiation function are integrated to form the conventional one. It is possible to greatly reduce the man-hours for transporting the wafer ring cassette between the respective devices and to improve the production efficiency of the semiconductor chip.

(Operation Principle of First Embodiment) Semiconductor Dicing Method A semiconductor dicing method using the semiconductor dicing apparatus according to the first embodiment of the present invention will be described with reference to FIGS.

  When the dicing process of the target wafer 4 is started by the semiconductor dicing apparatus 300 according to the first embodiment, the wafers 4 to be diced are taken out one by one from the wafer cassette storage unit 7 as shown in FIG. It is. Accordingly, the ring 1 and the dicing sheet 2 are taken out one by one from each storage unit. Then, the dicing sheet 2 is bonded to the ring 1 in the wafer mount portion 8 (step S1; FIGS. 7A and 7B). Next, the glass wafer 3 larger than the wafer 4 is bonded to the back surface of the wafer mounting surface of the dicing sheet 2 (step S2; FIG. 7C). Thereafter, in the wafer mount portion 8 of the semiconductor dicing apparatus 300, the wafer 4 to be diced is mounted and bonded to the wafer mount surface of the dicing sheet 2 (step S3; FIG. 7D). In this state, the wafer moves to the dicing section 9 in FIG. 6, and the surface of the glass wafer 3 not bonded to the dicing sheet is fixed on the stage 5 of the dicing section 9 by vacuum suction (step S4; FIG. 7 (e). )). However, the glass wafer is fixed to the stage in step S4 at any position on the transfer path where the glass wafer is transferred from the wafer mount unit 8 to the dicing unit 9 by moving the stage. it can. In the present embodiment, as shown in FIG. 7 (f), the glass wafer 3 is not directly fixed to the stage 5, and further provided with a glass wafer guide 5 ′, and the glass wafer guide 5 ′ is used for glass. A method of guiding the wafer 3 from the outer periphery and fixing it may be used. Then, as shown in FIG. 9, dicing of the target wafer 4 is performed by the dicing blade 18 (step S5). In dicing, the dicing blade cuts the dicing sheet 2 from the adhesive surface on the back surface of the wafer to a depth of, for example, about 20 μm and does not cut the glass wafer 3 as in the conventional case. The optimum depth of the dicing sheet 2 is determined according to the type and thickness of the adhesive 15 of the dicing sheet 2 to be used. After dicing in step S5, the diced chips 17 are conveyed to the spinner unit 10 while being bonded to the dicing sheet 2, respectively. Then, in the spinner unit 10, the surface is washed with pure water and dried by high-speed rotation (step S6). When the drying of the chips 17 is completed, each chip 17 is conveyed to the UV irradiation unit 11 while being adhered to the dicing sheet 2. When the dicing sheet 2 provided with the UV curable adhesive as the adhesive 15 is bonded to the glass wafer 3, the UV irradiation unit 11 irradiates the adhesive 15 with 100 mj of UV (step S7). At this time, the stage center fixed to the back surface of the glass wafer 3 has an opening or the ring 1 is fixed from the periphery so that UV irradiation can be performed from the back surface side of the glass wafer 3. The glass wafer 3 is made of a glass material that transmits UV light. However, the material is not limited to the glass material as long as it exhibits the same physical properties as the glass material. After UV irradiation in step S7, the adhesive force of the layer of the pressure-sensitive adhesive 15 formed on both surfaces of the dicing sheet base material 14 to the chip 17 and the glass wafer 3 is reduced. Thereby, the glass wafer 3 is removed from the dicing sheet 2 (step S8). After the glass wafer 3 is attached and detached, the glass wafer 3 is stored in the glass wafer storage unit 3 ′, and the wafer ring cassette of the wafer ring cassette storage unit 12 with the chip 17 bonded to the dicing sheet 2 of the ring 1. 13 is stored. This glass wafer 3 can be recycled. After the glass wafer 3 is removed from the dicing sheet 2, the chip 17 is returned to the wafer ring cassette storage unit 12 while being adhered to the dicing sheet 2 in preparation for the next step.

  In order to realize step S1 to step S4 in the present embodiment, not only the method described above but also another method shown in FIG. 10 may be used. That is, as a first step, the mounting surface of the ring 1 and the wafer 4 to be diced is placed on the table 6 (step S10; FIGS. 10A and 10B). Next, the dicing sheet 2 is simultaneously bonded to the ring 1 and the mounting surface placed on the wafer 4 to be diced upward (step S20; FIG. 10C). Thereafter, the dicing sheet 2 on which the ring 1 and the wafer 4 to be diced are mounted is turned over, and the glass wafer 3 is bonded to the unmounted back surface of the dicing sheet 2 (step S30; FIG. 10 (d), (E)). In this state, the wafer moves to the dicing unit 9 in FIG. 6, and the surface of the glass wafer 3 not bonded to the dicing sheet is fixed on the stage 5 of the dicing unit 9 by vacuum suction (step S40; FIG. 10). (F)).

  As described above, in the present embodiment, since the lower surface of the dicing sheet 2 is firmly fixed to the glass wafer 3 during dicing in the dicing unit 9, the chip 17 does not shake with respect to the dicing blade. Generation of cracks on the side surface and the back surface can be suppressed. As a result, the reliability and production efficiency of the miniaturized chip 17 can be improved.

(Embodiment 2)
FIG. 11 shows a schematic configuration of the semiconductor dicing apparatus according to the second embodiment of the present invention. The basic configuration of the present embodiment is the same as that of the first embodiment. However, the semiconductor dicing apparatus 350 according to the present embodiment includes a heating unit 11 ′ in place of the UV irradiation unit 11 in the first embodiment. The heating unit 11 ′ is thermally connected to the back surface of the glass wafer 4 and includes a stage unit serving as a heater plate.

  The dicing support structure of the semiconductor wafer in the dicing section 9 of the present embodiment is the same as that of the first embodiment, but the UV curable adhesive is used as the adhesive 15 provided by being laminated on both surfaces of the dicing sheet 2. Instead, a heat release foaming agent is used. This is called a heat-peelable pressure-sensitive adhesive sheet. In the present embodiment, the adhesive provided by being laminated on the surface of the dicing sheet 2 to be bonded to the glass wafer 3 of the dicing sheet 2 is used as the first adhesive, and is bonded to the semiconductor wafer 4 of the dicing sheet base 14. If the adhesive provided on the surface to be laminated is the second adhesive, the second adhesive is always provided on the surface of the dicing sheet base material 14 of the dicing sheet 2 to be adhered to the semiconductor wafer 4. . On the other hand, the first adhesive may be provided by being laminated on the surface of the dicing sheet 2 to be bonded to the glass wafer 3 of the dicing sheet base material 14, or may be bonded to the glass wafer 3 of the dicing sheet base material 14. It is good also as a structure with which it is apply | coated and provided on the adhesive surface with the dicing sheet 2 of the glass wafer 3, without being laminated | stacked on the surface to be performed. When the thermal peeling foaming agent is applied and provided as the first adhesive on the adhesive surface of the glass wafer 3 to the dicing sheet 2, as shown in FIG. An application unit 19 is provided on the upper surface of the wafer 3 to apply a thermal peeling foaming agent.

(Operation Principle of Second Embodiment) Semiconductor Dicing Method The basic operation principle of the semiconductor dicing method by the semiconductor dicing apparatus according to the second embodiment of the present invention is the same as that of the first embodiment. However, in the first embodiment, the UV irradiation unit 11 performs UV irradiation on the adhesive 17 interposed between the chip 17 and the dicing sheet 2 and between the dicing sheet 2 and the glass wafer 3 (step S7). Instead, the chip 17 cleaned by the spinner unit 10 is transported to the heating unit 11 ′. And in heating part 11 ', the thermal peeling foaming agent which is the adhesive 15 is made into 100 to 150 degreeC through the glass wafer 3 with the heater plate installed so that it may contact thermally with the glass wafer 4 back surface. (Step S7 '). By step S7 ′, fine irregularities can be formed on the upper layer of the thermal peeling foaming agent which is the adhesive 15. Thereby, peeling of the chip | tip 17 from the dicing sheet 2 and peeling of the glass wafer 3 from the dicing sheet 2 can be performed easily.

  Further, in the present embodiment, when the thermal peeling foaming agent as the adhesive 15 is applied to the glass wafer 3 side, the glass wafer 3 is taken out from the glass wafer storage portion and bonded to the dicing sheet 2 at the wafer mount portion 8. Before, in the application part 19, the adhesive 15 which is a heat peeling foaming agent is apply | coated to the adhesive surface with the dicing sheet 2 of the glass wafer 3. FIG.

  As described above, in the present embodiment, since the lower surface of the dicing sheet 2 is firmly fixed to the glass wafer 3 at the time of dicing in the dicing portion 9 as in the first embodiment, the chip 17 with respect to the dicing blade is fixed. There is no blurring. As a result, it is possible to suppress the occurrence of cracks on the side surface and the back surface of the chip, and the reliability and production efficiency of the miniaturized chip 17 can be improved. Further, by having a plurality of options for the pressure-sensitive adhesive while maintaining the above-described effects, it is possible to expand the selection range of the constituent requirements for the semiconductor dicing apparatus and the processing steps of the semiconductor dicing method.

It is a figure which shows schematic structure of the conventional dicing apparatus. It is a figure which shows schematic structure of the conventional wafer mount apparatus. It is a figure which shows the dicing support structure of the semiconductor wafer in the dicing part of the conventional dicing apparatus. It is a figure which shows the model at the time of the dicing in FIG. It is a figure which shows schematic structure of the conventional UV irradiation apparatus. 1 is a diagram illustrating a schematic configuration of a semiconductor dicing apparatus according to a first embodiment. It is a figure which shows the dicing process by the semiconductor dicing apparatus concerning Embodiment 1. FIG. It is a figure which shows the structure of the dicing sheet in Embodiment 1. FIG. It is a figure which shows the model of the dicing support structure of the semiconductor wafer in the dicing part of Embodiment 1 at the time of dicing. It is a figure which shows the other dicing process by the semiconductor dicing apparatus concerning Embodiment 1. FIG. It is a figure which shows schematic structure of the semiconductor dicing apparatus concerning Embodiment 2. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Ring 2 ... Dicing sheet 3 ... Glass wafer 3 '... Glass wafer storage part 4 ... Wafer 5 ... Stage 5' ... Glass wafer guide 6 ... Stand 7 ... Wafer cassette storage part 8 ... Wafer mount part 9 ... Dicing part 10 ... Spinner unit 11 ... UV irradiation unit 11 '... heating unit 12, 12a, 12b, 12c ... wafer ring cassette storage unit 13 ... wafer ring cassette 14 ... dicing sheet base material 15 ... adhesive 16 ... release sheet 17 ... chip 18 ... dicing Blade 19 ... coating unit 20 ... transfer preparation unit 21 ... UV irradiation lamp unit 22 ... UV irradiation lamp 23 ... crack 50 ... conventional dicing apparatus 100 ... conventional wafer mounting apparatus 150 ... conventional UV irradiation apparatus 300, 350 ... semiconductor dicing apparatus

Claims (18)

A semiconductor wafer dicing support structure when dicing a semiconductor wafer with a semiconductor dicing apparatus,
A glass wafer fixed on a stage provided in a dicing unit of the semiconductor dicing apparatus;
A dicing support structure for a semiconductor wafer, comprising: a dicing sheet that is bonded onto the glass wafer and onto which a semiconductor wafer to be diced is bonded. The dicing support structure for a semiconductor wafer according to claim 1,
The diameter of the glass wafer is set larger than the diameter of the semiconductor wafer to be diced, and the thickness of the glass wafer is set to be thicker than the thickness of the semiconductor wafer to be diced. Construction. The dicing support structure for a semiconductor wafer according to claim 1 or 2,
Fine holes are formed on the stage, and the glass wafer is fixed on the stage by vacuum suction from the fine holes,
The dicing sheet is bonded to the upper surface of the glass wafer, the lower surface of which is the back surface of the surface of the glass wafer fixed to the stage, by a first adhesive, and the upper surface of the dicing sheet is a semiconductor to be diced. A dicing support structure for a semiconductor wafer provided with a second pressure-sensitive adhesive for bonding to the back surface of the wafer. In the semiconductor wafer dicing support structure according to claim 3,
The dicing support structure for a semiconductor wafer, wherein each of the first pressure-sensitive adhesive and the second pressure-sensitive adhesive is a UV curable pressure-sensitive adhesive. In the semiconductor wafer dicing support structure according to claim 4,
A dicing support structure for a semiconductor wafer, wherein the first pressure-sensitive adhesive is provided in advance on the lower surface of the dicing sheet. In the semiconductor wafer dicing support structure according to claim 3,
The dicing support structure for a semiconductor wafer, wherein the first pressure-sensitive adhesive and the second pressure-sensitive adhesive are each a heat release foaming agent. The dicing support structure for a semiconductor wafer according to claim 6,
A dicing support structure for a semiconductor wafer, wherein the first pressure-sensitive adhesive is provided in advance on the lower surface of the dicing sheet. The dicing support structure for a semiconductor wafer according to claim 6,
The dicing support structure for a semiconductor wafer, wherein the first pressure-sensitive adhesive is provided on the upper surface of the glass wafer by coating. A wafer mount portion for mounting a semiconductor wafer to be diced and a wafer ring on the wafer mount surface of the dicing sheet;
A dicing unit for dicing the semiconductor wafer to be diced by supporting by the dicing support structure for a semiconductor wafer according to any one of claims 1 to 8,
A spinner unit for cleaning and drying the diced semiconductor wafer;
A semiconductor dicing apparatus comprising: a mechanism for reducing an adhesive force between the dicing sheet and a semiconductor chip cut out from the semiconductor wafer by dicing after drying. A wafer mount portion for mounting a semiconductor wafer to be diced and a wafer ring on the wafer mount surface of the dicing sheet;
A dicing part for dicing the semiconductor wafer to be diced by supporting the semiconductor wafer with a dicing support structure for a semiconductor wafer according to claim 4 or 5;
A spinner unit for cleaning and drying the diced semiconductor wafer;
A semiconductor dicing apparatus comprising a mechanism for reducing an adhesive force between the dicing sheet and a semiconductor chip cut out from the semiconductor wafer by dicing after drying,
The mechanism for reducing the adhesive force is a UV irradiation unit, and the UV irradiation unit performs UV irradiation on the first adhesive layer and the second adhesive layer. A wafer mount portion for mounting a semiconductor wafer to be diced and a wafer ring on the wafer mount surface of the dicing sheet;
A dicing unit for dicing the semiconductor wafer to be diced by supporting by the dicing support structure for a semiconductor wafer according to any one of claims 6 to 8,
A spinner unit for cleaning and drying the diced semiconductor wafer;
A semiconductor dicing apparatus comprising a mechanism for reducing an adhesive force between the dicing sheet and a semiconductor chip cut out from the semiconductor wafer by dicing after drying,
The mechanism for reducing the adhesive force is a heating unit, and the heating unit heats the first pressure-sensitive adhesive layer and the second pressure-sensitive adhesive layer through the glass wafer. A wafer mount portion for mounting a semiconductor wafer to be diced and a wafer ring on the wafer mount surface of the dicing sheet;
A dicing unit for dicing the semiconductor wafer to be diced by supporting the semiconductor wafer with a dicing support structure for a semiconductor wafer according to claim 8;
A spinner unit for cleaning and drying the diced semiconductor wafer;
A semiconductor dicing apparatus comprising a mechanism for reducing an adhesive force between the dicing sheet and a semiconductor chip cut out from the semiconductor wafer by dicing after drying,
Furthermore, before the glass wafer is mounted on the dicing sheet in the wafer mount portion, an application portion for applying the first pressure-sensitive adhesive to the adhesive surface of the glass wafer with the dicing sheet is provided. ,
The mechanism for reducing the adhesive force is a heating unit, and the heating unit heats the first pressure-sensitive adhesive layer and the second pressure-sensitive adhesive layer through the glass wafer. A wafer mounting step for mounting a semiconductor wafer to be diced and a wafer ring on the wafer mounting surface of the dicing sheet;
By supporting by a dicing support structure of a semiconductor wafer having a glass wafer fixed on a stage, a dicing sheet adhered on the glass wafer, and the semiconductor wafer to be diced on the dicing sheet, A dicing step for dicing the semiconductor wafer to be diced;
A spinner step for cleaning and drying the diced semiconductor wafer;
A method of dicing a semiconductor wafer, comprising: after drying, reducing a bonding force between the dicing sheet and a semiconductor chip cut out from the semiconductor wafer by dicing. The method for dicing a semiconductor wafer according to claim 13.
The lower surface of the dicing sheet and the upper surface of the glass wafer, which is the rear surface of the surface of the glass wafer fixed to the stage, are bonded by a first adhesive, and the upper surface of the dicing sheet and the rear surface of the semiconductor wafer are bonded to each other. A dicing method for a semiconductor wafer, which is bonded to a top surface of a dicing sheet with a second adhesive provided in advance. The method for dicing a semiconductor wafer according to claim 14.
Each of the first pressure-sensitive adhesive and the second pressure-sensitive adhesive is a UV curable pressure-sensitive adhesive,
The semiconductor wafer dicing method is a step of reducing the adhesive force by performing UV irradiation on the first pressure-sensitive adhesive layer and the second pressure-sensitive adhesive layer. The method for dicing a semiconductor wafer according to claim 14.
Each of the first pressure-sensitive adhesive and the second pressure-sensitive adhesive is a heat release foaming agent,
The step of reducing the adhesive force is a method for dicing a semiconductor wafer, in which the layer of the first pressure-sensitive adhesive and the second pressure-sensitive adhesive is heated through the glass wafer. In the dicing method of the semiconductor wafer according to any one of claims 14 to 16,
The semiconductor wafer dicing method, wherein the first adhesive is provided in advance on the lower surface of the dicing sheet. The method for dicing a semiconductor wafer according to claim 16.
Furthermore, before the glass wafer is mounted on the dicing sheet in the wafer mount portion, a semiconductor wafer comprising a step of applying the first pressure-sensitive adhesive to an adhesive surface of the glass wafer with the dicing sheet. Dicing method.

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