CN110391139B - Wafer processing method - Google Patents

Wafer processing method Download PDF

Info

Publication number
CN110391139B
CN110391139B CN201910288187.2A CN201910288187A CN110391139B CN 110391139 B CN110391139 B CN 110391139B CN 201910288187 A CN201910288187 A CN 201910288187A CN 110391139 B CN110391139 B CN 110391139B
Authority
CN
China
Prior art keywords
wafer
dividing
line
sheet
polyester
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201910288187.2A
Other languages
Chinese (zh)
Other versions
CN110391139A (en
Inventor
荒川太朗
冈村卓
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Disco Corp
Original Assignee
Disco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Disco Corp filed Critical Disco Corp
Publication of CN110391139A publication Critical patent/CN110391139A/en
Application granted granted Critical
Publication of CN110391139B publication Critical patent/CN110391139B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36—Removing material
    • B23K26/38—Removing material by boring or cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67253—Process monitoring, e.g. flow or thickness monitoring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Optics & Photonics (AREA)
  • Plasma & Fusion (AREA)
  • Mechanical Engineering (AREA)
  • Laser Beam Processing (AREA)
  • Dicing (AREA)
  • Perforating, Stamping-Out Or Severing By Means Other Than Cutting (AREA)
  • Processing Of Stones Or Stones Resemblance Materials (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

A wafer processing method is provided which does not cause degradation of device quality. The wafer processing method at least comprises the following steps: a polyester-based sheet laying step of positioning the wafer in an opening of a frame having the opening for accommodating the wafer, and positioning the wafer on the back surface of the wafer and on the outer Zhou Fushe polyester-based sheet of the frame; an integration step of integrating the wafer and the frame by the polyester sheet by heating and thermocompression bonding the polyester sheet; a dividing start point forming step of irradiating the laser beam with a converging point positioned on the first dividing line and the second dividing line to form a dividing start point; a first dividing step of dividing the first dividing line by positioning the pressing edge on the first dividing line and applying an external force thereto; and a second dividing step of dividing the second predetermined dividing line by positioning the pressing blade on the second predetermined dividing line and applying an external force thereto, and dividing the wafer into individual devices by the first dividing step and the second dividing step.

Description

Wafer processing method
Technical Field
The present invention relates to a wafer processing method for dividing a wafer into individual devices.
Background
A wafer divided by a line to be divided and having a plurality of devices such as IC, LSI, LED formed on the front surface is divided into individual devices by a dicing device, a laser processing device, or the like, and is used for electronic devices such as a mobile phone, a personal computer, or the like.
The following types exist for laser machining equipment: a type in which a laser beam having a wavelength that is transparent to a wafer is irradiated while being positioned at a light-condensing point inside a line to be divided, and a modified layer is formed as a start point of division (for example, refer to patent document 1); a type in which a laser beam having a wavelength that is absorptive to a wafer is irradiated with a focused spot positioned on an upper surface of a line to divide, and grooves are formed on a front surface by ablation as starting points of the division (for example, refer to patent document 2).
After forming the start point of division along the line to be divided by the laser processing apparatus, the wafer is subjected to a dividing step of applying an external force or the like to divide the wafer into individual devices. The wafer subjected to the dividing process is carried to the pick-up process in a state of being held by the dicing tape and held in the wafer form after being divided into individual devices, and therefore, the wafer put into the laser processing apparatus is positioned at the opening of the frame having the opening for accommodating the wafer, and the back surface of the wafer and the frame are adhered to the adhesive layer side of the dicing tape on which the adhesive layer is formed by applying paste or the like, thereby achieving a state of being integrated with the dicing tape and the frame. Thus, the wafer subjected to the dividing process can be conveyed to the pickup process in a state in which the respective divided devices are not separated from the dicing tape but the form of the wafer is maintained.
Patent document 1: japanese patent No. 3408805
Patent document 2: japanese patent laid-open No. 10-305420
When a wafer is divided by positioning a pressing blade on a predetermined dividing line having a dividing start point and applying an external force to position and adhere a back surface of the wafer and a frame to an adhesive layer side of a dicing tape and supporting the wafer to the frame via the dicing tape, the pressing blade is positioned on a first predetermined dividing line formed along a first direction and applying an external force to divide the wafer, and then the pressing blade is positioned on a second predetermined dividing line formed along a second direction intersecting the first direction and applying an external force to divide the wafer. In this case, the first division line divided first can be divided neatly. However, when the dividing line is formed by dividing along the dividing start point of the first dividing line, the adhesive layer enters the dividing line or the like to cause the second dividing line which is not yet divided to slightly bend and advance, and it is difficult to precisely position the pressing blade along the second dividing line, and when the pressing blade is positioned and an external force is applied to divide the second dividing line in this case, there is a problem as follows: defects in the device and the like are generated, resulting in degradation of quality. In recent years, the device has been required to be small in size (2 mm square or less), particularly 0.5mm square, 0.25mm square, 0.15mm square, and the like, and the smaller the device size is, the more remarkable the effect of the slight bending travel of the second division lines is.
Disclosure of Invention
The present invention has been made in view of the above-described circumstances, and a main technical object thereof is to provide a wafer processing method that does not cause degradation in the quality of devices even when the wafer is divided into individual devices by positioning a pressing blade on a dividing line and applying an external force.
In order to solve the above-described main technical problems, according to the present invention, there is provided a wafer processing method for dividing a wafer into devices, the wafer being divided into a first division line formed along a first direction and a second division line formed along a second direction intersecting the first direction, and a plurality of devices being formed on a front surface, the wafer processing method including at least the steps of: a polyester-based sheet laying step of positioning the wafer in an opening of a frame having the opening for accommodating the wafer, and positioning the wafer on the back surface of the wafer and on the outer Zhou Fushe polyester-based sheet of the frame; an integration step of integrating the wafer and the frame by the polyester sheet by heating and thermocompression bonding the polyester sheet; a dividing start point forming step of irradiating the laser beam with a converging point positioned on the first dividing line and the second dividing line to form a dividing start point; a first dividing step of dividing the first dividing line by positioning the pressing edge on the first dividing line and applying an external force thereto; and a second dividing step of dividing the second predetermined dividing line by positioning the pressing blade on the second predetermined dividing line and applying an external force thereto, and dividing the wafer into individual devices by the first dividing step and the second dividing step.
The wavelength of the laser beam irradiated in the dividing start point forming step may be made transparent to the wafer, and the light-collecting point of the laser beam may be positioned inside the first dividing line and the second dividing line to form a modified layer as the dividing start point. In addition, the wavelength of the laser beam irradiated in the dividing start point forming step may be made absorbent to the wafer, and the converging point of the laser beam may be positioned on the upper surfaces of the first dividing line and the second dividing line to form grooves as dividing start points by ablation.
Preferably, the polyester sheet is selected from any of polyethylene terephthalate sheets and polyethylene naphthalate sheets. The wafer may be composed of any of a silicon substrate, a sapphire substrate, a silicon carbide substrate, and a glass substrate.
The wafer processing method according to the present invention divides a wafer divided into devices by a first division line formed along a first direction and a second division line formed along a second direction intersecting the first direction, and a plurality of devices are formed on a front surface, wherein the wafer processing method includes at least the steps of: a polyester-based sheet laying step of positioning the wafer in an opening of a frame having the opening for accommodating the wafer, and positioning the wafer on the back surface of the wafer and on the outer Zhou Fushe polyester-based sheet of the frame; an integration step of integrating the wafer and the frame by the polyester sheet by heating and thermocompression bonding the polyester sheet; a dividing start point forming step of irradiating the laser beam with a converging point positioned on the first dividing line and the second dividing line to form a dividing start point; a first dividing step of dividing the first dividing line by positioning the pressing edge on the first dividing line and applying an external force thereto; and a second dividing step of dividing the wafer into individual devices by positioning the pressing blade on the second predetermined dividing line and applying an external force thereto, so that the pressing blade can be precisely positioned on the second predetermined dividing line after dividing the first predetermined dividing line without causing a shift in the part of the adhesive layer into the area where the first predetermined dividing line is divided as in the case of bonding the wafer using the dicing tape having the adhesive layer, thereby overcoming the problem of lowering the quality of the devices.
Drawings
Fig. 1 is a perspective view showing an embodiment of the polyester sheet laying process of this example.
Fig. 2 is a perspective view showing a manner in which a polyester film is placed on a chuck table in the polyester film laying process shown in fig. 1.
Fig. 3 (a) and (b) are perspective views showing an implementation of the integration process of the present example.
Fig. 4 is a perspective view showing an implementation of the cutting process of this example.
Fig. 5 (a) and (b) are perspective views showing one embodiment of the division start point forming step of the present example.
Fig. 6 (a) and (b) are perspective views showing other embodiments of the division start point forming step of the present example.
Fig. 7 is a side view showing an implementation of the dividing process of the present example.
Description of the reference numerals
10: a wafer; 12A: a first division scheduled line; 12B: a second division scheduled line; 14: a device; 20: a chuck table; 21: a suction chuck; 30: polyethylene terephthalate sheets; 40: a heat air blowing unit; 50: a heating roller unit; 52: a heating roller; 60: a cutting unit; 62: a cutter; 70. 70': a laser processing device; 72: a condenser; 80: a dividing device; 82: a pressing blade; 83: a pair of support parts; 100: a modified layer; 110: a groove; 130: dividing lines.
Detailed Description
The steps of the wafer processing method according to the present invention will be described in order.
(polyester film laying step)
The polyester sheet laying process will be described with reference to fig. 1 and 2. Fig. 1 is a perspective view showing an embodiment of the polyester sheet laying process. In the polyester film laying step, first, as shown in fig. 1, a wafer 10 as a processing target, a ring frame F having an opening Fa for accommodating the wafer 10, and a chuck table 20 for performing the polyester film laying step are prepared. The wafer 10 is made of, for example, a silicon (Si) substrate, and the devices 14 are formed on the front surface 10a divided by a first line 12A to be divided formed in a first direction indicated by an arrow X and a second line 12B to be divided formed in a second direction indicated by an arrow Y crossing the first direction at right angles.
The chuck table 20 includes: a disk-shaped suction chuck 21 made of porous ceramics having air permeability; and a circular frame 22 surrounding the outer periphery of the suction chuck 21, wherein the chuck table 20 is connected to a suction unit (not shown) and is capable of sucking and holding the wafer 10 placed on the upper surface (holding surface) of the suction chuck 21.
When the wafer 10, the frame F, and the chuck table 20 are prepared, the wafer 10 is placed on the center of the chuck 21 with the front surface 10a side of the chuck 21 facing downward as shown in the figure. When the wafer 10 is placed on the chuck 21, the frame F is placed on the chuck 21 while the wafer 10 is positioned at the center of the opening Fa. As can be understood from the figure, the opening Fa of the frame F is formed to be larger than the wafer 10 so as to house the wafer 10, and the holding surface of the chuck 21 is formed to be slightly larger than the outer shape of the frame F, and the holding surface of the chuck 21 is set to be exposed to the outside of the frame F.
As shown in fig. 2, a circular polyester sheet such as a polyethylene terephthalate (PET) sheet 30 is prepared, and the polyester sheet is set so as to cover the back surface 10b of the wafer 10, the frame F, and the suction chuck 21, and is placed on the suction chuck 21. The polyester sheet is preferably formed to a thickness of 20 μm to 100. Mu.m. As can be understood from fig. 2, the polyethylene terephthalate sheet 30 of the present embodiment is formed to have a diameter at least larger than that of the suction chuck 21, and preferably slightly smaller than that of the circular frame 22 of the chuck table 20. Thereby, the entire holding surface of the suction chuck 21 is covered with the polyethylene terephthalate sheet 30. In addition, an adhesive layer such as paste is not formed on the mounting surface side of the polyethylene terephthalate sheet 30 on which the wafer 10 and the frame F are mounted.
When the wafer 10, the frame F, and the polyethylene terephthalate sheet 30 are placed on the suction chuck 21 of the chuck table 20, a suction unit, not shown, including a suction pump or the like is operated to apply a suction force Vm to the suction chuck 21, thereby sucking the wafer 10, the frame F, and the polyethylene terephthalate sheet 30. As described above, the entire upper surface (holding surface) of the suction chuck 21 is covered with the polyethylene terephthalate sheet 30, and therefore the suction force Vm acts on the entire wafer 10, the frame F, and the polyethylene terephthalate sheet 30, and the suction chuck 21 sucks and holds them, and sucks and adheres air remaining between the wafer 10, the frame F, and the polyethylene terephthalate sheet 30. The polyester sheet laying step is completed by the above steps.
(Integrated Process)
When the polyester sheet laying step is performed, an integration step is performed next. The integration process will be described with reference to fig. 3.
Fig. 3 (a) shows a first embodiment for performing the integration process. In the integration process, as shown in the drawing, a heat air blowing unit 40 (only a part of which is shown) for heating the polyethylene terephthalate sheet 30 is positioned above the chuck table 20 in a state where the suction force Vm acts on the wafer 10, the frame F, and the polyethylene terephthalate sheet 30 to hold the same. The hot air blowing means 40 is configured such that a heater section having a temperature adjusting means such as a thermostat is provided on an outlet side (lower side in the drawing) opposite to the chuck table 20 side, a fan section driven by a motor or the like is provided on an opposite side (upper side in the drawing), and the hot air L is blown toward the chuck table 20 by driving the heater section and the fan section. When the heat blowing means 40 is positioned above the chuck table 20, the heat blowing means 40 blows the heat air L to at least the entire area of the wafer 10 and the frame F on which the polyethylene terephthalate sheet 30 is placed, and heats the polyethylene terephthalate sheet 30 so that the temperature in the vicinity of the melting point is 250 to 270 ℃ or from the vicinity of the melting point to a temperature lower than the temperature in the vicinity of the melting point by about 50 ℃. By this heating, the polyethylene terephthalate sheet 30 is softened, and the polyethylene terephthalate sheet 30 is thermally bonded to the back surface 10b of the wafer 10 and the frame F in a state of being in close contact therewith, whereby the wafer 10, the frame F, and the polyethylene terephthalate sheet 30 are integrated. The unit for performing the integration step of heating the polyethylene terephthalate sheet 30 and thermocompression bonding the wafer 10 is not limited to the heat blowing unit 40 shown in fig. 3 (a), and other units may be selected. The other units (second embodiment) will be described with reference to fig. 3 b.
As other means for performing the above-described integration process, a heating roller unit 50 (only a part of which is shown) shown in fig. 3 (b) may be selected. More specifically, the heating roller unit 50 for heating and pressing the polyethylene terephthalate sheet 30 is positioned above the chuck table 20 in a state where the suction force Vm is applied to the wafer 10, the frame F, and the polyethylene terephthalate sheet 30 to hold the polyethylene terephthalate sheet 30. The heating roller unit 50 has a heating roller 52 having a heater, not shown, and a rotating shaft, not shown, for rotating the heating roller 52, and the surface of the heating roller 52 is subjected to a fluororesin process. When the heating roller 52 is positioned above the chuck table 20, the heater incorporated in the heating roller 52 is operated, and the entire back surface 10b of the wafer 10 covered with the polyethylene terephthalate sheet 30 and the frame F side are pressed, so that the heating roller 52 is moved in the arrow X direction while rotating in the direction indicated by the arrow R1. The heater incorporated in the heating roller 52 is adjusted in a range from 250 ℃ to 270 ℃ in the vicinity of the melting point of the polyethylene terephthalate sheet 30 or from a temperature in the vicinity of the melting point to a temperature about 50 ℃ lower than the temperature in the vicinity of the melting point. By this heating and pressing, the polyethylene terephthalate sheet 30 can be thermally bonded in a state of being in close contact with the back surface 10b of the wafer 10 and the frame F, as in the case of the above-described heat blowing unit 40, and the wafer 10, the frame F, and the polyethylene terephthalate sheet 30 can be integrated. As a modification of the heating roller unit 50 for performing the integration process, instead of the heating roller 52, a flat pressing member having a heater may be used to heat and press the polyethylene terephthalate sheet 30, thereby thermally press-bonding the polyethylene terephthalate sheet 30 to the wafer 10 and the frame F. The unit for thermocompression bonding is not limited to the above-described units, and for example, the polyethylene terephthalate sheet 30 may be heated by irradiation with infrared rays to thermocompression bond the frame 10 and the frame F.
In the present embodiment, after the above-described integrating step, a cutting step is performed to cut the polyethylene terephthalate sheet 30 along the frame F in consideration of the subsequent steps. In addition, although this cutting step is not necessarily a necessary step, the wafer 10 and the frame F integrated with the polyethylene terephthalate sheet 30 are easier to handle, and thus the subsequent steps are facilitated. The cutting process will be described below with reference to fig. 4.
(cutting step)
As shown in fig. 4, the cutting unit 60 (only a part of which is shown) is positioned on the chuck table 20, and the chuck table 20 suctions and holds the wafer 10, the frame F, and the polyethylene terephthalate sheet 30, which are integrated by the integration process. The cutting unit 60 has a disk-shaped cutter 62 (shown by two-dot chain lines) for cutting the polyethylene terephthalate sheet 30 and a motor (not shown) for rotationally driving the cutter 62 in the direction indicated by the arrow R2, and positions the cutting edge of the cutter 62 at substantially the center in the width direction on the frame F. When the cutter blade 62 is positioned on the frame F, the cutter blade 62 is fed in accordance with the thickness of the polyethylene terephthalate sheet 30, and the chuck table 20 is rotated in the direction indicated by the arrow R2. Thereby, the polyethylene terephthalate sheet 30 can be cut along the cutting line C along the frame F, and the outer periphery of the polyethylene terephthalate sheet 30 protruding from the cutting line C can be cut. Further, the polyethylene terephthalate sheet 30 is thermally pressed to the back surface 10b of the wafer 10 and the frame F, so that the wafer 10, the frame F, and the polyethylene terephthalate sheet 30 can be maintained in an integrated state. The cutting step is completed by the above steps.
(partition starting point Forming step)
When the outer periphery of the polyethylene terephthalate sheet 30 is cut by this cutting step, a cutting start point forming step is performed by a laser processing apparatus. As a laser processing method for performing the division start point forming step, for example, the following method can be selected: a method of forming a modified layer as a dividing start point by positioning a laser beam converging point inside a first dividing line 12A and a second dividing line 12B so that the wavelength of the laser beam is a wavelength having transparency to a wafer; or a method in which the wavelength of the laser beam is made to be a wavelength having absorbability to the wafer, and the converging point of the laser beam is positioned on the upper surfaces of the first line to divide 12A and the second line to divide 12B, whereby grooves are formed as dividing start points by ablation.
Referring to fig. 5, an embodiment of laser processing in which a modified layer is formed as a start point of division in the first line 12A and the second line 12B of the wafer 10 will be described.
When forming the modified layer as the start point of division in the first line to divide 12A and the second line to divide 12B, laser light is irradiated from the back surface 10B side of the wafer 10. Therefore, as shown in fig. 5 (a), the rear surface 10b side of the wafer 10 integrated with the frame F in the above-described integrating step is directed upward, and the polyethylene terephthalate sheet 30 side is directed upward and conveyed to the laser processing apparatus 70 shown in fig. 5 (b) (only a part is shown).
The laser processing apparatus 70 shown in fig. 5 (b) is a known laser processing apparatus, and the details thereof are omitted, and the laser processing apparatus 70 includes a chuck table, not shown, a laser beam irradiation unit including a condenser 72, and the like. The wafer 10 conveyed to the laser processing apparatus 70 is placed on the chuck table so that the polyethylene terephthalate sheet 30 is positioned above the wafer. Next, alignment of the irradiation position of the laser beam LB of the condenser 72 of the laser beam irradiation means with the position to be processed of the wafer 10, that is, the first line to divide 12A and the second line to divide 12B is performed by alignment means having an infrared imaging means not shown (alignment step). After the alignment process is completed, as shown in fig. 5 (b), the light converging point of the laser beam LB is positioned inside the wafer 10, and the light converging device 72 and the wafer 10 are relatively moved in the direction indicated by the arrow X, and irradiated through the polyethylene terephthalate sheet 30, so that the modified layer 100 serving as a start point of division is formed along the first line 12A. When the chuck table is moved appropriately to form the modified layer 100 along all the first lines 12A, the chuck table is rotated by 90 degrees to form the modified layer 100 along the second lines 12B in the wafer 10, similarly to the first lines 12A. By performing the laser processing as described above, the division start point forming step is completed.
The laser processing conditions of the laser processing apparatus 70 for forming the modified layer 100 as the start point of the division are set as follows, for example.
The division start point forming step of the present invention is not limited to the above-described means, and may be implemented using, for example, a laser processing apparatus 70' shown in fig. 6. Hereinafter, another embodiment of performing the division start point forming step by using the laser processing apparatus 70' will be described with reference to fig. 6.
As another embodiment for performing the dividing start point forming step, as shown in fig. 6, a laser beam LB 'having a wavelength that is absorptive to the wafer 10 is irradiated, a converging point of the laser beam LB' is positioned on the upper surface (front surface 10a side) of the wafer 10 along the first dividing line 12A and the second dividing line 12B, and grooves as dividing start points are formed by ablation.
When grooves are formed on the front surface 10a of the wafer 10 along the first line 12A and the second line 12B as the start points of division, the front surface 10a side of the wafer 10 integrated with the frame F in the above-described integrating step is brought up as shown in fig. 6 (a) and conveyed to the laser processing device 70' (only a part is shown) shown in fig. 6 (B).
The laser processing apparatus 70 'is a well-known laser processing apparatus, and the details thereof are omitted, and the laser processing apparatus 70' includes a chuck table, not shown, a laser beam irradiation unit including a condenser 72', and the like, and the wafer 10 conveyed to the laser processing apparatus 70' is placed on the chuck table so that the front surface 10a of the wafer 10 is positioned above and sucked and held. Next, alignment of the irradiation position of the condenser 72' of the laser beam irradiation means with the processing position of the wafer 10, that is, alignment of the first line to divide 12A and the second line to divide 12B is performed by alignment means having imaging means not shown (alignment step). After the alignment process is completed, as shown in fig. 6 (b), the laser beam LB ' is irradiated while the focus of the laser beam LB ' is positioned on the front surface 10a of the wafer 10 and the focus 72' and the wafer 10 are relatively moved in the direction indicated by the arrow X, whereby ablation is performed. By appropriately moving the chuck table, grooves 110 are formed along the first line 12A and the second line 12B as the start points of division. The above laser processing completes the division start point forming step.
The laser processing conditions of the laser processing apparatus 70' for forming the grooves 110 as the start points of the division are set as follows, for example.
The division start point forming step of the present invention is not limited to the laser processing method described above, and other methods may be selected. For example, a condensed point of the laser beam having a wavelength that is transparent to the wafer 10 may be positioned inside the wafer 10 from the back surface 10B side and irradiated, and a shield tunnel composed of pores and an amorphous material surrounding the pores may be formed along the first line to divide 12A and the second line to divide 12B as a start point of the division.
(dividing step)
If the division start point forming step is performed as described above, the dividing step is performed. Further, a case will be described in which the above-described dividing start point forming step is performed to form the modified layer 100 as the dividing start point inside the wafer 10 along the first dividing line 12A and the second dividing line 12B, and then the dividing step described below is performed.
The dividing step of the present embodiment includes at least: a first dividing step of dividing the first predetermined dividing line 12A by applying an external force thereto; and a second dividing step of dividing the second line to be divided 12B by applying an external force to the second line to be divided 12B. The dividing process performed by using the dividing device 80 will be described with reference to fig. 7.
The dividing device 80 shown in fig. 7 includes at least a pressing blade 82, a pair of support portions 83, and an imaging unit not shown. When the first dividing step is performed, the wafer 10 is placed on the pair of support portions 83 with the front surface 10a of the wafer 10 facing downward. The imaging means is configured to be able to image the wafer 10 from the front surface 10a side, i.e., the lower side of the wafer 10 placed on the pair of support portions 83, and to image the first line 12A of intended division of the wafer 10, thereby accurately positioning the first line 12A of intended division, on which the modified layer 100 is formed, between the pair of support portions 83 and immediately below the pressing blade 82. The pair of support portions 83 extend in one direction (Y direction perpendicular to the paper surface in fig. 7) and are positioned so as to sandwich the first line 12A positioned along the one direction in a plan view. The pressing blade 82 positioned above the pair of support portions 83 also extends in the one direction in the same manner as the pair of support portions 83, and is moved in the up-down direction indicated by the arrow Z by a pressing mechanism not shown.
As shown in fig. 7, the pressing blade 82 is lowered to the wafer 10 side along arrow Z, and the wafer 10 is divided along the first line 12A with the modified layer 100 as the dividing start point, thereby forming the dividing line 130. Next, the pressing blade 82 is moved relative to the pair of support portions 83 and the wafer 10 in the direction indicated by the arrow X to perform processing feeding, so that the first line to divide 12A, which is not divided, is moved directly below the pressing blade 82 and between the pair of support portions 83, and the same dividing processing is repeated, and the pressing blade 82 is pressed against all the first lines to divide 12A and an external force is applied to form the dividing line 130. Then, the wafer 10 is rotated by 90 degrees, and the second line 12B to be divided, on which the modified layer 100 is formed, is positioned accurately immediately below the pressing blade 82 and between the pair of support portions 83 by using the imaging means, and the dividing line 130 is formed by dividing in the same process as the first line 12A. In this way, the wafer 10 is divided into the devices 14, and the dividing process is completed. Further, although the case where the above-described dividing process is performed after the modified layer 100 as the dividing start point is formed inside the wafer 10 along the first line to divide 12A and the second line to divide 12B has been described, in the dividing start point forming process, the same unit as the above-described dividing can be used in the case where the grooves 110 as the dividing start point are formed by ablation on the front surfaces 10a of the first line to divide 12A and the second line to divide 12B.
After the dicing step, the wafer 10 is carried along with the frame F to be held to a pickup step, and each device 14 is picked up from the polyethylene terephthalate sheet 30, carried to a bonding step, stored in a storage tray, or the like, and carried to a subsequent step.
According to the method for processing a wafer of the present embodiment described above, the wafer 10, the frame F, and the polyester sheet (polyethylene terephthalate sheet 30) are integrated by at least heating and thermocompression bonding the polyester sheet without integrating the polyester sheet by applying an adhesive layer formed by paste or the like to the surface of the polyester sheet. In this way, unlike the dicing tape having an adhesive layer, the problem of misalignment or the like caused by the entry of a part of the adhesive layer into the dividing region (dividing line) does not occur, and after the first predetermined dividing line 12A is divided, the pressing blade 82 can be precisely positioned on the second predetermined dividing line 12B, and the quality of the device is not degraded.
The present invention is not limited to the above embodiment, and various modifications can be provided. In the above-described embodiment, the polyethylene terephthalate sheet 30 is selected as the polyester sheet, but the present invention is not limited thereto, and may be appropriately selected from the polyester sheets. The other polyester sheet may be, for example, a polyethylene naphthalate (PEN) sheet.
In the above-described embodiment, the heating temperature in the integrating step is set to 250 to 270 ℃ in the vicinity of the melting point or in the range from the temperature in the vicinity of the melting point to a temperature about 50 ℃ lower than the temperature in the vicinity of the melting point, but the present invention is not limited to this, and the heating temperature is preferably adjusted according to the type of the polyester-based sheet selected. For example, when a polyethylene naphthalate sheet is selected as the polyester sheet, the heating temperature is preferably set to 160 to 180 ℃ around the melting point or a temperature from the temperature around the melting point to a temperature about 50 ℃ lower than the temperature around the melting point.
In the above-described embodiment, the wafer as the object to be processed is made of a silicon (Si) substrate, but the present invention is not limited thereto, and may be configured of other materials such as sapphire (Al) 2 O 2 ) Substrate, silicon carbide (SiC) substrate, glass (SiO) 2 ) The substrate is formed.

Claims (5)

1. A wafer processing method divides a wafer into devices, the wafer being divided by a first division scheduled line formed along a first direction and a second division scheduled line formed along a second direction crossing the first direction and having a plurality of devices formed on a front surface, wherein,
the wafer processing method at least comprises the following steps:
a polyester-based sheet laying step of positioning a wafer in an opening of a frame having an opening for accommodating the wafer, and directly laying a polyester-based sheet on the back surface of the wafer and the outer periphery of the frame, wherein the polyester-based sheet has no adhesive layer on the mounting surface side for adhering the wafer, and the polyester-based sheet is not divided when the wafer is divided into individual devices;
an integration step of heating the polyester sheet to bring the wafer and the frame into close contact with the polyester sheet, and thermally bonding the wafer and the frame together by the polyester sheet;
a dividing start point forming step of irradiating the laser beam with a converging point positioned on the first dividing line and the second dividing line to form a dividing start point;
a first dividing step of dividing the first dividing line by positioning the pressing edge on the first dividing line and applying an external force thereto; and
a second dividing step of dividing the second predetermined dividing line by positioning the pressing blade on the second predetermined dividing line and applying an external force,
the wafer is divided into individual devices by the first dividing process and the second dividing process.
2. The method for processing a wafer according to claim 1, wherein,
the wavelength of the laser beam irradiated in the dividing start point forming step is transparent to the wafer, and the light-condensing point of the laser beam is positioned inside the first dividing line and the second dividing line to form a modified layer as a dividing start point.
3. The method for processing a wafer according to claim 1, wherein,
the wavelength of the laser beam irradiated in the dividing start point forming step is absorptive to the wafer, and the converging point of the laser beam is positioned on the upper surfaces of the first dividing line and the second dividing line, and grooves as dividing start points are formed by ablation.
4. A method for processing a wafer according to any one of claim 1 to 3, wherein,
the polyester sheet is selected from any sheet of polyethylene terephthalate sheet and polyethylene naphthalate sheet.
5. A method for processing a wafer according to any one of claim 1 to 3, wherein,
the wafer is composed of any substrate among a silicon substrate, a sapphire substrate, a silicon carbide substrate and a glass substrate.
CN201910288187.2A 2018-04-20 2019-04-11 Wafer processing method Active CN110391139B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018081726A JP7154809B2 (en) 2018-04-20 2018-04-20 Wafer processing method
JP2018-081726 2018-04-20

Publications (2)

Publication Number Publication Date
CN110391139A CN110391139A (en) 2019-10-29
CN110391139B true CN110391139B (en) 2024-03-15

Family

ID=68284312

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910288187.2A Active CN110391139B (en) 2018-04-20 2019-04-11 Wafer processing method

Country Status (4)

Country Link
JP (1) JP7154809B2 (en)
KR (1) KR102681932B1 (en)
CN (1) CN110391139B (en)
TW (1) TWI802682B (en)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7282452B2 (en) 2019-02-15 2023-05-29 株式会社ディスコ Wafer processing method
JP7282453B2 (en) 2019-02-15 2023-05-29 株式会社ディスコ Wafer processing method
JP7282455B2 (en) 2019-03-05 2023-05-29 株式会社ディスコ Wafer processing method
JP7277019B2 (en) 2019-03-05 2023-05-18 株式会社ディスコ Wafer processing method
JP2020174100A (en) 2019-04-10 2020-10-22 株式会社ディスコ Wafer processing method
JP7313767B2 (en) 2019-04-10 2023-07-25 株式会社ディスコ Wafer processing method
JP7330616B2 (en) 2019-05-10 2023-08-22 株式会社ディスコ Wafer processing method
JP7330615B2 (en) 2019-05-10 2023-08-22 株式会社ディスコ Wafer processing method
JP7286247B2 (en) 2019-06-07 2023-06-05 株式会社ディスコ Wafer processing method
JP7286245B2 (en) 2019-06-07 2023-06-05 株式会社ディスコ Wafer processing method
JP7305268B2 (en) 2019-08-07 2023-07-10 株式会社ディスコ Wafer processing method
JP7345973B2 (en) 2019-08-07 2023-09-19 株式会社ディスコ Wafer processing method
JP7341607B2 (en) 2019-09-11 2023-09-11 株式会社ディスコ Wafer processing method
JP7341606B2 (en) 2019-09-11 2023-09-11 株式会社ディスコ Wafer processing method
JP7383338B2 (en) 2019-10-10 2023-11-20 株式会社ディスコ Wafer processing method
JP2021064627A (en) 2019-10-10 2021-04-22 株式会社ディスコ Wafer processing method
JP7387228B2 (en) 2019-10-17 2023-11-28 株式会社ディスコ Wafer processing method
JP7301480B2 (en) 2019-10-17 2023-07-03 株式会社ディスコ Wafer processing method
JP7430515B2 (en) * 2019-11-06 2024-02-13 株式会社ディスコ Wafer processing method
JP2021077735A (en) * 2019-11-07 2021-05-20 株式会社ディスコ Wafer processing method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007165636A (en) * 2005-12-14 2007-06-28 Nippon Zeon Co Ltd Method for manufacturing semiconductor element
CN104946153A (en) * 2014-03-31 2015-09-30 日东电工株式会社 Thermosetting chip bonding film, cutting/chip bonding film and semiconductor making method
CN106301270A (en) * 2015-06-24 2017-01-04 株式会社迪思科 The manufacture method of SAW device
CN107093578A (en) * 2016-02-18 2017-08-25 株式会社迪思科 The processing method of chip

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58153352A (en) * 1982-03-09 1983-09-12 Toshiba Corp Manufacture of semiconductor device
JPS59152639A (en) * 1983-02-21 1984-08-31 Nec Home Electronics Ltd Method for provisional fixing of semiconductor wafer
JPH10305420A (en) 1997-03-04 1998-11-17 Ngk Insulators Ltd Method for fabricating matrix made up of oxide single crystal and method for manufacturing functional device
JP2005191297A (en) 2003-12-25 2005-07-14 Jsr Corp Dicing film and cutting method of semiconductor wafer
JP2011046581A (en) 2009-08-28 2011-03-10 Seiko Instruments Inc Method for cutting joined glass, method for manufacturing package, package, piezoelectric vibrator, oscillator, electronic equipment and radio-controlled clock
JP5801046B2 (en) 2010-12-06 2015-10-28 株式会社ディスコ Processing method of plate
JP2014170845A (en) * 2013-03-04 2014-09-18 Nitto Denko Corp Method for manufacturing semiconductor device, sheet-like resin composition, and dicing tape integrated sheet-like resin composition
CN107960133B (en) * 2015-12-25 2021-10-26 古河电气工业株式会社 Semiconductor processing belt
JP6741529B2 (en) * 2016-09-09 2020-08-19 株式会社ディスコ Tip spacing maintenance method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007165636A (en) * 2005-12-14 2007-06-28 Nippon Zeon Co Ltd Method for manufacturing semiconductor element
CN104946153A (en) * 2014-03-31 2015-09-30 日东电工株式会社 Thermosetting chip bonding film, cutting/chip bonding film and semiconductor making method
CN106301270A (en) * 2015-06-24 2017-01-04 株式会社迪思科 The manufacture method of SAW device
CN107093578A (en) * 2016-02-18 2017-08-25 株式会社迪思科 The processing method of chip

Also Published As

Publication number Publication date
TW201944476A (en) 2019-11-16
KR20190122552A (en) 2019-10-30
TWI802682B (en) 2023-05-21
CN110391139A (en) 2019-10-29
KR102681932B1 (en) 2024-07-04
JP2019192718A (en) 2019-10-31
JP7154809B2 (en) 2022-10-18

Similar Documents

Publication Publication Date Title
CN110391139B (en) Wafer processing method
CN110391182B (en) Wafer processing method
JP4777761B2 (en) Wafer division method
JP7246825B2 (en) Wafer processing method
JP7139048B2 (en) Wafer processing method
JP4402974B2 (en) Wafer division method
JP7330616B2 (en) Wafer processing method
CN110429062B (en) Wafer processing method
JP7139040B2 (en) Wafer processing method
JP2005223283A (en) Method for dividing wafer
JP7305268B2 (en) Wafer processing method
JP7277019B2 (en) Wafer processing method
JP7383338B2 (en) Wafer processing method
JP7286247B2 (en) Wafer processing method
JP7313767B2 (en) Wafer processing method
JP2021068723A (en) Wafer processing method
JP2005222986A (en) Method for dividing wafer
JP7305270B2 (en) Wafer processing method
JP7305269B2 (en) Wafer processing method
JP7277021B2 (en) Wafer processing method
JP7277020B2 (en) Wafer processing method
JP7305259B2 (en) Wafer processing method
JP7305261B2 (en) Wafer processing method
JP7134562B2 (en) Wafer processing method
JP2022054894A (en) Wafer processing method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant