JP2007214319A - Thin film transistor and its electronic display - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a thin film transistor including, on a substrate, a gate electrode, a gate insulating layer, a semiconductor active layer, a source electrode, and a drain electrode, wherein it has high reliability and is flexible and unlikely to be exfoliated in its film while keeping transistor characteristics excellent. <P>SOLUTION: The thin film transistor includes, on a flexible plastic substrate, an inorganic material adhesive layer, a metal gate electrode, gate insulating layers of two or more layers in contact with the gate electrode, a semiconductor active layer made of an oxide, a source electrode, and a drain electrode disposed in this order in multi-layer construction. The gate insulating layers each have different compositions in which the gate insulating layer on the side in contact with the gate electrode is a layer chiefly containing silicon and oxygen, and further containing 0.5 to 4% (atomic fraction) carbon through chemical deposition process (CVD process); and in which the gate insulating layer on the side in contact with the semiconductor active layer is a layer chiefly containing silicon and nitrogen, and further containing 0.05 to 0.5% (atomic fraction) carbon by a sputtering process. The adhesive layer is formed between the flexible plastic substrate and the layer of the gate electrode. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a thin film transistor, a manufacturing method thereof, and an electronic display using the thin film transistor.

  In general, a thin film transistor using amorphous silicon, polycrystalline silicon, or the like has been used as a transistor for driving an electronic device. However, since a high temperature amorphous silicon or polycrystalline silicon requires a film forming temperature of 200 ° C. or more, in order to realize a flexible device, it is extremely difficult to use a substrate such as polyimide having excellent heat resistance. An expensive and unwieldy film with a high water absorption rate had to be used.

  In recent years, thin film transistors using organic semiconductor materials have been actively studied. Since the organic semiconductor material can be produced by a printing process without using a vacuum process, there is an advantage that the cost can be significantly reduced and the organic semiconductor material is provided on a flexible plastic substrate. However, the mobility of the organic semiconductor material is extremely low, and it is difficult to deteriorate with time.

  In view of the above situation, transparent oxide semiconductors have attracted much attention in recent years. Transparent oxides exhibit high mobility even when made at low temperatures, and have properties that were not found in conventional materials, such as being able to realize transparent devices by using transparent materials for substrates, electrodes, insulating films, and the like. For example, a field effect transistor using an amorphous In—Ga—Zn—O material as a transparent oxide semiconductor has been proposed.

By using the above amorphous oxide semiconductor as a semiconductor active layer, Nomura et al. Have succeeded in producing a transparent field effect transistor having excellent characteristics of mobility of around 10 cm ² / Vs on a PET substrate at room temperature. By demonstrating that such high mobility can be realized by room temperature fabrication, transistors can be formed on inexpensive general-purpose plastic substrates such as PET, and the widespread use of flexible displays (flexible electronic displays) that are lightweight and difficult to break. The expectations of have increased greatly. However, when a multilayer film is formed on a plastic film, the interlayer of the multilayer film is easily peeled off, or the plastic film is bent due to stress, which is a big problem in realizing a flexible device.

  In particular, when all the layers are formed by sputtering, a large compressive stress is applied. Therefore, it is extremely difficult to produce a large-area device in large quantities due to film peeling and bending. As a means for solving this, there is a method of forming an insulating layer by a CVD method, in particular, a Plasma Enhanced Chemical Vapor Deposition (PECVD) method (see Non-Patent Document 1).

  However, insulating films such as silicon oxide and silicon nitride manufactured by PECVD at a low temperature of 200 ° C. or lower have poor insulating properties and insulation resistance, and cannot exhibit sufficient characteristics as insulating films.

The known literature is described below.
K. Nomura et al Nature, 432, 488 (2004)

  In view of the above points, an object of the present invention is to realize a highly reliable transistor having excellent adhesion without affecting the operation of an oxide transistor.

  The invention according to claim 1 of the present invention is a thin film transistor comprising a gate electrode, a gate insulating layer, a semiconductor active layer, and a source electrode and a drain electrode on a flexible plastic substrate. On top of this, an adhesive layer made of an inorganic material, a gate electrode made of a metal, a gate insulating layer made of two or more different compositions, a semiconductor active layer made of an oxide, a source electrode, and a drain electrode are formed in a multilayer structure in this order. The thin film transistor is characterized in that an adhesion layer is formed between the conductive plastic substrate and the gate electrode.

  The invention according to claim 2 of the present invention is the thin film transistor according to claim 1, wherein the adhesion layer made of the inorganic material is made of silicon oxide, aluminum oxide, or silicon nitride.

  According to a third aspect of the present invention, in the gate insulating layer, the gate insulating layer in contact with the gate electrode is formed mainly of silicon and oxygen, and the gate insulating layer in contact with the semiconductor active layer is 3. The thin film transistor according to claim 1, wherein the thin film transistor is formed mainly of silicon and nitrogen.

  In the invention according to claim 4 of the present invention, the gate insulating layer in contact with the gate electrode is formed by a chemical vapor deposition (CVD) method, and the gate insulating layer in contact with the semiconductor active layer is 4. The method for manufacturing a thin film transistor according to claim 1, wherein the thin film transistor is formed by sputtering.

  In the invention according to claim 5 of the present invention, the gate insulating layer in contact with the gate electrode contains carbon in an amount of 0.5 atomic% (atomic fraction) or more and 4 atomic% (atomic fraction) or less, and has semiconductor activity. The gate insulating layer on the side in contact with the layer contains 0.05 atomic% (atomic fraction) or more of carbon and 0.5 atomic% (atomic fraction) or less of carbon. 2. A thin film transistor according to claim 1.

  The invention according to claim 6 of the present invention is the thin film transistor according to any one of claims 1 to 5, wherein the gate electrode is mainly composed of aluminum, chromium, titanium, silver or copper. .

  The invention according to claim 7 of the present invention is characterized in that the thin film transistor according to any one of claims 1 to 6 is used in an electronic display using thin film transistors in which a plurality of thin film transistors are arranged in a matrix. It is an electronic display.

  The invention of claim 1 includes a flexible plastic substrate, an adhesion layer made of an inorganic material, a gate electrode made of metal, a gate insulating layer made of two or more different compositions, a semiconductor active layer made of an oxide, According to the bottom gate type thin film transistor comprising the source electrode and the drain electrode, it is possible to realize a flexible transistor with little stress between the respective layers and high adhesion.

  According to the thin film transistor made of silicon oxide, aluminum oxide, or silicon nitride, the adhesion layer made of inorganic material according to claim 2 is made of an inorganic material by forming an adhesion layer between the flexible plastic substrate and the gate electrode. The presence of the adhesion layer can prevent film peeling.

  According to a third aspect of the present invention, in the gate insulating layer according to the first aspect, the gate insulating layer in contact with the gate electrode is formed mainly of silicon and oxygen, and the gate insulating layer in contact with the semiconductor active layer is According to the thin film transistor formed mainly of silicon and nitrogen, it is possible to realize a thin film transistor having excellent characteristics of insulation and insulation resistance and being difficult to peel off.

  The invention according to claim 4 is a thin film transistor in which the gate insulating layer in contact with the gate electrode according to claim 2 is formed by chemical vapor deposition (CVD) and the gate insulating layer in contact with the semiconductor active layer is formed by sputtering. According to the above, by starting the growth of the gate insulating film on the gate electrode using the CVD method, the gate insulating film can be formed without damaging the gate electrode, and the underlying layer is formed thereon by the sputtering method. Excellent insulating properties and adhesion can be realized by forming a gate insulating film having a composition different from that of the gate insulating layer.

  6. The gate insulating layer on the side in contact with the gate electrode of claim 5 contains 0.5 atomic% to 4 atomic% of carbon, and the gate insulating layer on the side in contact with the semiconductor active layer contains 0.05 atomic% to 0.5 atomic% of carbon. According to the thin film transistor in which the gate insulating layer containing% is formed, by taking such a carbon content, it is possible to realize a thin film transistor having excellent insulating characteristics and flexibility that is important for a flexible device.

  According to the thin film transistor in which the gate electrode of claim 6 is mainly composed of aluminum, chromium, titanium, silver or copper, the interface of the gate electrode is hardly peeled off and a thin film transistor having excellent characteristics can be realized.

  According to the electronic display using the thin film transistor according to any one of claims 1 to 6, it is possible to realize an electronic display that is lightweight, strong in impact, and can be manufactured at low cost.

  The thin film transistor of the present invention will be described below based on one embodiment. Although embodiments of the present invention are illustrated and described, the present invention is not limited to these.

  FIG. 1 shows a side sectional view of a layer structure of an embodiment of a thin film transistor of the present invention.

  In the thin film transistor of FIG. 1, an adhesive layer 2 made of an inorganic material is formed on a flexible plastic substrate 1, a gate electrode 3 is formed thereon, and a gate insulating layer having two or more different compositions thereon. The first gate insulating film 4 and the second gate insulating film 5 are formed, the semiconductor active layer 6 made of oxide is formed thereon, and the source electrode 7 and the drain electrode 8 are formed on the semiconductor active layer. Yes. For example, the gate insulating layer has a three-layer structure, or the pixel electrode 6, the drain electrode 7, and the source electrode 8 are formed first on the gate insulating film, and then the semiconductor active layer 5 is formed. It does not matter.

  The flexible plastic substrate 1 may be transparent or opaque. However, when the thin film transistor of the present invention is used for a transmissive display, it needs to be transparent. Specifically, polymethyl methacrylate, polyacrylate, polycarbonate, polystyrene, polyethylene sulfide, polyethersulfone, polyolefin, polyethylene terephthalate, polyethylene naphthalate, cycloolefin polymer, polyethersulfene, triacetylcellulose, polyvinyl fluoride film, Uses ethylene-tetrafluoroethylene copolymer resin, weather resistant polyethylene terephthalate, weather resistant polypropylene, glass fiber reinforced acrylic resin film, glass fiber reinforced polycarbonate, polyimide, transparent polyimide, fluororesin, cyclic polyolefin resin, SUS thin plate, etc. However, it is not limited to these. These may be used as a single substrate, but a composite substrate in which two or more kinds are laminated can also be used.

  The adhesion layer 2 made of an inorganic material may be opaque or transparent, and an inorganic oxide or an inorganic nitride is preferably used. Specifically, any one of silicon oxide, silicon nitride, silicon oxynitride (SiOxNy), aluminum oxide, magnesium fluoride, magnesium oxide, yttrium oxide, hafnium oxide, or a mixed system of two or more of them can be used. Although it can be used, it is not limited to these. Of these, silicon oxide, silicon nitride, silicon oxynitride, and aluminum oxide are particularly preferably used because of their good adhesion and low manufacturing cost. It is also desirable for these adhesion layers to have a gas barrier function in order to ensure long-term reliability of the transistor. For the formation of the adhesion layer, vacuum deposition method, ion plating method, sputtering method, laser ablation method, plasma CVD method, photo CVD method, hot wire CVD method, spin coating, dip coating, screen printing, letterpress printing, intaglio printing, Although formed using methods, such as lithographic printing and an inkjet method, it is not limited to these. The thickness of the adhesion layer is preferably in the range of 1 nm to 800 nm.

  The gate insulating layer of the present invention is formed from two or more different compositions, and any number of layers may be stacked as long as the number is two or more. However, from the viewpoint of cost, 2 or more and 4 or less layers are desirable. The first gate insulating film 4 is in contact with the gate electrode side and is formed mainly of silicon and oxygen. Specific examples include silicon oxide, but other examples include silicon oxynitride and the like in which the oxygen content exceeds the nitrogen content.

  The second gate insulating film 5 of the present invention is in contact with the semiconductor active layer side made of oxide, and is formed mainly of silicon and nitrogen. Specific examples include silicon nitride, but other examples include silicon oxynitride and the like in which the nitrogen content exceeds the oxygen content. Both the first gate insulating layer and the second gate insulating layer preferably have a thickness of 2 nm to 500 nm. In addition, an insulating film having a different composition may be inserted between the first gate insulating film 4 and the second gate insulating film 5.

  The gate insulating layer 40 is formed using a method such as a vacuum deposition method, an ion plating method, a sputtering method, a laser ablation method, a plasma CVD (Chemical Vapor Deposition) method, a photo CVD method, a hot wire CVD method, or a sol-gel method. . The thickness of the gate insulating layer 40 is desirably 40 nm to 1 μm. It is not limited to these. The first gate insulating film 4 is preferably formed by CVD, and the second gate insulating film 5 is preferably formed by sputtering. By adopting such a manufacturing method, a highly reliable thin film transistor having high insulating properties, low residual stress, hardly peeling, and high reliability can be realized.

  In the gate insulating layer 40 of the present invention, the first gate insulating film 4 on the side in contact with the gate electrode contains 0.5 atomic% (atomic fraction) to 4 atomic% (atomic fraction) of carbon, preferably 0. It is preferable to contain .7 atomic% to 2 atomic%. Further, the second gate insulating film 5 on the side in contact with the semiconductor active layer contains 0.05 atomic% (atomic fraction) to 0.5 atomic% (atomic fraction) of carbon, preferably 0.2 atomic% (atomic percentage). It is preferable to contain a fraction). It has been considered that the incorporation of carbon in the gate insulating layer 40 is not preferable because it increases the flexibility of the insulating film to increase the flexibility but deteriorates the insulating properties. However, by utilizing the characteristics of the carbon content as described in the present invention, high insulation, high flexibility of the device, and difficulty in peeling can be realized at the same time.

  The oxide semiconductor material used for the semiconductor active layer 6 made of the oxide is an oxide containing one or more elements of zinc, indium, tin, tungsten, magnesium, gallium, zinc oxide, indium oxide, tin oxide. In addition, known materials such as tungsten oxide and zinc gallium indium may be used, but the material is not limited to these. The structure of these materials may be single crystal, polycrystal, microcrystal, crystal / amorphous mixed crystal, nanocrystal scattered amorphous, or amorphous. The thickness of the semiconductor layer is preferably at least 20 nm. The oxide semiconductor layer is formed by a sputtering method, a pulse laser deposition method, a vacuum evaporation method, a CVD (Chemical Vapor Deposition) method, an MBE (Molecular Beam Epitaxy) method, a sol-gel method, or the like, preferably a sputtering method. A pulse laser deposition method, a vacuum deposition method, and a CVD (Chemical Vapor Deposition) method. Examples of sputtering include RF magnetron sputtering, DC sputtering, vacuum deposition includes heating deposition, electron beam deposition, ion plating, and CVD includes hot wire CVD and plasma CVD. Absent.

The gate electrode 3, the source electrode 7 and the drain electrode 8 made of the metal include metals such as indium (In), aluminum (Al), gold (Au), silver (Ag), titanium (Ti), and copper (Cu). It may be a thin film, indium oxide (In ₂ O ₃ ), tin oxide (SnO ₂ ), zinc oxide (ZnO), cadmium oxide (CdO), indium cadmium oxide (CdIn ₂ O ₄ ), cadmium tin oxide ( An oxide material such as Cd ₂ SnO ₄ ) or zinc tin oxide (Zn ₂ SnO ₄ ) may be used. Moreover, what doped this oxide material with the impurity is used suitably. For example, In ₂ O ₃ doped with tin (Sn), molybdenum (Mo), titanium (Ti), SnO ₂ doped with antimony (Sb) or fluorine (F), ZnO indium, aluminum, gallium For example, doped with (Ga). The materials of the gate electrode 3, the source electrode 7 and the drain electrode 8 may all be the same or different. These gate electrode, source electrode, drain electrode are vacuum deposition method, ion plating method, sputtering method, laser ablation method, plasma CVD method, photo CVD method, hot wire CVD method, spin coating using conductive paste, It is formed by a method such as dip coating, screen printing, letterpress printing, intaglio printing, planographic printing, and ink jet. When using transparent conductive oxides such as indium oxide, zinc oxide and tin oxide, it is desirable to increase the conductivity of the transparent conductive film by mixing a dopant. For example, it is preferable to degenerate the transparent conductive film by mixing gallium, aluminum, boron, etc. with zinc oxide, fluorine, antimony, etc. with tin oxide, tin, zinc, titanium, cerium, hafnium, zirconia, etc. with indium oxide. It is also desirable to increase the production efficiency by using the same base material as the oxide semiconductor as the electrode material and increasing only the dopant concentration. The film thickness of each of the gate electrode 3, the source electrode 7, and the drain electrode 8 needs to be at least 15 nm or more. The materials of the gate electrode 3, the source electrode 7 and the drain electrode 8 may all be the same or different.

  The oxide thin film transistor of the present invention includes an electronic display for liquid crystal, an electronic display for organic EL, an electronic display for optical writing type cholesteric liquid crystal, an electronic display for twisting ball system, an electronic display for toner display system, and an electronic display for movable film system. It can be used for electronic display devices such as sensors.

  Embodiments of the present invention will be described below with reference to the drawings. The present invention is not limited thereby.

As Example 1, the bottom gate thin film transistor of the present invention shown in FIG. First, polyethylene terephthalate (PET): T-60 (thickness 100 μm) manufactured by Mitsubishi Diafoil was used for the flexible plastic substrate 1. An alumina thin film having a thickness of 40 nm was formed thereon as an adhesion layer 2 by an electron beam evaporation method, and subsequently aluminum was deposited by sputtering to a thickness of 50 nm, and the gate electrode 3 was patterned by an etching method. Next, a SiO ₂ film having a thickness of 50 nm was formed as the first gate insulating film 4 at a substrate temperature of 55 ° C. by using a parallel plate type PECVD method. At this time, HMDSO (hexamethyldisiloxane) was vaporized in a constant temperature bath maintained at 50 ° C. as a raw material, and flowed at 5 SCCM while controlling the flow rate with a mass flow controller, and oxygen was flowed at 50 SCCM simultaneously. The film was formed by holding the pressure at 0.2 Torr and exciting the plasma with a high frequency of 13.56 MHz with an input power of 100 W. Here, when the composition of the first gate insulating film 4 was analyzed with an X-ray photoelectron spectrometer (XPS), the atomic fraction of carbon was 3.5%. Next, a SiN sintered body was used as a target, and 120 nm of SiON was laminated at room temperature by RF magnetron sputtering to form a second gate insulating film 5. At this time, argon 40 SCCM and oxygen 4 SCCM were flowed as process gases. Here, when the composition of the second gate insulating film 5 was analyzed by an X-ray photoelectron spectrometer (XPS), the atomic fraction of carbon was 0.3%. Next, a semiconductor active layer having a film thickness of 50 nm is formed by RF magnetron sputtering (process gas is argon 19.7 SCCM, oxygen 0.3 SCCM) using a ZnO sintered body as a target, and patterned by an etching method. A semiconductor active layer 6 was produced. Subsequently, a pixel electrode made of tin-doped indium oxide (ITO), a source electrode 7 and a drain electrode 8 were formed in a thickness of 80 nm by RF magnetron sputtering. The lift-off method was used for patterning. Here, the channel length was 50 μm and the channel width was 50 μm.

As Example 2, the bottom gate thin film transistor of the present invention shown in FIG. First, polyethylene terephthalate (PET): T-60 (thickness 100 μm) manufactured by Mitsubishi Diafoil was used for the flexible plastic substrate 1. An SiO ₂ thin film having a thickness of 40 nm was formed thereon as the adhesion layer 2 by electron beam evaporation, and chromium was then deposited by sputtering to a thickness of 50 nm, and the gate electrode 3 was patterned by an etching method. Next, a SiO ₂ film having a thickness of 40 nm was formed as the first gate insulating film 4 at a substrate temperature of 55 ° C. by using a parallel plate type PECVD method. At this time, TEOS (tetraethoxysilane) was put into a constant temperature bath maintained at 80 ° C. as a raw material and vaporized, and 5 SCCM was flowed while 50 SCCM was flowed while controlling the flow rate with a mass flow controller. The pressure was kept at 0.5 Torr, and the film was formed by exciting the plasma at a high frequency of 13.56 MHz with an input power of 100 W. Here, when the composition of the first gate insulating film 4 was analyzed with an X-ray photoelectron spectrometer (XPS), the atomic fraction of carbon was 1.8%. Next, a SiN sintered body was used as a target, and SiON was deposited to 110 nm at room temperature by RF magnetron sputtering (Ar 40 SCCM, oxygen 4 SCCM) to form a second gate insulating film 5. Here, when the composition of the second gate insulating film 5 was analyzed by an X-ray photoelectron spectrometer (XPS), the atomic fraction of carbon was 0.3%. Next, using a ZnO sintered body as a target, a semiconductor active layer having a thickness of 50 nm is formed by RF magnetron sputtering (sputtering gas is Ar 19.7 SCCM, oxygen 0.3 SCCM), and patterned by etching, The semiconductor active layer 6 was produced. Subsequently, an aluminum source electrode 7 and a drain electrode 8 were formed by 80 nm each using an electron beam evaporation method. Here, the source and drain electrodes were formed using a metal mask during vapor deposition. The channel length was 100 μm and the channel width was 1 mm.

  Examples 3 to 9 were carried out as comparative examples of the present invention. I will explain in order below

As Example 3 (Comparative Example 1), a conventional thin film transistor was prepared (see FIG. 1). First, polyethylene terephthalate (PET): T-60 (thickness 100 μm) manufactured by Mitsubishi Diafoil was used for the flexible plastic substrate 1. On top of this, 50 nm of aluminum was laminated by sputtering, and the gate electrode 3 was patterned by an etching method. Next, a SiO ₂ film having a thickness of 50 nm was formed as the first gate insulating film 4 at a substrate temperature of 55 ° C. by using a parallel plate type PECVD method. At this time, HMDSO (hexamethyldisiloxane) was vaporized in a constant temperature bath maintained at 50 ° C. as a raw material, and flowed at 5 SCCM while controlling the flow rate with a mass flow controller, and at the same time, oxygen was flowed at 50 SCCM. The film was formed by holding the pressure at 0.2 Torr and exciting the plasma with a high frequency of 13.56 MHz with an input power of 100 W. Here, when the composition of the first gate insulating film 4 was analyzed with an X-ray photoelectron spectrometer (XPS), the atomic fraction of carbon was 3.5%. Next, a SiN sintered body was used as a target, and 120 nm of SiON was laminated at room temperature by RF magnetron sputtering to form a second gate insulating film 5. At this time, argon 40 SCCM and oxygen 4 SCCM were flowed as process gases. Here, when the composition of the second gate insulating film 5 was analyzed by an X-ray photoelectron spectrometer (XPS), the atomic fraction of carbon was 0.3%. Next, a semiconductor active layer having a film thickness of 50 nm is formed by RF magnetron sputtering (sputtering gas is Ar 19.7 SCCM, oxygen 0.3 SCCM (oxygen flow rate ratio 1.5%)) using a ZnO sintered body as a target. Then, the semiconductor active layer 6 was produced by patterning using an etching method. Subsequently, a pixel electrode made of tin-doped indium oxide (ITO), a source electrode 7 and a drain electrode 8 were formed in a thickness of 80 nm by RF magnetron sputtering. The lift-off method was used for patterning. Here, the channel length was 50 μm and the channel width was 50 μm.

As Example 4 (Comparative Example 2), a conventional thin film transistor was prepared (see FIG. 1). First, polyethylene terephthalate (PET): T-60 (thickness 100 μm) manufactured by Mitsubishi Diafoil was used for the flexible plastic substrate 1. An alumina thin film having a thickness of 40 nm was formed thereon as an adhesion layer 2 by an electron beam evaporation method, and subsequently aluminum was deposited by sputtering to a thickness of 50 nm, and the gate electrode 3 was patterned by an etching method. Next, a SiN sintered body was used as a target, and SiON was deposited to 220 nm at room temperature by RF magnetron sputtering (Ar 40 SCCM, oxygen 0.2 SCCM) to form a second gate insulating film 5. Here, when the composition of the second gate insulating film 5 was analyzed by an X-ray photoelectron spectrometer (XPS), the atomic fraction of carbon was 0.3%. Next, a SiO ₂ film having a thickness of 100 nm was formed as the first gate insulating film 4 at a substrate temperature of 55 ° C. by using a parallel plate type PECVD method. At this time, HMDSO (hexamethyldisiloxane) was vaporized in a constant temperature bath maintained at 50 ° C. as a raw material, and flowed at 5 SCCM while controlling the flow rate with a mass flow controller, and oxygen was flowed at 50 SCCM simultaneously. The film was formed by holding the pressure at 0.2 Torr and exciting the plasma with a high frequency of 13.56 MHz with an input power of 100 W. Here, when the composition of the first gate insulating film 4 was analyzed with an X-ray photoelectron spectrometer (XPS), the atomic fraction of carbon was 3.5%. Next, using a ZnO sintered body as a target, a semiconductor active layer having a thickness of 50 nm is formed by RF magnetron sputtering (sputtering gas is Ar 19.7 SCCM, oxygen 0.3 SCCM), and patterned by etching, The semiconductor active layer 6 was produced. Subsequently, a pixel electrode made of tin-doped indium oxide (ITO), a source electrode 7 and a drain electrode 8 were formed in a thickness of 80 nm by RF magnetron sputtering. The lift-off method was used for patterning. Here, the channel length was 50 μm and the channel width was 50 μm.

  As Example 5 (Comparative Example 3), a conventional thin film transistor was prepared (see FIG. 1). First, polyethylene terephthalate (PET): T-60 (thickness 100 μm) manufactured by Mitsubishi Diafoil was used for the flexible plastic substrate 1. An alumina thin film having a thickness of 40 nm was formed thereon as an adhesion layer 2 by an electron beam evaporation method, and subsequently aluminum was deposited by sputtering to a thickness of 50 nm, and the gate electrode 3 was patterned by an etching method. Next, a SiN sintered body was used as a target, and 300 nm of SiON was laminated at room temperature by RF magnetron sputtering (Ar 40 SCCM, oxygen 0.2 SCCM) to form a second gate insulating film 5. Here, when the composition of the second gate insulating film 5 was analyzed by an X-ray photoelectron spectrometer (XPS), the atomic fraction of carbon was 0.3%. Next, a semiconductor active layer having a thickness of 50 nm is formed by RF magnetron sputtering (sputtering gas is Ar, 19.7 SCCM, oxygen 0.3 SCCM) using a ZnO sintered body as a target, and patterned by an etching method. Thus, a semiconductor active layer was produced. Subsequently, a pixel electrode made of tin-doped indium oxide (ITO), a source electrode, and a drain electrode were formed in a thickness of 80 nm by RF magnetron sputtering. The lift-off method was used for patterning. Here, the channel length was 50 μm and the channel width was 50 μm.

As Example 6 (Comparative Example 4), a conventional thin film transistor was prepared (see FIG. 1). First, polyethylene terephthalate (PET): T-60 (thickness 100 μm) manufactured by Mitsubishi Diafoil was used for the flexible plastic substrate 1. An alumina thin film having a thickness of 40 nm was formed thereon as an adhesion layer 2 by an electron beam evaporation method, and subsequently aluminum was deposited by sputtering to a thickness of 50 nm, and the gate electrode 3 was patterned by an etching method. Next, 300 nm of SiO ₂ was formed as the first gate insulating film 4 at a substrate temperature of 55 ° C. by using a parallel plate type PECVD method. At this time, HMDSO (hexamethyldisiloxane) was vaporized in a constant temperature bath maintained at 50 ° C. as a raw material, and flowed at 5 SCCM while controlling the flow rate with a mass flow controller, and oxygen was flowed at 50 SCCM simultaneously. The film was formed by holding the pressure at 0.2 Torr and exciting the plasma with a high frequency of 13.56 MHz with an input power of 100 W. Here, when the composition of the first gate insulating film 4 was analyzed with an X-ray photoelectron spectrometer (XPS), the atomic fraction of carbon was 3.5%. Next, a semiconductor active layer having a film thickness of 50 nm is formed by RF magnetron sputtering using a ZnO sintered body as a target (sputtering gas is Ar: 19.7 SCCM, oxygen 0.3 SCCM (oxygen flow rate ratio 1.5%)). The semiconductor active layer 6 was produced by forming a film and patterning it by an etching method. Subsequently, a pixel electrode made of tin-doped indium oxide (ITO), a source electrode 7 and a drain electrode 8 were formed in a thickness of 80 nm by RF magnetron sputtering. The lift-off method was used for patterning. Here, the channel length was 50 μm and the channel width was 50 μm.

As Example 7 (Comparative Example 5), a conventional thin film transistor was prepared (see FIG. 1). First, polyethylene terephthalate (PET): T-60 (thickness 100 μm) manufactured by Mitsubishi Diafoil was used for the flexible plastic substrate 1. An alumina thin film having a thickness of 40 nm was formed thereon as an adhesion layer 2 by an electron beam evaporation method, and subsequently aluminum was deposited by sputtering to a thickness of 50 nm, and the gate electrode 3 was patterned by an etching method. Next, a SiO ₂ film having a thickness of 70 nm was formed as the first gate insulating film 4 at a substrate temperature of 40 ° C. using a parallel plate type PECVD method. At this time, HMDSO (hexamethyldisiloxane) was vaporized in a constant temperature bath maintained at 70 ° C. as a raw material, and the flow rate was controlled by a mass flow controller, and 10 SCCM flowed, and oxygen flowed 30 SCCM at the same time. The film was formed by holding the pressure at 0.2 Torr and exciting the plasma with a high frequency of 13.56 MHz with an input power of 80 W. Here, when the composition of the first gate insulating film 4 was analyzed by an X-ray photoelectron spectrometer (XPS), the atomic fraction of carbon was 4.8%. Next, a SiN sintered body was used as a target, and 120 nm of SiON was laminated at room temperature by RF magnetron sputtering to form a second gate insulating film 5. At this time, argon 40 SCCM and oxygen 4 SCCM were flowed as process gases. Here, when the composition of the second gate insulating film 5 was analyzed by an X-ray photoelectron spectrometer (XPS), the atomic fraction of carbon was 0.3%. Next, a ZnO sintered body is used as a target, a semiconductor active layer having a thickness of 50 nm is formed by RF magnetron sputtering (process gas is argon 19.7 SCCM, oxygen 0.3 SCCM), and patterned by etching. An active layer 6 was produced. Subsequently, a pixel electrode made of tin-doped indium oxide (ITO), a source electrode 7 and a drain electrode 8 were formed in a thickness of 80 nm by RF magnetron sputtering. The lift-off method was used for patterning. Here, the channel length was 50 μm and the channel width was 50 μm.

As Example 8 (Comparative Example 6), a conventional thin film transistor was formed (see FIG. 1). First, polyethylene terephthalate (PET): T-60 (thickness 100 μm) manufactured by Mitsubishi Diafoil was used for the flexible plastic substrate 1. An SiO ₂ thin film having a thickness of 40 nm was formed thereon as the adhesion layer 2 by electron beam evaporation, and chromium was then deposited by sputtering to a thickness of 50 nm, and the gate electrode 3 was patterned by an etching method. Next, a SiO ₂ film having a thickness of 50 nm was formed as the first gate insulating film 4 at a substrate temperature of 85 ° C. by using a parallel plate type PECVD method. At this time, TEOS (tetraethoxysilane) was put into a constant temperature bath maintained at 80 ° C. as a raw material and vaporized, and 2.5 SCCM was flowed while simultaneously controlling the flow rate with a mass flow controller, and simultaneously oxygen was flowed 100 SCCM. The pressure was kept at 0.5 Torr, and the film was formed by exciting the plasma at a high frequency of 13.56 MHz with an input power of 250 W. Here, when the composition of the first gate insulating film 4 was analyzed with an X-ray photoelectron spectrometer (XPS), the atomic fraction of carbon was 0.3%. Next, a SiN sintered body was used as a target, and SiON was deposited to 110 nm at room temperature by RF magnetron sputtering (Ar 40 SCCM, oxygen 4 SCCM) to form a second gate insulating film 5. Here, when the composition of the second gate insulating film 5 was analyzed by an X-ray photoelectron spectrometer (XPS), the atomic fraction of carbon was 0.3%. Next, a semiconductor active layer having a thickness of 50 nm is formed by RF magnetron sputtering (sputtering gas is Ar: 19.7 SCCM, oxygen 0.3 SCCM) using a ZnO sintered body as a target, and patterned by an etching method. Thus, the semiconductor active layer 6 was produced. Subsequently, an aluminum source electrode 7 and a drain electrode 8 were formed by 80 nm each using an electron beam evaporation method. Here, a source electrode and a drain electrode were formed using a metal mask during vapor deposition. The channel length was 100 μm and the channel width was 1 mm.

  Table 1 shows a table summarizing the evaluation results of the characteristics and the like of the insulating films of Examples 1 and 2 and Examples 3 to 8 (Comparative Examples 1 to 6).

なお、実施例３の絶縁膜は実施例１、２と同じであるが基材とゲート電極間に密着層が存在しない。

The insulating film of Example 3 is the same as that of Examples 1 and 2, but there is no adhesion layer between the base material and the gate electrode.

  Table 2 shows the results (on / off ratio, mobility, bending characteristics) of Examples 1 and 2 and Examples 3 to 8 (Comparative Examples 1 to 6).

なお、表２から明らかな通り、本発明の層構成および成膜法を取る薄膜トランジスタは優れたｏｎ／ｏｆｆ比、移動度、および曲げ特性を持つことが分かる。

As is apparent from Table 2, it can be seen that the thin film transistor employing the layer structure and film formation method of the present invention has excellent on / off ratio, mobility, and bending characteristics.

It is a sectional side view of the partial expansion of the thin-film transistor of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Flexible plastic base material 2 ... Adhesion layer 3 made of inorganic material ... Gate electrode 4 made of metal ... Gate insulation film 5 of first layer ... Gate insulation film 6 of second layer ... Semiconductor active layer made of oxide 7 ... Source electrode 8 ... Drain electrode 40 ... Gate insulating layer

Claims (7)

  In a thin film transistor comprising a gate electrode, a gate insulating layer, a semiconductor active layer, and a source electrode and a drain electrode on a flexible plastic substrate, an adhesion layer made of an inorganic material, a metal, on the flexible plastic substrate A thin film transistor having a multilayer structure in the order of a gate insulating layer composed of two or more different compositions, a semiconductor active layer composed of an oxide, a source electrode, and a drain electrode, and the flexible plastic substrate A thin film transistor, wherein an adhesion layer is formed between gate electrode layers.   2. The thin film transistor according to claim 1, wherein the adhesion layer made of the inorganic material is made of silicon oxide, aluminum oxide, or silicon nitride.   In the gate insulating layer, the gate insulating layer in contact with the gate electrode is formed mainly with silicon and oxygen, and the gate insulating layer in contact with the semiconductor active layer is formed mainly with silicon and nitrogen. The thin film transistor according to claim 1 or 2, wherein   The gate insulating layer in contact with the gate electrode is formed by a chemical vapor deposition (CVD) method, and the gate insulating layer in contact with the semiconductor active layer is formed by a sputtering method. The method for manufacturing a thin film transistor according to any one of claims 1 to 3.   The gate insulating layer on the side in contact with the gate electrode contains carbon at 0.5 atomic% (atomic fraction) or higher and 4 atomic% (atomic fraction) or lower, and the gate insulating layer on the side in contact with the semiconductor active layer contains carbon. 5. The thin film transistor according to claim 1, further comprising 0.05 atomic% (atomic fraction) or more and carbon of 0.5 atomic% (atomic fraction) or less.   6. The thin film transistor according to claim 1, wherein the gate electrode is mainly composed of aluminum, chromium, titanium, silver, or copper.   An electronic display using a thin film transistor in which a plurality of thin film transistors are arranged in a matrix, wherein the thin film transistor according to any one of claims 1 to 6 is used.

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