JP2007213212A - Ic card and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce resin mold flash on an interface terminal in a memory card having the card substrate in which the interface terminal is formed in the same surface as the surface where a semiconductor chip is mounted. <P>SOLUTION: A card substrate 1 comprises base material 1a and solder resist 1b covering the surface and the rear face of the base material 1a and the semiconductor chip is mounted on the surface. A plurality of interface terminals 4 are exposed from the solder resist 1b on the surface of the card substrate 1, the interface terminal 4 is exposed from resin 10 covering the semiconductor chip, furthermore, between the resin 10 and the interface terminals 4, one belt shaped area (a solder resist remover 11) where all or a part of the solder resist 1b is removed in a direction toward thickness is arranged. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an IC card and a manufacturing technique thereof, and more particularly, to an IC card including a memory card which is a card-type storage device employing a nonvolatile memory, for example, a flash memory as a storage medium, and a technique effective when applied to the manufacturing thereof. It is about.

For example, a memory chip and a controller chip for controlling the memory chip are mounted, and a card substrate having a plurality of connector terminals and a plurality of connection pads connected to the connector terminals is formed. There is disclosed a memory card that is connected to a terminal via a bonding wire, and a memory interface terminal of the controller chip is connected to a controller interface terminal of the memory chip via a bonding wire (see, for example, Patent Document 1).
JP 2001-209773 A (paragraphs [0079] to [0089], FIGS. 15 and 16)

  In recent years, memory cards such as MMC (Multi Media Card) that have been reduced in size and weight and simplified in interface have been provided. However, as memory cards have become more multifunctional, an increase in the number of memory card interface terminals is required. ing. Therefore, the present inventors have studied to increase the number of interface terminals by forming the interface terminals that have been conventionally formed on the back surface of the card board also on the surface of the card board. However, since all the semiconductor chips and the like mounted on the surface of the card substrate are covered with the resin, the resin mold burr is applied on the interface terminal formed on the surface of the card substrate. As a result, the surface of the card substrate The problem of poor contact occurred in the interface terminals formed in the above.

  When the connector terminal that functions as the external interface terminal is formed on the back surface of the card substrate as in the memory card described in Patent Document 1, the controller chip or flash memory chip mounted on the surface of the card substrate is made of resin. Even if they are molded together, the resin does not cover the connector terminals formed on the back surface of the card substrate, so that the problem of poor contact described above does not occur.

  An object of the present invention is to provide a technique capable of reducing resin mold burrs on an interface terminal in a memory card having a card substrate having an interface terminal formed on the same surface as the surface on which a semiconductor chip is mounted. is there.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  The IC card of the present invention has a card substrate formed on a board and a solder resist covering the base and the front and back surfaces of the base, and a semiconductor chip covered with a resin is mounted on the surface of the card board. On the surface of the card substrate, a plurality of interface terminals formed on the surface of the base material are exposed from the solder resist, a plurality of interface terminals are exposed from the resin covering the semiconductor chip, and the resin and the plurality of interface terminals Between the two, one strip-shaped solder resist removal or solder resist dam is provided.

  The IC card manufacturing method of the present invention includes a chip mounting area, a plurality of connection pads arranged in an area other than the chip mounting area corresponding to the plurality of external terminals arranged on the edge of the surface of the semiconductor chip, A unit comprising a plurality of interface terminals arranged corresponding to the plurality of connection pads, and a strip of solder resist or a solder resist dam between the plurality of interface terminals and the plurality of connection pads A step of preparing a mounting substrate in which a plurality of frames are arranged; a step of attaching a semiconductor chip to a chip mounting region for each unit frame on the surface of the mounting substrate; and a plurality of elements arranged on an edge of the surface of the semiconductor chip. A step of connecting each of the external terminals and a plurality of connection pads arranged on the surface of the mounting substrate using bonding wires, and a solder resist Across the gas or solder resist dams, only sealed with resin region on the side where the semiconductor chip is formed, a region on the side where a plurality of interface terminal is formed and a step of unencapsulated with resin.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  In a memory card having a card substrate on which the interface terminals are formed on the same surface as the surface on which the semiconductor chip is mounted, the resin flow to the interface terminal side when molding the semiconductor chip etc. is removed from the solder resist or the solder resist dam Therefore, the resin mold burr on the interface terminal can be reduced.

  In the present embodiment, when referring to the number of elements, etc. (including the number, numerical value, quantity, range, etc.), unless otherwise specified, the case is clearly limited to a specific number in principle, etc. It is not limited to the specific number, and it may be more or less than the specific number. Further, in the present embodiment, the constituent elements (including element steps and the like) are not necessarily essential unless particularly specified and apparently essential in principle. Yes. Similarly, in this embodiment, when referring to the shape, positional relationship, etc. of the component, etc., the shape, etc. substantially, unless otherwise specified, or otherwise considered in principle. It shall include those that are approximate or similar to. The same applies to the above numerical values and ranges.

  Further, in all drawings for explaining the present embodiment, parts having the same function are denoted by the same reference numerals, and repeated explanation thereof is omitted. Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Embodiment 1)
FIG. 1 shows a top view of an essential part of an example of the memory card according to the first embodiment, and FIG. 2 shows a sectional view of the essential part of the memory card shown in FIG.

  As shown in FIGS. 1 and 2, in the memory card MC <b> 1 according to the first embodiment, for example, a flash memory chip 2 is mounted as a semiconductor chip on the surface of the card substrate 1, and insulation is further provided on the flash memory chip 2. The controller chip 3 bonded with a conductive paste is laminated.

  The card substrate 1 has a base material 1a made of a glass epoxy resin in which a multilayer wiring pattern is formed on the front surface, back surface, and inside, and mainly a glass cloth hardened with an epoxy resin, and is formed on the surface of the base material 1a. In order to expose the plurality of interface terminals 4 (in the first embodiment, seven are arranged, but not limited to this) and the plurality of test terminals 5 formed on the back surface, for example, A solder resist 1b having a thickness of 20 to 30 μm covers the substrate 1a. The interface terminal 4 and the test terminal 5 are formed by applying gold (Au) plating or nickel (Ni) plating to a conductor pattern such as copper (Cu), for example.

  The flash memory chip 2 is a bare chip, and is formed on the surface of the card substrate 1 so as to have a one-to-one correspondence with the plurality of external terminals 6 arranged on the edge of the surface of the flash memory chip 2. The plurality of first connection pads 7a are connected using the first bonding wires 8a. The external terminal 6 is made of, for example, aluminum (Al), an aluminum alloy, or copper. The first connection pad 7a is made of a conductor film in the same layer as the interface terminal 4, and the first connection pad 7a and the interface terminal 4 are electrically connected by a wiring pattern formed inside the substrate 1a. The flash memory chip 2 has a memory cell array in which, for example, nonvolatile memory cell transistors having a control gate, a floating gate, a source and a drain are arranged in a matrix, and reads data according to commands and addresses supplied from the outside. Operations such as erasing, writing, and Verphi are performed.

  The controller chip 3 is a bare chip like the flash memory chip 2, and has a plurality of external terminals 9 arranged on the edge of the surface of the controller chip 3 and a card substrate so as to correspond to each of the plurality of external terminals 9. A plurality of second connection pads 7b formed on one surface are connected using a second bonding wire 8b. The external terminal 9 is made of, for example, aluminum, an aluminum alloy, or copper. The second connection pad 7b is made of a conductor film in the same layer as the interface terminal 4, and the second connection pad 7b and the interface terminal 4 are electrically connected by a wiring pattern formed inside the substrate 1a. The controller chip 3 controls the read / write operation with respect to the flash memory chip 2 according to an instruction from the outside, for example. Further, in consideration of data security or copyright protection, a controller having a security function for encrypting data written to the flash memory chip 2 and decrypting data read from the flash memory chip 2 There is also a chip 3.

  The interface terminals 4 have the same rectangular planar shape, and are arranged in a line at equal intervals. The test terminal 5 is provided for performing a test when the flash memory chip 2 and the controller chip 3 are mounted. Therefore, the test terminal 5 is formed on the back surface of the card substrate 1 opposite to the surface of the card substrate 1 on which the flash memory chip 2 and the controller chip 3 that are sealed with resin are mounted.

  Except for the area where the interface terminal 4 used for connecting the memory card MC1 to an external device or the like is formed, the flash memory chip 2, the controller chip 3, and the first and second connection pads on the surface side of the card substrate 1 7a, 7b and the first and second bonding wires 8a, 8b are molded with one thermosetting resin 10 as a whole. At this time, by forming a solder resist removal or a solder resist dam, which will be described below, on the surface side of the card substrate 1, the flow of the resin 10 to the interface terminal 4 side is blocked and formed on the surface of the interface terminal 4. Reduce mold burrs.

  An example of the mold burr reduction method according to the first embodiment will be described with reference to a partially enlarged sectional view of the memory card shown in FIG. Between the resin 10 that covers the flash memory chip 2, the controller chip 3, and the like and the interface terminal 4, there is provided one band-like region from which the solder resist 1b has been removed (hereinafter referred to as "solder resist removal 11"). By forming a concave step due to the removal of the solder resist 11 on the surface side of the card substrate 1, the flow of the resin 10 during molding can be stopped. The width of the solder resist removal 11 is considered to be appropriate, for example, a peripheral range of 0.2 to 0.4 mm with a center value of 0.3 mm (it is not limited to this range depending on other conditions. ). If the width is narrow, the effect of blocking the flow of the resin 10 is weakened. Conversely, if the width is wide, the size of the memory card is increased. The solder resist removal 11 may remove all of the solder resist 1b in the thickness direction, or may remove a part of the solder resist 1b in the thickness direction in some cases.

  Another example of the mold burr reduction method according to the first embodiment will be described with reference to a partially enlarged sectional view of the memory card shown in FIG. Between the resin 10 covering the flash memory chip 2, the controller chip 3 and the like and the interface terminal 4, there is provided one band-like region (hereinafter referred to as a solder resist dam 12) in which the solder resist 1b has a convex shape. By forming a convex step by the solder resist dam 12 on the surface side of the card substrate 1, the flow of the resin 10 during molding can be stopped. The width of the solder resist dam 12 is considered to be appropriate, for example, a peripheral range of 0.2 to 0.4 mm with a center value of 0.3 mm (it is not limited to this range depending on other conditions. ). If the width is narrow, the effect of blocking the flow of the resin 10 is weakened. Conversely, if the width is wide, the size of the memory card is increased.

  Next, an example of an IC card in which the memory card according to Embodiment 1 of the present invention is incorporated will be described with reference to FIGS. 5 is a top view of the main part of the IC card, and FIG. 6 is a cross-sectional view of the main part of the IC card shown in FIG.

  The memory card incorporated in the IC card 13 is the same as the memory card MC1 shown in FIG. 1 and FIG. The memory card MC1 and the IC chip 15 are mounted on the surface of the board 14 of the IC card 13. The IC chip 15 has security information such as personal information protection. In this embodiment, a description is given using a security information storing chip as an example of the IC chip 15, but it is of course possible to mount a chip having other functions.

  The board 14 is a substrate on which a multilayer wiring pattern is formed on the surface and inside thereof. For example, on the surface of the board 14, the third connection pads 16 corresponding to the interface terminals 4 of the memory card MC 1 and the IC are provided. A plurality of fourth connection pads 18 corresponding to the plurality of external terminals 17 arranged on the edge of the surface of the chip 15 are formed. The third connection pad 16 and the fourth connection pad 18 are electrically connected by a wiring pattern formed inside the board 14. The interface terminal 4 of the memory card MC1 and the third connection pad 16 are connected using the third bonding wire 19, and the external terminal 17 of the IC chip 15 and the fourth connection pad 18 use the fourth bonding wire 20. Connected. The IC chip 15, the fourth connection pad 18, and the fourth bonding wire 20 are molded with one thermosetting resin 21 as a whole.

  Next, a method for manufacturing a memory card according to the first embodiment will be described in the order of steps with reference to FIGS. FIG. 7 is a process diagram of a method for manufacturing a memory card, and FIGS. 8 to 11 are cross-sectional views or plan views of main parts of the memory card during the manufacturing process. In the following description, from the back grind after the circuit pattern is formed on the semiconductor wafer, die bonding for bonding the chips separated on the card substrate, and the stacked flash memory chips and controller chips are made of resin. Each process of the mold etc. to protect is demonstrated.

  First, an integrated circuit is formed on a circuit formation surface (first main surface) of a semiconductor wafer (integrated circuit formation steps 100f and 100c in FIG. 7). The semiconductor wafer is made of a silicon single crystal, and has a diameter of, for example, 200 mm or 300 mm, and a thickness of, for example, 700 μm or more (value at the time of entering the wafer process). In the first embodiment, a semiconductor wafer (hereinafter referred to as a memory wafer) on which the flash memory chip 2 is formed and a semiconductor wafer (hereinafter referred to as a controller wafer) on which the controller chip 3 is formed are prepared. . Note that. Among the manufacturing processes described below, from the integrated circuit forming process to the UV irradiation process after dicing, the process for the flash memory chip 2 and the process for the controller chip 3 are performed separately, but the contents are almost the same. is there.

  Next, the quality of the flash memory chip 2 made on the memory wafer is judged, and the quality of the controller chip 3 made on the controller wafer is similarly judged (wafer test process 101f, FIG. 7). 101c). The flash memory chip 2 and the controller chip 3 determined to be defective are marked as defective.

  Next, an adhesive tape is applied to the circuit forming surface of the memory wafer, and similarly, the adhesive tape is applied to the circuit forming surface of the controller wafer (tape attaching steps 102f and 102c in FIG. 7). Here, the adhesive tape may be a self-peeling tape, that is, an ultraviolet curing type, a thermosetting type or an energy beam curable type, or a general adhesive tape which is not an ultraviolet curing type, a thermosetting type or an EB curing type ( Non-self-peeling tape) may also be used.

  Next, the back surface of the memory wafer (the surface opposite to the circuit formation surface, the second main surface) is ground to reduce the thickness of the memory wafer to, for example, 70 μm or less. Similarly, the back surface of the controller wafer is ground to reduce the thickness of the controller wafer to, for example, 70 μm or less (back grinding steps 103f and 103c in FIG. 7).

  Next, the memory wafer is cleaned and dried, and similarly the controller wafer is cleaned and dried (cleaning / drying steps 104f and 104c in FIG. 7). Thereafter, the memory wafer is attached to a dicing tape, and the controller wafer is similarly attached to another dicing tape (wafer mounting steps 105f and 105c in FIG. 7). In the wafer mount, an annular frame with a dicing tape attached in advance is prepared. The dicing tape and the back surface of the memory wafer are adhered, and then the adhesive tape is peeled off from the circuit forming surface of the memory wafer. Similarly, the dicing tape and the controller wafer are attached, and then the adhesive tape is peeled from the circuit forming surface of the controller wafer. In this manner, the memory wafer and the controller wafer are re-attached to the frame by dicing with reference to the alignment marks formed on the circuit formation surface of the memory wafer and the circuit formation surface of the controller wafer in the subsequent dicing process. This is because the circuit formation surface on which the alignment mark is formed is used as the upper surface.

  Next, the memory wafer is diced, and similarly the controller wafer is diced (dicing steps 106f and 106c in FIG. 7). The memory wafer is separated into flash memory chips 2, and the controller wafer is separated into controller chips 3. Even after the separation, each flash memory chip 2 of the memory wafer or the controller wafer is separated. Since each controller chip 3 is fixed to the frame via a dicing tape, it maintains an aligned state. The wafer for memory and the wafer for controller are scribe lines (line drawn at the chip boundary to cut each semiconductor wafer into individual chips) using an ultra-thin circular blade with diamond particles called diamond saw attached. Is cut horizontally and vertically.

  Next, the flash memory chip 2 is individually divided by pushing down the frame and the dicing tape is extended, and similarly, the controller chip 3 is individually divided. This method is referred to as a so-called expanding method, but the method of dividing the semiconductor chip individually is not limited to this. For example, it is possible to adopt a so-called cracking method in which the semiconductor chips are individually divided by applying a force to the semiconductor chips in each row.

  Next, the memory wafer is irradiated with ultraviolet rays, and similarly, the controller wafer is irradiated with ultraviolet rays (UV irradiation steps 107f and P107c in FIG. 7). By irradiating UV from the back side of the dicing tape, the adhesive strength of the surface of the dicing tape that contacts the flash memory chip 2 is reduced, and the flash memory chip 2 is easily peeled off from the dicing tape. The adhesive force of the surface in contact with the chip 3 is reduced, and the controller chip 3 is easily peeled off from the dicing tape.

  Next, the flash memory chips 2 determined to be good in the wafer test process 101f are picked up one by one from the dicing tape. Since the adhesive force between the dicing tape and the flash memory chip 2 is weakened by UV irradiation, even the flash memory chip 2 that is thin and has a reduced strength can be reliably picked up.

  Next, as shown in FIG. 8, the picked-up flash memory chip 2 is mounted on the surface of the mounting substrate 22 (first die bonding step 108 in FIG. 7). The picked-up flash memory chip 2 is transported to a predetermined position on the mounting substrate 22, a paste material is placed on the island (chip mounting region) of the mounting substrate 22, and the flash memory chip 2 is lightly pressed here, Curing is performed at a temperature of about 200 ° C. As a result, the flash memory chip 2 is attached to the mounting substrate 22.

  The mounting substrate 22 is, for example, a matrix type substrate. If the longitudinal direction of the mounting substrate 22 is a column and the direction orthogonal to the direction of this column is a row, there are 6 unit frames corresponding to one memory card. The configuration is arranged in five rows and columns. Note that the matrix-type substrate in the first embodiment has two or more unit frames in each row and column. Further, this unit frame corresponds to the card substrate 1 described above. That is, on the surface of one unit frame, the first and second connection pads 7a and 7b and the interface terminal 4 arranged around the chip mounting area to which the flash memory chip 2 is bonded are exposed from the solder resist 1b. Further, one strip-shaped solder resist remover 11 is formed between the first and second bonding pads 7a and 7b and the interface terminal 4 arranged around the chip mounting area. Instead of the solder resist removal 11, a mounting substrate on which the solder resist dam 12 is formed may be used.

  Next, the controller chips 3 determined to be good in the wafer test process 101c are removed from the dicing tape one by one and picked up. Since the adhesive force between the dicing tape and the controller chip 3 is weakened by UV irradiation, the controller chip 3 that is thin and has a reduced strength can be reliably picked up.

  Next, as shown in FIG. 9, the picked-up controller chip 3 is mounted on the flash memory chip 2 (second die bonding step 109 in FIG. 7). The picked-up controller chip 3 is transported to a predetermined position on the flash memory chip 2 and bonded onto the chip mounting area of the flash memory chip 2 using an insulating paste.

  Next, the external terminals 6 arranged on the edge of the surface of the flash memory chip 2, the external terminals 9 arranged on the edge of the surface of the controller chip 3, and the first and second connection pads arranged on the surface of the mounting substrate 22 Surfaces such as 7a and 7b are subjected to plasma cleaning (plasma cleaning step 110 in FIG. 7).

  Next, as shown in FIG. 10, the external terminals 6 arranged on the edge of the surface of the flash memory chip 2 and the first connection pads 7a arranged on the surface of the mounting substrate 22 are used using the first bonding wires 8a. The external terminals 9 arranged on the edge of the surface of the controller chip 3 and the second connection pads 7b arranged on the surface of the mounting substrate 22 are connected using the second bonding wires 8b (wire bonding in FIG. 7). Step 111).

  Next, after the appearance inspection of the mounting substrate 22 on which the flash memory chip 2 and the controller chip 3 are mounted (post-assembly appearance inspection step 112 in FIG. 7), the mounting on which the flash memory chip 2 and the controller chip 3 are mounted. The substrate 22 is set in a mold molding machine, the liquefied resin 10 is heated and poured, and the flash memory chip 2 and the controller chip 3 are sealed with the resin 10 and molded (molding process in FIG. 7). 113). In this molding process, each of the flash memory chip 2 and the controller chip 3 mounted in one column and one row may be molded one by one. For example, as shown in FIG. Alternatively, the flash memory chip 2 and the controller chip 3 may be molded together into one. Subsequently, a baking process is performed at a temperature of 170 ° C., for example.

  One strip-shaped solder resist remover 11 is formed between the resin 10 and the interface terminal 4 for each unit frame of the mounting substrate 22 (corresponding to the card substrate 1). Accordingly, the flow of the resin 10 toward the interface terminal 4 at the time of molding is blocked by the solder resist removal 11, so that mold burrs formed on the interface terminal 4 can be reduced.

  Next, after separating from the mounting substrate 22 into one memory card MC1 (cutting step 114 in FIG. 7), a product name or the like is stamped on the resin 10. Thereafter, each finished memory card MC1 is sorted in accordance with the product standard (characteristic sorting step 115 in FIG. 7), and a product is completed through a final appearance inspection step (final appearance inspection step 116 in FIG. 7). ).

  Thus, according to the first embodiment, in the memory card having the card substrate 1 on which the interface terminal 4 is formed on the same surface as the surface on which the flash memory chip 2 and the control chip 3 are mounted, the flash memory chip 2 Since the flow of the resin 10 onto the interface terminal 4 when molding the control chip 3 or the like with the resin 10 can be stopped by the solder resist removal 11 or the solder resist dam 12, the resin mold burr on the interface terminal 4 is reduced. can do.

(Embodiment 2)
In the first embodiment described above, the depth of the solder resist removal 11 is set to the thickness of the solder resist 1b, for example, 20 to 30 μm, even if the depth is the deepest. An example in which the effect of stopping the flow of the resin 10 at the time of molding can be improved by making it deeper than the thickness of the resist 1b will be described.

  An example of the memory card according to the second embodiment will be described with reference to FIG. FIG. 12A is a schematic view of the front surface of the card substrate showing an area where the solder resist is removed, and FIG. 12B is a schematic view of the back surface of the card substrate.

  As shown in FIG. 12, in the memory card MC2 according to the second embodiment, a plurality of first connection pads 7a are penetrated from the front to the back of the base material on the first connection pad 7a side with the solder resist removal 11 interposed therebetween. Corresponding first through holes 23 are formed, and through the interface terminal 4 side from the front to the back of the base material, a plurality of interface terminals 4 and one-to-one corresponding second through holes 24 are formed. Conductor patterns are formed inside the second through holes 23 and 24. Furthermore, the conductor pattern formed inside the first through hole 23 and the conductor pattern formed inside the second through hole 24 are electrically connected by the wiring pattern 25 formed on the back surface of the substrate. Thus, the first connection pad 7a and the interface terminal 4 are electrically connected.

  That is, it is formed through the conductor pattern inside the first through hole 23 formed through the base material on the first connection pad 7a side and the base material on the interface terminal 4 side across the solder resist removal 11 The first connection pads 7a formed on the surface of the base material and the interface terminals 4 are electrically connected via the conductor pattern inside the second through hole 24 and the wiring pattern 25 formed on the back surface of the base material. Can be formed not only on the solder resist but also on the base material in the depth direction, and the depth of the solder resist removal 11 can be set to a depth close to the thickness of the base material. It can be arbitrarily set.

  As described above, according to the second embodiment, when the depth of the solder resist removal 11 is set, the degree of freedom of the design value is widened, so that the effect of blocking the flow of the resin 10 during molding is improved. Can do.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  For example, in the present embodiment, the structure of the memory card has been described on the premise that it is applied to the MMC. However, the present invention is not limited to this. For example, a CF (Compact Flash) memory card, an SD (Secure Digital) memory card Alternatively, the present invention can be applied to a memory stick. Further, the memory card of the present embodiment can also be applied to a mini-size SIM card or an IC card corresponding to the mini UICC card standard having a planar size of 15 mm × 12 mm and a thickness of about 0.76 mm. .

  Further, in the present embodiment, an IC card having one flash memory chip is illustrated, but for example, a second flash memory chip can be further arranged. In this case, a second flash memory chip is stacked on the first flash memory chip, and a controller chip is stacked on the second flash memory chip. Thus, the capacity of the IC card can be increased by increasing the number of flash memory chips.

  The present invention can be applied to an IC card mounted on a mobile phone, a credit card, an ID (identification) card, a passbook or the like.

It is a principal part top view which shows an example of the memory card by Embodiment 1 of this invention. FIG. 2 is a cross-sectional view of a main part of the memory card shown in FIG. It is a partial expanded sectional view of the memory card used in order to demonstrate an example of the mold burr | flash reduction method by Embodiment 1 of this invention. It is a partial expanded sectional view of the memory card used in order to demonstrate the other example of the reduction method of the mold burr | flash by Embodiment 1 of this invention. It is a principal part top view which shows an example of the IC card in which the memory card by Embodiment 1 of this invention was integrated. It is principal part sectional drawing of the IC card shown in FIG. It is process drawing of the manufacturing method of the memory card by Embodiment 1 of this invention. It is principal part sectional drawing of the semiconductor substrate which shows the manufacturing process of the memory card by Embodiment 1 of this invention. It is principal part sectional drawing of the semiconductor substrate which shows the manufacturing process of the memory card by Embodiment 1 of this invention. It is principal part sectional drawing of the semiconductor substrate which shows the manufacturing process of the memory card by Embodiment 1 of this invention. It is a principal part top view of the semiconductor substrate which shows the manufacturing process of the memory card by Embodiment 1 of this invention. (A) is the schematic of the surface of the card substrate which shows the area | region in which the soldering resist extraction by Embodiment 2 of this invention was formed, (b) is the schematic of the back surface of the card substrate.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Card board 1a Base material 1b Solder resist 2 Flash memory chip 3 Controller chip 4 Interface terminal 5 Test terminal 6 External terminal 7a 1st connection pad 7b 2nd connection pad 8a 1st bonding wire 8b 2nd bonding wire 9 External terminal 10 Resin 11 Solder resist removal 12 Solder resist dam 13 IC card 14 Board 15 IC chip 16 Third connection pad 17 External terminal 18 Fourth connection pad 19 Third bonding wire 20 Fourth bonding wire 21 Resin 22 Mounting substrate 23 First through hole 24 Second through hole 25 Wiring pattern MC1 Memory card MC2 Memory card

Claims (18)

An IC card having a card substrate composed of a base material and a solder resist covering the front and back surfaces of the base material on the board, and a semiconductor chip covered with a resin mounted on the surface of the card substrate, ,
On the surface of the card substrate, a plurality of interface terminals formed on the surface of the base material are exposed from the solder resist, the plurality of interface terminals are exposed from the resin covering the semiconductor chip, and the resin and An IC card characterized in that a single band-like region is formed between the plurality of interface terminals by removing all or part of the solder resist in the thickness direction.   2. The IC card according to claim 1, wherein the width of the one band-shaped region is 0.2 to 0.4 mm.   2. The IC card according to claim 1, wherein a test terminal formed on the back surface of the base material is exposed from the solder resist on the back surface of the card substrate.   2. The IC card according to claim 1, wherein the plurality of interface terminals and a plurality of third connection pads formed on the surface of the board corresponding to the plurality of interface terminals are respectively connected via bonding wires. An IC card characterized by being connected.   2. The IC card according to claim 1, wherein the semiconductor chip includes a flash memory chip and a controller chip that is stacked on the flash memory chip and controls the flash memory chip.   2. The IC card according to claim 1, wherein a plurality of external terminals are formed on the surface of the semiconductor chip, and further, the surface of the card substrate is formed on the surface of the base material corresponding to the plurality of external terminals. A plurality of first connection pads are exposed from the solder resist, and the plurality of external terminals and the plurality of first connection pads are respectively connected via bonding wires.   7. The IC card according to claim 6, wherein a first through hole penetrating the base material is formed close to the first connection pad, and a second through hole penetrating the base material is close to the interface terminal. The first connection pad is formed on the first conductor pattern embedded in the first through hole, the second conductor pattern embedded in the second through hole, and the back surface of the base material. An IC card, wherein the IC card is electrically connected to the interface terminal via a wiring pattern that connects one conductor pattern and the second conductor pattern.   8. The IC card according to claim 7, wherein the one band-like region is provided by removing all of the solder resist and a part of the base material in the depth direction. An IC card having a card substrate composed of a base material and a solder resist covering the front and back surfaces of the base material on the board, and a semiconductor chip covered with a resin mounted on the surface of the card substrate, ,
On the surface of the card substrate, a plurality of interface terminals formed on the surface of the base material are exposed from the solder resist, the plurality of interface terminals are exposed from the resin covering the semiconductor chip, and the resin and An IC card characterized in that a single band-like region in which the solder resist is formed thicker than the periphery is provided between the plurality of interface terminals.   10. The IC card according to claim 9, wherein the width of the one band-shaped region is 0.2 to 0.4 mm.   10. The IC card according to claim 9, wherein a test terminal formed on the back surface of the base material is exposed from the solder resist on the back surface of the card substrate.   10. The IC card according to claim 9, wherein the plurality of interface terminals and a plurality of third connection pads formed on the surface of the board corresponding to the plurality of interface terminals are respectively connected via bonding wires. An IC card characterized by being connected.   10. The IC card according to claim 9, wherein the semiconductor chip includes a flash memory chip and a controller chip that is stacked on the flash memory chip and controls the flash memory chip.   10. The IC card according to claim 9, wherein a plurality of external terminals are formed on the surface of the semiconductor chip, and further, the surface of the card substrate is formed on the surface of the base material corresponding to the plurality of external terminals. A plurality of first connection pads are exposed from the solder resist, and the plurality of external terminals and the plurality of first connection pads are respectively connected via bonding wires. An IC card having a card substrate composed of a base material and a solder resist covering the front surface and the back surface of the base material on the board, and a first chip and a second chip stacked and mounted on the surface of the card substrate A method for producing an IC card comprising the following steps:
(A) forming an integrated circuit on the first main surface of the first semiconductor wafer and forming an integrated circuit on the first main surface of the second semiconductor wafer;
(B) Grinding the second main surface of the first semiconductor wafer to make the first semiconductor wafer have a predetermined thickness, and grinding the second main surface of the second semiconductor wafer to make the second semiconductor wafer predetermined Process of thickness,
(C) The first semiconductor wafer is diced to separate the first semiconductor wafer into the first chips, and the second semiconductor wafer is diced to separate the second semiconductor wafer into the second chips. The process of
(D) a chip mounting area, a plurality of first connection pads arranged in an area other than the chip mounting area corresponding to a plurality of external terminals arranged on the edge of the surface of the first chip, Corresponding to the plurality of second connection pads arranged in a region other than the chip mounting region corresponding to the plurality of external terminals arranged on the edge of the surface of the second chip, and corresponding to the plurality of first connection pads A plurality of interface terminals arranged in a row, and one or all of the solder resists removed in the thickness direction between the plurality of interface terminals and the plurality of first connection pads. Preparing a mounting substrate in which a plurality of unit frames each having a belt-like region are arranged;
(E) a step of attaching the second chip to the chip mounting region on the surface of the first chip after the first chip is attached to the chip mounting region for each unit frame on the surface of the mounting substrate;
(F) The plurality of external terminals arranged on the edge of the surface of the first chip and the plurality of first connection pads are respectively connected using a first bonding wire, and the surface of the second chip is Connecting the plurality of external terminals arranged on the edge and the plurality of second connection pads using a second bonding wire, respectively.
(G) The region on the side where the first and second chips are formed is sealed with resin across the one band-shaped region, and the region on the side where the plurality of interface terminals are formed is resin. A process that does not seal,
(H) cutting the mounting substrate into unit frames to form each card substrate on which the first and second chips are mounted;
(I) A step of attaching the card substrate on which the first and second chips are mounted on the board.   16. The IC card manufacturing method according to claim 15, wherein a width of the one band-shaped region is 0.2 to 0.4 mm.   16. The IC card manufacturing method according to claim 15, wherein after the step (i), a plurality of third terminals formed on the surface of the board corresponding to the plurality of interface terminals and the plurality of interface terminals. A method of manufacturing an IC card, further comprising a step of connecting each of the connection pads to each other through a bonding wire.   16. The IC card manufacturing method according to claim 15, wherein the first chip is a flash memory chip, and the second chip is a controller chip for controlling the flash memory chip.

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