JP2007208584A - Frequency adjusting circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an oscillation frequency adjusting circuit which is reduced in circuit area, capable of achieving an accurately temperature-compensated oscillation frequency adjusting circuit, reduced in power consumption by making it simple in configuration, and capable of reducing frequency adjusting processes in number. <P>SOLUTION: The oscillation frequency adjusting circuit is equipped with an oscillation circuit 1 which oscillates a crystal oscillator 9, a first frequency adjusting circuit 2 which switches the oscillation capacitance of the oscillation circuit 1 to a capacitance more corresponding to a value stored in a nonvolatile memory circuit 3, a frequency dividing circuit 4 which divides the oscillation frequency outputted from the oscillation circuit 1, and a second frequency adjusting circuit 5 which changes the frequency divided by the frequency dividing circuit 4 to a divided frequency more corresponding to a value stored in the nonvolatile memory circuit 3. Furthermore, the oscillation frequency adjusting circuit is equipped with a temperature sensor circuit 7 which outputs a voltage corresponding to an ambient temperature; and an AD converting circuit 6 which converts the analog value of the temperature sensor circuit 7 into a digital value, and reads out a value stored in the nonvolatile memory circuit 3 using the digital value as an address. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a temperature compensation technique for an oscillation circuit using a piezoelectric vibrator such as a crystal vibrator, and more particularly to a frequency adjustment circuit in a temperature compensation type oscillation circuit having a highly accurate oscillation frequency.

  For example, Japanese Patent Application Laid-Open No. 2003-115720 “Temperature Compensated Oscillator, Adjustment Method Therefor, and Temperature Compensated Oscillating Integrated Circuit” (Patent Document) 1) and Japanese Patent Laying-Open No. 2004-72289 (Patent Document 2) “Frequency Adjustment Circuit” are known.

  FIG. 3 is a configuration diagram of a temperature compensated oscillator disclosed in Japanese Patent Laid-Open No. 2003-115720 (Patent Document 1).

  As shown in the figure, the temperature compensated oscillator disclosed in Patent Document 1 outputs a temperature sensor circuit 101 that outputs an analog signal corresponding to temperature, and converts the analog signal from the temperature sensor circuit 101 into a digital signal. An A / D converter 102, a memory circuit 103 from which compensation data is read out using a digital signal from the A / D converter 102 as an address, and a plurality of capacitors are selectively connected to the oscillation circuit 105 in accordance with the compensation data The oscillation circuit 105 that oscillates a resonator such as a crystal resonator and generates an oscillation output signal and uses the capacitance array 104 as a frequency adjustment element of the oscillation output signal, and an external input Frequency comparison circuit 106 that compares the frequency of the external reference frequency signal and the oscillation output signal, and the frequency comparison result of frequency comparison circuit 106 Based on the successive approximation register circuit 107 in which the value of each bit is sequentially determined, the compensation data read from the memory circuit 103 and the digital signal output from the successive approximation register circuit 107 are selectively supplied to the capacitor array 104. A switch 108 to be supplied, a voltage variable capacitor (varicap diode) 109 connected to the capacitor array 104, and a control voltage for controlling the capacitance of the voltage variable capacitor 109 according to an analog signal of the temperature sensor circuit 101 And a digital signal output from the successive approximation register circuit 107 is supplied to the capacitor array 104 via the switch 108, and the plurality of capacitor elements according to the digital signal. Is connected to the oscillation circuit 105, and the oscillation circuit 105 oscillates. The frequency of the oscillation output signal is changed by sequentially determining the value of each bit of the successive approximation register circuit 107 based on the comparison result for each comparison operation by the frequency comparison circuit 106. A digital signal output from the successive approximation register circuit 107 when the frequency of the oscillation output signal matches a specific frequency is output from the A / D converter 102 corresponding to the temperature detected by the temperature sensor circuit 101 at that time. The compensation data corresponding to the detected temperature that can be addressed by the output digital signal is written into the memory circuit 103, and the write operation is performed for each temperature step.

Next, temperature compensation in the temperature compensated oscillator will be described.
In general, a frequency oscillation circuit for a normal timepiece uses a tuning fork type 32768 Hz crystal, and the frequency temperature characteristic Δf _T can be approximated by the following quadratic equation.
Δf _T = α (θ _T −θ _X ) ²
Here, θ _X is an arbitrary temperature, θ _T is an apex temperature, and varies depending on each crystal together with a coefficient α of a quadratic function. The coefficient α is generally about −0.035 × 10 ⁻⁶ (1 / ° C.), and θ _T is generally about ± 20 ppm (1 ppm is one millionth).

On the other hand, the oscillation frequency f ₀ of the crystal oscillation circuit is expressed as follows.
f ₀ = f _S (1 + 1 / (2C ₀ / C ₁ (1 + C _L / C ₀ )))
_{Here, f S, C 0, C} 1 , the resonance frequencies of the crystal, the equivalent parallel capacitance, equivalent series capacitance, _{C L} represents the load capacitance of the oscillation circuit.

From this equation, if variable according to the load capacitance C _L in temperature, it can be seen that the temperature compensation can adjust the frequency. Considering the temperature range of −40 ° C. to 85 ° C., it is necessary to correct the maximum frequency deviation of about −20 ppm to 150 ppm from the above approximate expression.

On the other hand, in order to think about the standard value 7pF the load capacitance _{C L} of the correction, it is necessary control the load capacitance _{C L} between the 0.6PF～12.7PF.

Currently, what is commonly done, for example, the capacitor array 104 corresponding to the load capacitance C _L of the oscillating circuit 105 shown in FIG. 3, and consists of a capacitor array of capacitive elements 231 through 235 as shown in FIG. 5, By turning on or off the switching elements 224 to 228, the capacitive elements 231 to 235 are selectively connected to an oscillation circuit (corresponding to the oscillation circuit 105 in FIG. 3) including the feedback resistor (R1) 222 and the oscillation inverter circuit 221. by was a method for controlling the substantially load capacitance C _L. In FIG. 5, 229 and 230 are fixed capacitance elements, and 236 to 240 are operational amplifiers.

  Switching elements 224 to 228 in FIG. 5 convert an analog signal output from the temperature sensor circuit 101 in FIG. 3 into a digital signal by the A / D conversion circuit 102, and the memory circuit 103 (in FIG. 5) uses this digital signal as an address. The correction data is read out from the non-volatile memory circuit 203) and turned on or off according to the correction data.

  Since the correction is performed for each constant temperature step, the error at both ends of the range increases as the temperature range increases. In order to reduce this, the temperature step width must be reduced. In order to reduce the temperature step width, it is also necessary to reduce the minimum control unit of the capacitor array having the configuration shown in FIG. 5, which increases the number of bits of the memory circuit 103 (corresponding to the nonvolatile memory circuit 203 in FIG. 5). Connected.

  As shown in FIG. 3, there is a method in which the voltage variable capacitance element (varicap diode) 109 is controlled by the control voltage generation circuit 110 according to the output of the temperature sensor circuit 101. In this case, the complexity of the compensation circuit is reduced. In addition, since the capacitor array 104 is used in this adjustment, the increase in area and the variation in capacitance at the production stage cannot be suppressed.

  FIG. 4 is a configuration diagram of a frequency adjustment circuit described in Japanese Patent Laid-Open No. 2004-72289 (Patent Document 2), which is another conventional technique previously proposed by the applicant of the present application.

  As shown in FIG. 4, the temperature compensation circuit in Patent Document 2 is a frequency adjustment circuit using correction data stored in the nonvolatile memory circuit 203 for variations in the oscillation frequency of the crystal resonator 209 and the oscillation circuit 201 at room temperature. (1) Capacitance elements 231 to 235 are selectively turned on and off by switching on and off switching elements 224 to 228 in a capacitor array (see FIG. 5) which is a component of 202, and an oscillation inverter circuit This is connected to an oscillation circuit 221 (corresponding to the oscillation circuit 201 in FIG. 4) and adjusted.

  The analog signal output from the temperature sensor circuit 207 is converted into a digital signal by the A / D conversion circuit 206, and the digital signal is decoded into a temperature compensation value by the frequency adjustment circuit (2) 205. Is input to the frequency dividing circuit 204 operated by the oscillation output signal 214 output from the oscillation circuit 201, thereby making the frequency dividing number of the frequency dividing circuit 204 variable so that the oscillation frequency of the oscillation output signal 214 with respect to the temperature. -The temperature characteristics are corrected.

  Further, by using the frequency division output signal 215 obtained from the frequency divider circuit 204 for correcting the temperature, the temperature sensor circuit 207, the A / D converter circuit 206, the nonvolatile memory circuit, or the frequency adjustment circuit unit (2 ) 205 is intermittently operated to save power.

That is, the control circuit 208 receives the timing signal (1) 210 from the frequency dividing circuit 204, the timing signal (3) 212 to the frequency adjustment circuit (2) 205, and the timing signal (2) to the A / D conversion circuit. The correction timing is provided by outputting to 206 and the temperature sensor circuit 207, respectively.
However, in this method, since the temperature data from the temperature sensor circuit is used as it is as a compensation value, it is difficult to accurately adjust the variation in the temperature change amount inherent to the crystal.

JP 2003-115720 A (Patent Document 1) JP 2004-72289 A (Patent Document 2)

  In the above prior art, when performing frequency adjustment with temperature compensation with high accuracy, the adjustment is made only with the capacity slow / fast circuit, or the adjustment is made only with the logical slow / fast circuit. In general, the normal temperature variation of the crystal is about ± 20 ppm, and the temperature change amount is about −150 ppm. In the case of the configuration in which the adjustment is made only by the above-mentioned slow / slow capacity, the adjustment capacity is required for the adjustment accuracy. When the adjustment step is about 0.5 ° C., the 8-bit configuration is used and the capacity is 256 configurations.

  In addition, taking into account variations in the capacity creation stage, the capacitance, the amount of memory, and the switching elements for correcting the capacitance variation itself increase, and the area further increases.

  In addition, it is very difficult to confirm whether 256 types of capacitors are operating without problems with temperature.

  Further, when the adjustment is performed only by the logical slow / fast, since the crystal to be used is 32768 Hz, even if one pulse of the minimum clock 16384 Hz of the frequency dividing circuit 4 is corrected, it is about 61 ppm by adjusting once per minute. The accuracy becomes worse. In order to increase the accuracy, it is necessary to lengthen the adjustment interval, but there is a possibility that it becomes impossible to follow the temperature change.

  An object of the present invention is to perform rough adjustment by using the simplicity of adjustment of the frequency divider circuit 4 and the wide adjustment range of the oscillation frequency, and further, fine adjustment by adjusting the oscillation load capacitance of the oscillation circuit, and By reducing the adjustment capacity, the circuit area can be reduced, a highly accurate temperature compensated oscillation frequency adjustment circuit can be realized, and by simplifying the adjustment circuit, low power consumption can be achieved, and An object of the present invention is to provide an oscillation frequency adjustment circuit capable of reducing the number of frequency adjustment steps.

  In order to achieve the above object, the oscillation frequency adjusting circuit of the present invention has two systems for adjusting the oscillation frequency, that is, adjustment of the oscillation circuit itself and adjustment by a frequency dividing circuit. The latter adjustment means is used for coarse adjustment of the oscillation frequency. With this configuration, the output frequency itself of the oscillation circuit can be adjusted, and high accuracy and low cost can be realized.

Hereinafter, the configuration of the frequency adjustment circuit according to the present invention will be specifically described for each claim.
a) The invention according to claim 1 is an oscillation circuit that oscillates a crystal resonator, a first frequency adjustment circuit that switches an oscillation capacitance of the oscillation circuit to a corresponding capacitance according to a value stored in a nonvolatile memory circuit, A frequency dividing circuit that divides the oscillation frequency output from the oscillation circuit, and a second frequency adjusting circuit that changes the frequency dividing number of the frequency dividing circuit to a frequency dividing number corresponding to the value stored in the nonvolatile memory circuit It is characterized by having.

b) The invention according to claim 2 is the frequency adjustment circuit according to claim 1, further comprising a temperature sensor circuit for outputting a voltage corresponding to the temperature, and an AD conversion for converting an analog value of the temperature sensor circuit into a digital value. A circuit is provided, and the value stored in the nonvolatile memory circuit is read out using the digital value as the conversion result of the AD converter circuit as an address.

c) The invention according to claim 3 is the frequency adjusting circuit according to claim 2, wherein the temperature sensor circuit, the AD converter circuit, the non-volatile circuit according to the timing signal obtained from the frequency dividing stage of the frequency dividing circuit. It is characterized by having means for selecting operation or non-operation of a part or all of the memory circuit, the first frequency adjustment circuit, and the second frequency adjustment circuit.

d) According to a fourth aspect of the present invention, in the frequency adjustment circuit according to the first aspect, the first frequency adjustment circuit includes a plurality of transmissions each having a different capacity and a connection between the capacity and the oscillation circuit being turned on or off. And a transmission gate having a capacity corresponding to the value stored in the nonvolatile memory circuit is turned on or off.

  According to the present invention, an oscillation circuit having a highly accurate oscillation frequency can be realized. That is, by having two adjustment means, high-precision adjustment is possible by performing coarse adjustment in the frequency divider circuit and fine adjustment in the oscillation circuit.

  In addition, taking advantage of the simplification of frequency adjustment and space saving in the frequency divider circuit, simplification by reducing the bit of the oscillation load capacity in the oscillation circuit, space saving, and charging by reducing the oscillation load capacity. By reducing the discharge current, the circuit area can be reduced and the current consumption can be reduced.

  Further, the adjustment man-hours can be reduced by facilitating the test by using a frequency dividing circuit constituted by a logic circuit and reducing the test man-hour by lowering the oscillation load capacity of the oscillation circuit which is an analog circuit.

<Example>
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(overall structure)
FIG. 1 is a block diagram of a frequency adjustment circuit showing an embodiment of the present invention.
As shown in FIG. 1, the embodiment of the present invention includes an oscillation circuit 1 that oscillates a piezoelectric vibrator 9 such as a crystal vibrator, a frequency adjustment circuit (1) 2 that adjusts the frequency of the oscillation circuit 1, and an oscillation. A frequency dividing circuit 4 that divides the transmission output signal 14 output from the circuit 1 and a frequency adjusting circuit (2) that adjusts the frequency of the frequency divided output signal 15 by making the frequency dividing number of the frequency dividing circuit 4 variable. 5, a control circuit 8 that determines the operation timing of the frequency adjustment circuit using a timing signal (1) 10 that is a plurality of frequency-divided outputs obtained from the frequency dividing circuit 4, and a timing signal (2) of the control circuit 8 11, the temperature sensor circuit 7 that operates according to 11, the A / D conversion circuit 6 that converts the temperature sensor output signal 13, which is an analog output of the temperature sensor circuit 7, into a digital signal, and the digital output of the A / D conversion circuit 6 is temperature-adjusted Data case Address signal said frequency adjusting circuit the contents of the specified address as 18 (1) 2, and consists from the nonvolatile memory circuit 3 to be output to the frequency adjustment circuit (2) 5.

  FIG. 2 shows an embodiment of a detailed circuit of the capacity slow / fast block 16 of FIG. 1, which includes a crystal resonator 9, an oscillation inverter circuit 21, a feedback resistor (R1) 22, and an output limiting resistor. (R2) 23, a general Colpitts oscillation circuit composed of fixed load capacitors 29 and 30, an oscillation load capacitor 31, 32, and 34 for fine adjustment of the oscillation frequency, and connection and disconnection of the oscillation capacitor It consists of transmission gates 24, 25 and 27.

(Oscillation frequency adjustment)
An embodiment of the frequency adjustment according to the present invention will be described below with reference to FIG. 1 and FIG. 2 showing the contents of the capacity slow / fast block 16 of FIG.

  The oscillation circuit 1 to which the crystal resonator 9 is connected starts oscillating at an oscillation frequency unique to the crystal when the oscillation circuit 1 is in an operating state. In this description, a 32768 Hz crystal resonator generally used in a watch circuit is connected.

  At this time, the transmission gates 24, 25, and 27 are all set to be turned off, and the oscillation frequency depends on the oscillation frequency unique to the crystal and the circuit constants of the oscillation circuit, particularly the oscillation load capacitors 29 and 30. The transmission output signal 14 output from the oscillation circuit 1 is input to the frequency dividing circuit 4 to start a normal frequency dividing operation.

  The oscillating circuit 1 performing the normal frequency dividing operation is configured to output the timing signal (1) 10 with a set arbitrary frequency dividing number, and in this description, the 1 second period obtained by dividing 32768 Hz 32768 times. And When one second elapses, the timing signal (1) is output, and when it is input to the control circuit 8, the timing signal (2) 11 is output at an arbitrarily set timing.

  When the timing signal (2) 11 is input to the temperature sensor circuit 7 and the A / D conversion circuit 6, the temperature sensor circuit 7 is a temperature sensor output signal that is an analog output signal according to the temperature around the circuit. 13 is output, and the A / D conversion circuit 6 converts the temperature sensor output signal 13 into a temperature adjustment data storage address signal 18 which is an arbitrary digital value.

  The non-volatile memory 3 to which the temperature adjustment data storage address signal 18 is input stores the data stored in the address in the frequency adjustment circuit (1) 2 and the frequency adjustment circuit (2) 5, respectively. 19. Output as temperature adjustment data (2) 20. The frequency adjustment circuit (1) 2 and the frequency adjustment circuit (2) 5 start to operate in response to an arbitrary timing signal (3) 12 output from the control circuit 8. In the above description, all operations / non-operations of the temperature sensor circuit, the AD conversion circuit, the nonvolatile memory circuit, the first frequency adjustment circuit, and the second frequency adjustment circuit are determined according to the timing signal from the control circuit 8. Although the operation is selected and controlled, it is possible to select and control only a part of the circuits without selecting and controlling all of these circuits.

  The frequency adjustment circuit (1) 2 turns on / off the transmission gates 24, 25, 27 according to the value of the temperature adjustment data (1) 19, and connects the oscillation load capacitors 31, 32, 34 to the oscillation circuit. Leave disconnected.

  The frequency adjusting circuit (2) 5 adjusts the frequency dividing number of the frequency dividing circuit 4 to be increased or decreased according to the value of the temperature adjustment data (2) 20. The oscillation frequency adjusted by the temperature state acquired by the oscillation circuit 1 and the frequency dividing circuit 4 and compensated with high accuracy can be obtained.

It is a block diagram of the frequency adjustment circuit which shows one Embodiment of this invention. It is a detailed partial block diagram of the capacity slow / fast block 16 in FIG. It is a block diagram of the conventional frequency adjustment circuit. It is a block diagram of another conventional frequency adjustment circuit. FIG. 5 is a detailed partial configuration diagram of the capacity adjustment block of FIG. 4.

Explanation of symbols

1: Oscillation circuit 2: Frequency adjustment circuit (1)
3: Non-volatile memory circuit 4: Frequency divider circuit 5: Frequency adjustment circuit (2)
6: A / D conversion circuit 7: Temperature sensor circuit 8: Control circuit 9: Crystal resonator 10: Timing signal (1)
11: Timing signal (2)
12: Timing signal (3)
13: Temperature sensor output signal 14: Oscillation output signal 15: Frequency division output signal 16: Capacity slow / fast block 17: Logic slow / fast block 18: Temperature adjustment data storage address signal 19: Temperature adjustment data (1)
20: Temperature adjustment data (2)
21: Inverter circuit for oscillation 22: Feedback resistor R1
23: Output limiting resistor R2
24, 25, 27: Transmission gate circuit 31, 32, 34: Oscillation load circuit 36, 37, 39: Inverter circuit

Claims (4)

  An oscillation circuit that oscillates a crystal resonator, a first frequency adjustment circuit that switches an oscillation capacity of the oscillation circuit to a corresponding capacity according to a value stored in a nonvolatile memory circuit, and an oscillation frequency output from the oscillation circuit. A frequency adjusting circuit comprising: a frequency dividing circuit for frequency division; and a second frequency adjusting circuit for changing the frequency dividing number of the frequency dividing circuit to a frequency dividing number corresponding to the value stored in the nonvolatile memory circuit. circuit. The frequency adjustment circuit according to claim 1,
Furthermore, it has a temperature sensor circuit that outputs a voltage corresponding to the temperature, and an AD conversion circuit that converts an analog value of the temperature sensor circuit into a digital value, and the digital value that is the conversion result of the AD conversion circuit is used as an address A frequency adjustment circuit, wherein a value stored in the nonvolatile memory circuit is read out. The frequency adjustment circuit according to claim 2,
According to the timing signal obtained from the frequency dividing stage of the frequency dividing circuit, the temperature sensor circuit, the AD conversion circuit, the nonvolatile memory circuit, the first frequency adjusting circuit, and the second frequency adjusting circuit A frequency adjustment circuit comprising means for selecting an operation or non-operation of a part or all of them. The frequency adjustment circuit according to claim 1,
Each of the first frequency adjustment circuits includes a different capacity and a plurality of transmission gates for turning on and off the connection between the capacity and the oscillation circuit, and the corresponding capacity is determined by a value stored in the nonvolatile memory circuit. A frequency adjustment circuit characterized in that the transmission gate provided is turned on or off.

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