JPS58205887A - Frequency temperature compensating circuit of electronic timepiece - Google Patents

Abstract

PURPOSE:To make it possible to carry out temp. compensation without changing an oscillating condition to a large extent, by combining a variable frequency dividing circuit and the change in the oscillating condition of a crystal oscillating circuit to carry out temp. compensation. CONSTITUTION:The output of a temp. detecting circuit 6 is inputted in a frequency dividing ratio control circuit 7 and a load resistor control circuit 8 and the frequency dividing ratio of a variable frequency dividing circuit 2 and the load resistor of an oscillating circuit 1 to compensate frequency temp. characteristics.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to frequency temperature compensation for compensating frequency fluctuations due to temperature changes in a child clock.

Conventional methods for increasing the accuracy of electronic watches include using two crystal sensors to flatten the frequency-temperature characteristics of electronic watches, or using an AT cutter with good temperature characteristics, or a GT-cut crystal oscillator. It uses

The above-mentioned method of increasing precision has problems such as high cost and difficulty in achieving long life due to small size and thinness, and cannot become the mainstream for high precision watches in the future.

The present invention was made to eliminate these drawbacks, and uses the currently mainstream 52KH2 X-cut crystal resonator to compensate for the temperature characteristics of the crystal oscillation circuit on the electronic circuit side. The purpose is

The frequency-temperature characteristics of the X-cut crystal resonator for 52KH2 can be approximated by a quadratic equation with the turning point near room temperature (approximately 23° C.). The trick to creating a high-precision clock using the X-cut crystal unit is that it can be used within the normal operating temperature range (5℃).
-40° C.), it is necessary to flatten the frequency-temperature characteristics by correcting lead and lag at each temperature using temperature information.

The method of flattening the frequency temperature characteristic (grading/sudden means) is as follows: (1) Perform logically using a variable frequency divider circuit.

(2) Changing the oscillation conditions of the crystal oscillation circuit.

is possible.

In the logical method in (1) above, due to the limitations of rate measuring devices on the market, the resolution of variable frequency division is α26 d
K LIMITED. As a result, the temperature information that can be corrected to the target frequency is limited, the flatness of the frequency is poor, and high precision cannot be achieved. In addition, the above (2) method of changing the oscillation conditions at K is based on the above (2) method of changing the oscillation conditions at K, since a change in the oscillation conditions within a flat temperature range will significantly change the voltage-current characteristics of the oscillation circuit. 1
) METHODS LIMITED.

The present invention combines the flattening methods fil and +21 to provide temperature compensation that compensates for the drawbacks of both methods.

That is, at a temperature point where variable frequency division can be used, variable frequency division is performed, and by changing the oscillation conditions between variable frequency division and variable frequency division, a flat frequency temperature characteristic is obtained.

The present invention will be described in detail below with reference to FIG.

FIG. 1 is a block diagram showing an embodiment of the present invention. The time reference signal generated by the oscillation circuit 1 is frequency-divided by the variable frequency divider circuit 2. The signal frequency-divided by the variable frequency dividing circuit 2 drives the step motor 4 via the drive circuit 3, and the time is displayed on the pointer section 5. The temperature detection circuit 6Fi outputs temperature information values obtained by A/D converting temperature sensing characteristics such as current-voltage characteristics of a thermistor or a semiconductor PN junction to the division ratio control circuit 7 and the load resistance control circuit 8. The frequency division ratio control circuit 7 is
The variable frequency dividing circuit 20 controls the division ratio so that the division ratio is optimal for the temperature information value of the temperature detection circuit 7.

The load resistance control circuit 8 also changes the temperature information value to the rainbow oscillation circuit 1.
Relationship [6] in which the rooting frequency is compensated by controlling ON-OFF of the temperature compensation load resistors 1b and 1c connected in series with the load resistor 1a. Therefore, depending on the temperature, the frequency of the oscillation circuit 1 can be varied by QN-QFFing the temperature compensation load resistance.

The frequency temperature characteristics are compensated by changing the frequency division ratio of the variable frequency divider circuit 2.

Next, the specific operation of frequency temperature compensation will be explained using FIG. 2.

It is assumed that the temperature detection circuit 6 outputs temperature information in 23 steps in the range of 5° C. to 41° C. to the frequency division ratio control circuit 7 and the load resistance control circuit 8 using a 5-bit take BVS. FIG. 3 shows the relationship between the temperature, the output of each output circuit, the connection state of the temperature compensation load resistor, and the frequency division ratio of the variable frequency divider circuit.

Now, assuming that the temperature is 23°C, the 5-bit output of the temperature detection circuit 6 is as follows in Figure 5: Qs = 1% Q2 =
1, Qs =

At this time, the output of the frequency division and ratio control circuit MROM7a (output active 11") is bitl=Q, bit2=J.The output of the frequency division control circuit R stone M7a is the division ratio control circuit Memo! J-7 'bl'c Latch 7c and latch 7dK are held by clock signal C once every 10 seconds.

The Q outputs of the latches 7c and 7d are respectively 1 of the variable peripheral path 2.
The clip of the first stage (hereinafter referred to as "Set") and the momentum of the second stage for 10 seconds ((Set at a certain timing.

There is a relationship of Resθt. The relationship between Set and Re5et is as follows: Divide 5 - RQMZa bit output
The variable frequency divider circuit 2 is configured so that e5et is set to 1. In this case, (btt1=\, bit2
-\), the division ratio of variable frequency divider circuit 2 for 10 seconds is 3276
8[J Similarly, the load resistance control circuit ROMB when the temperature is 25°C
The outputs A and B of a are shown in Figure 6, A=Q, B=\. The input power %h,B is the inverter 8b.

It is reversed at 8C and the temperature compensation load resistors 1b, 1. c ON
-0') A switching element 9a that controls FF';
It is connected to the control terminal of 9b. When A="q, B-\, the switching elements 9a and 9b are in a state where only the load resistor 1a is connected. When the load resistors 1b and 1c for temperature compensation are not connected (only ia is connected), there is no compensation.The rate of the clock is determined by the trimmer capacitors aic, c, ! in this uncompensated state.
The pXray vicinity is adjusted to 9.

Next, the operation when the temperature changes will be explained.

6- When the temperature changes from 23°C to 28°C, which is the next temperature detection point, the output of the frequency division ratio control circuit RQM7a is as shown in Figure 3.
bit 1 = Q, bit 2 = \) The division ratio of the variable frequency divider circuit 2 is 327680 and does not change as in the case of 23°C. Since the output of the load resistance control circuit ROM8a is A=1 and B=0, the switching element 9a is O.
FF? 'b=o'N. As a result, the frequency advances by the sum of the load resistance 1a and the temperature compensation load resistance 1b (approximately 0,098/Ay in this case).If the temperature changes to 30 degrees Celsius, the division ratio Control circuit R
The output of OM7a is shown in Figure 3, bit1=J.

Since b1t2=\, the variable division ratio is 527680
It does not change. The output of the load resistance control circuit RδM8a is A=1. Since B-=1, the switching element 9a
.

Next, when the temperature changes to 52°C, the division ratio control circuit RO
From Figure 3, the output of M7a is bit1=1゜bit2=
It becomes 0, and it is set at the timing when the first stage trunk of the variable frequency divider circuit 2 is turned on, and the frequency division ratio per second is 52767.
9 and the rate advances by 0.268 Aay.

The output of the load resistance control circuit RδM8a is A-\.

Since B=\, both switching elements 9a and 9b are turned on, resulting in an uncompensated state as at 23°C.

As a result, compensation at 62° C. is performed only by varying the frequency division ratio of the variable frequency divider circuit 2.

When the next VC changes to 34°C, the division ratio control circuit ROM7
The output of a is 1) itt=1. t)i, t2-\, and the frequency division ratio of the variable frequency divider circuit 2 is 527 as in the case of 32°C.
679 Ash, α26 ”/day Shin tr.

The output of the load resistance control circuit ROM8a is A=1°B=\
Therefore, the rate advances by the amount calculated by the temperature compensating load resistance 1b and the force n. As a result, the step U is 0 of the variable frequency divider circuit 2.
．． The rate added by 268A3ay and the negative $1b for temperature compensation advances VC! Ru.

As described above, in the example of the present invention, the frequency temperature characteristics are compensated for without significantly changing the oscillation conditions by using temperature information in conjunction with variable frequency division and variable oscillation conditions of the oscillation circuit 1. It is possible to do so.

In this example, the frequency temperature characteristic of the crystal resonator has a negative characteristic centered around the turning point.
Even in curves with specific rules, splitting ratio control: RδM,
Frequency can be compensated for temperature by changing the load resistance control ROM. Further, although the number of temperature detection points of the temperature detection circuit is set to 25, better frequency-temperature characteristics can be expected by increasing the number of temperature detection points and increasing the number of temperature compensation load resistors.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a detailed diagram of FIG. 1, and FIG. 3 is a diagram showing the temperature and each control circuit and its RO according to the present invention.
It is a figure showing the relationship with M output. 1...Oscillation circuit 2...Variable frequency divider circuit 6.
... Drive circuit 4 ... Stella 1 motor 5 ...
・Pointer section 6... Temperature detection circuit 9- 7... Frequency division ratio control circuit 8... Load resistance control circuit 1a... Load resistance path 1b... Load resistance for temperature compensation 1c... Temperature Compensation load resistance 1d...Trimmer capacitor 7a...Division ratio control circuit ROM1 7b...Division ratio memory 8a...Load resistance control circuit RδM 8b...Inverter 8C...Inverter 9a...・Switching element? b...Switching element and above Applicant Daini Seikodai Co., Ltd. Agent Patent Attorney Mogami-10-

Claims (1)

[Claims] A temperature compensation load resistor is connected as a load resistor of the crystal oscillation circuit, a switching element is connected to the connection point of the load resistor, and 0N-OE'F of the switching element is connected to the load resistor connected to the temperature detection circuit. The division ratio of the variable frequency divider circuit that is selectively controlled by the resistance control circuit and divides the frequency of the oscillation signal of the crystal oscillation circuit is set by the frequency division ratio control circuit that is controlled by the output of the temperature detection circuit. A frequency-temperature compensation circuit for an electronic watch, which compensates for the frequency-temperature characteristics of a crystal oscillation circuit.