JPS6370616A - Clock frequency adjusting circuit - Google Patents

Abstract

PURPOSE:To shorten an adjusting time and to contrive the elimination of personal error by providing a correction circuit receiving a comparison clock and correcting a clock frequency error and a storage circuit storing the correction quantity so as to automatically adjust the clock frequency. CONSTITUTION:A correction circuit 7 decides it as the adjustment mode when a comparison clock (c) having an accurate and known frequency is inputted, decides it that the clock (b) of a desired frequency is to be obtained by what order of frequency division rate of an oscillation signal (a) is applied and stores the frequency division ratio to a storage circuit 6. When no clock (c) is given, the circuit 7 decides it as the correction mode, frequency-divides the signal (a) according to the contents of the circuit 6 to output the clock (b). Thus, the frequency division ratio is stored in the circuit 6 in the adjustment mode once, then the clock (b) with an accurate frequency is obtained even without the clock (c). Since the circuit 6 employs a nonvolatile memory, even if the power is intermitted and supplied again, accurate frequency correction is applied.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a clock frequency adjustment circuit for generating a clock with an accurate frequency that serves as a time reference in electronic watches, VTR timers, and other devices. be.

[Conventional technology]

FIG. 2 is a circuit diagram showing a conventional clock frequency adjustment circuit. In Fig. 2, 1 is an oscillation circuit including an amplification element for stable oscillation, 2 is a crystal resonator connected to the oscillation circuit 1 and serves as a reference for the oscillation frequency, and 3 is connected to the crystal resonator 2 for oscillation. A trimmer capacitor 4 is connected to the crystal resonator 2 and serves as an oscillation load, and the oscillation circuit 1 outputs a stable and accurate oscillation signal a. Further, 5 is a frequency dividing circuit that divides the frequency of the oscillation signal a into a desired frequency, and the frequency dividing circuit 5 outputs a clock b that is a reference frequency for an electronic watch or the like.

[Problem that the invention seeks to solve]

Since the conventional clock frequency adjustment circuit is configured as described above, when adjusting the frequency, it is necessary to manually adjust the trimmer capacitor 3 without monitoring the frequency of the oscillation signal a, which reduces the time required for adjustment. In addition, there were problems such as human error being involved in the adjustment.

The present invention has been made in view of these points, and an object thereof is to provide an adjustment circuit that can adjust the clock frequency in a short time and without human intervention.

[Means for solving problems]

In order to solve these problems, the present invention provides a clock frequency adjustment circuit that divides the frequency of an oscillation signal output from an oscillation circuit and outputs it as a clock. A correction circuit for correcting frequency errors and a storage circuit for storing the correction amount of this correction circuit are provided.

(Operation) In the present invention, the frequency division ratio of the correction circuit is determined from the oscillation signal and the comparison clock. This frequency division ratio is stored in the storage circuit, and the oscillation signal is divided by the frequency division ratio.

〔Example〕

An embodiment of a clock frequency adjustment circuit according to the present invention is shown in FIG. In FIG. 1, 6 is a storage circuit, 7 is a correction circuit which inputs a comparison clock C whose frequency is known as required, and 8 is a load capacitor connected to the crystal resonator 2 and serving as a load for oscillation. In FIG. 1, the same or equivalent parts as in FIG. 2 are given the same reference numerals.

The storage circuit 6 is composed of a nonvolatile memory and stores the frequency division ratio of the correction circuit 7. When the comparison clock C is input, the correction circuit 7 determines a frequency division ratio for making the clock b a desired frequency, stores this frequency division ratio in the storage circuit 6, and controls the comparison clock C when it is inputted manually. If not, the frequency of the oscillation signal a is divided according to the frequency division ratio stored in the memory circuit 6.

Next, the operation of the adjustment circuit having such a configuration and function will be explained. The oscillation circuit 1 oscillates at a frequency close to the natural frequency of the crystal oscillator 2 using the crystal oscillator 2 and the load capacitor 4.8, and outputs an oscillation signal a. but,
The frequency of the oscillation signal a is determined by the oscillation circuit 1. Crystal oscillator 2. Since it fluctuates due to variations in the characteristics of the load capacitor 4.8, adjustment is required to obtain the clock b of the desired frequency. This adjustment is performed by the correction circuit 7.

Next, the operation of the correction circuit 7 will be explained. When the comparison clock C whose frequency is accurate and whose value is known is input, the correction circuit 7 determines that it is the adjustment mode, and outputs the oscillation signal a.
It is determined by which frequency the clock b of the desired frequency can be obtained, and the frequency division ratio is stored in the storage circuit 6. next,
If the comparison clock C is not input, it is determined that it is the correction mode, the oscillation signal a is frequency-divided according to the contents of the memory circuit 6, and the clock b is output. Therefore, once an appropriate frequency division ratio is stored in the storage circuit 6 in the adjustment mode, a clock b with an accurate frequency can be obtained even when the comparison clock C is not available. Note that since the storage circuit 6 is constituted by a nonvolatile memory, accurate frequency correction can be performed even if the power supply to the adjustment circuit is interrupted and then the power is supplied again.

〔Effect of the invention〕

As explained above, the present invention automatically adjusts the clock frequency by inputting a comparison clock from the outside, thereby eliminating the need to adjust the trimmer capacitor for frequency adjustment, shortening the adjustment time, and This has the effect of eliminating human error in adjustment.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of a clock frequency adjustment circuit according to the present invention, and FIG. 2 is a circuit diagram showing a conventional clock frequency adjustment circuit. 1... Oscillation circuit, 2... Crystal resonator, 4.8...
Load capacitor, 6... memory circuit, 7... correction circuit.

Claims (2)

[Claims] (1) In a clock frequency adjustment circuit that divides the frequency of an oscillation signal output from an oscillation circuit and outputs it as a clock,
1. A clock frequency adjustment circuit comprising: a correction circuit that inputs a comparison clock having a known frequency and corrects a frequency error of the clock; and a storage circuit that stores a correction amount of the correction circuit. (2) The clock frequency adjustment circuit according to claim 1, wherein the storage circuit includes a nonvolatile memory.