JP2003258553A - Oscillation circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an oscillation circuit capable of suppressing voltage fluctuations in an oscillated frequency to be a small amount and outputting an oscillation signal with an excellent phase noise characteristic. <P>SOLUTION: A memory block 5 switches a gate voltage of MOS capacitors 1-1, 1-2, 1-3 to a ground level or a power supply voltage level to select capacitors 2-1, 2-2, 2-3 thereby adjusting the oscillating frequency of a VCXO 100. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an oscillator circuit to which a capacitor is connected and whose oscillation frequency is adjusted according to the value of the capacitor.

[0002]

2. Description of the Related Art In the field of communication equipment and video equipment,
An oscillator that outputs an oscillation signal with a stable oscillation frequency and low phase noise is required. A voltage-controlled crystal oscillator (VCXO: Volt) has been developed to meet such requirements.
age Controlled X'tal Oscil
or temperature compensated oscillator (TCXO: Temp)
erase Compensation X'ta
1 Oscillator) is widely used.

FIG. 4 shows a voltage controlled crystal oscillator (VCXO).
It is a circuit diagram of.

The voltage controlled crystal oscillator 100 (hereinafter referred to as VCXO100) shown in FIG. 4 is provided with a crystal resonator 11 as a piezoelectric element.

Further, in the VCXO 100, an input side is connected to one end of the crystal unit 11 and an output side is connected to the other end of the crystal unit 11 via a dubbing resistor 12, and both ends of the inverter 13. A feedback resistor 14 connected to the inverter 13, an inverter 15 connected in series to the output side of the inverter 13 and an output terminal 16 for outputting the oscillation signal Qout are provided. The inverters 13 and 15 are formed by the CMOS process.

Further, the VCXO 100 has a crystal unit 1
A capacitor 17_1 and a variable capacitance diode 18_1, which are connected in series between one end of 1 and the ground GND, cut off a DC component on the gate side of a transistor forming the inverter 13, are provided. Further, in this VCXO 100, a capacitor 17 that is connected in series between the other end of the crystal unit 11 and the ground GND and that cuts the DC component on the drain side of the transistor.
_2 and the variable capacitance diode 18_2 are provided.

The VCXO 100 has a capacitor 1
7_1, resistors 19_1 and 19_2 connected in series between the connection point of the variable capacitance diode 18_1 and the connection point of the capacitor 17_2 and the variable capacitance diode 18_2, and the control terminal 4 connected to the connection point of the resistors 19_1 and 19_2 Is provided. The oscillation signal Q is applied to the control terminal 4.
The control voltage Vc (D for controlling the frequency of out
C voltage) is applied.

When the VCXO 100 configured as described above is powered on, an oscillation operation starts. When the oscillating operation reaches a steady state, the crystal resonator 11 has an inherent resonance frequency. As a matter of course, the resonance frequency also changes according to the change of the load capacitance viewed from the crystal unit 11 side (when the load capacitance is increased, the oscillation frequency is lowered, and when the load capacitance is decreased, the oscillation frequency is increased). Since the VCXO 100 is provided with the variable capacitance diodes 18_1 and 18_2 whose capacitance changes according to the magnitude of the applied voltage Vc, the desired voltage Vc is applied to the control terminal 4 to change the capacitance variable diode 18_1. , 18_2 by changing the capacitance value of the oscillation signal Qo having a desired oscillation frequency.
ut can be obtained. More specifically, as the voltage Vc is increased, the capacitance values of the variable capacitance diodes 18_1 and 18_2 are reduced, so that the oscillation signal Q having a high oscillation frequency is generated.
out, and conversely, when the voltage Vc is reduced, the capacitance values of the variable capacitance diodes 18_1 and 18_2 increase, so that the oscillation signal Qout having a low oscillation frequency is obtained. The capacitors 17_1 and 17_2 have a voltage Vc applied to the variable capacitance diodes 18_1 and 18_2,
This is for cutting the voltage Vc in order to prevent the oscillation from becoming unstable when applied to the oscillation loop composed of the crystal oscillator 11, the damping resistor 12, the feedback resistor 14, and the inverter 13. Here, the capacitance for the crystal unit 11 is the variable capacitance diode 18_1.
And the combined capacitance of the capacitor 17_1, the variable capacitance diode 18_2 and the capacitor 17_2, the parasitic capacitance of the inverter 13 which is an oscillation amplifier, the connection pad capacitance for the crystal unit 11, and the nominal frequency adjustment capacitance.

FIG. 5 is a circuit diagram of a temperature compensated oscillator (TCXO).

The same components as those of the VCXO 100 shown in FIG. 4 will be described with the same reference numerals.

The temperature compensated oscillator 200 (hereinafter referred to as TCXO200) shown in FIG.
O100, temperature sensor 21, and memory block 22
And a temperature compensation circuit 23. The temperature sensor 21 detects the ambient temperature and outputs the detected temperature information T to the temperature compensation circuit 23. Memory block 22
Is supplied with control signals A and B from a CPU (not shown) via control terminals 24 and 25, whereby data for compensating temperature characteristics (first-order and third-order tilt curves) unique to the crystal unit 11 and Offset data is stored. The temperature compensation circuit 23 includes the temperature information T from the temperature sensor 21.
And the voltage Vc from the control terminal 4 and the memory block 22.
The temperature characteristic data d1 and d3 and the offset data offset from are input. The temperature compensation circuit 23 finally generates the control voltage Vcont according to the temperature information T based on these data. By controlling the oscillation frequency with the temperature-compensated control voltage Vcont in this way, it is possible to suppress the influence of the inherent temperature characteristic of the crystal unit 11 to a small level.

The above-mentioned VCXO100 and TCXO200
It is necessary to adjust the initial value of the oscillating frequency of the oscillator such as the above at the time of shipping. If the adjustment is not performed, the variation of the piezoelectric element represented by the crystal oscillator and the variation of the other elements are combined, and the error from the nominal value cannot be ignored. That is, most of the frequency variable range of the oscillator is occupied by the error, and the frequency variable range becomes narrow. It should be noted that a piezoelectric element, an amplifier, a circuit group such as a temperature compensation function, a capacitor, and resistors are required as components constituting the oscillator (in recent years, elements other than the piezoelectric element are being integrated into an IC). In addition, naturally components (circuits, capacitors, resistors, storage elements, etc.) for adjusting the initial value are also required. Several methods are known as methods for initial value adjustment. The most general method is the capacitive array method proposed in Japanese Patent Laid-Open No. 2001-177344.

FIG. 6 is a diagram showing a conventional oscillation circuit for adjusting the oscillation frequency of the VCXO, which adopts the capacitance array method.

The oscillator circuit 300 shown in FIG.
, A crystal oscillator 11, a dubbing resistor 12, inverters 13 and 15, a feedback resistor 14, an output terminal 16, a memory block 31 and a control terminal 32.
33, a memory block 34, and control terminals 35 and 36
And a capacitor array 40 including capacitors 41, 42, 43, 44, 45, 46, and transistors 51, 52, 5
A transistor switch group 50 composed of 3, 54, 55 and 56 is provided.

Capacitors 41 and 44 have a capacitance value of 1 pF, capacitors 42 and 45 have a capacitance value of 2 pF,
The capacitors 43 and 46 have a capacitance value of 4 pF. Further, the memory blocks 31 and 34 store adjustment data for adjusting the oscillation frequency of the crystal unit 11.

In this oscillator circuit 300, a CP (not shown)
Signals VCAPG1, VC from the memory blocks 31, 34 output according to control signals A, B, C, D from U
Transistor 5 depending on the logic of APG2 and VCAPG4
By turning on / off 1, 52, 53, 54, 55, 56, the capacitors 41, 42, 43, 44, 45, 4
The nominal initial value is adjusted by selecting 6 and adjusting the load capacitance for oscillation.

[0017]

However, in the above-described oscillator circuit 300, when adjusting the load capacitance for oscillation, the voltage is applied to the gate of the transistor because the transistor is turned on and off to select the capacitor. The on-resistance value of the transistor also changes according to the change. Then, the amount of electric charge charged in the capacitor also fluctuates, so that the apparent capacitance value of the capacitor fluctuates.

In order to solve this problem, it is conceivable to provide a regulator for stabilizing the voltage applied to the gate of the transistor and apply the stabilized voltage to the gate of the transistor. However, when the noise generated from the regulator propagates to the transistor, the phase noise characteristic of the oscillator circuit deteriorates.

In view of the above circumstances, it is an object of the present invention to provide an oscillator circuit in which the voltage fluctuation for adjusting the oscillation frequency is suppressed to a small level and an oscillation signal having a good phase noise characteristic is output.

[0020]

An oscillator circuit of the present invention that achieves the above object is an oscillator circuit in which a capacitor is connected and the oscillation frequency is adjusted according to the value of the capacitor. And a gate voltage switching circuit for switching a gate voltage.

In the conventional oscillation circuit, when adjusting the load capacitance for oscillation, the transistor is turned on and off to select the capacitor. Therefore, the apparent capacitance value of the capacitor changes with the variation of the on-resistance value of the transistor. Will be changed. Here, if the gate voltage of the MOS capacitor is controlled only by the ground level or the power supply voltage level, it is possible to suppress the fluctuation of the apparent capacitance value of the capacitor due to the voltage fluctuation, as described below.

FIG. 1 shows a MOS capacitor and its MOS.
The figure which shows the capacitor selected by the capacitor, FIG.
3 is a graph showing a capacitance value of the MOS capacitor shown in FIG. 1 with respect to a gate voltage.

FIG. 1 shows a MOS capacitor 1 and its M
A capacitor 2 for adjusting the oscillation frequency connected to the gate of the OS capacitor 1 is shown. MOS capacitor 1
A control voltage Vc is applied from the control terminal 4 via the resistor 3 to the gate of the.

When a power supply voltage level (for example, about 3 V to 5 V) is applied to the gate of the MOS capacitor 1, the capacitance value of the MOS capacitor 1 becomes maximum (here, 9 pF) as shown in FIG. . At this time, since a channel is formed just below the gate, the capacitance due to the gate oxide film is visible. It can be said that the capacitance value in the voltage region near the power supply voltage is constant, and the voltage region is hardly affected by the voltage fluctuation.

On the contrary, when the ground level is applied to the gate of the MOS capacitor 1, the capacitance value becomes minimum (3.5 pF in this case). This depends on the threshold value (Vt) of the MOS capacitor 1. Since there is almost no change in the ground level, it is considered that there is almost no change in capacitance with respect to voltage change. The present invention has been made by paying attention to the characteristics of such a MOS capacitor.

In the oscillation circuit of the present invention, in adjusting the oscillation frequency according to the value of the connected capacitor, the MOS circuit
By switching the gate voltage of the capacitor between the ground level and the power supply voltage level and selecting the capacitor, it is possible to suppress fluctuations in the apparent capacitance value of the capacitor due to voltage fluctuations. In addition, a regulator for suppressing voltage fluctuations is not required, so the phase noise characteristics of the oscillator circuit will not deteriorate due to noise generated from the regulator, and an oscillation signal with good phase noise characteristics can be output. You can

Here, the MOS capacitor and its MO
It is preferable that a plurality of pairs of fixed capacitance capacitors connected to the gates of the S capacitors are arranged in parallel with each other, and the gate voltage switching circuit switches the gate voltages of the plurality of pairs of MOS capacitors.

By adopting such a configuration, the oscillation frequency can be adjusted with high accuracy, and the variation of the apparent capacitance value of the capacitor due to the variation of the voltage can be further suppressed.

[0029]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below.

FIG. 3 is a circuit diagram of an oscillator circuit according to an embodiment of the present invention.

The oscillator circuit 10 shown in FIG. 3 is provided with the VCXO 100 shown in FIG. 4 described above.

The oscillator circuit 10 further includes a first pair of a MOS capacitor 1_1 and a fixed capacitor 2_1 connected to the gate of the MOS capacitor 1_1,
MOS capacitor 1_2 and its MOS capacitor 1_2
Second pair with fixed-capacitance capacitor 2_2 connected to the gate of, and MOS capacitor 1_3 and its MOS
A third pair with a fixed-capacitance capacitor 2_3 connected to the gate of the capacitor 1_3 is arranged in parallel with each other.

Further, the oscillation circuit 10 is provided with a memory block 5 (corresponding to an example of the gate voltage switching circuit referred to in the present invention) for switching the gate voltage of the MOS capacitors 1_1, 1_2, 1_3. Memory block 5
The adjustment data is stored in. The storage of the adjustment data is determined after measuring the oscillation frequency of the VCXO 100 (the adjustment data to be stored is determined by calculating the necessary adjustment capacitance value from the frequency difference from the nominal frequency). To store the adjustment data in the memory block 5,
This is performed by inputting serial data A and B from a CPU (not shown) via control terminals 6 and 7.

Next, the operation of the oscillator circuit 10 will be described. When the oscillator circuit 10 is powered on, the VCXO
The oscillation operation of 100 starts. When the oscillating operation reaches a steady state, it oscillates at the inherent resonance frequency of the crystal oscillator 11, but when a predetermined voltage Vc is applied to the control terminal 4, the voltage V of the variable capacitance diodes 18_1 and 18_2 is
An oscillation signal Qout having an oscillation frequency in which the capacitance value changed according to the magnitude of c is also added is output from the output terminal 16.

Here, the above-mentioned VCXO100 and TCX
In communication and video-related systems using O, the AFC (Aut) is used to correct the frequency error that occurs during data communication.
(Automatic Frequency Control)
Circuit is used. VCXO10 by this AFC circuit
Voltage control of the frequency of the oscillator such as 0 is performed. In each system, the variable range of the frequency of the oscillator is designed so as to satisfy the necessary frequency adjustment range. However, if the manufacturing variations of the crystal oscillator and the IC are combined, the deviation of the nominal frequency may increase. In order to eliminate this, it is necessary to adjust the capacitance after assembling the oscillator.

In the conventional oscillation circuit, when the oscillation frequency is adjusted according to the value of the connected capacitor, the transistor is turned on and off to select the capacitor. Therefore, the gate voltage fluctuates when the power supply voltage fluctuates. As a result, the change in the on-resistance value of the transistor causes a change in the apparent capacitance value of the capacitor. In the present embodiment, when adjusting the oscillation frequency according to the value of the connected capacitors 2_1, 2_2, 2_3, the gate voltage of the MOS capacitors 1_1, 1_2, 1_3 is set to the ground voltage at which the capacitance of the MOS capacitors is not easily affected by the voltage fluctuation. Since the capacitors 2_1, 2_2, 2_3 are selected by switching between the level and the power supply voltage level (see FIG. 2), the capacitors 2_1, 2_2, 2_ associated with voltage fluctuations are selected.
The apparent variation in the capacitance value of 3 can be suppressed to be small.

Here, the MOS capacitors 1_1 and 1_
It is assumed that the capacitance values of 2 and 1_3 are set to 1 pF, 2 pF, and 4 pF when the gate voltage is at the power supply voltage level. At this time, when the gate voltage is switched to the ground level, the capacitances of the MOS capacitors become approximately 0.4 pF, 0.8 pF and 1.6 pF, respectively.
If the capacitance value of each of the capacitors 2_1, 2_2, and 2_3 is set to be one digit larger than the capacitance value of each of the paired MOS capacitors 1_1, 1_2, and 1_3, MO
The combined capacitance of the first pair of the S capacitor 1_1 and the capacitor 2_1 is about 1 pF when the gate voltage of the MOS capacitor is the power supply voltage, and about 0.4 pF when the gate voltage is the ground level. MOS capacitor 1
The combined capacitance of the second pair of the capacitor _2 and the capacitor 2_2 is M
When the gate voltage of the OS capacitor is the power supply voltage, it is approximately 2 pF, and when the gate voltage is the ground level, it is approximately 0.8 pF. The combined capacitance of the third pair of the MOS capacitor 1_3 and the capacitor 2_3 is approximately 4 pF when the gate voltage of the MOS capacitor is the power supply voltage,
Almost 1.6p when the gate voltage is at ground level
It becomes F. Therefore, 2.8 (= 0.4 + 0.8 + 1.6) depending on the combination of the logic of the signals from the memory block 5.
Capacitance values in 8 steps from pF to 7 pF can be switched.

Further, since a regulator for suppressing the voltage fluctuation is unnecessary, the phase noise characteristic of the oscillation circuit is not deteriorated by the noise generated from the regulator, and the circuit area for forming the regulator is not required. Of the oscillation signal Qo with good phase noise characteristics
ut can be output.

Although the VCXO has been described as an example in the present embodiment, it may be a TCXO, and these VCXO and TC may be used.
The present invention is not limited to XO, and the present invention may be any oscillation circuit in which a capacitor is connected and the oscillation frequency is adjusted according to the value of the capacitor.

The adjusting circuit can be added not only to the drain side but also to the gate side.

[0041]

As described above, according to the present invention,
It is possible to provide an oscillation circuit in which the voltage fluctuation of the oscillation frequency is suppressed to a small level and an oscillation signal having a good phase noise characteristic is output.

[Brief description of drawings]

FIG. 1 is a diagram showing a MOS capacitor and a capacitor selected by the MOS capacitor.

FIG. 2 is a graph showing a capacitance value with respect to a gate voltage of the MOS capacitor shown in FIG.

FIG. 3 is a circuit diagram of an oscillator circuit according to an embodiment of the present invention.

FIG. 4 is a circuit diagram of a voltage controlled crystal oscillator (VCXO).

FIG. 5 is a circuit diagram of a temperature compensation oscillator (TCXO).

FIG. 6 is a conventional VCXO adopting a capacitance array method.
It is a figure which shows the oscillation circuit for adjusting the oscillation frequency of.

[Explanation of symbols]

1, 1_1, 1_2, 1_3 MOS capacitors 2, 2_1, 2_2, 2_3, 17_1, 17_2 Capacitors 3, 3_1, 3_2, 3_3, 12, 14, 19_1,
19_2 resistors 4, 6, 7 control terminal 5 memory block 10 oscillator circuit 11 crystal oscillator 13, 15 inverter 16 output terminals 18_1, 18_2 variable capacitance diode 100 VCXO 200 TCXO 300 conventional capacitive array system VCXO

Claims (2)

[Claims] 1. An oscillation circuit in which a capacitor is connected and whose oscillation frequency is adjusted according to the value of the capacitor includes a MOS capacitor and a gate voltage switching circuit that switches a gate voltage of the MOS capacitor. Oscillation circuit. 2. A plurality of pairs of the MOS capacitor and a fixed-capacity capacitor connected to the gate of the MOS capacitor are arranged in parallel with each other, and the gate voltage switching circuit includes a gate of the plurality of pairs of MOS capacitors. The oscillation circuit according to claim 1, wherein the voltage is switched.