JP2007201945A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device suitable for attaining miniaturization while securing assembling easiness between an insulator and a semiconductor element. <P>SOLUTION: The semiconductor device X1 is constituted by interposing the semiconductor element 10 between a pair of supports 20. The semiconductor element 10 has an optical element 11 and an electrode pad 12 as functional elements and its shape is, for example, rectangular parallelepiped or flat. For the pair of insulators 20, their shapes and dimensions are set so that the semiconductor element 10 is appropriately interposed between the sides 20a opposite to each other and their shapes are, for example, rectangular parallelepiped. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor device including a semiconductor element including a functional element such as an optical element.

  As a conventional semiconductor device, there is an optical semiconductor device including an optical element (such as a light receiving element and a light emitting element) and an insulating base having a recess for accommodating the optical element. An optical semiconductor device having such a configuration is disclosed in Patent Document 1, for example.

  FIG. 11 shows an example of a conventional optical semiconductor device. 11A is a plan view of the optical semiconductor device 90, and FIG. 11B is a cross-sectional view taken along line VIIIa-VIIIa of FIG. The optical semiconductor device 90 includes a photodiode 91, an insulating base 92, a wiring conductor 93, a glass plate 94 and a wire 95. The photodiode 91 has a function of sensing light. The insulating base 92 has a recess 92 a for accommodating the photodiode 91. A photodiode is placed on the bottom surface 92b of the recess 92a. One end of the wiring conductor 93 is disposed on the upper surface 92 c of the insulating base 92, and the other end is disposed on the lower surface 92 d of the insulating base 92. The glass plate 94 is bonded to the upper surface 92 c of the insulating base 92 by an adhesive 96. One end of the wire 95 is electrically connected to a predetermined position (position where electrical continuity can be achieved) of the photodiode 91, and the other end is electrically connected to one end of the wiring conductor 93. It is connected to the. In FIG. 8A, the glass plate 94 and the adhesive 96 are omitted from the viewpoint of easy viewing of the drawing.

In the optical semiconductor device 90 having such a configuration, the other end portion of the wiring conductor 93 is electrically connected to the external electric circuit, whereby the photodiode 91 and the external electric circuit are connected via the wiring conductor 93 and the wire 95. Electrical continuity is achieved. That is, the optical semiconductor device 90 senses the light that has reached the photodiode 91 through the glass plate 94 and converts it into an electrical signal, and converts the electrical signal through the wire 95 and the wiring conductor 93. To be transmitted to an external electric circuit.
JP 2004-296453 A

  However, in the conventional optical semiconductor device 90, it is necessary to secure a sufficient size (for example, a plan view area) of the recess 92a in order to easily accommodate the photodiode 91 in the recess 92a of the insulating base 92. It was.

  The present invention has been conceived under such circumstances, and provides a semiconductor device suitable for achieving miniaturization while ensuring ease of assembly of an insulator and a semiconductor element. That is the purpose.

  A semiconductor device according to the present invention is characterized in that a semiconductor element is sandwiched between a pair of supports.

  In the semiconductor device according to the present invention, it is preferable that at least a part of the semiconductor element and the pair of supports are in direct contact with each other.

  In the semiconductor device according to the present invention, it is preferable that the lower surface of the semiconductor element and the lower surfaces of the pair of support members constitute substantially the same plane.

  In the semiconductor device according to the present invention, the pair of support members are inclined so that a part of a surface facing the semiconductor element is located at a lower part of the support member so that a distance from the side surface of the semiconductor element is larger. It is preferable.

  In the semiconductor device according to the present invention, the support preferably includes an insulator.

  In the semiconductor device according to the present invention, it is preferable that the insulator includes ceramics.

  In the semiconductor device according to the present invention, it is preferable that the support has a wiring conductor, and the semiconductor element has an electrode pad that is electrically connected to the wiring conductor and is at least partially covered by a light shielding member.

  The semiconductor device according to the present invention preferably includes a bonding material for bonding the semiconductor element and the pair of supports.

  The semiconductor device according to the present invention preferably includes a sealing means for sealing the main part of the semiconductor element.

  In the semiconductor device according to the present invention, the sealing means preferably includes a sealing material positioned below the semiconductor element and positioned between the pair of supports.

  In the semiconductor device according to the present invention, it is preferable that the sealing means includes a translucent member positioned above the main part of the semiconductor element.

  In the semiconductor device according to the present invention, it is preferable that an optical element for emitting or receiving light is located in the main part of the semiconductor element.

  In the semiconductor device according to the present invention, it is preferable that the support has at least one of a convex shape and a concave shape on a surface facing the semiconductor element.

  In the semiconductor device according to the present invention, the shape of the surface of the support facing the semiconductor element preferably has a groove-shaped notch extending in the thickness direction of the support.

  The semiconductor device of the present invention is configured by sandwiching a semiconductor element between a pair of supports. Therefore, in this semiconductor device, a space (for example, a space between the side wall of the recess and the side wall of the semiconductor element when the semiconductor element is accommodated in the predetermined recess) is secured between the pair of supports and the semiconductor element. Even if it does not, in addition to being able to assemble a support body and a semiconductor element easily, size reduction for the above-mentioned space can also be achieved.

  Further, in the present semiconductor device, the identity of the side surface of the support and the side surface of the semiconductor element with respect to the reference direction (position accuracy between the support and the semiconductor element with respect to the reference direction) can be easily increased. In other words, in the present semiconductor device, it is possible to improve the positional accuracy of mounting or joining to an external electric circuit board, for example, while ensuring the ease of assembly of the support and the semiconductor element.

  Note that in this semiconductor device, a gap (a gap that can be visually recognized in a plan view) in which no semiconductor element is interposed is formed between one support and another support, thereby aligning the gap with an alignment mark (for example, It can be applied as a reference for alignment when mounting a semiconductor device on an external electric circuit board. Further, the width of the alignment mark in the semiconductor device is substantially the same as the width of the semiconductor element. Therefore, this semiconductor device is suitable for obtaining high positioning accuracy.

  In the semiconductor device, at least a part of the semiconductor element and the pair of supports are in direct contact with each other. Therefore, in this semiconductor device, for example, it is possible to achieve downsizing so that a bonding material for bonding the support and the semiconductor element does not intervene. In addition, in the present semiconductor device, higher positioning accuracy can be obtained at a portion where the pair of supports and the semiconductor element are in direct contact with each other.

  In the semiconductor device, the lower surface of the semiconductor element and the lower surfaces of the pair of support bodies constitute substantially the same plane. That is, in this semiconductor device, the thickness of the support can be reduced to the thickness of the semiconductor element. Therefore, this semiconductor device is suitable for achieving miniaturization (low profile) of the device itself.

  Further, in the present semiconductor device, for example, when mounted on an external electric circuit board, the semiconductor element can be brought into direct contact with the external electric circuit board, so that it occurs when the semiconductor element is driven without using a support or the like. The heat to be transmitted can be transferred to the external electric circuit board to be dissipated. Therefore, this semiconductor device is suitable for efficiently radiating the heat generated when the semiconductor element is driven.

  In this semiconductor device, the pair of support members are inclined so that a part of a surface facing the semiconductor element is located at a lower part of the support member so that a distance from the side surface of the semiconductor element becomes larger. . Therefore, in the semiconductor device of this configuration, for example, even in the case of a structure that directly contacts the side surface of the semiconductor element without using an adhesive, for example, in a portion located above the surface of the support that faces the semiconductor element. The amount of adhesive filled in the region (space) between the surface facing the semiconductor element and the side surface of the semiconductor element can be increased. Therefore, the semiconductor device having this configuration is suitable for securing a sufficient adhesive force between the support and the semiconductor element.

  In the semiconductor device, the support includes an insulator. According to such a configuration, a complicated wiring structure (circuit) can be formed, for example, inside the insulator, so that more complicated electrical signals can be exchanged. That is, the semiconductor device having this configuration is suitable when adopting a more multifunctional semiconductor element.

  In the semiconductor device according to the present invention, it is preferable that the insulator includes ceramics. According to such a configuration, for example, deformation (thermal deformation) due to a heat load from the outside can be reduced as compared with an insulator (support) made of resin. Therefore, in the semiconductor device of this configuration, even when a long insulator (support) that is relatively greatly affected by the thermal deformation is employed, the influence of the thermal deformation can be reduced. Functional accuracy can be improved.

  In this semiconductor device, the support has a wiring conductor, and the semiconductor element has an electrode pad that is electrically connected to the wiring conductor and is at least partially covered by a light shielding member. For this reason, in the case where, for example, an optical element is used as the functional element, the semiconductor device has an electrode that receives incident light incident from the outside toward the optical element (light receiving element) and outgoing light emitted from the optical element (light emitting element) to the outside. It is possible to suppress irregular reflection of light caused by being reflected by the pad. Therefore, this semiconductor device is suitable for improving light receiving characteristics and light emitting characteristics.

  The semiconductor device includes a bonding material for bonding the semiconductor element and the pair of supports. According to such a configuration, the semiconductor element can be more reliably bonded (fixed) to the pair of supports, and thus the integrity of the semiconductor element and the pair of supports can be improved. In addition, the semiconductor device having this configuration is suitable for improving the positional accuracy of the semiconductor element sandwiched between the pair of supports.

  The semiconductor device includes sealing means for sealing the main part of the semiconductor element. According to such a configuration, for example, when the main part has a functional element (such as an optical element, a sensor element, or a micro electro mechanical system (MEMS)) that requires airtightness, the airtightness can be sufficiently ensured. It becomes possible. That is, the semiconductor device having this configuration is suitable for further stabilizing the driving of a functional element that requires airtightness.

  In the semiconductor device according to the present invention, the sealing means preferably includes a sealing material positioned below the semiconductor element and positioned between the pair of supports. According to such a configuration, for example, when the functional element is included in the main part (upper surface side) of the semiconductor element, an unnecessary object can be prevented from entering between the semiconductor element and the pair of supports from below the semiconductor element. It becomes possible to prevent more reliably. That is, the semiconductor device having this configuration is suitable for further stabilizing the driving of the functional element.

  In the semiconductor device according to the present invention, it is preferable that the sealing means includes a translucent member positioned above the main part of the semiconductor element. According to such a configuration, for example, in the case where the main part (upper surface side) of the semiconductor element has a functional element (for example, an optical element) having a function of emitting or receiving light, the function element is sufficiently secured and the function is sufficiently secured. The movement of the light emitted from the element toward the outside or the light incident from the outside toward the functional element can be performed more appropriately (suppressing light transmission loss) through the translucent member.

  In the semiconductor device according to the present invention, it is preferable that an optical element for emitting or receiving light is located in the main part of the semiconductor element. According to such a configuration, since the optical element requiring airtightness is disposed in the main part of the semiconductor element sealed by the sealing means, the airtightness of the optical element can be sufficiently ensured.

  In the semiconductor device according to the present invention, it is preferable that the support has at least one of a convex shape and a concave shape on a surface facing the semiconductor element. According to such a configuration, since the bonding material enters the bottom of the concave portion formed in the convex shape or concave shape of the support side surface, the bonding material in the bonding between the support side surface and the semiconductor element side surface enters the semiconductor side surface. Bonding strength with the element side surface can be improved.

  In the semiconductor device according to the present invention, the shape of the surface of the support facing the semiconductor element preferably has a groove-shaped notch extending in the thickness direction of the support. According to such a configuration, a continuous recess can be formed, and the bonding material that joins the side surface of the support and the side surface of the semiconductor element can more easily enter the recess. Can be achieved.

  1 to 3 show a semiconductor device X1 according to the present invention. 1 is a cross-sectional view of the semiconductor device X1, FIG. 2 is a plan view of the semiconductor device X1, and FIG. 3 is an exploded perspective view of the semiconductor device X1. The semiconductor device X1 includes a semiconductor element 10, a pair of insulators 20, a wiring conductor 30, a translucent member 40, and a wire 50. Examples of the semiconductor device X1 include a light emitting optical semiconductor device and a light receiving optical semiconductor device. The light emitting optical semiconductor device has a function of converting an external electric signal into light and emitting the light to the outside. The light receiving optical semiconductor device receives the light from the outside and converts it into an electric signal. And a function of deriving the electric signal to the outside. The semiconductor device X1 includes various optical devices such as a barcode reader, an image recognition device, a sensor, a scanner, a digital camera, a mobile phone, an LED light source device, a facsimile, a copying machine, and a vehicle recognition device, and various electronic devices (computers, measuring devices). Etc.) are mounted on an external electric circuit board. The semiconductor element 10 in the present embodiment is described by using an optical element as a functional element. However, the semiconductor element 10 is not limited to this, and for example, a CPU or a memory as a semiconductor integrated circuit element is adopted. May be.

  The semiconductor element 10 includes an optical element 11 and an electrode pad 12 as functional elements. Examples of the shape of the semiconductor element 10 include a rectangular parallelepiped shape and a flat plate shape. Examples of the material constituting the semiconductor element 10 include single crystal silicon, gallium-phosphorus (Ga-P) -based compounds, and indium-phosphorus (In-P) -based compounds. Silicon semiconductors are generally used for CPUs, memories, line sensors, C-MOS area sensors, CCDs, etc., and compound semiconductors are generally used for semiconductor lasers, microwave ICs, millimeter wave band MMICs, and the like. ing.

  The optical element 11 is a member for emitting or receiving light (hereinafter, an optical element for emitting light may be referred to as a “light emitting element”, and an optical element for receiving light may be referred to as a “light receiving element”). Is provided so as to extend in the longitudinal direction (arrow AB direction). Examples of the light emitting element 11 include a light emitting diode (LED) and a semiconductor laser (LD). Examples of the semiconductor element 10 having the light emitting element 11 include an LED chip and an LD chip. Examples of the light receiving element 11 include a photodiode (PD) and a phototransistor. Examples of the semiconductor element 10 having the light receiving element 11 include a line sensor, an image sensor, a charge coupled device (CCD), and an EPROM (Erasable and Programmable Read Only). Memory).

  The electrode pad 12 is a part for inputting / outputting electricity or electric signals to / from the semiconductor element 10, and as shown in FIG. 2, the longitudinal direction (arrow AB) of the upper surface 10 a of the semiconductor element 10. Direction). Examples of the material constituting the electrode pad 12 include aluminum, gold, and copper. In the case of a silicon semiconductor, aluminum is generally used, and in the case of a compound semiconductor, gold or copper may be used.

  The pair of insulators 20 are set in shape, size, and the like so that the semiconductor element 10 can be appropriately sandwiched between the side surfaces 20a facing each other. The shape of the insulator 20 in the present embodiment is a rectangular parallelepiped, but a shape in which unevenness is provided on a part of the rectangular parallelepiped (for example, a surface opposite to the surface facing the semiconductor element 10) in order to improve handling, and handling In order to improve the performance and further reduce the size of the semiconductor device, a part of the rectangular parallelepiped is formed into an arc shape, and a portion corresponding to the corner of the insulator 20 is suppressed to prevent the occurrence of chipping. The shape etc. which gave the chamfering process or C chamfering process may be sufficient. In addition, the dimension of the insulator 20 in the present embodiment is appropriately set according to the mechanical strength, the area of the mounting region, the dimension of the semiconductor element 10, and the like. For example, the length L1 of the insulator 20 is the length of the semiconductor element 10. 100 to 120% of the length L2, the width W1 of the insulator 20 is set to 20 to 100% of the width W2 of the semiconductor element 10, and the height H1 of the insulator 20 is set to 100 to 120% of the height H2 of the semiconductor element 10. The When the length L1 of the insulator 20 is less than 100% with respect to the length L2 of the semiconductor element 10, the hermetic sealing property on the short side of the semiconductor device X1 may not be sufficiently secured. When the length L1 exceeds 120% with respect to the length L2 of the semiconductor element 10, it may be disadvantageous from the viewpoint of miniaturization. In addition, when the width W1 of the insulator 20 is less than 20% with respect to the width W2 of the semiconductor element 10, the mechanical strength of the insulator 20 may not be sufficiently secured. If the width W2 exceeds 100%, the semiconductor device X1 may be disadvantageous from the viewpoint of miniaturization.

  Examples of the material constituting the insulator 20 include ceramics and resins. Here, ceramics are alumina sintered bodies (alumina ceramics), aluminum nitride ceramics, silicon carbide ceramics, silicon nitride ceramics, glass ceramics, etc., and resins are epoxy resins, polyimide resins, acrylic resins, phenol resins. These are thermosetting or ultraviolet curable resins such as polyester resins. In addition, as a resin, an epoxy resin is advantageous from the viewpoint of abundant variations of thermosetting resins and ultraviolet curable resins (high material selectivity).

  Here, an example of a method for manufacturing the insulator 20 in the case where alumina ceramics is employed as a material constituting the insulator 20 will be described. First, raw material powders such as aluminum oxide (alumina) and glass are formed into a sheet shape together with an organic solvent and a binder to produce a plurality of ceramic green sheets. Next, the produced ceramic green sheet is punched into a rectangular plate having predetermined dimensions (length L1 and width W1). Next, the punched ceramic green sheets are laminated to a predetermined dimension (height that finally becomes the height H1) and fired at a predetermined firing temperature (for example, 1300 to 1600 ° C.). The insulator 20 is manufactured as described above.

  Attachment of the side surface 20 a of the pair of insulators 20 and the side surface 10 b of the semiconductor element 10 is performed by bonding via a bonding material 60. Examples of the bonding material 60 include resin and brazing material. Here, the resin is a thermosetting or ultraviolet curable resin such as an epoxy resin, a polyimide resin, a silicone resin, or a polyetheramide resin, and the brazing material is a low-melting glass or an Au—Si alloy. . As the resin, an epoxy resin or a silicone resin is advantageous from the viewpoint of reducing a thermal load on the semiconductor element 10.

  Here, an example of a method of attaching the side surface 20a of the pair of insulators 20 and the side surface 10b of the semiconductor element 10 when resin is employed as the bonding material 60 will be described. First, positioning is performed in a state where an uncured resin is sandwiched between the side surface 20 a of the pair of insulators 20 and the side surface 10 b of the semiconductor element 10. Next, the uncured resin is cured by heat or light (such as ultraviolet light). As described above, the side surface 20a of the pair of insulators 20 and the side surface 10b of the semiconductor element 10 are attached. Note that when a photo-curing resin is used as the resin, less heat is applied to the semiconductor element 10 than the thermosetting resin, so that the optical element 11 of the semiconductor element 10 can be prevented from being damaged. Therefore, the accuracy of light reception and light emission by the optical element 11 can be kept good.

  The wiring conductor 30 serves as a conductive path for achieving electrical continuity between the semiconductor element 30 and an external electric circuit. One end of the wiring conductor 30 in this embodiment is disposed on the upper surface 20 b of the insulator 20, and the other end is disposed on the lower surface 20 c of the insulator 20. When the one end portion (connecting portion with the wire 50) of the wiring conductor 30 is thus disposed on the upper surface 20b of the insulator 20, the distance between the electrode pad 12 and the wiring conductor 30 can be shortened. That is, this configuration is suitable for reducing the size of the semiconductor device X1.

  Examples of the material constituting the wiring conductor 30 include tungsten, molybdenum, manganese, copper, silver, gold, palladium, and platinum.

  Here, an example of a method of forming the wiring conductor 30 when the wiring conductor 30 is formed as a metallized conductor will be described. First, a through hole is formed in a predetermined portion of the ceramic green sheet constituting the insulator 20. Next, a metal paste (such as tungsten) is printed on the surface of the ceramic green sheet on which the through hole has been formed and the inner surface of the through hole. As described above, the wiring conductor 30 is formed.

  The translucent member 40 has a function of transmitting light and is disposed above the optical element 11 of the semiconductor element 10. Examples of the material constituting the translucent member 40 include glass, quartz, sapphire, and transparent resin.

  In addition, the translucent member 40 in this embodiment also plays a role of forming a space for hermetically sealing the optical element 11 in cooperation with the semiconductor element 10 and the adhesive 65. Specifically, in the semiconductor device X1, the translucent member 40 is attached to the upper surface 20b of the semiconductor element 10 and the insulator 20 by the adhesive 65, and the translucent member 40, the semiconductor element 10, and the insulator 20 are attached. The gap between is filled. When such a space is configured, deterioration of light characteristics due to refraction until light reaches the semiconductor element 10 from the outside or until light from the semiconductor element 10 goes outside is suppressed. Therefore, the characteristics of light transmission / reception can be improved. The adhesive 65 is a thermosetting or ultraviolet curable resin such as an epoxy resin, a polyimide resin, a silicone resin, a polyetheramide resin, or an acrylic resin. As the resin, an epoxy resin or a silicone resin is advantageous from the viewpoint of reducing a thermal load on the semiconductor element 10. As a method for applying the adhesive 65, a dispensing method, a screen printing method, or the like can be applied. With this configuration, light can be exchanged between the outside and the optical element 11 through the translucent member 40, and the optical element 11 can be hermetically sealed. . Therefore, the semiconductor device X1 can suppress the obstruction of light reception and light emission and the deterioration of characteristics caused by external dust and moisture affecting the optical element 11. The translucent member 40 is not limited to the configuration that hermetically seals the optical element 11 as described above. For example, the translucent member 40 may be configured to directly cover the optical element 11 with a resin material having translucency. A lens-shaped configuration (for example, a lens barrel or a lens holder) may be used.

  The wire 50 is a member for electrically connecting the semiconductor element 10 and the wiring conductor 30, one end of which is electrically connected to the electrode pad 12 of the semiconductor element 10, and the other end is the wiring conductor. It is electrically connected to one end of 30. In addition, it may replace with the wire 50 in this embodiment, and may employ | adopt strip | belt-shaped connection lines, such as what is called a ribbon.

  The semiconductor device X1 according to the present embodiment is configured by sandwiching the semiconductor element 10 between a pair of insulators 20. Therefore, in the semiconductor device X1, the semiconductor element 10 and the insulator 20 can be easily assembled without securing a space between the side face 10b of the semiconductor element 10 and the side face 20a of the pair of insulators 20. In addition, it is possible to reduce the size of the space.

  Further, in the semiconductor device X1, the identity (positional accuracy of the semiconductor element 10 and the insulator 20 with respect to the reference direction) with respect to the reference direction (arrow AB direction) between the side surface 10b of the semiconductor element 10 and the side surface 20a of the insulator 20 is easy. Can be increased. That is, in the semiconductor device X1, it is possible to improve the positional accuracy of mounting and joining to an external electric circuit board (not shown) while ensuring the ease of assembly of the semiconductor element 10 and the insulator 20.

  In the semiconductor device X1, the gap S is formed between the one insulator 20 and the other insulator 20 so that the semiconductor element 10 does not intervene, thereby aligning the gap S with the alignment mark (semiconductor device X1 is externally connected). It can be applied as a reference for positioning when mounting on an electric circuit board. Further, the width of the alignment mark in the semiconductor device X1 is substantially the same as the width of the semiconductor element. Therefore, the semiconductor device X1 can obtain high positioning accuracy.

  FIG. 4 shows a cross section of a semiconductor device X2 according to the second embodiment of the present invention. The semiconductor device X2 is different from the semiconductor device X1 in that it has a notch 20d in a part of the side surface 20a. Other configurations of the semiconductor device X2 are the same as those described above regarding the semiconductor device X1.

  The notch 20d secures a space for interposing the adhesive 60 between the insulator 20 and the semiconductor element 10 in a state where the side face 20a of the insulator 20 is in direct contact with the side face 10b of the semiconductor element 10. It is a part to do.

  The notch height H3 of the notch 20d is preferably set to 30 to 70% of the height H1 of the insulator 20. When the notch height H3 is less than 30% of the height H1 of the insulator 20, the space for interposing the adhesive 60 cannot be secured sufficiently, and sufficient bonding strength may not be secured. Further, when the notch height H3 exceeds 70% of the height H1 of the insulator 20, the effect of improving the positional accuracy by bringing the side surface 20a of the insulator 20 into direct contact with the side surface 10b of the semiconductor element 10 is sufficiently obtained. In addition to the fact that it cannot be obtained, there are cases where the mechanical strength of the contact portion of the insulator 2 with the semiconductor element 10 cannot be sufficiently ensured.

  The notch width W3 of the notch 20d is preferably set to 30 μm or more. When the notch width W3 is less than 30 μm, the space for interposing the adhesive 60 cannot be sufficiently secured, and sufficient bonding strength may not be secured.

  The notch 20d according to the present embodiment is configured to extend downward from the upper surface 20b in a cross section perpendicular to the longitudinal direction (arrow AB direction), but is not limited to such a configuration. As long as the space for interposing 60 is sufficiently secured, and the effect of improving the positional accuracy by directly contacting the side surface 20a of the insulator 20 with the side surface 10b of the semiconductor element 10 can be obtained. What is necessary is just to change a structure suitably. Specifically, the notch 20d may be configured to extend upward from the lower surface 20c in a cross section perpendicular to the longitudinal direction (arrow AB direction), or perpendicular to the longitudinal direction (arrow AB direction). In such a cross-section, it may be configured to have both a portion extending downward from the upper surface 20b and a portion extending upward from the lower surface 20c. Note that the cutout portion 20d does not have to be configured to extend over the entire length direction (arrow AB direction).

  The semiconductor device X2 according to this embodiment has the same effects as the semiconductor device X1.

  The semiconductor device X2 has a notch 20c. Accordingly, the semiconductor device X2 does not need to secure a space for interposing the adhesive 60 between the side surface 10b of the semiconductor element 10 and the side surface 20a of the pair of insulators 20, and thus the size of the space can be reduced. It can be achieved.

  In the semiconductor device X2, the side surface 20a of the insulator 20 is brought into direct contact with the side surface 10b of the semiconductor element 10. Therefore, in the semiconductor device X2, the insulator 20 and the semiconductor element 10 can be aligned with high accuracy, and as a result, the accuracy of light reception and light emission can be increased.

  In the semiconductor device X2, the identity (positional accuracy of the semiconductor element 10 and the insulator 20 with respect to the reference direction) with respect to the reference direction (arrow AB direction) between the side surface 10b of the semiconductor element 10 and the side surface 20a of the insulator 20 is further increased. Can do. That is, in the semiconductor device X2, it is possible to further improve the positional accuracy of mounting and bonding to an external electric circuit board (not shown).

  FIG. 5 shows a cross section of a semiconductor device X3 according to the third embodiment of the present invention. The semiconductor device X3 includes a conductive connecting material without the insulator 20 having a facing surface 20e, a point at which one end of the wiring conductor 30 is disposed on the facing surface 20e, and the wire 50 (see FIG. 1). 70 is different from the semiconductor device X1 in that the one end and the electrode pad 12 are electrically connected directly by 70. The facing surface 20 e is a portion of the insulator 20 that is positioned so as to face the electrode pad 12 in a state where the semiconductor element 10 is sandwiched between the pair of insulators 20. Examples of the conductive connecting material 70 include a resin material in which a powder of a conductive material (gold, silver, copper, aluminum, etc.) is dispersed in a resin (epoxy resin, polyimide resin, silicone resin, polyetheramide resin, etc.). It is done. Other configurations of the semiconductor device X3 are the same as those described above regarding the semiconductor device X1.

  The semiconductor device X3 according to this embodiment has the same effect as the semiconductor device X1.

  In the semiconductor device X3, the electrode pad 12 of the semiconductor element 10 and one end of the wiring conductor 30 are electrically connected directly. That is, in the semiconductor device X3, the electrode pad 12 of the semiconductor element 10 and one end of the wiring conductor 30 are connected. The wire 50 for electrically connecting the unit can be omitted. Therefore, the semiconductor device X3 can be further reduced in size, and can reduce transmission loss of a high-frequency signal caused by interposing the wire 50 or the like (improve operability).

  FIG. 6 shows a cross section of a semiconductor device X4 according to the fourth embodiment of the present invention. The semiconductor device X4 differs from the semiconductor device X1 in that a part of the lower side of the side surface 20a is an inclined surface 20f. Other configurations of the semiconductor device X4 are the same as those described above regarding the semiconductor device X1. In the present embodiment, the side surface 20 a of the insulator 20 is in direct contact with the side surface 10 b of the semiconductor element 10 at a portion located above the surface facing the semiconductor element 10.

  The inclined surface 20f on the side surface 20a of the insulator 20 is a portion for ensuring a sufficient space for interposing the adhesive 60 between the insulator 20 and the semiconductor element 10, and the side surface 20a of the insulator 20 The portion located below the contact portion with the side surface 10b of the semiconductor element 10 is inclined so that the distance from the side surface 10b of the semiconductor element 10 is increased.

  The height H4 of the contact portion of the side surface 20a of the insulator 20 with the side surface 10b of the semiconductor element 10 is preferably set to 10 to 40% of the height H2 of the semiconductor element 10. When the height H4 of the contact portion is less than 10% of the height H2 of the semiconductor element 10, the insulating base 20 is inclined (or insulated) with respect to the semiconductor element 10, for example, because the region of the contact portion is small. When the semiconductor element 20 is tilted with respect to the body 20, the parallelism of the parts constituting the semiconductor device X4 may not be sufficiently secured. In addition, when the height H4 of the contact portion exceeds 40% of the height H2 of the semiconductor element 10, a sufficient space for interposing the adhesive 60 between the insulator 20 and the semiconductor element 10 is secured. In some cases, sufficient adhesive strength cannot be obtained.

  The inclination angle θ of the inclined surface 20f of the insulator 20 with respect to the side surface 10b of the semiconductor element 10 is preferably set to 5 to 45 °. When the inclination angle θ is less than 5 °, there may be a case where a sufficient space for interposing the adhesive 60 between the insulator 20 and the semiconductor element 10 cannot be secured and sufficient adhesive strength cannot be obtained. is there. Further, when the inclination angle θ exceeds 45 °, it may be necessary to increase the width W1 of the insulator 20 in order to secure the region of the lower surface 30a of the wiring conductor 30, so that the semiconductor device X4 can be reduced in size. May be disadvantageous.

  Note that the inclined surface 20f according to the present embodiment is such that a part of the surface facing the semiconductor element 10 is located below the insulator 20 in a cross section perpendicular to the longitudinal direction (arrow AB direction). Although it is configured to incline linearly so that the separation distance from the side surface 10b of the element 10 is increased, it is not limited to such a configuration, and the above-described space for interposing the adhesive 60 is sufficiently ensured. In addition, the configuration may be changed as appropriate as long as the effect of improving the positional accuracy by sufficiently bringing the side surface 20a of the insulator 20 into direct contact with the side surface 10b of the semiconductor element 10 can be obtained. Specifically, the inclined surface 20f has an arc shape below the side surface 20a located on the upper surface of the insulator 20 in direct contact with the side surface 10b of the semiconductor element 10 in a cross section perpendicular to the longitudinal direction (arrow AB direction). It may be inclined or may be inclined stepwise.

  The semiconductor device X4 according to this embodiment has the same effects as the semiconductor devices X1 to X3.

  In the semiconductor device X4, the insulator 20 is inclined such that a part of the surface 20a facing the semiconductor element 10 is located below the insulator 20 so that the distance from the side surface 10b of the semiconductor element 10 is increased. ing. Therefore, in the semiconductor device X4, the amount of adhesive filled in the region (space) between the surface of the insulator facing the semiconductor element and the side surface of the semiconductor element can be increased, and the surface facing the semiconductor element 10 Can be brought into direct contact with the side surface 10b of the semiconductor element 10 at a portion located above the semiconductor element 10. Therefore, in the semiconductor device X4, a sufficient adhesive force can be secured between the insulator 20 and the semiconductor element 10, and the semiconductor device X4 can be small enough to eliminate the need for the adhesive 60 to be interposed at the contact portion. Is possible.

  In the semiconductor device X4, since the side surface 20a of the insulator 20 is in direct contact with the side surface 10b of the semiconductor element 10, the insulator 20 and the semiconductor element 10 can be aligned with high accuracy, and as a result, light emission accuracy and light reception accuracy are obtained. Can be increased.

  In the semiconductor device X4, the semiconductor element 10 and the insulator 20 are in direct contact with each other, so that the side surface 10b of the semiconductor element 10 and the side surface 20a of the insulator 20 are identical to the reference direction (arrow AB direction) (semiconductor element 10). And the positional accuracy of the insulator 20 with respect to the reference direction) can be further increased. Specifically, for example, in the case of a conventional concave insulator, position variation (mounting variation) of the semiconductor element with respect to the concave insulator occurs. Therefore, when a semiconductor device having such a configuration is joined to an external electric circuit board, the concave insulation The sum of the position variation of the semiconductor element with respect to the body and the position variation of the concave insulator with respect to the external electric circuit board is the position variation of the semiconductor element with respect to the external electric circuit board. In the case of the semiconductor device X4, the semiconductor element with respect to the insulator 20 Since 10 position variations do not substantially occur, the above-mentioned identity (position accuracy) is improved accordingly. Therefore, in the semiconductor device X4, it is possible to further improve the positional accuracy of mounting and bonding to an external electric circuit board (not shown).

  FIG. 7 shows a cross section of a semiconductor device X5 according to the fifth embodiment of the present invention. The semiconductor device X5 is different from the semiconductor device X1 in that the semiconductor device X5 includes a sealing material 80 positioned below the semiconductor element 10 and positioned between the pair of insulators 20. Other configurations of the semiconductor device X5 are the same as those described above regarding the semiconductor device X1.

  A height difference H <b> 5 is provided between the lower surface 20 c of the insulator 20 and the lower surface 10 c of the semiconductor element 10 in order to ensure a space for forming an appropriate sealing layer by the sealing material 80. Here, the appropriate sealing layer means a sealing layer formed so that the sealing material 80 does not protrude downward from the lower surface 20c of the insulator 20. Thus, when the sealing material 80 does not protrude below the lower surface 20c of the insulator 20, the semiconductor device X5 is caused by the sealing material 80 protruding below the lower surface 20c of the insulator 20. When mounting and mounting on the external electric circuit board, it may be difficult to electrically connect the wiring conductor 30 of the insulator 20 and the electrode portion of the external electric circuit board with a conductive bonding material or the like. Can be prevented.

  The height difference H5 is preferably set to 30 to 200 μm from the viewpoint of sufficiently securing the space. When the height difference H5 is less than 30 μm, it may be difficult to form the appropriate sealing layer. When the height difference H5 exceeds 200 μm, the overall height of the semiconductor element X5 is higher than necessary. Therefore, the tendency to become disadvantageous from the viewpoint of reducing the height is strengthened.

  In addition to the same effects as the optical semiconductor devices X1 to X4, the optical semiconductor device X5 according to the present embodiment can further improve mechanical strength and airtightness.

  In the present embodiment, the bonding area between the side surface 20a of the insulator 20 and the side surface 10b of the semiconductor element 10 by the bonding material 60 may be appropriately set within a range in which a desired bonding strength can be ensured, and the side surface 20a of the insulator 20 is not necessarily limited. It is not necessary to perform bonding by the bonding material 60 over the entire area between the semiconductor element 10 and the side surface 10b of the semiconductor element 10. Even when the bonding material 60 is not used to join the entire side surface 20a of the insulator 20 and the side surface 10b of the semiconductor element 10, the sealing material 80 ensures sufficient airtightness and mechanical strength. Can be improved.

  8 is a cross-sectional view of a semiconductor device X6 according to the sixth embodiment of the present invention, FIG. 9 is a plan view thereof, and FIG. 10 is an exploded perspective view thereof. In the semiconductor device X6, the pair of supports 20 has at least one of a convex shape and a concave shape on the surface facing the semiconductor element 10, or the surface of the support 20 facing the semiconductor element 10 Is different from the semiconductor device X1 in that it has a groove-shaped notch extending in the thickness direction of the support 20. Other configurations of the semiconductor device X6 are the same as those described above regarding the semiconductor device X1.

  In the present embodiment, a wire 50 for electrically connecting the electrode 12 of the semiconductor element 10 and the wiring conductor 30 of the support 20 can be bonded, and the bonding material 60 is attached to the optical element 11. There is no particular limitation on the size of at least one of a convex shape and a concave shape as long as the desired light receiving and light emitting characteristics can be obtained without wearing, but in terms of bonding of the wire 50, the optical element 11 is further used. The shape portion 20g (a convex shape, a concave shape, or a groove-shaped notch) has a height H6 out of the height H1 of the pair of support bodies 20 in order to prevent the bonding material 60 from adhering to the surface. It is preferable to form in the region.

  As for the shape of the forming portion 20g, a hole shape (a columnar shape, a conical shape, a hemispherical shape, etc.), a shape in which it is penetrated in the cross-sectional direction of the support, and a horizontal groove with respect to the support 20 Shaped notches, lattice-shaped notches that combine the thickness direction and horizontal direction of the support 20, shapes that have the above-mentioned hole shape, groove shape, and the like as convex shapes, and shapes that combine those uneven shapes, etc. Depending on the ease of processing depending on the material and shape of the support and the reliability level of the required bonding strength, it can be selected as appropriate. And it has at least one, preferably two or more of these convex and concave shapes.

  Further, when the forming portion 20g has a hole shape, the size of the opening can sufficiently enter the bottom of the forming hole of the bonding material 60, and if a predetermined bonding strength can be obtained, Although there is no restriction | limiting in particular about R of an opening part, It is preferable to set it as R = 0.5-1 mm at the point which obtains predetermined joint strength.

  Although specific embodiments of the present invention have been described above, the present invention is not limited to these embodiments, and various modifications can be made without departing from the spirit of the invention.

  In the semiconductor devices X1 to X6, a pair of conductors may be employed instead of the pair of insulators 20 as the support. In addition to the shape and dimensions of the pair of conductors so that the semiconductor element can be appropriately sandwiched between the side surfaces facing each other, for example, the pair of conductors themselves function as electrodes. It is configured as follows. The shape and dimensions of the pair of conductors are the same as those of the pair of insulators 20. Examples of the material constituting the conductor include copper and aluminum.

  In the semiconductor devices X <b> 1, X <b> 2, X <b> 4, X <b> 5, X <b> 6, the connecting portion between one end of the wiring conductor 30 and the other end of the wire 50 may be covered with an adhesive 65. According to such a configuration, the mechanical connection strength between the wiring conductor 30 and the wire 50 can be increased. Therefore, the semiconductor devices X 1, X 2, X 4, X 5, and X 6 with this configuration are excellent in electrical connection reliability between the wiring conductor 30 and the wire 50. Further, in the semiconductor devices X1 and X2 of this configuration, when a highly light-shielding adhesive (having translucency below a reference value) is adopted as the adhesive 65, light irregular reflection at one end of the wiring conductor 30 is suppressed. Can do. Therefore, in the semiconductor devices X1 and X2 of this configuration, it is possible to suppress irregular reflection between the optical element 11 and the translucent member 40, such as incident light from the outside and light emitted from the optical element 11. Therefore, the light receiving characteristics and the light emitting characteristics can be improved.

  In the semiconductor devices X1 to X5, the adhesive 65 may contain a hygroscopic material. Silica etc. are mentioned as a hygroscopic material. According to such a configuration, it is possible to prevent moisture from entering the space that hermetically seals the optical element 11 and to absorb moisture in the space. Therefore, the semiconductor devices X1 to X5 having this configuration are excellent in reliability. The hygroscopic material may be attached to the space side surface of the adhesive 65.

  In the semiconductor devices X1 to X4, the lower surface 10c of the semiconductor element 10 and the lower surface 20d of the pair of insulators 20 (the lower surface 30a of the wiring conductor 30 when the wiring conductor 30 protrudes below the lower surface 20d of the insulator 20). ) May constitute substantially the same plane. According to such a configuration, since the difference in height between the height H1 of the insulator 20 and the height H2 of the semiconductor element 10 can be further reduced, the semiconductor devices X1, X2, and X3 can be downsized (low profile). ). Further, heat generated from the semiconductor element 10 can be directly transferred to an external electric circuit board (not shown) to be radiated. Furthermore, since the lower surface 10b of the semiconductor element 10 directly contacts an external electric circuit board (not shown), it is possible to suppress the occurrence of inclination when the semiconductor element 10 is mounted on the external electric circuit board. That is, the semiconductor devices X1 and X2 having this configuration are suitable for producing, for example, an electronic device (bar code reader, scanner, etc.) having excellent reading accuracy at low cost.

  In the semiconductor devices X1 and X2, the electrode pad 12 may be covered with a light-shielding member (not shown) having a high light-shielding property (translucency is not more than a reference value). As the light-shielding member, a thermosetting or ultraviolet curable resin such as an epoxy resin, a polyimide resin, a silicone resin, or a polyetheramide resin, or an organic pigment or a non-conductive inorganic pigment added to these resins Etc. According to such a configuration, irregular reflection of light at the electrode pad 12 can be suppressed. Therefore, in the semiconductor devices X1 and X2 of this configuration, it is possible to suppress irregular reflection between the optical element 11 and the translucent member 40, such as incident light from the outside and light emitted from the optical element 11. Therefore, the light receiving characteristics and the light emitting characteristics can be improved.

1 is a cross-sectional view illustrating a semiconductor device according to a first embodiment of the present invention. FIG. 2 is a plan view of the semiconductor device shown in FIG. 1. FIG. 2 is an exploded perspective view of the semiconductor device shown in FIG. 1. It is sectional drawing showing the semiconductor device which concerns on the 2nd Embodiment of this invention. It is sectional drawing showing the semiconductor device which concerns on the 3rd Embodiment of this invention. It is sectional drawing showing the semiconductor device which concerns on the 4th Embodiment of this invention. It is sectional drawing showing the semiconductor device which concerns on the 5th Embodiment of this invention. It is sectional drawing showing the semiconductor device which concerns on the 6th Embodiment of this invention. FIG. 9 is a plan view of the semiconductor device shown in FIG. 8. FIG. 9 is an exploded perspective view of the semiconductor device shown in FIG. 8. An example of a conventional semiconductor device is shown, (a) is a plan view thereof, and (b) is a sectional view taken along line VIIIa-VIIIa of (a).

Explanation of symbols

X1 to X6 Semiconductor device 10 Semiconductor element 11 Optical element 20 (a pair of) insulator 30 Wiring conductor 40 Translucent member

Claims (14)

A semiconductor device comprising a semiconductor element sandwiched between a pair of supports. The semiconductor device according to claim 1, wherein at least a part of the semiconductor element and the pair of supports are in direct contact with each other. 3. The semiconductor device according to claim 1, wherein a lower surface of the semiconductor element and a lower surface of the pair of support bodies constitute substantially the same plane. The pair of supports are inclined such that a part of a surface facing the semiconductor element has a larger distance from the side surface of the semiconductor element as a part located below the support is formed. Item 4. The semiconductor device according to any one of Items 1 to 3. The semiconductor device according to claim 1, wherein the support includes an insulator. The semiconductor device according to claim 5, wherein the insulator includes ceramics. The semiconductor according to claim 5, wherein the support has a wiring conductor, and the semiconductor element has an electrode pad that is electrically connected to the wiring conductor and is at least partially covered by a light shielding member. apparatus. The semiconductor device according to claim 1, further comprising a bonding material for bonding the semiconductor element and the pair of supports. The semiconductor device according to claim 1, further comprising a sealing unit for sealing a main part of the semiconductor element. The semiconductor device according to claim 9, wherein the sealing unit includes a sealing material positioned below the semiconductor element and positioned between the pair of supports. 11. The semiconductor device according to claim 9, wherein the sealing unit includes a translucent member positioned above the main part of the semiconductor element. The semiconductor device according to claim 9, wherein an optical element for emitting or receiving light is located in the main part of the semiconductor element. The semiconductor device according to claim 8, wherein the support body has at least one of a convex shape and a concave shape on a surface facing the semiconductor element. The semiconductor device according to claim 13, wherein the shape has a groove-shaped notch extending in a thickness direction of the support.

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