JP2007201261A - Circuit module - Google Patents

Circuit module Download PDF

Info

Publication number
JP2007201261A
JP2007201261A JP2006019307A JP2006019307A JP2007201261A JP 2007201261 A JP2007201261 A JP 2007201261A JP 2006019307 A JP2006019307 A JP 2006019307A JP 2006019307 A JP2006019307 A JP 2006019307A JP 2007201261 A JP2007201261 A JP 2007201261A
Authority
JP
Japan
Prior art keywords
main body
underfill
circuit module
film
corner
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2006019307A
Other languages
Japanese (ja)
Inventor
Tomoyuki Honma
友幸 本間
Kazuo Chihiro
和夫 千尋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alps Alpine Co Ltd
Original Assignee
Alps Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alps Electric Co Ltd filed Critical Alps Electric Co Ltd
Priority to JP2006019307A priority Critical patent/JP2007201261A/en
Publication of JP2007201261A publication Critical patent/JP2007201261A/en
Withdrawn legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit module in which the moisture resistance of a semiconductor component by an underfill is good, and which does not have air bubbles (voids) in the underfill. <P>SOLUTION: Since the position where the recess 6 of the front surface of an insulating substrate 1 for circuit modules counters with the corner subordinate side of a main body 7a and it was connected with this and is projected and prepared in the corner outside of the main body 7a, the amount of the underfill 8 in the corner of the main body 7a increases, the coating of the corner of the main body 7a by the underfill 8 becomes certain, the moisture resistance of the corner of the main body 7a is good, and the invasion of humidity can be prevented to a land 2 or to an electrode 7b. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、種々の電気機器や電子回路ユニット等に使用して好適な回路モジュールに関するものである。   The present invention relates to a circuit module suitable for use in various electric devices, electronic circuit units, and the like.

従来の回路モジュールに係る図面を説明すると、図１０は従来の回路モジュールに係る要部断面図、及び半導体部品の実装方法を示す説明図、図１１は従来の回路モジュールに係る平面図であり、次に、従来の回路モジュールの構成を図１０、図１１に基づいて説明すると、絶縁基板５１には、複数のランド部５２が設けられ、このランド部５２には、半導体部品５３と電子部品５４が半田等によって接続されて、所望の電気回路が形成されている。   FIG. 10 is a cross-sectional view of a main part according to a conventional circuit module and an explanatory view showing a mounting method of a semiconductor component, and FIG. 11 is a plan view according to the conventional circuit module. Next, the configuration of the conventional circuit module will be described with reference to FIGS. 10 and 11. The insulating substrate 51 is provided with a plurality of land portions 52. The land portions 52 are provided with a semiconductor component 53 and an electronic component 54. Are connected by solder or the like to form a desired electric circuit.

半導体部品５３は、四角形状の本体部５３ａと、この本体部５３ａの下面に設けられた電極５３ｂを有し、また、電子部品５４は、コンデンサ等からなり、本体部５４ａと、この本体部５４ａの両端からＬ字状に折り曲げられた端子５４ｂを有し、電極５３ｂと端子５４ｂがランド部５２に接続されている。   The semiconductor component 53 includes a rectangular main body 53a and an electrode 53b provided on the lower surface of the main body 53a. The electronic component 54 includes a capacitor or the like, and includes a main body 54a and the main body 54a. The terminal 54 b is bent in an L shape from both ends of the electrode 53 b, and the electrode 53 b and the terminal 54 b are connected to the land portion 52.

また、この絶縁基板５１と半導体部品５３の本体部５３ａとの間には、樹脂からなるアンダーフィル５５が設けられおり、図１１に示すように、本体部５３ａの辺の位置では、アンダーフィル５５が本体部５３ａ外にはみ出た状態になっているが、本体部５３ａの隅部では、アンダーフィル５５が本体部５３ａと面一状態に形成されて、従来の回路モジュールが構成されている（例えば、特許文献１参照）。   In addition, an underfill 55 made of resin is provided between the insulating substrate 51 and the main body 53a of the semiconductor component 53. As shown in FIG. 11, the underfill 55 is located at the side of the main body 53a. However, the underfill 55 is formed flush with the main body 53a at the corner of the main body 53a to form a conventional circuit module (for example, , See Patent Document 1).

そして、従来の回路モジュールにおける半導体部品の実装方法は、図１０に示すように、絶縁基板５１に取り付けられた半導体部品５３の周縁にディスペンサ５６を配置し、このディスペンサ５６によって、液状のアンダーフィル５５が半導体部品５３の本体部５３ａと絶縁基板５１間に注入され、液状のアンダーフィル５５が毛細管現象によって本体部５３ａと絶縁基板５１間に流入するようにしたものである（例えば、特許文献１参照）。   As shown in FIG. 10, the semiconductor component mounting method in the conventional circuit module is configured such that a dispenser 56 is disposed on the periphery of the semiconductor component 53 attached to the insulating substrate 51, and the liquid underfill 55 is formed by the dispenser 56. Is injected between the main body 53a of the semiconductor component 53 and the insulating substrate 51, and the liquid underfill 55 flows between the main body 53a and the insulating substrate 51 by capillary action (see, for example, Patent Document 1). ).

このようにして形成されたアンダーフィル５５は、図１１に示すように、本体部５３ａの隅部ではアンダーフィル５５の量が少なくなり、そして、本体部５３ａの隅部でのアンダーフィル５５の量を多くするために、ディスペンサ５６からの液状のアンダーフィル５５の注入量を多くすると、本体部５３ａの辺からのアンダーフィル５５のはみ出しが大きくなると共に、図１０に示すように、半導体部品５３に隣接して設けられた電子部品５４の端子５４ｂを覆うようになる。   In the underfill 55 formed in this way, as shown in FIG. 11, the amount of the underfill 55 is reduced at the corner of the main body 53a, and the amount of the underfill 55 at the corner of the main body 53a. When the amount of liquid underfill 55 injected from the dispenser 56 is increased, the protrusion of the underfill 55 from the side of the main body 53a increases, and as shown in FIG. The terminal 54b of the electronic component 54 provided adjacently is covered.

すると、ここでは図示しないが、絶縁基板５１をセットのマザー基板に取り付ける際、リフロー炉によって加熱されると、端子５４ｂを接続した半田が溶けて、半田がアンダーフィル５５の隙間からはみ出して、例えば、端子５４ｂ間がショートするという事態が生じる。
特開２００２−２７１０１４号公報 Then, although not shown here, when the insulating substrate 51 is attached to the set mother substrate, when heated by the reflow furnace, the solder connected to the terminal 54b is melted, and the solder protrudes from the gap of the underfill 55, for example. A situation occurs in which the terminals 54b are short-circuited.
JP 2002-271014 A

しかし、従来の回路モジュールにあっては、半導体部品５３の本体部５３ａの隅部におけるアンダーフィル５５の量が少なくなって、アンダーフィル５５による耐湿性が悪くなり、本体部５３ａの隅部側から湿気がランド部５２や電極５３ｂ側に侵入するという問題がある。   However, in the conventional circuit module, the amount of the underfill 55 at the corner of the main body 53a of the semiconductor component 53 is reduced, the moisture resistance due to the underfill 55 is deteriorated, and from the corner of the main body 53a. There is a problem that moisture enters the land portion 52 and the electrode 53b side.

また、本体部５３ａの隅部でのアンダーフィル５５の量を多くするために、液状のアンダーフィル５５の注入量を多くすると、アンダーフィル５５が本体部５３ａの辺から大きくはみ出し、半導体部品５３に隣接して設けられた電子部品５４の端子５４ｂを覆うようになるため、絶縁基板５１をセットのマザー基板に取り付ける際、端子５４ｂを接続した半田が溶けて、半田がアンダーフィル５５の隙間からはみ出して、例えば、端子５４ｂ間がショートするという問題がある。   Further, in order to increase the amount of the underfill 55 at the corner of the main body 53 a, if the injection amount of the liquid underfill 55 is increased, the underfill 55 protrudes greatly from the side of the main body 53 a, and the semiconductor component 53 Since the terminal 54b of the electronic component 54 provided adjacently is covered, when the insulating substrate 51 is attached to the mother board of the set, the solder connecting the terminal 54b melts and the solder protrudes from the gap of the underfill 55. For example, there is a problem that the terminals 54b are short-circuited.

本発明は、このような従来技術の実情に鑑みてなされたもので、その目的は、アンダーフィルによる半導体部品の耐湿性が良く、アンダーフィルに気泡（ボイド）の無い回路モジュールを提供することにある。   The present invention has been made in view of such a state of the art, and an object of the present invention is to provide a circuit module having good moisture resistance of a semiconductor component due to underfill and having no bubbles in the underfill. is there.

上記の目的を達成するために、本発明は、複数のランド部が設けられた絶縁基板と、本体部の下面に設けられた電極がランド部に接続された半導体部品と、絶縁基板と半導体部品の本体部との間に設けられた樹脂からなるアンダーフィルとを備え、絶縁基板の表面には、本体部の隅部下面と対向する位置、及びこれに繋がって本体部の隅部外に突出する凹部が設けられ、凹部内に設けられたアンダーフィルによって、本体部の隅部が被覆されたことを特徴としている。   To achieve the above object, the present invention provides an insulating substrate provided with a plurality of land portions, a semiconductor component in which an electrode provided on the lower surface of the main body portion is connected to the land portion, and the insulating substrate and the semiconductor component. And an underfill made of resin provided between the main body and the surface of the insulating substrate, the position facing the lower surface of the corner of the main body, and the outside of the corner of the main body connected to this. And a corner portion of the main body is covered with an underfill provided in the recess.

このように構成した本発明は、本体部の隅部におけるアンダーフィルの量が多くなって、アンダーフィルによる本体部の隅部の被覆が確実となり、本体部の隅部の耐湿性が良く、ランド部や電極への湿気の侵入を防止できる。   The present invention configured as described above increases the amount of underfill at the corners of the main body, ensures that the corners of the main body are covered with the underfill, and has good moisture resistance at the corners of the main body. Intrusion of moisture into the electrode and electrode can be prevented.

また、凹部を設けることによって、アンダーフィルの量を多くすることなくアンダーフィルが本体部の隅部を覆うことができ、従って、本体部の辺からのアンダーフィルのはみ出しを少なくできて、半導体部品に隣接して配置された電子部品に悪影響（例えば、端子間のショート）を及ぼすことが無い。   Further, by providing the recess, the underfill can cover the corner of the main body without increasing the amount of the underfill, and therefore the protrusion of the underfill from the side of the main body can be reduced. There is no adverse effect (for example, a short circuit between terminals) on an electronic component disposed adjacent to the terminal.

また、本発明は、上記発明において、絶縁基板には、ランド部を避けた状態で絶縁皮膜が設けられ、凹部が絶縁皮膜の除去部によって形成されたことを特徴としている。   Further, the present invention is characterized in that, in the above invention, the insulating substrate is provided with an insulating film in a state avoiding the land portion, and the concave portion is formed by the removed portion of the insulating film.

このように構成した本発明は、凹部が絶縁皮膜の除去部によって形成でき、その構成が簡単で、安価なものが得られる。   In the present invention configured as described above, the recess can be formed by the removal portion of the insulating film, and the structure is simple and inexpensive.

また、本発明は、上記発明において、絶縁皮膜は、複数のランド部に跨って設けられた第１の皮膜除去部を有し、凹部には、第１の皮膜除去部が繋がって形成されたことを特徴としている。   Further, according to the present invention, in the above invention, the insulating film has a first film removal portion provided across a plurality of land portions, and the first film removal portion is connected to the recess. It is characterized by that.

このように構成した本発明は、第１の皮膜除去部が本体部外に位置する凹部に繋がっているため、第１の皮膜除去部内の空気が凹部から排出できて、内側に気泡（ボイド）の無いアンダーフィルが得られる。   In the present invention configured as described above, since the first film removing portion is connected to the concave portion located outside the main body portion, air in the first film removing portion can be discharged from the concave portion, and bubbles (voids) are formed inside. An underfill without any is obtained.

また、本発明は、上記発明において、複数のランド部は、ロ字状に配設され、ランド部の全体が互いに繋がった第１の皮膜除去部によって露出されたことを特徴としている。   Moreover, the present invention is characterized in that, in the above-mentioned invention, the plurality of land portions are arranged in a square shape, and the entire land portions are exposed by the first film removing portions connected to each other.

このように構成した本発明は、互いに繋がった１つの第１の皮膜除去部で形成されるため、その構成が簡単であると共に、複数の凹部が１つの第１の皮膜除去部に繋がった構成であるため、第１の皮膜除去部内の空気が複数の凹部から排出できて、内側に気泡（ボイド）の無いアンダーフィルが得られる。   Since the present invention configured as described above is formed by one first film removal portion connected to each other, the configuration is simple and a plurality of recesses are connected to one first film removal portion. Therefore, the air in the first film removal portion can be discharged from the plurality of recesses, and an underfill without bubbles (voids) on the inside can be obtained.

また、本発明は、上記発明において、絶縁皮膜には、第１の皮膜除去部に繋がり、本体部の周縁よりも外側に延びる第２の皮膜除去部を有したことを特徴としている。   Moreover, the present invention is characterized in that, in the above-mentioned invention, the insulating film has a second film removal portion that is connected to the first film removal portion and extends outward from the periphery of the main body portion.

このように構成した本発明は、第１の皮膜除去部に繋がった第２の皮膜除去部からも、第１の皮膜除去部内の空気が排出できて、内側に気泡（ボイド）の無いアンダーフィルが得られる。   The present invention configured as described above allows the air in the first film removal unit to be discharged from the second film removal unit connected to the first film removal unit, and there is no bubble (void) inside. Is obtained.

本発明は、凹部が本体部の隅部下面と対向する位置、及びこれに繋がって本体部の隅部外に突出して設けられたため、本体部の隅部におけるアンダーフィルの量が多くなって、アンダーフィルによる本体部の隅部の被覆が確実となり、本体部の隅部の耐湿性が良く、ランド部や電極への湿気の侵入を防止できる。   Since the present invention is provided at the position where the concave portion faces the lower surface of the corner portion of the main body portion and connected to this and protrudes outside the corner portion of the main body portion, the amount of underfill in the corner portion of the main body portion is increased. Covering the corners of the main body with the underfill is ensured, the moisture resistance of the corners of the main body is good, and moisture can be prevented from entering the land and the electrodes.

発明の実施の形態について図面を参照して説明すると、図１は本発明の回路モジュールに係る要部の平面図、図２は本発明の回路モジュールに係り、半導体部品の隅部と辺部におけるアンダーフィルの状態を示す要部断面図、図３は本発明の回路モジュールに係る絶縁基板の平面図である。   FIG. 1 is a plan view of an essential part of a circuit module according to the present invention, and FIG. 2 relates to the circuit module according to the present invention, in corners and sides of a semiconductor component. FIG. 3 is a plan view of an insulating substrate according to the circuit module of the present invention.

また、図４は本発明の回路モジュールにおける半導体部品の実装方法を示す正面図、図５は本発明の回路モジュールにおける半導体部品の実装方法を示す平面図、図６は本発明の回路モジュールにおける半導体部品の実装方法に係り、液状のアンダーフィルの第１の流れ状態を示す説明図である。   4 is a front view showing a mounting method of the semiconductor component in the circuit module of the present invention, FIG. 5 is a plan view showing the mounting method of the semiconductor component in the circuit module of the present invention, and FIG. 6 is a semiconductor in the circuit module of the present invention. It is explanatory drawing which shows the 1st flow state of a liquid underfill in connection with the mounting method of components.

また、図７は本発明の回路モジュールにおける半導体部品の実装方法に係り、液状のアンダーフィルの第２の流れ状態を示す説明図、図８は本発明の回路モジュールにおける半導体部品の実装方法に係り、液状のアンダーフィルの第３の流れ状態を示す説明図、図９は本発明の回路モジュールにおける半導体部品の実装方法に係り、液状のアンダーフィルの第４の流れ状態を示す説明図である。   FIG. 7 relates to a semiconductor component mounting method in the circuit module of the present invention, and is an explanatory view showing a second flow state of the liquid underfill. FIG. 8 relates to a semiconductor component mounting method in the circuit module of the present invention. FIG. 9 is an explanatory view showing a third flow state of the liquid underfill, and FIG. 9 is an explanatory view showing a fourth flow state of the liquid underfill according to the semiconductor component mounting method in the circuit module of the present invention.

次に、本発明の回路モジュールに係る構成を図１〜図３に基づいて説明すると、積層基板等からなる絶縁基板１上には、配線パターンの一部である複数のランド部２が設けられ、このランド部２は、四角線に沿って四角状（ロ字状）に２列に配列されている。   Next, the configuration according to the circuit module of the present invention will be described with reference to FIGS. 1 to 3. On the insulating substrate 1 made of a laminated substrate or the like, a plurality of land portions 2 that are part of a wiring pattern are provided. The land portions 2 are arranged in two rows in a square shape (b-shaped) along the square line.

また、この絶縁基板１上には、ランド部２を避けた状態で、エポキシ系の樹脂からなる半田レジスト等の絶縁皮膜３が設けられ、この絶縁皮膜３は、ランド部２の配列に沿って設けられた帯状の第１の皮膜除去部４を有し、この第１の皮膜除去部４は、四角状（ロ字状）をなし、ランド部２の全体を露出している。   Further, an insulating film 3 such as a solder resist made of an epoxy resin is provided on the insulating substrate 1 while avoiding the land part 2, and the insulating film 3 follows the arrangement of the land parts 2. The belt-shaped first film removing section 4 is provided, and the first film removing section 4 has a square shape (b-shaped) and exposes the entire land portion 2.

なお、この実施例では、１つの第１の皮膜除去部４によってランド部２を露出しているが、個々のランド部２が絶縁皮膜３の除去部によって露出するようにしても良く、また、ランド部２には、引出用の配線パターンが設けられ、この配線パターンが絶縁皮膜３によって被覆されるようにしても良い。   In this embodiment, the land portion 2 is exposed by one first film removing portion 4, but each land portion 2 may be exposed by the removing portion of the insulating film 3, The land portion 2 may be provided with a lead wiring pattern, and the wiring pattern may be covered with the insulating film 3.

更に、絶縁皮膜３は、第１の皮膜除去部４で囲まれた位置に設けられた島状の皮膜部３ａを有すると共に、第１の皮膜除去部４の隅部から外方に延びる複数の第２の皮膜除去部５，及び一方の第１の皮膜除去部４の一辺の中央近傍から直角に外方に延びる第２の皮膜除去部５を有する。   Furthermore, the insulating film 3 has an island-shaped film part 3 a provided at a position surrounded by the first film removal part 4, and a plurality of pieces extending outward from the corners of the first film removal part 4. The second film removing unit 5 and the second film removing unit 5 extending outward at right angles from the vicinity of the center of one side of the first film removing unit 4 are provided.

また、絶縁皮膜３は、絶縁基板１の表面に凹部６を形成するための除去部を有し、絶縁皮膜３の除去部からなるこの凹部６は、第１の皮膜除去部４の隅部から外方に延びる複数の第２の皮膜除去部５の先端部に繋がって設けられている。   Further, the insulating film 3 has a removal portion for forming the recess 6 on the surface of the insulating substrate 1, and the recess 6 formed of the removal portion of the insulating film 3 extends from the corner of the first film removal portion 4. A plurality of second film removal portions 5 extending outward are connected to the tip portions.

なお、凹部６は、絶縁基板１の表面を凹まして形成しても良く、また、凹部６は、第１の皮膜除去部４に直接、繋がるように形成しても良い。   The recess 6 may be formed by recessing the surface of the insulating substrate 1, and the recess 6 may be formed so as to be directly connected to the first film removing unit 4.

そして、絶縁皮膜３は、２５μ程度の厚さを有し、ランド部２の厚さ（１０μｍ）よりも厚く、また、第１，第２の皮膜除去部４，５の幅は、１０μｍ以上で形成されている。   The insulating film 3 has a thickness of about 25 μm, which is thicker than the land part 2 (10 μm), and the widths of the first and second film removing parts 4 and 5 are 10 μm or more. Is formed.

半導体チップ等からなる直方体状の半導体部品７は、本体部７ａと、本体部７ａの下面に設けられ、四角状（ロ字状）に配列された複数の電極７ｂを有し、この半導体部品７は、電極７ｂが半田やボールグリッドアレイ等によってランド部２に接続して取り付けられている。   A rectangular parallelepiped semiconductor component 7 made of a semiconductor chip or the like has a main body portion 7a and a plurality of electrodes 7b provided on the lower surface of the main body portion 7a and arranged in a square shape (in a square shape). The electrode 7b is attached to the land portion 2 by soldering or a ball grid array.

この半導体部品７が取り付けられた時、皮膜部３ａは、本体部７ａの中央部に位置し、第２の皮膜除去部５と凹部６は、本体部７ａの周縁から外側に突出すると共に、凹部６は、本体部７ａの隅部下面と対向する位置、及びこれに繋がって本体部７ａの隅部外に突出した状態となり、そして、絶縁基板１と本体部７ａの下面間は、５０〜８０μｍ程度の寸法となっている。   When the semiconductor component 7 is attached, the film part 3a is located at the center part of the main body part 7a, and the second film removal part 5 and the concave part 6 protrude outward from the peripheral edge of the main body part 7a. 6 is a position facing the lower surface of the corner portion of the main body portion 7a, and is connected to this and protrudes outside the corner portion of the main body portion 7a, and the space between the insulating substrate 1 and the lower surface of the main body portion 7a is 50 to 80 μm. It is about the size.

エポキシ系の樹脂からなるアンダーフィル８は、絶縁皮膜３と本体部７ａの下面間、絶縁基板１と本体部７ａの下面間、及び本体部７ａの周縁部に設けられて、半導体部品７の取付を強固にするようになっている。   The underfill 8 made of an epoxy resin is provided between the insulating film 3 and the lower surface of the main body portion 7a, between the insulating substrate 1 and the lower surface of the main body portion 7a, and at the peripheral edge of the main body portion 7a. Has come to strengthen.

そして、アンダーフィル８が設けられた際、図１に示すように、本体部７ａの周縁部からはみ出したアンダーフィル８は、本体部７ａの辺部と隅部にほぼ均等に広がって、特に、本体部７ａの隅部におけるアンダーフィル８の量が補充された状態になっている。   When the underfill 8 is provided, as shown in FIG. 1, the underfill 8 that protrudes from the peripheral portion of the main body portion 7a spreads almost evenly on the side and corner portions of the main body portion 7a. The amount of the underfill 8 at the corner of the main body 7a is in a replenished state.

また、ここでは図示しないが、ランド部２を有する絶縁基板１には、種々の電子部品が搭載されて、所望の電気回路か形成されると共に、このような回路モジュールの絶縁基板１は、リフロー炉による加熱によって、セットのマザー基板に取り付けられるようになっている。   Although not shown here, the insulating substrate 1 having the land portion 2 is mounted with various electronic components to form a desired electric circuit, and the insulating substrate 1 of such a circuit module is reflowed. It is attached to the mother board of the set by heating with a furnace.

次に、本発明の回路モジュールにおける半導体部品の実装方法について図４〜図９に基づいて説明すると、先ず、図４，図５に示すように、液状のアンダーフィル８を注入するためのディスペンサ９が半導体部品７の周縁に配置される。   Next, a semiconductor component mounting method in the circuit module of the present invention will be described with reference to FIGS. 4 to 9. First, as shown in FIGS. 4 and 5, a dispenser 9 for injecting a liquid underfill 8. Is arranged at the periphery of the semiconductor component 7.

この状態で、ディスペンサ９によって液状のアンダーフィル８が注入されると、図６に示すように、アンダーフィル８は、絶縁皮膜３と本体部７ａ間のギャップが小さいため、その間に毛細管現象によって流れ込み、次に、この絶縁皮膜３と本体部７ａ間で溢れたアンダーフィル８がディスペンサ９に近い第１の皮膜除去部４，第２の皮膜除去部５，及び凹部６に毛細管現象によって流れ込む。   In this state, when the liquid underfill 8 is injected by the dispenser 9, as shown in FIG. 6, since the gap between the insulating film 3 and the main body portion 7a is small, the underfill 8 flows in by capillary action therebetween. Next, the underfill 8 overflowing between the insulating film 3 and the main body 7 a flows into the first film removing unit 4, the second film removing unit 5, and the recess 6 near the dispenser 9 by capillary action.

そして、第１の皮膜除去部４から溢れたアンダーフィル８は、ギャップの小さい皮膜部３ａと本体部７ａ間に流れ込むようになると共に、第２の皮膜除去部５の縁部に位置したアンダーフィル８の一部は、アンダーフィル８の粘性によって第２の皮膜除去部５の縁部に止まって、第２の皮膜除去部５内に流入しない状態にある。   Then, the underfill 8 overflowing from the first film removing portion 4 flows between the film portion 3a having a small gap and the main body portion 7a, and is located at the edge of the second film removing portion 5. A part of 8 stops at the edge of the second film removal unit 5 due to the viscosity of the underfill 8 and does not flow into the second film removal unit 5.

更に、液状のアンダーフィル８を注入すると、図７に示すように、ギャップの小さい絶縁皮膜３と本体部７ａ間でアンダーフィル８の流入が先行しながら、漸次ギャップの大きな第１の皮膜除去部４がアンダーフィル８によって埋められるようになって、ディスペンサ９に遠い位置にある第１の皮膜除去部４の一部が残された状態になると共に、この間では、空気が第２の皮膜除去部５、凹部６から排出されるようになる。   Further, when the liquid underfill 8 is injected, as shown in FIG. 7, the first film removal portion having a gradually large gap is introduced while the inflow of the underfill 8 precedes between the insulating coating 3 having a small gap and the main body portion 7a. 4 is filled with the underfill 8, and a part of the first film removing unit 4 located far from the dispenser 9 is left, and during this period, air is supplied to the second film removing unit. 5. It comes to be discharged from the recess 6.

更に、液状のアンダーフィル８を注入すると、図８に示すように、ディスペンサ９に遠い位置にある第１の皮膜除去部４の一部と第２の皮膜除去部５が残された状態で、液状のアンダーフィル８が本体部７ａの下面の殆どに行き渡る。   Furthermore, when the liquid underfill 8 is injected, as shown in FIG. 8, a part of the first film removing unit 4 and the second film removing unit 5 located at a position far from the dispenser 9 are left, The liquid underfill 8 spreads over most of the lower surface of the main body 7a.

更に続いて、液状のアンダーフィル８を注入すると、第１の皮膜除去部４に存在する空気が第２の皮膜除去部５と凹部６から排出されて、図９に示すような状態となる。   Subsequently, when the liquid underfill 8 is injected, the air present in the first film removal unit 4 is discharged from the second film removal unit 5 and the recess 6 and the state shown in FIG. 9 is obtained.

そして、図９の状態では、本体部７ａの下面から溢れたアンダーフィル８は、本体部７ａの周縁（辺部）を埋めると共に、凹部６内に流出して、本体部７ａの隅部を覆うようになって、半導体部品の実装が完了する。   In the state of FIG. 9, the underfill 8 overflowing from the lower surface of the main body portion 7a fills the periphery (side portion) of the main body portion 7a and flows into the recess 6 to cover the corners of the main body portion 7a. Thus, the mounting of the semiconductor component is completed.

本発明の回路モジュールに係る要部の平面図である。It is a top view of the principal part concerning the circuit module of the present invention. 本発明の回路モジュールに係り、半導体部品の隅部と辺部におけるアンダーフィルの状態を示す要部断面図である。FIG. 4 is a cross-sectional view of a principal part showing a state of underfill in corners and sides of a semiconductor component according to the circuit module of the present invention. 本発明の回路モジュールに係る絶縁基板の平面図である。It is a top view of the insulated substrate which concerns on the circuit module of this invention. 本発明の回路モジュールにおける半導体部品の実装方法を示す正面図である。It is a front view which shows the mounting method of the semiconductor component in the circuit module of this invention. 本発明の回路モジュールにおける半導体部品の実装方法を示す平面図である。It is a top view which shows the mounting method of the semiconductor component in the circuit module of this invention. 本発明の回路モジュールにおける半導体部品の実装方法に係り、液状のアンダーフィルの第１の流れ状態を示す説明図である。It is explanatory drawing which shows the 1st flow state of a liquid underfill regarding the mounting method of the semiconductor component in the circuit module of this invention. 本発明の回路モジュールにおける半導体部品の実装方法に係り、液状のアンダーフィルの第２の流れ状態を示す説明図である。It is explanatory drawing which shows the 2nd flow state of a liquid underfill regarding the mounting method of the semiconductor component in the circuit module of this invention. 本発明の回路モジュールにおける半導体部品の実装方法に係り、液状のアンダーフィルの第３の流れ状態を示す説明図である。It is explanatory drawing which concerns on the mounting method of the semiconductor component in the circuit module of this invention, and shows the 3rd flow state of a liquid underfill. 本発明の回路モジュールにおける半導体部品の実装方法に係り、液状のアンダーフィルの第４の流れ状態を示す説明図である。It is explanatory drawing which concerns on the mounting method of the semiconductor component in the circuit module of this invention, and shows the 4th flow state of a liquid underfill. 従来の回路モジュールに係る要部断面図、及び半導体部品の実装方法を示す説明図である。It is principal part sectional drawing concerning the conventional circuit module, and explanatory drawing which shows the mounting method of a semiconductor component. 従来の回路モジュールに係る平面図である。It is a top view which concerns on the conventional circuit module.

符号の説明Explanation of symbols

１ 絶縁基板
２ ランド部
３ 絶縁皮膜
３ａ 皮膜部
４ 第１の皮膜除去部
５ 第２の皮膜除去部
６ 凹部
７ 半導体部品
７ａ 本体部
７ｂ 電極
８ アンダーフィル
９ ディスペンサ DESCRIPTION OF SYMBOLS 1 Insulation board | substrate 2 Land part 3 Insulation film 3a Film part 4 1st film removal part 5 2nd film removal part 6 Recessed part 7 Semiconductor component 7a Main body part 7b Electrode 8 Underfill 9 Dispenser

Claims (5)

複数のランド部が設けられた絶縁基板と、本体部の下面に設けられた電極が前記ランド部に接続された半導体部品と、前記絶縁基板と前記半導体部品の前記本体部との間に設けられた樹脂からなるアンダーフィルとを備え、前記絶縁基板の表面には、前記本体部の隅部下面と対向する位置、及びこれに繋がって前記本体部の隅部外に突出する凹部が設けられ、前記凹部内に設けられた前記アンダーフィルによって、前記本体部の隅部が被覆されたことを特徴とする回路モジュール。 An insulating substrate provided with a plurality of land portions; an electrode provided on a lower surface of the main body portion; and a semiconductor component connected to the land portion; and between the insulating substrate and the main body portion of the semiconductor component. An underfill made of resin, and the surface of the insulating substrate is provided with a position facing the lower surface of the corner of the main body, and a recess protruding outside the corner of the main body connected to this, A circuit module, wherein a corner of the main body is covered with the underfill provided in the recess. 前記絶縁基板には、前記ランド部を避けた状態で絶縁皮膜が設けられ、前記凹部が前記絶縁皮膜の除去部によって形成されたことを特徴とする請求項１記載の回路モジュール。 The circuit module according to claim 1, wherein the insulating substrate is provided with an insulating film while avoiding the land portion, and the concave portion is formed by a removal portion of the insulating film. 前記絶縁皮膜は、複数の前記ランド部に跨って設けられた第１の皮膜除去部を有し、前記凹部には、前記第１の皮膜除去部が繋がって形成されたことを特徴とする請求項２記載の回路モジュール。 The said insulating film has a 1st film removal part provided ranging over the said several land part, The said 1st film removal part was connected and formed in the said recessed part, It is characterized by the above-mentioned. Item 3. The circuit module according to Item 2. 複数の前記ランド部は、ロ字状に配設され、前記ランド部の全体が互いに繋がった前記第１の皮膜除去部によって露出されたことを特徴とする請求項３記載の回路モジュール。 The circuit module according to claim 3, wherein the plurality of land portions are arranged in a square shape and are exposed by the first film removing portions connected to each other. 前記絶縁皮膜には、前記第１の皮膜除去部に繋がり、前記本体部の周縁よりも外側に延びる第２の皮膜除去部を有したことを特徴とする請求項３、又は４記載の回路モジュール。 5. The circuit module according to claim 3, wherein the insulating film includes a second film removing portion that is connected to the first film removing portion and extends outward from a peripheral edge of the main body portion. .
JP2006019307A 2006-01-27 2006-01-27 Circuit module Withdrawn JP2007201261A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006019307A JP2007201261A (en) 2006-01-27 2006-01-27 Circuit module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006019307A JP2007201261A (en) 2006-01-27 2006-01-27 Circuit module

Publications (1)

Publication Number Publication Date
JP2007201261A true JP2007201261A (en) 2007-08-09

Family

ID=38455520

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006019307A Withdrawn JP2007201261A (en) 2006-01-27 2006-01-27 Circuit module

Country Status (1)

Country Link
JP (1) JP2007201261A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112640593A (en) * 2018-08-31 2021-04-09 西门子股份公司 Circuit carrier with mounting locations for electronic components, electronic circuit and method of manufacture

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112640593A (en) * 2018-08-31 2021-04-09 西门子股份公司 Circuit carrier with mounting locations for electronic components, electronic circuit and method of manufacture

Similar Documents

Publication Publication Date Title
US8724334B2 (en) Circuit module and manufacturing method for the same
US9245829B2 (en) Substrate structure, method of mounting semiconductor chip, and solid state relay
US8338715B2 (en) PCB with soldering pad projections forming fillet solder joints and method of production thereof
WO2016181628A1 (en) Printed-wiring board, printed-circuit board and electronic apparatus
JP2011129708A (en) Connection structure for printed wiring board
JP2008227183A (en) Printed board unit and printed circuit board
US7621759B2 (en) Electronic apparatus and method of manufacturing electronic apparatus
JP4180622B2 (en) Electronic component mounting structure and mounting method thereof
JP2007088020A (en) Circuit structure
JP2011165776A (en) Three-terminal capacitor and method of mounting the same
JP2007201261A (en) Circuit module
JP4203513B2 (en) Electronic component mounting structure
JP4176792B2 (en) Electronic component mounting structure and mounting method thereof
JP6666320B2 (en) Mounting structure of resin molded board and capacitor
JP4545615B2 (en) Assembly parts, module substrate, module substrate manufacturing method, electronic circuit device, and electronic apparatus
KR100396869B1 (en) Junction method for a flexible printed circuit board
JP2011151051A (en) Lsi package and method of manufacturing the same
KR100884038B1 (en) Electronic component mounted structure
JP2008098398A (en) Circuit device, and its manufacturing method
JP4840182B2 (en) Electronic equipment
JP2006339276A (en) Substrate for connection and manufacturing method thereof
JP6348288B2 (en) Electronic control unit
JP2018129464A (en) Printed circuit board and printed circuit device
CN219740730U (en) Bonding pad structure, PCB and electronic equipment
JP5072124B2 (en) Circuit boards and electronic equipment

Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20090407