CN219740730U - Bonding pad structure, PCB and electronic equipment - Google Patents

Abstract

The embodiment of the utility model provides a bonding pad structure, a PCB and electronic equipment, and relates to the technical field of circuits, wherein the bonding pad structure comprises: a first pad region, a second pad region, and a third pad region; the first bonding pad area, the second bonding pad area and the third bonding pad area are respectively connected with an internal circuit of the PCB; the first bonding pad area and the second bonding pad area are used for welding operation of the electronic device to be welded of the narrow body package; the first pad area and the third pad area are used for the soldering operation of the electronic device to be soldered of the wide body package. According to the scheme provided by the utility model, the first bonding pad area is shared, so that the bonding pad structure can be compatible with a wide-body package and a narrow-body package, and material replacement can be performed during mass production; the method has the advantages that the operation of packaging soldering tin is simpler and more convenient on the basis of not changing the structural area of the bonding pad, and the beneficial effect of improving the welding quality of electronic devices is achieved.

Description

Bonding pad structure, PCB and electronic equipment

Technical Field

The embodiment of the utility model relates to the technical field of circuits, in particular to a bonding pad structure, a PCB and electronic equipment.

Background

In designing and manufacturing a printed circuit board (i.e., PCB board, printed Circuit Board), a pad structure needs to be designed on the surface of the PCB board for soldering with an electronic component so as to realize connection between the electronic component and the internal circuit of the PCB board. The existing pad structure is generally designed according to the packaging type of the electronic device, and the pad structures corresponding to different packaging types are different.

When the electronic device is packaged in the prior art, according to different use scenes, the same electronic device has two types of narrow body packaging and wide body packaging, and a bonding pad structure can only be matched with the electronic device of one packaging type generally, so that material replacement can not be performed during mass production. Therefore, how to design a general pad structure, which can be compatible with two packaging modes of a wide body and a narrow body, and is easy to operate during packaging is an important problem to be solved.

Disclosure of Invention

The embodiment of the utility model provides a bonding pad structure, a PCB and electronic equipment, which are used for solving the problems in the bonding pad structure of the prior scheme.

In a first aspect, an embodiment of the present utility model provides a pad structure, where the pad structure is formed on a surface of a PCB board, the pad structure includes: a first pad region, a second pad region, and a third pad region; the first bonding pad area, the second bonding pad area and the third bonding pad area are respectively connected with an internal circuit of the PCB;

the first bonding pad area and the second bonding pad area are used for welding operation of the electronic device to be welded of the narrow body package; the first bonding pad area and the third bonding pad area are used for the welding operation of the electronic device to be welded of the wide body package.

Optionally, the first pad region includes a preset number of first pad sub-regions, the second pad region includes a preset number of second pad sub-regions, and the third pad region includes a preset number of third pad sub-regions;

each first pad sub-region corresponds to each second pad sub-region and each third pad sub-region;

each second pad subarea is connected with each third pad subarea one by one.

Optionally, the area of the first pad region is equal to the area of the third pad region;

the second pad region has an area smaller than that of the first pad region.

Optionally, the preset number is 4.

Optionally, the first pad area and the third pad area are separated by a first preset distance, and the first preset distance is greater than or equal to the width of the electronic device packaged by the wide body; the first bonding pad area and the second bonding pad area are separated by a second preset distance, and the second preset distance is larger than or equal to the width of the narrow-body packaged electronic device.

Optionally, the electronic device to be soldered is a chip in the form of an SOP8 package, and the first preset distance is 7.9 millimeters.

Optionally, the second pad region is spaced from the third pad region by more than 0.4mm.

In a second aspect, an embodiment of the present utility model provides a PCB board, including the pad structure described in the embodiment of the present utility model.

In a third aspect, an embodiment of the present utility model provides an electronic device, including a PCB board according to the embodiment of the present utility model.

The embodiment of the utility model provides a bonding pad structure, a PCB and electronic equipment, wherein the bonding pad structure is formed on the surface of the PCB, and comprises the following components: a first pad region, a second pad region, and a third pad region; the second bonding pad area and the third bonding pad area are connected with the internal circuit of the PCB; the first bonding pad area, the second bonding pad area and the third bonding pad area are respectively connected with an internal circuit of the PCB; the first bonding pad area and the second bonding pad area are used for welding operation of the electronic device to be welded of the narrow body package; the first pad area and the third pad area are used for the soldering operation of the electronic device to be soldered of the wide body package. According to the scheme provided by the utility model, the first bonding pad area is shared, and the second bonding pad area or the third bonding pad area is selected, so that the bonding pad structure can be compatible with wide-body packaging and narrow-body packaging, and material replacement can be performed during mass production; and the second bonding pad area and the third bonding pad area are arranged at intervals, so that the operation of packaging soldering tin is simpler and more convenient on the basis of not changing the bonding pad structure area, and the beneficial effect of improving the welding quality of electronic devices is achieved.

It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the utility model or to delineate the scope of the utility model. Other features of embodiments of the present utility model will become apparent from the description that follows.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present utility model and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of a narrow package of a memory chip according to an embodiment of the present utility model;

FIG. 2 is a schematic diagram of a package of a memory chip according to an embodiment of the present utility model;

FIG. 3 is a schematic diagram of a pad structure according to a prior art embodiment of the present utility model;

FIG. 4 is a schematic diagram of another prior art pad structure according to an embodiment of the present utility model;

FIG. 5 is a schematic diagram of a pad structure according to an embodiment of the present utility model;

FIG. 6 is a schematic diagram of another pad structure according to an embodiment of the present utility model;

FIG. 7 is a schematic diagram of a package contrast of a pad structure according to an embodiment of the present utility model;

fig. 8 is a schematic structural diagram of a PCB board according to an embodiment of the present utility model;

fig. 9 is a schematic structural diagram of an electronic device according to an embodiment of the present utility model;

Detailed Description

In order that those skilled in the art will better understand the present utility model, a technical solution in the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present utility model, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present utility model without making any inventive effort, shall fall within the scope of the present utility model.

The utility model is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the utility model and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present utility model are shown in the drawings.

The scheme provided by the embodiment is suitable for the soldering scene of pins of various types of electronic devices, so that the soldered electronic devices can be connected with circuits in a printed circuit board (Printed circuit board, PCB for short), and corresponding functions of the electronic devices are realized. It should be noted that, before soldering the electronic device to the PCB board, a circuit structure is disposed in the PCB board, and a corresponding line routing is implemented according to the circuit structure, and a pad area is disposed on the surface of the PCB board, so that the soldered electronic device is soldered to the surface of the PCB board corresponding to the pad area, thereby implementing a corresponding function of connecting the soldered electronic device with the line in the PCB board.

Preferably, the electronic device to be soldered in this embodiment may be a memory chip, taking GD25Q32E as an example, and this embodiment is described as follows:

referring to fig. 1 and fig. 2, fig. 1 is a schematic diagram of a narrow package of a memory chip according to an embodiment of the utility model; fig. 2 is a schematic diagram of a wide package of a memory chip according to an embodiment of the present utility model.

Specifically, referring to table 1, table 1 shows package sizes corresponding to a narrow package of a memory chip according to an embodiment of the present utility model.

Referring to table 2, table 2 shows package sizes corresponding to the wide package of the memory chip according to the embodiment of the utility model.

As can be seen from the comparison between table 1 and table 2, the narrow package and the wide package are only slightly different in width, and the other dimensions are compatible. Considering that both packages are used in large quantities in the market, in order to facilitate material replacement in mass production, in practical application, two modes are generally used to achieve compatibility between narrow-body package and wide-body package after the pad node is involved.

Mode one: referring to fig. 3, fig. 3 is a schematic design diagram of a pad structure according to a conventional scheme provided by an embodiment of the present utility model; in fig. 3, the pad structure is designed to extend on the basis of the original wide body structure, so that the electronic device packaged by the narrow body can be tinned. When the electronic device is packaged in a wide package, the electronic device is placed in a solid line frame in fig. 3 for soldering operation; when the electronic device is a narrow package, the electronic device is placed in a dashed box in fig. 3 and soldered.

The actual dimensions corresponding to tables 1 and 2 are described in such a way that, for a wide package, the width is e=7.9 mm, and then the original pad structure is designed to have a pitch of 7.9mm, and the pad width is 2*L about 2×0.5+0.85)/2=1.35 mm. Meanwhile, in order to be compatible with the narrow package mode, considering that the width of the narrow package is e=6mm, at least the bonding pad needs to be enlarged to 1.35mm+0.5 (7.9 mm-6 mm) =2.3 mm. I.e., the width of the pad structure needs to be increased from 1.35mm to 2.3mm.

In the first mode, after the pad structure is enlarged and lengthened, although the wide-body packaging and the narrow-body packaging of compatible electronic devices can be realized, the width of the pad structure is increased from 1.35mm to 2.3mm, so that the tin coating amount of the pad is increased, and tin overflow is easy to occur at the pin of a chip to cause short circuit; and because the area of the bonding pad is far larger than the area of the pin, the area of the bonding pad is increased, and the electronic device is easy to send drift and shift during the surface mounting, which is not beneficial to the welding of the electronic device.

Mode two: referring to fig. 4, fig. 4 is a schematic design diagram of a pad structure according to another prior art scheme according to an embodiment of the present utility model; in fig. 4, two types of pads are designed so as to be used for a narrow body package and a wide body package, respectively. When the electronic device is packaged in a wide package, the electronic device is placed in a solid line frame in fig. 4 for soldering operation; when the electronic device is a narrow package, the electronic device is placed in a dashed box in fig. 4 and soldered.

In the design of fig. 4, the pitch of the two rows of pads is 7.9mm and 6mm, the pad pitch is 1.35mm+1.35mm-2.3 mm=0.4 mm, and the pad width is 1.35mm-0.4 mm=0.95 mm, respectively, as illustrated by the actual dimensions corresponding to tables 1 and 2. I.e. the pad width is reduced from 1.35mm to 0.95mm, and the two rows of pads are spaced 0.4mm apart.

In the second mode, although the wide-body package and the narrow-body package compatible with the electronic device can be realized, the width of the bonding pads is reduced to 0.95mm from the original 1.35mm, and as the two package widths are not different, the space between the bonding pads in two rows is only 0.4mm, the space is small, the manufacturing difficulty of the PCB is high, and tin connection is easy to occur between the bonding pads during mounting.

In view of this, the present utility model provides a pad structure to improve the problems of the first and second modes on the basis of realizing a wide package and a narrow package of a compatible electronic device.

Referring to fig. 5, fig. 5 is a schematic design diagram of a pad structure according to an embodiment of the utility model. The pad structure 100 provided by the utility model is formed on the surface of a PCB. Specifically, the pad structure 100 includes: a first pad region 110, a second pad region 120, and a third pad region 130; the first pad region 110, the second pad region 120, and the third pad region 130 are connected to internal circuits of the PCB, respectively. The purpose of this is to solder the pad pins corresponding to the first pad area 110 and the second pad area 120 or the third pad area 130 in practical application, so that the soldered chip device realizes circuit connection.

In a specific embodiment, the second pad region 120 is added between the first pad region 110 and the third pad region 130. When the packaging mode of the electronic device to be soldered is narrow body packaging, packaging operation is performed based on the first bonding pad area 110 and the second bonding pad area 120; when the packaging mode of the electronic device to be soldered is a wide package, the packaging operation is performed based on the first pad region 110 and the third pad region 130. In the solution provided in this embodiment, the first pad area 110 is shared, so that the second pad area 120 and the third pad area 130 have enough space to be properly separated, and the design can improve the packaging quality because the space is larger when the soldering operation is performed, and the connection of tin is not caused. In addition, since the area of each single bonding pad is not increased, the problems of solder overflow and device displacement of the bonding pads are avoided.

The electronic device to be soldered may be a memory, a controller, a buck converter, etc., and the type of the electronic device to be soldered is not limited herein.

The utility model provides a bonding pad structure, which is formed on the surface of a PCB board and comprises: a first pad region, a second pad region, and a third pad region; the second bonding pad area and the third bonding pad area are connected with the internal circuit of the PCB; the first bonding pad area, the second bonding pad area and the third bonding pad area are respectively connected with an internal circuit of the PCB; the first bonding pad area and the second bonding pad area are used for welding operation of the electronic device to be welded of the narrow body package; the first pad area and the third pad area are used for the soldering operation of the electronic device to be soldered of the wide body package. According to the scheme provided by the utility model, the first bonding pad area is shared, and the second bonding pad area or the third bonding pad area is selected, so that the bonding pad structure can be compatible with wide-body packaging and narrow-body packaging, and material replacement can be performed during mass production; and the second bonding pad area and the third bonding pad area are arranged at intervals, so that the operation of packaging soldering tin is simpler and more convenient on the basis of not changing the bonding pad structure area, and the beneficial effect of improving the welding quality of electronic devices is achieved.

Fig. 6 is a schematic design diagram of another pad structure according to an embodiment of the present utility model, where the relationship between the present embodiment and the above embodiment further refines the corresponding features of the above embodiment.

As shown in fig. 6, the first pad region 110 includes a preset number of first pad sub-regions (e.g., 1,2,3,4 in fig. 6), the second pad region 120 includes a preset number of second pad sub-regions (e.g., 5,6,7,8 in fig. 6), and the third pad region 130 includes a preset number of third pad sub-regions (5 in fig. 6) ^， ,6 ^， ,7 ^， ,8 ^， ). Each first pad sub-region corresponds to each second pad sub-region and each third pad sub-region, respectively; each second pad sub-region is connected with each third pad sub-region one by one.

Preferably, the area of each first pad sub-region is equal to the area of each third pad sub-region; the area of each second pad sub-region is smaller than the area of the first pad sub-region. The advantage of this arrangement is that the second pad sub-region is used for packaging the electronic device packaged in a narrow body, so that the pad area can be correspondingly smaller, and the spacing between the second pad sub-region and the third pad sub-region can be increased on the basis of unchanged pad structure area, thereby facilitating soldering operation.

Preferably, the preset number is 4. The pad structure provided by the utility model is not limited by the preset number of 4, and correspondingly can also be 5, 8 or 14, and the like, specifically, the current package type can be SOP8, SOP10, SOP16 or SOP28, and the like according to the package types corresponding to the different pin numbers of the electronic devices, and the specific package type is not limited herein, and the actual pin number of the electronic elements is determined.

In the present embodiment, the package type of the electronic component is taken as SOP8 for illustration, and in the case of other package types, the area of the pad structure may be correspondingly increased based on SOP8, and the specific embodiment is the same as SOP8 and will not be illustrated here.

In one embodiment, the first pad region 110 is spaced apart from the third pad region 130 by a first predetermined distance (X in the drawing), the first predetermined distance being greater than or equal to the width of the wide-body packaged electronic device; the first pad region 110 is spaced apart from the second pad region 120 by a second predetermined distance that is greater than or equal to the width of the narrow body packaged electronic device. When the electronic device to be soldered is a chip in an SOP8 packaging form, the first preset distance is 7.9 millimeters;

in one embodiment, the second pad area 120 is spaced apart from the third pad area 130 by a distance greater than 0.4mm (Y in the illustration).

Referring to fig. 6 specifically, in the pad structure provided in this embodiment, on the basis of the wide package, a row of pads (5, 6,7, 8) is added between two rows of pads (1, 2,3,4 and 5', 6', 7', 8' in the drawing). When the soldered electronic device is a narrow package, performing a packaging operation based on 1,2,3,4, 5,6,7,8 pads; when the soldered electronic device is a narrow package, the packaging operation is performed based on 1,2,3,4, 5', 6', 7', 8' pads. Wherein the pads 5 and 5', 6 and 6', 7 and 7', 8 and 8' are connected using a thinner wire, and the area between the pads is covered with insulating ink.

In the solution provided in this embodiment, the pad sub-areas corresponding to the first pad area 110 are shared, so that the pads 5 and 5', 6 and 6', 7 and 7', 8 and 8' have enough spaces to be properly separated (Y in the drawing), and the design will not cause tin connection due to the larger space during the soldering operation. In addition, since the area of each single bonding pad is not increased, the problems of solder overflow and device displacement of the bonding pads are avoided.

Further, calculation of solder size and pitch was performed in combination with tables 1 and 2, with the pitch being the original 7.9mm for the 1,2,3,4, 5,6,7,8 pads, the pad size being 1.35mm, and with the 5', 6', 7', 8' pads, assuming the pad width is set to a and the pitch to B: a+b+1.35 mm=0.5×a+ (7.9 mm-6 mm) +0.5×1.35mm, i.e. 0.5×a+b=1.225 mm.

If the pad widths of 5', 6', 7', 8' are set to be a=1.35 mm, the pad pitch b=0.55 mm, which is only 0.4mm compared with the pad pitch of the second embodiment, and the pad pitch is designed to be 0.55mm on the basis of not increasing the pad area, which is easier to perform soldering operation than the second embodiment.

Furthermore, the pad structure provided in this embodiment is not limited by the pad pitch of 0.55mm, and the pad widths of 5', 6', 7', 8' can be reduced appropriately (without affecting the tin-plating condition of the component), for example, if a=1.05mm is set, the pad pitch b=0.7mm, and compared with 0.4mm in scheme 2, the tin connection between the pads and the PCB manufacturing difficulty can be improved to a great extent. The scheme provided by the embodiment realizes the balanced design of compatible package and pad spacing.

Specifically, referring to fig. 7, fig. 7 is a schematic diagram illustrating package comparison of a pad structure according to an embodiment of the utility model. Wherein, the bonding pad A and the bonding pad C are areas covered by the electronic device when the wide body packaging is carried out; when the narrow body packaging is carried out, the area covered by the electronic device in the scheme is a bonding pad A and a bonding pad B; the comparison scheme covers the pad B and the pad B', wherein the comparison scheme shown in fig. 6 is a scheme corresponding to the second mode in the above embodiment, and may correspond to fig. 4.

Since the overall width L1 of the electronic device footprint needs to be comparable to the size of the wide body package, L1 in the inventive and comparative schemes is equal. Similarly, the width L2 of the region covered by the electronic device in the narrow package is the same.

For the scheme of the utility model, l1=l2+l3+l4, l1=l2+l3×2+l4×2 in the comparison scheme, that is, the comparison scheme needs to insert one more L3 and one more L4 in the fixed width of L1, if the widths of the pads a and C are not required to be reduced (the contact area between the pads and the pins of the device needs to be ensured to be large enough, if the bonding area is too small, the bonding failure is caused), the gap between the pads can only be made small (such as 0.1mm in the comparison scheme), and the coverage of the insulating ink is unfavorable (such as increasing the process cost, and the adhesion is not enough to be easy to drop and easy to cause tin connection), while the gap between the pads can be larger than 0.4mm.

In the scheme of the utility model, on the other hand, the total area of the bonding pads is A.times.4+B.times.4+C.times.4, and the total area of the bonding pads in the comparison file is: the total area of the bonding pads in the comparison scheme is larger, and phenomena such as tin overflow and device displacement are easy to occur when soldering is performed when the area of the bonding pads is increased; on the other hand, the pad structure is equivalent to the exposed area of the surface of the PCB, and the larger the exposed area is, the smaller the area coated by the corresponding insulating ink is, and the greater the failure risk is.

According to the pad structure provided by the utility model, the first pad subareas are shared, and the second pad subareas and the third pad subareas are arranged in a mode that the interval distance between the second pad subareas and the third pad subareas is larger than 0.4mm, so that tin connection is not caused due to larger interval space when soldering operation is performed. In addition, since the area of each single bonding pad is not increased, the problems of solder overflow and device displacement of the bonding pads are avoided. On the basis of larger interval distance between the second bonding pad subregion and the third bonding pad subregion, the soldering operation is simpler and more convenient, and the beneficial effect of improving the packaging quality is achieved.

Referring to fig. 8, fig. 8 is a schematic structural diagram of a PCB board according to an embodiment of the present utility model. The PCB 200 provided in the embodiment of the present utility model includes the pad structure 100 provided in any embodiment of the present utility model.

The PCB board provided by the embodiment of the present utility model adopts all the technical solutions of all the embodiments of the above-mentioned pad structure, so that the PCB board at least has all the beneficial effects brought by the technical solutions of the above-mentioned embodiments, and will not be described in detail herein.

Referring to fig. 9, fig. 9 is a schematic structural diagram of an electronic device according to an embodiment of the utility model. The electronic device 300 provided by the embodiment of the utility model includes the PCB 200 provided by the embodiment of the utility model.

The electronic device provided by the embodiment of the utility model adopts all the technical schemes of all the embodiments of the PCB, so that the electronic device at least has all the beneficial effects brought by the technical schemes of the embodiments, and the detailed description is omitted.

The above embodiments do not limit the scope of the present utility model. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives can occur depending upon design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present utility model should be included in the scope of the present utility model.

Claims (9)

1. A pad structure formed on a surface of a PCB board, the pad structure comprising: a first pad region, a second pad region, and a third pad region; the first bonding pad area, the second bonding pad area and the third bonding pad area are respectively connected with an internal circuit of the PCB;

the first bonding pad area and the second bonding pad area are used for welding operation of the electronic device to be welded of the narrow body package; the first bonding pad area and the third bonding pad area are used for the welding operation of the electronic device to be welded of the wide body package.

2. The pad structure of claim 1, wherein the first pad region comprises a preset number of first pad sub-regions, the second pad region comprises a preset number of second pad sub-regions, and the third pad region comprises a preset number of third pad sub-regions;

each first pad sub-region corresponds to each second pad sub-region and each third pad sub-region;

each second pad subarea is connected with each third pad subarea one by one.

3. The pad structure of claim 2, wherein,

the area of each first pad subarea is equal to the area of each third pad subarea;

the area of each second pad sub-region is smaller than the area of the first pad sub-region.

4. The pad structure of claim 2, wherein the preset number is 4.

5. The pad structure of claim 1, wherein the first pad region is spaced from the third pad region by a first predetermined distance, the first predetermined distance being greater than or equal to a width of a wide-body packaged electronic device; the first bonding pad area and the second bonding pad area are separated by a second preset distance, and the second preset distance is larger than or equal to the width of the narrow-body packaged electronic device.

6. The bonding pad structure according to claim 5, wherein the electronic device to be soldered is a chip in the form of an SOP8 package, and the first predetermined distance is 7.9 mm.

7. The pad structure of claim 5, wherein the second pad region is spaced from the third pad region by a distance greater than 0.4 millimeters.

8. A PCB board comprising a pad structure according to any of claims 1-7.

9. An electronic device comprising the PCB of claim 8.