JP2007199181A - Electro-optical apparatus, electronic equipment, and method for manufacturing the electro-optical apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electro-optical apparatus capable of appropriately shielding light of respective regions, even when light-shielding layers are respectively formed in regions that are different in the layer configuration of the lower-layer side of an element substrate, and to provide an electronic equipment equipped with the electro-optical apparatus. <P>SOLUTION: The liquid crystal device 1 is formed with the first light-shielding layer 51 overlapping between pixels 2a and the second light-shielding layer 52 overlapping over the upper layer side, with respect to a thin-film transistor 1c on an element substrate 10. Also, on a counter substrate 20 is formed the third light-shielding layer 53 in a position lapping over the second light-shielding layer 52. In simultaneously forming the first light-shielding layer 51 and the second light-shielding layer 52 by a light-shieldable resin applied by a spin coating method, the film thickness of the light-shieldable resin is set, based on the optical thickness required for the second light-shielding layer 52. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

The present invention relates to an electro-optical device in which a light shielding layer is formed so as to overlap between pixel electrodes and a switching element, an electronic apparatus including the electro-optical device, and a method for manufacturing the electro-optical device.

In the active matrix type liquid crystal device (electro-optical device), as shown in FIGS. 12A and 12B, a thin film transistor 1c on the element substrate 10 holding the liquid crystal 1f between the thin film transistor 1f and the thin film transistor, as shown in FIGS. A pixel electrode 2a electrically connected to the source line 6a and the gate line 3a is formed through 1c, and is controlled from the source line 6a through the thin film transistor 1c under the control of the gate signal supplied from the gate line 3a. The orientation of the liquid crystal molecules is controlled for each pixel 1b by the image signal applied to the pixel electrode 2a. Note that a capacitor line 3b for forming a storage capacitor is in parallel with the gate line 3a.

In the liquid crystal device having such a configuration, when light leaks from between adjacent pixel electrodes 2a, the quality of the displayed image is degraded. Further, when light emitted from the backlight enters from the element substrate 10 side and then enters the thin film transistor 1c as stray light, or when external light incident from the counter substrate 20 side enters the thin film transistor 1c. The photocurrent causes an increase in off-leakage current, which causes a decrease in contrast and crosstalk.

Therefore, a structure in which a light shielding layer 53x called a black matrix is formed on the counter substrate 20 is widely adopted. Here, the light shielding layer 53x is formed in a region that overlaps between adjacent pixel electrodes 2a, and is also formed in a position that overlaps with the thin film transistor 1c.

However, when the light shielding layer 53x is formed on the counter substrate 20, in consideration of misalignment when the element substrate 10 and the counter substrate 20 are arranged to face each other, the interval between the adjacent pixel electrodes 2a and the formation region of the thin film transistor 1c are considered. Compared to the above, since it is necessary to form the light shielding layer 53x sufficiently wide, there is a problem that the pixel aperture ratio is lowered. Therefore, it has been proposed that the light shielding layer be formed on the element substrate (see, for example, Patent Documents 1 and 2).

Such a configuration is represented, for example, as shown in FIGS. 13A and 13B, and the element substrate 1
In 0, a light shielding layer 51x is formed between adjacent pixel electrodes 2a, and a light shielding layer 52x is formed in a region overlapping the thin film transistor 1c on the upper layer side of the thin film transistor 1c. In order to form such light shielding layers 51x and 52x, after the thin film transistor 1c and the passivation film 8 are formed on the element substrate 10, a light shielding resin is applied to the entire element substrate 10 by a spin coating method or the like. Then, the light shielding layers 51x and 52x made of a light shielding resin are formed simultaneously.
JP-A-9-105953 Japanese Patent Laid-Open No. 10-20298

However, when the light shielding layers 51x and 52x are formed of a light shielding resin on a substrate having a layer structure greatly different depending on the location such as the element substrate 10, the light shielding films 51x and 52x cannot be formed at an optimal optical density. The following problems occur.

For example, in the case of the configuration shown in FIGS. 13A and 13B, the gate electrode (gate line 3a), the semiconductor layer 7a, the lower layer side of the light shielding layer 52x formed in the region overlapping with the thin film transistor 1c,
While the source line 6a (or the drain electrode 6b) and the like are formed, the gate electrode (gate line 3a), the semiconductor layer 7a, the lower layer side of the light shielding layer 51x formed between the pixel electrodes 2a, Since only the source line 6a or the gate line 3a is formed among the source lines 6a (or the drain electrodes 6b), the light shielding layer 52x formed in the region overlapping with the thin film transistor 1c is interposed between the pixel electrodes 2a. The film thickness is reduced as compared with the formed light shielding layer 51x.

Therefore, if the film thickness of the light-shielding resin applied by the spin coat method or the like is set based on the light-shielding property (optical density) required for the thicker light-shielding film 51x, the light-shielding property of the light-shielding film 52x is insufficient. There is a problem of becoming. On the other hand, if the film thickness of the light-shielding resin applied by spin coating or the like is set based on the light-shielding property (optical density) required for the light-shielding film 52x having the smaller film thickness, the film thickness of the light-shielding layer 51x is as follows. It becomes quite thick and a large step is generated. As a result, even if the planarization film 9 is formed thick on the upper side of the light shielding layer 51x, the light shielding layer 51
The level difference caused by the film thickness of x is not absorbed by the planarizing film 9, causing a variation in the thickness of the liquid crystal layer 1f and a variation in rubbing, resulting in a new problem that the contrast is lowered.

In view of the above problems, an object of the present invention is to provide an electro-optical device capable of appropriately shielding each region even when a light shielding layer is formed in each of the regions having different layer configurations on the lower layer side in the element substrate, and An object of the present invention is to provide an electronic apparatus including the electro-optical device.

In order to solve the above problems, according to the present invention, an element substrate provided with switching elements and pixel electrodes corresponding to the intersections of a plurality of data lines and a plurality of scanning lines, and a counter substrate disposed opposite to the element substrate. In an electro-optical device having a substrate and a liquid crystal layer held between the counter substrate and the element substrate, the element substrate includes a first light-shielding resin film that overlaps between adjacent pixel electrodes. And a second light-shielding layer made of a light-shielding resin film that overlaps with the switching element on the upper side of the switching element is formed between the same layers, and the counter substrate includes the second light-shielding layer and the second light-shielding layer. An overlapping third light shielding layer is formed.

In the present invention, with respect to the element substrate, a first light shielding layer overlapping between adjacent pixel electrodes,
Since the second light-shielding layer that overlaps the switching element is formed on the upper layer side of the switching element, even if a slight misalignment occurs when the element substrate and the counter substrate are arranged to face each other, the pixel electrode The space and the formation region of the switching element can be covered with a light shielding layer.
Therefore, since it is not necessary to form the light shielding layer wide, a high pixel aperture ratio can be ensured. Further, when forming the first light-shielding layer and the second light-shielding layer while partially leaving the light-shielding resin applied to the entire element substrate by a spin coating method or the like, the film thickness of the light-shielding resin is the same as the formation of the switching element. The region tends to be thinner than between the pixel electrodes due to the influence of the layer structure on the lower layer side, and the optical density may be too low in the second light shielding layer. Since the third light-shielding layer is formed in the overlapping region, as a whole, the light shielding with respect to the switching element can be reliably performed. Therefore, the thickness when the light-shielding resin is applied to the element substrate can be made as thin as possible within the range satisfying the optical density required for the first light-shielding layer. Even when the layer is formed, a large step is not generated on the upper layer side.

The present invention is effective when applied to a case where the thickness of the second light shielding layer in the thinnest portion is thinner than the thickness of the first light shielding layer in the thinnest portion. That is, when forming the first light-shielding layer and the second light-shielding layer, if a light-shielding resin is applied to the element substrate by a spin coating method, the film thickness at the thinnest portion of the second light-shielding layer is as follows. In one light-shielding layer, the thickness tends to be thinner than that in the thinnest portion. Even in such a case, according to the present invention, the switching element can be reliably shielded from light.

In the present invention, it is preferable that the first light shielding layer and the second light shielding layer are formed of the same resin material.

In the present invention, the first light-shielding layer and the second light-shielding layer may each be formed of resin materials having different optical densities at the same thickness.

In the present invention, the first light shielding layer is configured to have an optical density of 3.0 or more, for example. With this configuration, only the first light shielding property formed on the element substrate is sufficient for light shielding between the pixel electrodes.

In the present invention, the switching element may be a thin film transistor.

The present invention is particularly effective when applied to a configuration in which the thin film transistor includes an active layer made of an amorphous silicon film and a gate electrode formed on the lower layer side of the active layer. In the case of such a bottom gate thin film transistor, there are advantages such as fewer manufacturing processes. On the other hand, unlike a top gate thin film transistor, the gate electrode has a structure in which the source electrode and the drain electrode partially overlap with each other. Therefore, when the first light-shielding layer and the second light-shielding layer are formed, when the light-shielding resin is applied to the element substrate by a spin coating method, the thin-film transistor formation region is formed. The light shielding resin tends to be thin. Even in such a case, if the present invention is applied, the light shielding by the second light shielding layer is compensated by the third light shielding layer, so that the switching element can be reliably shielded from light.

In the present invention, the second light shielding layer and the third light shielding layer may have the same dimension in at least one of the direction in which the scanning lines extend and the direction in which the data lines extend. preferable. Thus, when the formation area of the third light shielding layer is narrowed, a high pixel aperture ratio can be secured.

In the present invention, the third light shielding layer and the semiconductor layer constituting the active layer in the thin film transistor have a dimension in at least one of a direction in which the scanning line extends and a direction in which the data line extends. It is preferable that they are the same. Thus, when the formation area of the third light shielding layer is narrowed, a high pixel aperture ratio can be secured.

The electro-optical device according to the invention is used in an electronic apparatus such as a mobile computer or a mobile phone.

In the present invention, an element substrate provided with switching elements and pixel electrodes so as to correspond to intersections of a plurality of data lines and a plurality of scanning lines, a counter substrate disposed opposite to the element substrate, the counter substrate, In an electro-optical device manufacturing method having a liquid crystal layer held between the element substrate and at least one of the data line and the scanning line and the switching element are formed on the element substrate The first light-shielding layer that overlaps between the adjacent pixel electrodes and the second light-shielding layer that overlaps the switching element on the upper side of the switching element are formed simultaneously or continuously on the element substrate. An element substrate-side light shielding layer forming step, an opposing substrate-side light shielding layer forming step of forming a third light shielding layer at a position overlapping the second light shielding layer with respect to the counter substrate, and the element base And the counter substrate are bonded to each other at a predetermined interval. In the element substrate side light shielding layer forming step, a light shielding resin is applied to the upper layer side of the wiring and the switching element by a spin coating method. After coating, the first light shielding layer and the second light shielding layer are formed by partially leaving the light shielding resin.

In the present invention, in the element substrate side light shielding layer forming step, it is preferable that the first light shielding layer and the second light shielding layer are simultaneously formed.

In the present invention, the thickness of the light-shielding resin applied in the element substrate-side light-shielding layer forming step,
It is preferable to set the optical density required for the first light shielding layer.

Hereinafter, an electro-optical device to which the invention is applied and an electronic apparatus including the electro-optical device will be described with reference to the drawings. Each drawing used in the following description has a different scale for each layer and each member so that each layer and each member can be recognized on the drawing.

[Embodiment 1]
(Overall configuration of liquid crystal device)
1 (a) and 1 (b) are plan views of a crystal device (electro-optical device) to which the present invention is applied, as viewed from the side of the counter substrate, together with the components formed thereon, and H- It is sectional drawing which shows typically a mode that it cut | disconnected along H 'line.

1A and 1B, the liquid crystal device 1 of the present embodiment is a TN (Twisted Nem).
atic) mode, ECB (Electrically Controlled Bir)
efficiency) mode, or VAN (Vertical Aligned)
This is a transmissive active matrix liquid crystal device in a (Nematic) mode, in which the element substrate 10 and the counter substrate 20 are bonded to each other through a sealing material 22, and the liquid crystal 1f is held therebetween. In the element substrate 10, the signal line driving IC 60 and the scanning line driving IC 30 are mounted in the end region located outside the sealing material 22, and the mounting terminals 12 are formed along the substrate side. Yes. The sealing material 22 is an adhesive made of a photo-curing resin or a thermosetting resin for bonding the element substrate 10 and the counter substrate 20 around them, and is a glass for setting the distance between the substrates to a predetermined value. Gap materials such as fiber or glass beads are blended. The sealing material 22 has a liquid crystal injection port 25 due to the discontinuity.
After the liquid crystal 1f is injected, it is sealed with a sealing material 26. Here, although the phase difference plate and the deflection plate are arranged on the element substrate 10 side and the counter substrate 20 side with respect to the liquid crystal device 1, they are not directly related to the present invention. Is omitted.

On the element substrate 10, thin film transistors 1c and pixel electrodes 2a as switching elements are formed in a matrix, and an alignment film 19 is formed on the surface thereof. On the other hand, on the counter substrate 20, a frame 24 (not shown in FIG. 1B) made of a light-shielding material is formed in the inner region of the sealing material 22, and the inner side becomes the image display region 1a. Yes. The element substrate 1
As will be described in detail later, the light-shielding layer (not shown in FIG. 1) is referred to as a black matrix on the area facing the vertical and horizontal boundary areas of each pixel and the area facing the thin film transistor 1c. ) Is formed. The counter substrate 20 includes a counter electrode 2.
8 and the alignment film 29 are formed. Further, although not shown in FIG. 1, red (R), green (G), blue ( B)
The color filter is formed together with its protective film, etc., so that the liquid crystal device 1 can be used as a color display device for electronic devices such as mobile computers, mobile phones, and liquid crystal televisions.

(Configuration of element substrate 10)
FIG. 2 is an explanatory diagram showing an electrical configuration of the element substrate of the liquid crystal device shown in FIG. As shown in FIG. 2, the element substrate 10 includes a plurality of source lines 6a (in a region corresponding to the image display region 1a.
A data line) and a plurality of gate lines 3a (scanning lines) are formed so as to intersect each other, and a pixel 1b (pixel region) is formed at a position corresponding to the intersection of these wirings. The gate line 3 a extends from the scanning line driving IC 30, and the source line 6 a extends from the signal line driving IC 60. Further, on the element substrate 10, a pixel switching thin film transistor 1c for controlling the driving of the liquid crystal 1f is formed in each pixel 1b. A source line 6a is electrically connected to a source of the thin film transistor 1c. A gate line 3a is electrically connected to the gate.

Furthermore, the capacitor substrate 3b is formed in the element substrate 10 in parallel with the gate line 3a. In this embodiment, the liquid crystal capacitor 1 formed between the thin film transistor 1 c and the counter substrate 20.
g is connected in series, and a holding capacitor 1h is connected in parallel to the liquid crystal capacitor 1g. Here, the capacitor line 3b is connected to the scanning line driving IC 30, but is held at a constant potential.

In the liquid crystal device 1 configured as described above, the thin film transistor 1c is turned on for a certain period of time so that an image signal supplied from the source line 6a is supplied to the liquid crystal capacitance 1g of each pixel 1b.
Is written at a predetermined timing. The image signal of a predetermined level written in the liquid crystal capacitor 1g in this way is held in the liquid crystal capacitor 1g for a certain period, and the hold capacitor 1h prevents the image signal held in the liquid crystal capacitor 1g from leaking. ing.

(Configuration of each pixel)
FIG. 3 is a plan view showing one pixel of the element substrate according to Embodiment 1 of the present invention, omitting the illustration of the light shielding layer. 4 is a cross-sectional view of the liquid crystal device according to Embodiment 1 of the present invention taken along the line ABC in FIG. In FIG. 3, scanning lines and capacitor lines are indicated by solid lines, data lines and drain electrodes are indicated by alternate long and short dashed lines, pixel electrodes are indicated by long dotted lines, and semiconductor films are indicated by short dotted lines.

As shown in FIG. 3, in the element substrate 10, a region surrounded by the gate line 3a and the source line 6a is configured as a pixel 1b, and the gate line 3a and the source line 6a are located between adjacent pixel electrodes 2a (adjacent to each other). It extends along the boundary region of the pixel 2b. The pixel 1b includes a semiconductor layer 7 made of an amorphous silicon film that constitutes an active layer of a bottom-gate thin film transistor 1c.
a is formed. In the semiconductor layer 7a, a source line 6a overlaps with a source side end portion as a source electrode, and a drain electrode 6b overlaps with a drain side end portion. A gate electrode is formed by a part of the gate line 3a, and a capacitor line 3b is formed in parallel with the gate line 3a.

Further, in the pixel 1b, a storage capacitor 1h is formed in which a part of the capacitor line 3b is a lower electrode 3c and a part extending from the drain electrode 6b is an upper electrode 6c. Further, the pixel electrode 2a made of an ITO film is electrically connected to the upper electrode 6c through contact holes 81 and 91.

An A-B-C cross section of the element substrate 10 configured as described above is expressed as shown in FIG. First, a gate line 3a (gate electrode) and a capacitor line 3b made of an aluminum film or a tantalum film are formed on a light-transmitting insulating substrate 11 made of a glass substrate or a quartz substrate. The lower electrode 3c of the storage capacitor 1h is formed by a part. A gate insulating layer 4 made of a silicon oxide film or a silicon nitride film is formed on the upper side of the gate line 3a so as to cover the gate line 3a. A semiconductor layer 7a made of amorphous silicon constituting an active layer of the thin film transistor 1c is formed on the upper side of the gate line 3a in the surface of the gate insulating layer 4. Of the semiconductor layer 7a, an ohmic contact layer 7b made of a doped silicon film and a source line 6a made of an aluminum film or a chromium film are formed in the upper layer of the source region, and doped silicon is formed in the upper layer of the drain region. Ohmic contact layer 7c made of a film, and drain electrode 6b made of an aluminum film, a chromium film, or the like
Is formed to form a thin film transistor 1c. Further, the upper electrode 6c of the storage capacitor 1h made of an aluminum film, a chromium film, or the like is formed by the extended portion of the drain electrode 6b. A passivation film 8 made of a silicon oxide film or a silicon nitride film is formed on the upper side of the thin film transistor 1c and the storage capacitor 1h.

As will be described in detail later, a first light shielding film 51 is formed between adjacent pixel electrodes 2a on the upper layer side of the passivation film 8, and a second light shielding layer 5 is formed on the upper layer side of the thin film transistor 1c.
2 is formed. A planarizing film 9 made of a photosensitive resin layer is formed on the light shielding layers 51 and 52 and the passivation film 8. The passivation film 8 and the planarizing film 9 also function as an interlayer insulating film. Have both. The pixel electrode 2 a formed on the surface of the planarizing film 9 is electrically connected to the upper electrode 6 c via the contact hole 91 formed in the planarizing film 9 and the contact hole 81 formed in the passivation film 8. The upper electrode 6c and the drain electrode 6b are electrically connected to the drain region of the thin film transistor 1c. An alignment film 19 is formed on the surface of the pixel electrode 2a.

3 and 4 has a structure in which the end of the pixel electrode 2a does not overlap the source line 6a and the gate line 3a. However, the end of the pixel electrode 2a is not connected to the source line 6a and the gate line 3a. A structure that overlaps at least one of the gate lines 3a may be employed. The present invention can be applied even when such a structure is adopted.

The counter substrate 20 is disposed so as to face the element substrate 10 configured as described above, and the liquid crystal layer 1 f is held between the element substrate 10 and the counter substrate 20. On the counter substrate 20, color filters 27 corresponding to red (R), blue (B), and green (G), a counter electrode 28, and an alignment film 29 are formed, and between the pixel electrode 2 a and the counter electrode 28. Further, the liquid crystal capacitor 1g shown in FIG. As will be described in detail later on the counter substrate 20, a third light-shielding layer 53 is formed in a region facing the second light-shielding layer 52 on the lower layer side of the color filter 27.

Note that a flattening film for flattening a step caused by the color filter 27 and the third light shielding layer 53 may be formed on the counter substrate 20, and the pixels 2 b corresponding to different colors may be formed.
Then, the end portions of the color filter 27 may be partially overlapped. The present invention can be applied even when such a structure is adopted.

(Configuration of light shielding layer)
FIG. 5 is an explanatory diagram showing a planar arrangement of the light shielding layers formed in each pixel of the liquid crystal device according to Embodiment 1 of the present invention. 5, as in FIG. 3, the scanning lines and the capacitor lines are indicated by solid lines, the data lines and the drain electrodes are indicated by alternate long and short dashed lines, the pixel electrodes are indicated by long dotted lines, and the semiconductor films are indicated by short dotted lines. It is shown. In FIG.
The first light-shielding layer and the second light-shielding layer forming region with respect to the element substrate are given a right-up oblique line, and the third light-shielding layer forming region with respect to the counter substrate is given a right-down oblique line. is there.

As shown in FIGS. 4 and 5, in the liquid crystal device 1 of the present embodiment, first, with respect to the element substrate 10, a light shielding property is provided in a region overlapping with the adjacent pixel electrodes 2 a in the upper layer of the passivation film 8. A first light shielding layer 51 made of resin is formed, and the first light shielding layer 51 completely covers the source line 6a and the gate line 3a. Further, the first light shielding layer 51 includes the pixel electrode 2.
It also overlaps with the end of a.

In the present embodiment, the second light-shielding layer 52 made of a light-shielding resin is formed on the element substrate 10 in a region of the upper layer of the passivation film 8 that overlaps the formation region of the thin-film transistor 1c. The second light shielding layer 52 completely covers the semiconductor layer 7a made of an amorphous silicon film. The second light shielding layer 52 covers the entire portion of the source line 6a that functions as the source electrode, and the contact hole 8 in the drain electrode 6b.
1 and 91 are covered.

Here, both the first light shielding layer 51 and the second light shielding layer 52 are integrally formed on the upper layer of the passivation film 8, that is, between the same layers, and a thin film transistor between adjacent pixel electrodes 2a. A portion formed in a region other than the region 1c (the semiconductor layer 7a, the source electrode and the drain electrode 6b) is referred to as a first light shielding layer 51. A region overlapping with a region where the thin film transistor 1c is formed (semiconductor layer 7a, source electrode and drain electrode 6b) is referred to as a second light shielding layer 52.

Furthermore, in this embodiment, a third light shielding layer 53 made of a light shielding resin or a light shielding metal is formed on the counter substrate 20 in a region overlapping with the second light shielding layer 52 formed on the element substrate 10. Yes. Here, the third light-shielding layer 53 has a larger area than the second light-shielding layer 52 and completely covers the formation region (semiconductor layer 7a, source electrode and drain electrode 6b) of the thin-film transistor 1c. . For example, the third light shielding layer 53 extends 2 to 5 μm beyond the outer peripheral edge of the second light shielding layer 52.

In the liquid crystal device 1 configured as described above, the first light-shielding layer 51 and the second light-shielding layer 52 formed on the element substrate 10 are formed on the passivation film 8 and then spin-coated thereon, as will be described later. Are formed simultaneously by exposing and developing the light-shielding resin applied by the above method, and are made of the same light-shielding resin material. Here, the thickness of the light shielding resin applied by the spin coating method is set based on the light shielding property (optical density) required for the first light shielding layer 51.

In the element substrate 10 thus configured, only the gate insulating layer 4, the source line 6a (or the gate line 3a), and the passivation film 8 are formed on the lower layer side of the first light shielding layer 51. The gate electrode (gate line 3a) is provided on the lower layer side of the second light shielding layer 52.
, Gate insulating layer 4, semiconductor layer 7a, contact layers 7b and 7c, source electrode (source line 6a
), A drain electrode 6b, and a passivation film 8 are formed. For this reason, at the time when the formation of the passivation film 8 is completed, the formation region of the thin film transistor 1c is located higher than the region corresponding to the space between the pixel electrodes 2a. Therefore, when the light shielding resin is applied on the passivation film 8 by spin coating, the light shielding resin is thinly applied in the formation region of the thin film transistor 1c, and the light shielding resin is thickly applied between the pixel electrodes 2a. Therefore, when the first light-shielding layer 51 and the second light-shielding layer 52 are compared at the thinnest portions, the second light-shielding layer 52 is thinner than the first light-shielding layer 51. For example, the thickness of the first light shielding layer 51 is about 1100 to 1500 nm at the thinnest portion, whereas the thickness of the second light shielding layer 52 is about 700 nm at the thinnest portion.

(Manufacturing method of the liquid crystal device 1)
Next, a method for manufacturing the liquid crystal device 1 will be described with reference to FIGS. 4, 5, and 6 (a) to 6 (c). The following steps are performed in the state of a large original substrate that can take a large number of element substrates 20 and counter substrates 30, but in the following description, the single substrate size and the large original substrate are not distinguished, and the element substrate 10 Also referred to as counter substrate 20.

6A to 6C are cross-sectional views of a process of forming the first light shielding layer 51 and the second light shielding layer 52 on the element substrate 10 in the manufacturing process of the liquid crystal device 1 of the present embodiment. Yes, as in FIG.
This corresponds to an A-B-C cross section in FIG. In manufacturing the liquid crystal device 1 of this embodiment, the steps until the thin film transistor 1c and the passivation film 8 are formed on the element substrate 10 are substantially the same as those in the prior art, and will be briefly described with reference to FIG. . First, after forming a metal film such as an aluminum film or a tantalum film having a thickness of, for example, 130 nm on the surface of an insulating substrate 11 such as a large glass substrate or a quartz substrate, the metal film is patterned using a photolithography technique, and a gate is formed. A line 3a (gate electrode), a capacitor line 3b, and a lower electrode 3c are formed. Next, the gate insulating layer 4 made of a silicon nitride film having a thickness of, for example, 400 nm is formed by plasma CVD. Next, a semiconductor film made of an intrinsic amorphous silicon film having a thickness of, for example, 300 nm and an ohmic contact layer made of, for example, an n-type silicon film having a thickness of, for example, 50 nm are sequentially formed by plasma CVD, and then photolithography technology Then, the ohmic contact layer and the semiconductor layer 7a are formed at the same time. Next, after forming a metal film such as an aluminum film or a chromium film having a thickness of, for example, 130 nm, the metal film is patterned using a photolithography technique, and the source line 6a and the drain electrode 6 are patterned.
b and the upper electrode 6c are formed. Next, using the source line 6a and the drain electrode 6b as a mask, the ohmic contact layer between the source line 6a and the drain electrode 6b is removed by etching to separate the source and the drain. As a result, the ohmic contact layer is removed from the region where the source line 6a and the drain electrode 6b are not formed, and ohmic contact layers 7b and 7c are formed. At that time, a part of the surface of the semiconductor layer 7a is etched. In this way, a bottom gate type pixel switching thin film transistor 1c and a storage capacitor 1h are formed. Next, a passivation film 8 made of a silicon nitride film having a thickness of, for example, 200 nm is formed by plasma CVD.

Next, an element substrate side light shielding layer forming step for simultaneously forming the first light shielding layer 51 and the second light shielding layer 52 on the element substrate 10 is performed. For this purpose, first, as shown in FIG. 6B, a photosensitive light-shielding resin 50 is applied to the entire element substrate 10 by spin coating on the upper layer side of the passivation film 8. At this time, the film thickness of the light shielding resin 50 is set according to the optical density per unit thickness of the light shielding resin 50 and the light shielding property (optical density) required for the first light shielding layer 51. In this embodiment, the thickness of the light shielding resin 50 is set so that the thickness of the first light shielding layer 51 is about 1100 to 1500 nm.

Next, the light shielding resin 50 is exposed and developed to form the first light shielding layer 51 and the second light shielding layer 52 simultaneously as shown in FIGS. 5 and 6C.

Since the subsequent steps are substantially the same as those in the prior art, they will be briefly described with reference to FIG. First,
After applying a photosensitive translucent resin by spin coating, exposure and development are performed to form the planarizing film 9 having the contact holes 91. Next, the passivation film 8 is etched using a photolithography technique to form a contact hole 81 at a position overlapping the contact hole 91. Next, an ITO film having a thickness of, for example, 50 nm is formed by sputtering.
After the film is formed, patterning is performed using a photolithography technique to form the pixel electrode 2a. Next, after a polyimide film for forming the alignment film 19 is formed, a rubbing process is performed.

On the other hand, since the manufacturing method of the counter substrate 20 is substantially the same as the conventional method, it will be briefly described with reference to FIG. First, a counter substrate-side light shielding layer forming step for forming the third light shielding layer 53 at a position overlapping the second light shielding layer 52 of the element substrate 10 is performed on the large counter substrate 20. Here, when the third light-shielding layer 53 is formed of a light-shielding resin, the photosensitive light-shielding resin is applied to the entire counter substrate 20 by spin coating, and then exposed and developed to provide a third light-shielding resin. Layer 53 is formed. On the other hand, in the case where the third light shielding layer 53 is formed of a light shielding metal film such as chromium, the light shielding metal film is formed by a sputtering method and then patterned by using a photolithography technique. A light shielding layer 53 is formed. Note that the third light shielding layer 53 may be formed by overlapping a plurality of color filters in the color filter forming step to be performed next. When such a configuration is adopted, the number of manufacturing steps is reduced. Can be achieved.

Next, the RGB color filter 27 is sequentially formed on the photosensitive resin of each color on the upper side of the third light shielding layer 53. Next, after forming an ITO film by a sputtering method, patterning is performed using a photolithography technique to form the counter electrode 28. Next, after a polyimide film for forming the alignment film 29 is formed, a rubbing process is performed.

The large element substrate 10 and the counter substrate 20 formed in this manner are bonded together with the sealing material 22 in the bonding step, and then cut into a predetermined size. As a result, the liquid crystal injection port 25 is opened. After the liquid crystal 1 f is injected from the liquid crystal injection port 25 between the element substrate 10 and the counter substrate 20, the liquid crystal injection port 25 is sealed with the sealing material 26.

(Main effects of this form)
In the liquid crystal device 1 configured as described above, a backlight is disposed on the element substrate 10 side, and light emitted from the backlight is light-modulated for each pixel and emitted from the counter substrate 20 side. Is displayed. At that time, since the first light shielding layer 51 is formed in the element substrate 10 in a region overlapping with the pixel electrodes 2a, light does not leak from between the pixel electrodes 2a.
In addition, since the second light shielding layer 52 is formed on the element substrate 10 in a region overlapping with the formation region of the thin film transistor 1c, stray light or external light incident from the backlight is prevented from entering the thin film transistor 1c. it can. Therefore, an increase in off-leakage current due to the photocurrent can be prevented, and the liquid crystal device 1 of the present embodiment does not cause a decrease in contrast or crosstalk. As described above, in the present embodiment, the first light shielding layer 51 that overlaps between the adjacent pixel electrodes 2a with respect to the element substrate 10, and the thin film transistor 1c on the upper layer side of the thin film transistor 1c.
The second light-shielding layer 52 that overlaps with the element substrate 10 is formed, so that even if a slight misalignment occurs when the element substrate 10 and the counter substrate 20 are arranged to face each other, the formation region of the pixel electrode 2a and the thin film transistor 1c is reduced. The light shielding layers 51 and 52 can be reliably covered. Therefore, the light shielding layer 51
, 52 need not be formed wide, so that a high pixel aperture ratio can be ensured.

Here, although the second light shielding layer 52 is thinner than the first light shielding layer 51,
The thickness of the light-shielding resin 50 applied to the element substrate 10 by spin coating to form the first light-shielding layer 51 and the second light-shielding layer 52 is the light-shielding property (optical) required for the first light-shielding layer 51. Density) is set as a reference, and the light shielding property (optical density) required for the second light shielding layer 52 is not considered. For example, the thickness of the light shielding resin 50 applied to the element substrate 10 by the spin coating method is set so that the optical density of the first light shielding layer 51 is 3.0 or more. The optical density required for 52 is not taken into consideration. Therefore, the second light shielding layer 52 alone cannot surely prevent stray light or external light incident from the backlight from entering the thin film transistor 1c. A third light shielding layer 53 is formed in a region overlapping with the light shielding layer 52. Therefore, as a whole, light shielding can be reliably performed on the thin film transistor 1c. Therefore, according to the present embodiment, the thickness when the light-shielding resin is applied to the element substrate 10 can be made as thin as possible within the range satisfying the optical density required for the first light-shielding layer 51. Therefore, even when the light shielding layers 51 and 52 are formed on the element substrate 10 side, a large step is not generated on the upper layer side of the planarizing film 9. Therefore, variations in the thickness of the liquid crystal layer 1f and variations in rubbing do not occur, so that contrast and the like can be improved.

Further, in this embodiment, the thin film transistor 1c having a bottom gate structure in which the semiconductor layer 7a is made of an amorphous silicon film and has a gate electrode (gate line 3a) on the lower layer side of the active layer.
Since the present invention is applied, there are advantages such as fewer manufacturing steps. Further, unlike the thin film transistor of the top gate structure, the bottom gate thin film transistor 1c has a structure in which the source line 6a and the drain electrode 6b partially overlap with the gate line 3a. When the first light-shielding layer 51 and the second light-shielding layer 52 are formed, the light-shielding resin 50 is applied to the element substrate 10 by a spin coating method when the first light-shielding layer 51 and the second light-shielding layer 52 are formed. The resin 50 tends to be thin. Even in such a case, according to the present embodiment, since the third light shielding layer 53 supplements the light shielding by the second light shielding layer 51, the light shielding can be reliably performed on the thin film transistor 1c.

[Embodiment 2]
FIG. 7 is a cross-sectional view of the liquid crystal device according to Embodiment 2 of the present invention cut at a position corresponding to line ABC in FIG. FIG. 8 is an explanatory diagram showing a planar arrangement of the light shielding layers formed in each pixel of the liquid crystal device according to Embodiment 2 of the present invention. Also in FIG. 8, as in FIGS. 3 and 5, the scanning lines and the capacitor lines are indicated by solid lines, the data lines and the drain electrodes are indicated by alternate long and short dashed lines, the pixel electrodes are indicated by long dotted lines, and the semiconductor films are indicated by short dotted lines. It is shown by. In FIG. 8, the first light-shielding layer and the second light-shielding layer forming area with respect to the element substrate are hatched with a right upward slant, and the third light-shielding layer forming area with respect to the counter substrate is slanted to the right. The diagonal line is attached. Since the basic configuration of this embodiment is the same as that of the first embodiment, common portions are denoted by the same reference numerals and description thereof is omitted.

As shown in FIGS. 7 and 8, also in the liquid crystal device 1 of the present embodiment, the first light-shielding layer 51 made of a light-shielding resin is provided on the element substrate 10 in a region overlapping between adjacent pixel electrodes 2a. The first light shielding layer 51 is formed so as to completely cover the source line 6a and the gate line 3a. The first light shielding layer 51 also overlaps with the end portion of the pixel electrode 2a. For the element substrate 10, a second light-shielding layer 52 made of a light-shielding resin is also formed in a region overlapping with a region where the thin film transistor 1c is formed, and the second light-shielding layer 52 is a semiconductor made of an amorphous silicon film. It completely covers layer 7a. However, the second light-shielding layer 52 has a smaller formation area than that of the first embodiment, and a portion of the source line 6a that functions as a source electrode and a portion of the drain electrode 6b that overlaps with the semiconductor layer 7a are formed. It is the extent that it covers a little wider.

For the counter substrate 20, a third light shielding layer 53 made of a light shielding resin or a light shielding metal is formed in a region overlapping the second light shielding layer 52 formed on the element substrate 10. Here, the third light-shielding layer 53 has a smaller formation area than that of the first embodiment, and the third light-shielding layer 53 has a dimension in the extending direction of the second light-shielding layer 52 and the source line 6a. It is almost the same. Since the other configuration is the first embodiment, description thereof is omitted.

Even in such a configuration, the first light shielding layer 51 is formed on the element substrate 10 in a region overlapping with the pixel electrodes 2a, so that light does not leak between the pixel electrodes 2a. Also,
Since the second light-shielding layer 52 is formed on the element substrate 10 in a region overlapping with the formation region of the thin film transistor 1c, stray light or external light incident from the backlight is transmitted to the thin film transistor 1c.
Can be prevented. In addition, since the third light-shielding layer 53 is formed in a region overlapping the second light-shielding layer 52 in the counter substrate 20, the thin film transistor 1c as a whole even when the second light-shielding layer 52 is thin. Can be reliably shielded against light. Therefore, according to the present embodiment, the thickness when the light-shielding resin is applied to the element substrate 10 can be made as thin as possible within the range satisfying the optical density required for the first light-shielding layer 51. . Therefore, even when the light shielding layers 51 and 52 are formed on the element substrate 10 side, a large step is not generated on the upper layer side of the planarizing film 9, so that the liquid crystal layer 1f has a variation in thickness or rubbing. Therefore, the same effects as those of the first embodiment can be obtained. For example, the contrast can be improved.

In the present embodiment, since the third light shielding layer 53 has a smaller formation area than that of the first embodiment, even if an alignment error occurs when the element substrate 10 and the counter substrate 20 are bonded together, The rate does not decrease. Here, the third light shielding layer 53 has a smaller formation area than that of the first embodiment, but at least the second light shielding layer 52 is formed in the element substrate 10 in a region overlapping with the formation region of the thin film transistor 1c. Therefore, even when an alignment shift occurs when the element substrate 10 and the counter substrate 20 are bonded together, stray light or external light incident from the backlight can be prevented from entering the thin film transistor 1c with a strong light amount.

In this embodiment, the second light-shielding layer 52 and the third light-shielding layer 53 have substantially the same dimension in the direction in which the source line 6a extends, but the dimension in the direction in which the gate line 3a extends. Substantially the same configuration, or a configuration in which dimensions in the direction in which the source line 6a extends and the direction in which the gate line 3a extends may be substantially the same.

[Embodiment 3]
FIG. 9 is a cross-sectional view of the liquid crystal device according to Embodiment 3 of the present invention cut at a position corresponding to the line ABC in FIG. FIG. 10 is an explanatory diagram showing a planar arrangement of the light shielding layers formed in each pixel of the liquid crystal device according to Embodiment 2 of the present invention. Also in FIG. 10, as in FIGS. 3 and 5, the scanning line and the capacitor line are indicated by solid lines, the data line and the drain electrode are indicated by alternate long and short dashed lines, the pixel electrode is indicated by a long dotted line, and the semiconductor film is indicated by a short dotted line. It is shown by. In FIG. 10, the first light-shielding layer and the second light-shielding layer forming region with respect to the element substrate are hatched with a right upward slant, and the third light-shielding layer forming region with respect to the counter substrate is slanted to the right. The diagonal line is attached. Since the basic configuration of this embodiment is the same as that of Embodiments 1 and 2, common portions are denoted by the same reference numerals and description thereof is omitted.

As shown in FIGS. 9 and 10, also in the liquid crystal device of the present embodiment, the first light shielding layer 51 made of a light shielding resin is formed on the element substrate 10 in a region overlapping between adjacent pixel electrodes 2a. The first light shielding layer 51 completely covers the source line 6a and the gate line 3a. The first light shielding layer 51 also overlaps with the end portion of the pixel electrode 2a. For the element substrate 10, a second light-shielding layer 52 made of a light-shielding resin is also formed in a region overlapping with a region where the thin film transistor 1c is formed, and the second light-shielding layer 52 is a semiconductor made of an amorphous silicon film. It completely covers layer 7a. However, the second light-shielding layer 52 has a smaller formation area than that of the first embodiment, and a portion of the source line 6a that functions as a source electrode and a portion of the drain electrode 6b that overlaps with the semiconductor layer 7a are formed. It is the extent that it covers a little wider.

For the counter substrate 20, a third light shielding layer 53 made of a light shielding resin or a light shielding metal is formed in a region overlapping the second light shielding layer 52 formed on the element substrate 10. Here, the third light shielding layer 53 has a smaller formation area than the first and second embodiments, and the third light shielding layer 5.
3 has substantially the same dimension in the extending direction of the semiconductor layer 7a constituting the active layer and the source line 6a. Since the other configuration is the first embodiment, description thereof is omitted.

Even in such a configuration, the first light shielding layer 51 is formed on the element substrate 10 in a region overlapping with the pixel electrodes 2a, so that light does not leak between the pixel electrodes 2a. Also,
Since the second light-shielding layer 52 is formed on the element substrate 10 in a region overlapping with the formation region of the thin film transistor 1c, stray light or external light incident from the backlight is transmitted to the thin film transistor 1c.
Can be prevented. In addition, since the third light-shielding layer 53 is formed in a region overlapping the second light-shielding layer 52 in the counter substrate 20, even when the second light-shielding layer 52 is thin, the thin film transistor 1c as a whole. Can be reliably shielded against light. Therefore, according to the present embodiment, the thickness when the light-shielding resin is applied to the element substrate 10 can be made as thin as possible within the range satisfying the optical density required for the first light-shielding layer 51. . Therefore, even when the light shielding layers 51 and 52 are formed on the element substrate 10 side, a large step is not generated on the upper layer side of the planarizing film 9, so that the thickness of the liquid crystal layer 1f varies or the rubbing varies. Therefore, the same effects as those of the first embodiment can be obtained, such as improvement of contrast and the like.

In the present embodiment, since the third light shielding layer 53 has a smaller formation area than that of the first embodiment, even when an alignment deviation occurs when the element substrate 10 and the counter substrate 20 are bonded together, The rate does not decrease. Here, the third light shielding layer 53 has a smaller formation area than the first and second embodiments, but at least the second light shielding layer 52 is provided in the element substrate 10 in a region overlapping with the formation region of the thin film transistor 1c. Therefore, even when alignment misalignment occurs when the element substrate 10 and the counter substrate 20 are bonded together, stray light or external light incident from the backlight is prevented from entering the thin film transistor 1c with a strong light amount. it can.

In the present embodiment, the third light shielding layer 52 and the semiconductor layer 7a have substantially the same dimensions in the direction in which the source line 6a extends, but the dimensions in the direction in which the gate line 3a extends are substantially the same. Alternatively, a configuration may be adopted in which the dimensions in the extending direction of the source line 6a and the extending direction of the gate line 3a are substantially the same.

[Other embodiments]
In the above embodiment, the first light shielding layer 51 and the second light shielding layer 52 are simultaneously formed using the same light shielding resin. However, the first light shielding layer 51 and the second light shielding layer 52 are optical at the same thickness. You may form by the resin material from which density | concentration differs. In this case, as the light shielding resin constituting the second light shielding layer 52, it is preferable to use a resin material having a higher optical density at the same thickness than the light shielding resin constituting the first light shielding layer 51. . When such a configuration is adopted,
The first light-shielding layer 51 and the second light-shielding layer 52 are obtained by applying the light-shielding resin, exposing and developing twice.
Are sequentially formed. However, even when the first light-shielding layer 51 and the second light-shielding layer 52 are formed using such a resin material, the second light-shielding layer 52 is affected by the layer structure on the lower layer side and has a film thickness. The counter substrate 20 tends to be thin and the optical density tends to be insufficient.
The third light shielding layer 53 may be formed.

In the above embodiment, the active matrix type liquid crystal device in the TN mode, the ECB mode, or the VAN mode has been described as an example. However, IPS (In-Plane Switch) is described.
ng) mode liquid crystal device (electro-optical device) may be applied.

[Embodiment of electronic device]
FIG. 11 shows an embodiment in which the liquid crystal device according to the present invention is used as a display device of various electronic devices. The electronic device shown here is a personal computer, a cellular phone, or the like, and includes a display information output source 170, a display information processing circuit 171, a power supply circuit 172, a timing generator 173, and the liquid crystal device 1. The liquid crystal device 1 includes a panel 175 and a drive circuit 176, and can be used for the liquid crystal device 1 described above. The display information output source 170 includes a ROM (Read Only Memory) and a RAM (Random).
A memory unit such as an access memory), a storage unit such as various disks, a tuning circuit that tunes and outputs a digital image signal, and a display such as an image signal of a predetermined format based on various clock signals generated by the timing generator 173 Information is supplied to the display information processing circuit 171. The display information processing circuit 171
It is equipped with various known circuits such as a serial-parallel conversion circuit, an amplification / inversion circuit, a rotation circuit, a gamma correction circuit, a clamp circuit, etc., and executes processing of input display information,
The image signal is supplied to the drive circuit 176 together with the clock signal CLK. The power supply circuit 172 supplies a predetermined voltage to each component.

(A), (b) is the top view which looked at the crystal | crystallization apparatus (electro-optical apparatus) to which this invention is applied from the opposing substrate side with each component formed on it, respectively, and its HH ' It is sectional drawing which shows a mode that it cut | disconnected along the line. It is explanatory drawing which shows the electrical structure of the element substrate of the liquid crystal device shown in FIG. It is a top view which abbreviate | omits illustration of the light shielding layer for one pixel of the element substrate which concerns on Embodiment 1 of this invention. FIG. 4 is a cross-sectional view of the liquid crystal device according to Embodiment 1 of the present invention cut along the line ABC in FIG. 3. It is explanatory drawing which shows the planar arrangement | positioning of the light shielding layer formed in each pixel of the liquid crystal device which concerns on Embodiment 1 of this invention. (A)-(c) is sectional drawing of the process of forming a light shielding layer with respect to an element substrate among the manufacturing processes of the liquid crystal device of this form. It is sectional drawing when the liquid crystal device which concerns on Embodiment 2 of this invention is cut | disconnected in the position corresponded to the ABC line of FIG. It is explanatory drawing which shows the planar arrangement | positioning of the light shielding layer formed in each pixel of the liquid crystal device which concerns on Embodiment 2 of this invention. It is sectional drawing when the liquid crystal device which concerns on Embodiment 3 of this invention is cut | disconnected in the position corresponded to the ABC line of FIG. It is explanatory drawing which shows the planar arrangement | positioning of the light shielding layer formed in each pixel of the liquid crystal device which concerns on Embodiment 3 of this invention. It is explanatory drawing which shows the structure at the time of using the liquid crystal device which concerns on this invention as a display apparatus of various electronic devices. (A), (b) is explanatory drawing which shows the planar arrangement | positioning of the light shielding layer formed in each pixel of the conventional liquid crystal device, respectively, and its sectional drawing. (A), (b) is explanatory drawing which shows the planar arrangement | positioning of the light shielding layer formed in each pixel of another conventional liquid crystal device, respectively, and its sectional drawing.

Explanation of symbols

1. Liquid crystal device, 1c, Thin film transistor, 3a, Gate line (scanning line), 6a, Source line (data line), 9 ... Flattening film, 10 ... Element substrate, 20 ... Counter substrate, 27 ...
Color filter 51... First light shielding layer 52.. Second light shielding layer 53.

Claims (13)

An element substrate provided with switching elements and pixel electrodes corresponding to intersections of a plurality of data lines and a plurality of scanning lines; a counter substrate disposed opposite to the element substrate; and the counter substrate and the element substrate. In an electro-optical device having a liquid crystal layer held therebetween,
The element substrate has a first light shielding layer made of a light shielding resin film overlapping between adjacent pixel electrodes, and a second light shielding film made of a light shielding resin film overlapping the switching element on the upper side of the switching element. Layers are formed between the same layers,
3. The electro-optical device according to claim 1, wherein a third light shielding layer that overlaps the second light shielding layer is formed on the counter substrate. 2. The electro-optical device according to claim 1, wherein a thickness of the second light-shielding layer at a thinnest portion is smaller than a thickness of the first light-shielding layer at a thinnest portion. apparatus. The electro-optical device according to claim 1, wherein the first light shielding layer and the second light shielding layer are formed of the same resin material. 3. The electro-optical device according to claim 1, wherein the first light-shielding layer and the second light-shielding layer are formed of resin materials having different optical densities at the same thickness. The electro-optical device according to claim 1, wherein the first light shielding layer has an optical density of 3.0 or more. The electro-optical device according to claim 1, wherein the switching element is a thin film transistor. The electro-optical device according to claim 6, wherein the thin film transistor includes an active layer made of an amorphous silicon film and a gate electrode formed on a lower layer side of the active layer. The second light-shielding layer and the third light-shielding layer have the same dimensions in at least one of a direction in which the scanning lines extend and a direction in which the data lines extend. Item 8. The electro-optical device according to Item 6 or 7. The third light shielding layer and the semiconductor layer constituting the active layer in the thin film transistor are:
The electro-optical device according to claim 6, wherein dimensions in at least one of a direction in which the scanning lines extend and a direction in which the data lines extend are the same. An electronic apparatus comprising the electro-optical device according to claim 1. An element substrate provided with switching elements and pixel electrodes so as to correspond to intersections of a plurality of data lines and a plurality of scanning lines; a counter substrate disposed opposite to the element substrate; the counter substrate and the element substrate; In a method of manufacturing an electro-optical device having a liquid crystal layer held between
After forming at least one of the data lines and the scanning lines and the switching element on the element substrate, the first light shielding layer overlapping the adjacent pixel electrodes with respect to the element substrate; An element substrate side light shielding layer forming step of simultaneously or continuously forming a second light shielding layer overlapping with the switching element on the upper side of the switching element;
A counter-substrate-side light-shielding layer forming step of forming a third light-shielding layer at a position overlapping the second light-shielding layer with respect to the counter substrate;
A bonding step of bonding the element substrate and the counter substrate at a predetermined interval;
In the element substrate side light shielding layer forming step, after the light shielding resin is applied to the wiring and the upper side of the switching element by a spin coating method, the light shielding resin is partially left and the first light shielding layer and the A method of manufacturing an electro-optical device, comprising forming a second light shielding layer. 12. The method of manufacturing an electro-optical device according to claim 11, wherein in the element substrate side light shielding layer forming step, the first light shielding layer and the second light shielding layer are formed simultaneously. 13. The electro-optic according to claim 12, wherein the thickness of the light-shielding resin applied in the element substrate-side light-shielding layer forming step is set so as to satisfy an optical density required for the first light-shielding layer. Device manufacturing method.

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