JP2007189193A - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
- Publication number
- JP2007189193A JP2007189193A JP2006284551A JP2006284551A JP2007189193A JP 2007189193 A JP2007189193 A JP 2007189193A JP 2006284551 A JP2006284551 A JP 2006284551A JP 2006284551 A JP2006284551 A JP 2006284551A JP 2007189193 A JP2007189193 A JP 2007189193A
- Authority
- JP
- Japan
- Prior art keywords
- region
- type
- type region
- semiconductor device
- conductivity type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D18/00—Thyristors
- H10D18/251—Lateral thyristors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D18/00—Thyristors
- H10D18/60—Gate-turn-off devices
- H10D18/65—Gate-turn-off devices with turn-off by field effect
- H10D18/655—Gate-turn-off devices with turn-off by field effect produced by insulated gate structures
Landscapes
- Thyristors (AREA)
- Semiconductor Memories (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006284551A JP2007189193A (ja) | 2005-12-15 | 2006-10-19 | 半導体装置および半導体装置の製造方法 |
| US11/636,656 US20070138501A1 (en) | 2005-12-15 | 2006-12-11 | Semiconductor device and method of manufacturing semiconductor device |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005361212 | 2005-12-15 | ||
| JP2006284551A JP2007189193A (ja) | 2005-12-15 | 2006-10-19 | 半導体装置および半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2007189193A true JP2007189193A (ja) | 2007-07-26 |
| JP2007189193A5 JP2007189193A5 (enExample) | 2009-11-05 |
Family
ID=38172441
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006284551A Abandoned JP2007189193A (ja) | 2005-12-15 | 2006-10-19 | 半導体装置および半導体装置の製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US20070138501A1 (enExample) |
| JP (1) | JP2007189193A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009181979A (ja) * | 2008-01-29 | 2009-08-13 | Sony Corp | 半導体装置の製造方法 |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008198935A (ja) * | 2007-02-15 | 2008-08-28 | Sony Corp | 絶縁ゲート電界効果トランジスタの製造方法。 |
| JP2008204969A (ja) * | 2007-02-16 | 2008-09-04 | Sony Corp | 半導体装置の製造方法 |
| JP2009064996A (ja) * | 2007-09-07 | 2009-03-26 | Sony Corp | 半導体装置およびその製造方法 |
| JP2009152270A (ja) * | 2007-12-19 | 2009-07-09 | Sony Corp | 半導体装置およびその製造方法 |
| US7883941B2 (en) * | 2008-05-29 | 2011-02-08 | Globalfoundries Inc. | Methods for fabricating memory cells and memory devices incorporating the same |
| US7940560B2 (en) * | 2008-05-29 | 2011-05-10 | Advanced Micro Devices, Inc. | Memory cells, memory devices and integrated circuits incorporating the same |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6552398B2 (en) * | 2001-01-16 | 2003-04-22 | Ibm Corporation | T-Ram array having a planar cell structure and method for fabricating the same |
| US6462359B1 (en) * | 2001-03-22 | 2002-10-08 | T-Ram, Inc. | Stability in thyristor-based memory device |
| US6627924B2 (en) * | 2001-04-30 | 2003-09-30 | Ibm Corporation | Memory system capable of operating at high temperatures and method for fabricating the same |
| KR100417894B1 (ko) * | 2001-05-10 | 2004-02-11 | 삼성전자주식회사 | 실리사이데이션 저지층의 형성방법 |
| US7042027B2 (en) * | 2002-08-30 | 2006-05-09 | Micron Technology, Inc. | Gated lateral thyristor-based random access memory cell (GLTRAM) |
| US7314829B2 (en) * | 2004-08-16 | 2008-01-01 | Intel Corporation | Method and apparatus for polysilicon resistor formation |
| US7262443B1 (en) * | 2004-12-29 | 2007-08-28 | T-Ram Semiconductor Inc. | Silicide uniformity for lateral bipolar transistors |
-
2006
- 2006-10-19 JP JP2006284551A patent/JP2007189193A/ja not_active Abandoned
- 2006-12-11 US US11/636,656 patent/US20070138501A1/en not_active Abandoned
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009181979A (ja) * | 2008-01-29 | 2009-08-13 | Sony Corp | 半導体装置の製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20070138501A1 (en) | 2007-06-21 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20090914 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20090914 |
|
| RD02 | Notification of acceptance of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7422 Effective date: 20091007 |
|
| RD04 | Notification of resignation of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7424 Effective date: 20091016 |
|
| A762 | Written abandonment of application |
Free format text: JAPANESE INTERMEDIATE CODE: A762 Effective date: 20091127 |