JP2007184998A - Power converter - Google Patents

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Publication number
JP2007184998A
JP2007184998A JP2005380583A JP2005380583A JP2007184998A JP 2007184998 A JP2007184998 A JP 2007184998A JP 2005380583 A JP2005380583 A JP 2005380583A JP 2005380583 A JP2005380583 A JP 2005380583A JP 2007184998 A JP2007184998 A JP 2007184998A
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current
hysteresis width
current command
power converter
switching frequency
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Masahiro Kinoshita
雅博 木下
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Toshiba Mitsubishi Electric Industrial Systems Corp
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Toshiba Mitsubishi Electric Industrial Systems Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To acquire a power converter for instantaneously reducing a switching frequency during an abnormality such as a short circuit in a load, and preventing a main semiconductor element from an overheat without new additional circuits. <P>SOLUTION: The power converter uses a self-excited semiconductor switch 2 with an instantaneous value controlled switching system for following a current instruction Is, and is provided with a hysteresis width correcting means 11 for correcting a hysteresis width for determining the switching frequency in response to the magnitude of the current instruction. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

この発明は、例えば無停電電源装置、モータ駆動用インバータ等に適用される自励式の半導体スイッチを使用した電力変換装置に係わり、特に電流指令に追従する瞬時値制御形のスイッチング方式を備えた電力変換装置に関するものである。   The present invention relates to a power conversion device using a self-excited semiconductor switch applied to, for example, an uninterruptible power supply, an inverter for driving a motor, and the like, and in particular, an electric power having an instantaneous value control type switching system that follows a current command. The present invention relates to a conversion device.

図6は、従来のヒステリシス幅補正手段を備えたヒステリシスコンパレータ方式を用いた交流−直流電力変換装置である(例えば、特許文献1参照)。
従来の電力変換装置は、交流電源21の交流入力を整流器22によって直流に変換し、この直流出力を昇圧チョッパ23によって昇圧し直流出力を得る装置である。直流出力の電圧制御は直流電圧設定値Vsの直流検出値Vfとの偏差を電圧制御アンプ24で比例制御演算する。この出力と交流電源21の全波整流を掛算器25で積算し電流指令Isを生成する。この電流指令Isとチョッパ23の出力電流Idと偏差がヒステリシスコンパレータ27に入力され、電流指令Isに対して出力電流Idがヒステリシス幅ΔIを超えたときにコンパレータ27に反転出力を得る。ヒステリシスコンパレータ27のオン・オフ出力はゲート回路28を介して昇圧チョッパ23のスイッチSWのオン・オフ制御信号にされる。ここで、ヒステリシス幅ΔIは入力電流に応じてヒステリシス幅を増減するヒステリシス幅補正手段29を備えている。ヒステリシス補正回路29cは、入力電流を絶対値回路29aに通した絶対値をローパスフィルタ29bに通し、この出力に応じて装置の定格電流を境に図示した特性でヒステリシス幅を増減する回路であり、入力電流が定格電流以下の場合はヒステリシス幅ΔIを小さくしてスイッチング周波数を高くし、過負荷等の高い電流状態ではヒステリシス幅ΔIを大きくしてスイッチング周波数を低くするように動作する。これにより過負荷時などの電流が大きい場合はスイッチング損失を減らすように作用する。
また、このヒステリシス幅補正手段29は直流を交流に変換するインバータ回路において出力電流に応じて補正しても同様に作用する。
FIG. 6 shows an AC-DC power converter using a hysteresis comparator system provided with a conventional hysteresis width correcting means (see, for example, Patent Document 1).
A conventional power conversion device is a device that converts an AC input of an AC power supply 21 into DC by a rectifier 22 and boosts the DC output by a boost chopper 23 to obtain a DC output. In the voltage control of the DC output, the voltage control amplifier 24 performs a proportional control calculation on the deviation of the DC voltage set value Vs from the DC detection value Vf. This output and full-wave rectification of the AC power supply 21 are integrated by a multiplier 25 to generate a current command Is. The current command Is, the output current Id of the chopper 23 and the deviation are input to the hysteresis comparator 27, and an inverted output is obtained from the comparator 27 when the output current Id exceeds the hysteresis width ΔI with respect to the current command Is. The on / off output of the hysteresis comparator 27 is converted into an on / off control signal for the switch SW of the boost chopper 23 via the gate circuit 28. Here, the hysteresis width ΔI includes a hysteresis width correction means 29 that increases or decreases the hysteresis width according to the input current. The hysteresis correction circuit 29c is a circuit that passes the absolute value obtained by passing the input current through the absolute value circuit 29a, passes through the low-pass filter 29b, and increases or decreases the hysteresis width according to the output with the characteristic shown on the boundary of the rated current of the device. When the input current is less than the rated current, the hysteresis width ΔI is decreased to increase the switching frequency, and in a high current state such as an overload, the hysteresis width ΔI is increased to decrease the switching frequency. This acts to reduce switching loss when the current is large, such as during overload.
The hysteresis width correcting means 29 operates in the same manner even when correction is made in accordance with the output current in an inverter circuit that converts direct current into alternating current.

特開平6−6978号公報(図1)Japanese Patent Laid-Open No. 6-6978 (FIG. 1)

例えば、インバータ回路で出力回路が負荷側短絡を生じた場合、電流変化率が非常
に高くなるため主回路半導体素子のスイッチング周波数が過渡に上昇し、この結果ス
イッチング損失が大きくなり主回路半導体素子が最悪素子故障する恐れがあるため、
負荷短絡等では瞬時にスイッチング周波数を下げ半導体素子を過熱から防止する必要
がある。しかしながら、従来の電流追従形のヒステリシスコンパレータ方式における
ヒステリシス幅調整手段は入力電流あるいは出力電流の結果によって補正する回路の
ため、電流リップルにより補正量が過敏に動作しないように図6に示したようなロー
パスフィルタ回路29bが必要になり、スイッチング周波数を下げる補正の応答が遅
れるという問題がある。また、図6に示した従来例の回路ではヒステリシス幅補正用
として専用の入力電流センサーが必要などコストアップするなどの問題がある。
For example, when the output circuit in the inverter circuit causes a load-side short circuit, the current change rate becomes very high, so the switching frequency of the main circuit semiconductor element rises transiently. As a result, the switching loss increases and the main circuit semiconductor element Because there is a possibility of the worst element failure,
In a load short circuit or the like, it is necessary to instantaneously lower the switching frequency to prevent the semiconductor element from overheating. However, since the hysteresis width adjusting means in the conventional current follow-up type hysteresis comparator system is a circuit that corrects according to the result of the input current or output current, the correction amount does not operate excessively due to the current ripple as shown in FIG. The low-pass filter circuit 29b is necessary, and there is a problem that the response of correction for reducing the switching frequency is delayed. Further, the circuit of the conventional example shown in FIG. 6 has a problem that the cost increases because a dedicated input current sensor is required for correcting the hysteresis width.

この発明は上記のような課題を解決するためになされたもので、負荷短絡等の異常時に瞬時にスイッチング周波数を下げて主回路半導体素子の過熱を防止するとともに、新たな回路を追加することなくこれを達成することができる電力変換装置を提供することを目的とする。   The present invention has been made to solve the above-described problems, and at the time of abnormality such as a load short circuit, the switching frequency is instantaneously lowered to prevent overheating of the main circuit semiconductor element, and without adding a new circuit. It aims at providing the power converter device which can achieve this.

この発明に係る電力変換装置においては、電流指令に追従する瞬時値制御形のスイッチング方式を備えた自励式の半導体スイッチを使用したものにおいて、スイッチング周波数を決定するヒステリシス幅に対して電流指令の大きさに応じてヒステリシス幅を補正するヒステリシス幅補正手段を備えたものである。   The power converter according to the present invention uses a self-excited semiconductor switch having an instantaneous value control type switching system that follows the current command, and the magnitude of the current command is larger than the hysteresis width that determines the switching frequency. A hysteresis width correcting means for correcting the hysteresis width according to the height is provided.

この発明によれば、スイッチング周波数を増減する補正手段を電流指令より行うことにより、フィルタ回路の遅れ要素が不要となりスイッチング周波数の過上昇を高速に抑制することが可能となり、また誤差電流追従方式の瞬時電流制御には基準となる電流指令が必ずあるので新たな回路を設ける必要性が生じない。   According to the present invention, the correction means for increasing / decreasing the switching frequency is performed based on the current command, so that the delay element of the filter circuit is not required, and an excessive increase in the switching frequency can be suppressed at a high speed. Since instantaneous current control always has a reference current command, there is no need to provide a new circuit.

実施の形態1.
以下、この発明の実施の形態1における電力変換装置を図1に基づいて説明する。
図1は、三相の無停電電源装置においてインバータ回路にこの発明を適用した場合の実施例である。図1において、1は直流電源、2はIGBT素子、3はリアクトル、4はコンデンサ、5は負荷、6は電流センサー、7はU相の交流電流指令(Isu)、8はU相のヒステリシス幅(ΔIu)、9はヒステリシスコンパレータ、10はゲート回路、11はヒステリシス幅補正手段、12はU相のヒステリシス幅補正量(ΔIhu)である。リアクトル3とコンデンサ4でフィルタ回路を構成しており、負荷5に安定した交流電圧を供給する。ヒステリシスコンパレータ9は、電流指令Isと電流センサー6で検出される電流検出値の偏差とヒステリシス幅を比較するものであり、IGBT素子2を駆動するゲート回路10にオン・オフ信号を与えることにより、IGBT素子2がオン・オフし電流指令に追従する電流を流すことが出来る。
Embodiment 1.
Hereinafter, the power converter in Embodiment 1 of this invention is demonstrated based on FIG.
FIG. 1 shows an embodiment in which the present invention is applied to an inverter circuit in a three-phase uninterruptible power supply. In FIG. 1, 1 is a DC power source, 2 is an IGBT element, 3 is a reactor, 4 is a capacitor, 5 is a load, 6 is a current sensor, 7 is a U-phase AC current command (Isu), and 8 is a U-phase hysteresis width. (ΔIu), 9 is a hysteresis comparator, 10 is a gate circuit, 11 is a hysteresis width correction means, and 12 is a U-phase hysteresis width correction amount (ΔIhu). The reactor 3 and the capacitor 4 constitute a filter circuit, and a stable AC voltage is supplied to the load 5. The hysteresis comparator 9 compares the deviation between the current command Is and the current detection value detected by the current sensor 6 and the hysteresis width, and gives an on / off signal to the gate circuit 10 that drives the IGBT element 2. The IGBT element 2 is turned on / off, and a current that follows the current command can flow.

次に、この発明の動作についてU相を例に説明するが、V相、W相についても同様である。7はU相の交流電流指令Isuであり、コンデンサ4の交流電圧を一定に制御する電圧制御から生成され、電流センサー6で検出されるU相電流検出値との偏差をヒステリシスコンパレータ9に入力する。ここで、U相のヒステリシス幅8(ΔIu)は定格状態でのスイッチング周波数等から決定された値であり、これにヒステリシス幅補正手段11で計算されるU相のヒステリシス幅補正量12(ΔIhu)を加算した結果を、ヒステリシスコンパレータ9に入力する。このヒステリシス幅補正手段11の構成の例を図2に示す。図2において、電流指令Isに絶対値回路11aを通し、これに対して補正開始電流基準11b(Ik)を減算する。この補正開始電流基準Ikはスイッチング周波数を下げる基準となる電流であり、IGBT素子2の制約等で決定される。次に、減算結果が負にならないように0の下限リミッタ11cを設け、補正ゲイン11d(G)を積算し、ヒステリシス幅補正量12(ΔIh)とする。この補正ゲイン11dの値は、回路定数とスイッチング周波数制限値などから決定される値である。   Next, the operation of the present invention will be described by taking the U phase as an example, but the same applies to the V phase and the W phase. Reference numeral 7 denotes a U-phase AC current command Isu, which is generated from voltage control for controlling the AC voltage of the capacitor 4 to be constant, and inputs a deviation from the U-phase current detection value detected by the current sensor 6 to the hysteresis comparator 9. . Here, the hysteresis width 8 (ΔIu) of the U phase is a value determined from the switching frequency and the like in the rated state, and the hysteresis width correction amount 12 (ΔIhu) of the U phase calculated by the hysteresis width correction means 11 is added to this value. The result of adding is input to the hysteresis comparator 9. An example of the configuration of the hysteresis width correcting means 11 is shown in FIG. In FIG. 2, the absolute value circuit 11a is passed through the current command Is, and the correction start current reference 11b (Ik) is subtracted therefrom. The correction start current reference Ik is a current that serves as a reference for lowering the switching frequency, and is determined by restrictions on the IGBT element 2 and the like. Next, a lower limiter 11c of 0 is provided so that the subtraction result does not become negative, and the correction gain 11d (G) is integrated to obtain a hysteresis width correction amount 12 (ΔIh). The value of the correction gain 11d is a value determined from a circuit constant, a switching frequency limit value, and the like.

以上、実施の形態1に示したヒステリシス幅補正手段11により、ヒステリシスコンパレータ9に入力されるヒステリシス幅は、図3に示すように、電流指令振幅が補正開始基準電流Ikを境にして増加するように動作する。この様子を無停電電源装置において説明する。図4は、電流指令を生成する回路を示す概略のブロック図であり、図1に示したフィルタコンデンサ4の交流電圧が一定になるように電圧フィードバック制御が行われる。図4において、電圧指令とコンデンサ4の電圧フィードバックの偏差を比例積分等で構成される電圧制御器13に通し、この値に対して電流リミッタ14を設け、電流指令Isを生成する。また、電圧制御は交流波形の波形制御を行うため、高速に制御される。次に、図5に示した波形は負荷短絡が生じた時の各部波形の動きを示したものである。コンデンサ4の電圧、インバータの電流指令、電流が一定に出力されているときに負荷側で短絡が生じると、コンデンサ4の電圧は零近くまで急減し、この結果、電圧の落込みを回復させようと電圧制御器13が動作するためインバータ電流指令は瞬時にリミッタまで到達する。次に、この電流指令の増加に伴い上述のヒステリシス幅補正手段が動作し、ヒステリシス幅が増加し、IGBT素子2のスイッチング周波数の過上昇を抑えるように動作する。   As described above, the hysteresis width input to the hysteresis comparator 9 by the hysteresis width correction unit 11 shown in the first embodiment is such that the current command amplitude increases with the correction start reference current Ik as a boundary, as shown in FIG. To work. This situation will be described in the uninterruptible power supply. FIG. 4 is a schematic block diagram showing a circuit for generating a current command, and voltage feedback control is performed so that the AC voltage of the filter capacitor 4 shown in FIG. 1 is constant. In FIG. 4, the deviation between the voltage command and the voltage feedback of the capacitor 4 is passed through a voltage controller 13 constituted by proportional integration or the like, and a current limiter 14 is provided for this value to generate a current command Is. Further, the voltage control is performed at a high speed because the waveform control of the AC waveform is performed. Next, the waveform shown in FIG. 5 shows the movement of each part waveform when a load short circuit occurs. If a short circuit occurs on the load side when the voltage of the capacitor 4, the current command of the inverter, and the current are output at a constant level, the voltage of the capacitor 4 will suddenly decrease to near zero, and as a result, let's recover the drop in voltage. Since the voltage controller 13 operates, the inverter current command reaches the limiter instantaneously. Next, as the current command increases, the above-described hysteresis width correction means operates to increase the hysteresis width and operate to suppress an excessive increase in the switching frequency of the IGBT element 2.

以上述べたように、この発明の実施の形態1によれば、電流指令量に応じてヒステリシス幅を増減するヒステリシス幅補正手段を備えたことから、主回路素子の過渡なスイッチング周波数上昇を高速に抑制でき主回路素子を過熱から防止することが可能となる。   As described above, according to the first embodiment of the present invention, since the hysteresis width correcting means for increasing / decreasing the hysteresis width according to the current command amount is provided, the transient switching frequency rise of the main circuit element can be increased at high speed. It is possible to suppress the main circuit element from overheating.

なお、実施の形態1では、三相のPWMインバータの場合を示したが、単相回路あるいは交流を直流に変換するコンバータ回路など誤差電流追従方式のスイッチング方式を用いた電力変換装置に適用しても同等の作用効果を得ることが出来る。また、図6の従来例で示した回路においては、電流指令であるIsによりヒステリシス幅を補正することにより、従来例のような交流入力電流の検出が不要で、なおかつ高速に補正することが可能となる。   In the first embodiment, the case of a three-phase PWM inverter has been described. Can obtain the same effect. Further, in the circuit shown in the conventional example of FIG. 6, by correcting the hysteresis width by Is that is a current command, it is not necessary to detect the AC input current as in the conventional example, and it is possible to correct at high speed. It becomes.

なお、実施の形態1では、補正開始電流基準11b(Ik)を設け、これを境にヒステリシス幅を直線補正する場合を示したが、補正量は回路定数や主回路素子の耐量などで適宜設計される。   In the first embodiment, the correction start current reference 11b (Ik) is provided, and the hysteresis width is linearly corrected on the basis of the correction start current reference 11b (Ik). However, the correction amount is appropriately designed based on the circuit constant, the tolerance of the main circuit element, and the like. Is done.

この発明の実施の形態1における電力変換装置を示すシステム構成図である。BRIEF DESCRIPTION OF THE DRAWINGS It is a system block diagram which shows the power converter device in Embodiment 1 of this invention. この発明の実施の形態1における電力変換装置のヒステリシス幅補正手段を示す構成図である。It is a block diagram which shows the hysteresis width correction | amendment means of the power converter device in Embodiment 1 of this invention. この発明の実施の形態1における電力変換装置のヒステリシス幅特性を示す図である。It is a figure which shows the hysteresis width characteristic of the power converter device in Embodiment 1 of this invention. この発明の実施の形態1における電力変換装置の電圧制御回路を示す構成図である。It is a block diagram which shows the voltage control circuit of the power converter device in Embodiment 1 of this invention. この発明の実施の形態1における電力変換装置の負荷短絡時の各部波形を示す図である。It is a figure which shows each part waveform at the time of the load short circuit of the power converter device in Embodiment 1 of this invention. 従来の電力変換装置のヒステリシス幅補正手段を示す構成図である。It is a block diagram which shows the hysteresis width correction | amendment means of the conventional power converter device.

符号の説明Explanation of symbols

1 直流電源
2 IGBT素子
3 リアクトル
4 コンデンサ
5 負荷
6 電流センサー
7 電流指令
8 ヒステリシス幅
9 ヒステリシスコンパレータ
10 ゲート回路
11 ヒステリシス幅補正手段
12 ヒステリシス幅補正量
13 電圧制御器
14 電流リミッター
DESCRIPTION OF SYMBOLS 1 DC power supply 2 IGBT element 3 Reactor 4 Capacitor 5 Load 6 Current sensor 7 Current command 8 Hysteresis width 9 Hysteresis comparator 10 Gate circuit 11 Hysteresis width correction means 12 Hysteresis width correction amount 13 Voltage controller 14 Current limiter

Claims (4)

電流指令に追従する瞬時値制御形のスイッチング方式を備えた自励式の半導体スイッチを使用した電力変換装置において、スイッチング周波数を決定するヒステリシス幅に対して前記電流指令の大きさに応じてヒステリシス幅を補正するヒステリシス幅補正手段を備えたことを特徴とする電力変換装置。   In a power converter using a self-excited semiconductor switch equipped with an instantaneous value control type switching system that follows a current command, a hysteresis width is set according to the magnitude of the current command with respect to the hysteresis width that determines the switching frequency. A power converter comprising a hysteresis width correcting means for correcting. ヒステリシス幅補正手段は、電流指令に絶対値回路を通し、これに対して補正開始電流基準を減算し、減算結果が負にならないように零の下限リミッターを設け、補正ゲインを積算しヒステリシス幅補正量とすることを特徴とする請求項1記載の電力変換装置。   Hysteresis width correction means passes an absolute value circuit to the current command, subtracts the correction start current reference from this, provides a zero lower limiter so that the subtraction result does not become negative, integrates the correction gain, and corrects the hysteresis width The power conversion device according to claim 1, wherein the power conversion device is an amount. 補正開始電流基準は、スイッチング周波数を下げる基準となる電流であり、IGBT素子の制約で決定されることを特徴とする請求項2記載の電力変換装置。   The power conversion device according to claim 2, wherein the correction start current reference is a current that serves as a reference for lowering the switching frequency, and is determined by a restriction of the IGBT element. 電流指令は、電圧指令とコンデンサの電圧フィードバックの偏差を比例積分で構成される電圧制御器に通し、この値に対して電流リミッターを設けることにより生成することを特徴とする請求項1〜請求項3のいずれかに記載の電力変換装置。
The current command is generated by passing a deviation between the voltage command and the voltage feedback of the capacitor through a voltage controller configured by proportional integration, and providing a current limiter for this value. 4. The power conversion device according to any one of 3.
JP2005380583A 2005-12-29 2005-12-29 Power converter Pending JP2007184998A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011229293A (en) * 2010-04-20 2011-11-10 Toshiba Corp Controller for voltage type inverter

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5914366A (en) * 1982-07-15 1984-01-25 Hitachi Ltd Controlling method for pulse width modulation inverter
JPH04355671A (en) * 1991-06-03 1992-12-09 Mitsubishi Electric Corp Control circuit for power converter
JPH066978A (en) * 1992-06-17 1994-01-14 Meidensha Corp Power converter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5914366A (en) * 1982-07-15 1984-01-25 Hitachi Ltd Controlling method for pulse width modulation inverter
JPH04355671A (en) * 1991-06-03 1992-12-09 Mitsubishi Electric Corp Control circuit for power converter
JPH066978A (en) * 1992-06-17 1994-01-14 Meidensha Corp Power converter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011229293A (en) * 2010-04-20 2011-11-10 Toshiba Corp Controller for voltage type inverter

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