JP2007182347A - Bonding glass and flat panel display using the bonding glass - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a bonding glass desirable to constitute a flat panel display which can avoid wiring damage and vacuum loss and therefore has high reliability and a long life. <P>SOLUTION: The bonding glass contains, as expressed in terms of oxides, 25 to 50 wt.% V<SB>2</SB>O<SB>5</SB>, 5 to 30 wt.% BaO, 20 to 40 wt.% TeO<SB>2</SB>, 1 to 25 wt.% WO<SB>3</SB>, and 0 to 20 wt.% P<SB>2</SB>O<SB>5</SB>. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a bonding glass and a flat panel display device using the bonding glass, and more particularly to form a vacuum vessel by integrating the back substrate and the front substrate directly or via an edge frame and a spacer. The present invention relates to a bonding glass and a flat panel display device using the bonding glass.

  Various types are known as so-called flat display devices in which a flat back substrate and a front substrate are bonded together. For example, a flat panel display device (flat panel display: FPD) having electron sources arranged in a matrix has been attracting attention, and one of them is a field emission image display device using a small and accumulating cold cathode ( FED (Field Emission Display) and electron emission type image display devices are known. These cathodes are Spindt type electron sources, surface conduction electron sources, carbon nanotube type electron sources, metal-insulator-metal laminated MIM (Metal-Insulator-Metal) type, and metal-insulator-semiconductor laminated. MIS (Metal-Insulator-Semiconductor) type or thin-film type electron source such as metal-insulator-semiconductor-metal type.

  The self-luminous FPD includes a rear substrate including the electron source as described above, and a phosphor layer and an anode that forms an acceleration voltage for causing electrons emitted from the electron source to collide with the phosphor layer. The front substrate is bonded to seal the internal space facing both panels in a predetermined vacuum state. The back substrate has a large number of electron sources arranged in a matrix, and the front substrate has a phosphor layer and an anode for forming an accelerating voltage for forming an electric field for projecting electrons emitted from the electron source to the phosphor layer. Have.

  Each electron source is paired with a corresponding phosphor layer to constitute a unit pixel. Usually, one pixel (color pixel, pixel) is composed of unit pixels of three colors of red (R), green (G), and blue (B). In the case of a color pixel, the unit pixel is also called a sub-pixel (sub-pixel).

  The distance between the rear substrate and the front substrate is maintained at a predetermined interval by a member (spacer) called a partition wall arranged to support both substrates in the display area. This spacer is made of a plate-like body formed of an insulating material such as glass or ceramics or a member having some conductivity, and is usually installed at a position where the operation of the pixel is not hindered for each of the plurality of pixels.

Further, Patent Document 3 discloses a method using a back substrate and a front substrate represented by a reinforcing plate, and a device that forms a Takashin container using frame glass. Patent Document 4 discloses a lead-free low-melting glass as a frit glass used for sealing a glass plate. Patent Document 4 discloses a lead-free low-melting glass using B ₂ O _3, V ₂ O ₅ , or BaO instead of PbO—B ₂ O ₃ that causes environmental pollution. Patent Document 5 discloses V ₂ O ₅ —TeO ₂ -based glass.
JP-A-7-65710 Japanese Patent Laid-Open No. 10-153979 JP 2000-206905 A JP 2003-192378 A JP 2004-250276 A

  In a flat panel display device, a vacuum substrate is configured by sealing a rear substrate on which an electron source array is formed and a front substrate on which a phosphor array is formed at the periphery thereof. A large number of wirings for supplying a selection signal and display data to the electron source array are formed of a metal thin film on the edge of the inner surface of the rear substrate. In addition, there are wiring for feeding power to the acceleration electrode on the inner surface of the front substrate via a wiring formed on the rear substrate, or wiring for feeding acceleration electrodes on the inner edge of the front substrate. . A so-called low melting point frit glass is used for sealing the back substrate and the front substrate. This low melting point frit glass is applied and bonded to the peripheral edges of both substrates including the wiring region and vacuum sealed.

  The wiring formed on the rear substrate or the front substrate is made of aluminum (Al) or an alloy thereof, copper (Cu) or an alloy thereof, chromium (Cr) or an alloy thereof, and the like (for example, Cr—Al—Cr). Used. In particular, Cr—Al—Cr is suitable as a wiring material provided in the bonding region because Cr has good wettability with glass. In addition, in the present invention, wiring including Au and Ag is also considered.

  Conventionally, the low melting point frit glass used as the bonding glass contains lead (PbO). For this reason, the wiring material and lead react with each other to cause corrosion, resulting in a decrease in reliability and a shortened life due to damage such as an increase in resistance and disconnection, and a deterioration in vacuum due to a reactive gas. In order to maintain the gap between the back substrate and the front substrate, a partition made of glass or ceramics, that is, a so-called spacer is provided in a vacuum vessel, and the spacer is planted on a metal thin film such as a scanning electrode. The same problem arises in the case of fixing with low melting point frit glass.

As a lead-free low-melting glass frit, the V ₂ O ₅ —TeO ₂ glass disclosed in Patent Document 5 tends to crystallize when held for a long time at the sealing operation temperature, and there is a case where the sealing function does not appear. In addition, the glass has a high thermal expansion coefficient, and in order to reduce the thermal expansion, it is necessary to mix a large amount of an expensive low expansion coefficient filler, and there is a possibility that the wettability with the object to be sealed may be impaired. .

  An object of the present invention is to provide a bonding glass for bonding between glass structures and a flat panel display device using the bonding glass, and in particular, the back substrate and the front substrate are directly or edge-framed. Degradation of the degree of vacuum by using as a glass for bonding with a low melting point and a low thermal expansion coefficient to avoid damage to the wiring when bonding various structural glasses for forming a vacuum vessel integrated through spacers An object of the present invention is to provide a flat display device which avoids, has high reliability and has a long life.

  In order to achieve the above object, the present invention provides a glass for bonding adjusted as follows. In addition, the flat display device that achieves high reliability and a long life is configured by sealing the back substrate and the front substrate through which the wiring is interposed, or by joining the spacers.

That is, the bonding glass of the present invention, in terms of _{oxide, V 2 O 5: 25~50wt%} , BaO: 5~30wt%, TeO 2: 20~40wt%, WO 3: 1~25wt%, P 2 O _5: is prepared in 0 to 20 wt%.

Furthermore, the bonding glass of the present invention, in terms of _{oxide, V 2 O 5: 35~45wt%} , BaO: 10~20wt%, TeO 2: 20~30wt%, WO 3: 5~15wt%, P 2 O5: adjusted to 0 to ₅ wt%.

Furthermore, the bonding glass of the present invention, in terms of _{oxide, V 2 O 5: 35~45wt%} , BaO: 5~20wt%, TeO 2: 20~35wt%, WO 3: 1~15wt%, ZnO: 1~10wt%, Sb ₂ O _3: is prepared in 110 wt.%.

Furthermore, the bonding glass of the present invention, furthermore, SrO, and _{GeO 2, La 2 O 3,} Cr 2 O 3, Nb 2 O 5, Y 2 O 3, MgO, a compound selected from CeO _2, ErO ₂ You may add 0.5-10 wt%. Or 5-30 volume% of ceramic filler materials can be added to the above glass for joining. Examples of the ceramic filler include SiO ₂ , ZrO ₂ , Al ₂ O ₃ , ZrSiO ₄ , zirconium phosphate compound ((ZrO) ₂ P ₂ O ₇ , (ZrO) ₂ P ₂ O ₇ Ca _0.5 Zr ₂ (PO ₄ ) ₃ , Zr ₂ (WO ₄ ) (PO ₄ ) ₂ ), cordierite, mullite, or eucryptite.

  The flat panel display device of the present invention includes a rear substrate having an electron source array on the inner surface, a phosphor pattern having an arrangement corresponding to the electron source array on the inner surface, and an acceleration electrode, and displays the outer surface. And a front substrate as a surface.

  Then, a vacuum container is configured in which the inner surfaces of the back substrate and the front substrate are opposed to each other and sealed with a bonding glass (frit glass) interposed between sealing portions at the peripheral edges of both substrates.

  A wiring region is formed on at least one end surface of the back substrate, and is formed with a wiring made of a metal film connected to the electron source array and drawn to the edge.

The sealing portion includes a wiring region on the back substrate, and as a frit glass (bonding glass) for bonding, in terms of oxide, V ₂ O ₅ : 25 to 50 wt%, BaO: _{5 to} 30 wt%, _{TeO 2: 20~40wt%, WO 3} : 1~25wt%, P 2 O 5: can be used those prepared in 0 to 20 wt%.

Further, as the glass for the _{bonding, V 2 O 5: 35~45wt%} , BaO: 5~20wt%, TeO 2: 20~35wt%, WO 3: 1~15wt%, ZnO: 1~10wt%, Sb 2 Glass for sealing prepared in O ₃ : 1 to 10 wt% can be used.

The bonding glass contains 0.5 to 10 wt% of a compound selected from SrO, GeO ₂ , La ₂ O ₃ , Cr ₂ O ₃ , Nb ₂ O ₅ , Y ₂ O ₃ , MgO, CeO ₂ and ErO _2. It is preferable to add. Moreover, it is good to add 5-30 volume% of ceramic filler materials to this joining glass. The ceramic filler includes SiO ₂ , ZrO ₂ , Al ₂ O ₃ , ZrSiO ₄ , zirconium phosphate-based compound ((ZrO) ₂ P ₂ O ₇ , (ZrO) ₂ P ₂ O ₇ Ca _0.5 Zr ₂ (PO ₄ ) ₃ , a lead-free glass composition that is any one of Zr ₂ (WO ₄ ) (PO ₄ ) ₂ ), cordierite, mullite, and eucryptite.

  Further, in the flat panel display device of the present invention in which the back substrate is flat and the edge frame is integrally formed on the periphery of the front substrate, the end surface of the edge frame and the back substrate are sealed with the above-mentioned bonding glass (frit glass). To do.

  Further, in the flat panel display device of the present invention having a frame glass separate from the rear substrate and the front substrate on each peripheral edge of the rear substrate and the front substrate, the gap between the rear substrate, the front substrate and the frame glass is as described above. Seal with bonding glass.

  Further, in the flat panel display device of the present invention having a spacer for holding a gap between the rear substrate and the front substrate inside a vacuum vessel formed by sealing the rear substrate and the front substrate, the spacer and the rear substrate The substrate and the front substrate are sealed with the bonding glass.

  The present invention is not limited to the technical contents described in the above-described configuration and embodiments described later, and various modifications can be made without departing from the technical idea of the present invention.

  By using the lead-free low melting point frit glass that is the bonding glass of the present invention, it is possible to suppress the metal corrosion and gas generation due to the reaction with lead in the case of using in contact with a metal as in the prior art. Moreover, environmental pollution by lead can be avoided.

  In the flat panel display device of the present invention, sealing between the back substrate and the front substrate, sealing between the back substrate and the front substrate with an edge frame (sealing frame) interposed therebetween, or sealing between the back substrate and the front substrate. In the case where the spacer is installed in the vacuum vessel constituted by the stopper, the corrosion and gas generation of the wiring due to the frit glass used for the bonding is suppressed, and high reliability and long life can be achieved.

  The present invention is not limited to bonding and vacuum sealing for flat panel display devices, but can also be applied to glass structural members for electronic devices such as magnetic disk substrates, and other structural materials in various technical fields. .

  The best mode for carrying out the present invention will be described below in detail with reference to the drawings of the examples. In the description of the embodiments with reference to the following drawings, the front substrate is also referred to as a panel. Note that the flat panel display device described in the following embodiments is merely an example, and the present invention forms wiring such as an electron emission type or field emission type display device using a thin film electron source, or a plasma display device. As described above, the present invention can be similarly applied to various flat panel display devices using a glass plate.

  FIG. 1 is a schematic plan view mainly illustrating the configuration of the flat panel display device of the present invention. 2 is a perspective view more specifically showing an example of the overall structure of the flat panel display device shown in FIG. 1, and FIG. 3 is a cross-sectional view taken along line AA ′ of FIG. 1, 2, and 3, image signal wiring d (d 1, d 2,... Dn) is formed on the inner surface of the back substrate SUB 1, and scanning signal wiring s (s 1, s 2, s 3) is formed thereon. ... sm) are formed to intersect. The electron source ELS is supplied with power from the scanning signal wiring s (s1, s2, s3,... Sm) through the connection electrode ELC. Reference VS indicates the vertical scanning direction.

  The front substrate SUB2 is slightly smaller in size than the rear substrate SUB1, and wirings dT serving as lead terminals for the image signal wiring d and wirings serving as lead terminals for the scanning signal wiring s are provided on the end surface of the rear substrate SUB1 protruding from the front substrate SUB2. sT is formed. Further, phosphor layers PH (PH (R), PH (G), PH (B)) of three colors are formed on the inner surface of the front substrate SUB2, and an anode electrode AD is formed thereon. In this configuration, the phosphor PH (PH (R), PH (G), PH (B)) is partitioned by a light shielding layer (black matrix) BM. Although the anode electrode AD is shown as a solid electrode, the anode electrode AD may be a striped electrode that is divided for each pixel column by crossing the scanning signal wiring s (s1, s2, s3,... Sm). Electrons radiated from the electron source ELS are accelerated and collided with the phosphor layers PH (PH (R), PH (G), PH (B)) constituting the corresponding subpixel. As a result, the phosphor layer PH emits light of a predetermined color and is mixed with the light emission color of the phosphors of other subpixels to form a color pixel of a predetermined color.

  As shown in FIGS. 2 and 3, the back substrate SUB1 and the front substrate SUB2 are integrated by a sealing frame MFL installed around the display area. The back substrate SUB1, front substrate SUB2, and sealing frame MFL are integrated by frit glass, that is, the bonding glass F of the present invention. As described with reference to FIG. 1, the image signal wiring d (d1, d2, d3,... Dn) and the scanning signal wiring s (s1, s2, dn) are provided on the inner side of the sealing region on the inner surface of the back substrate SUB1. A plurality of electron sources are provided in a display area constituted by a matrix of s3,. The wiring dT and the wiring sT are drawn out beyond the sealing region where the sealing frame MFL is installed.

  On the other hand, the anode AD and the phosphor layer PH are formed on the inner surface of the front substrate SUB2. An aluminum layer is used for the anode AD. The power supply of the anode AD reaches the rear substrate SUB1 side through an inter-substrate connecting conductor (not shown), and goes outside the sealing region which is the installation portion of the sealing frame MFL as an extraction terminal (wiring) at an appropriate portion of the rear substrate SUB1. Pulled out.

  The inner surfaces of the front substrate SUB2 and the back substrate SUB1 are opposed to each other, and the peripheral edge is fixed using the above-described bonding glass F so that the internal space sandwiched between the two substrates is isolated from the outside. At the time of fixing using the bonding glass, for example, heating at about 400 ° C. is performed. Thereafter, the inside of the display device is exhausted to about 1 μPa through the exhaust pipe 303 and then sealed. In operation, a voltage of about 2 kV to 10 kV is applied to the anode AD of the front substrate.

  In this display device, a structure using an MIM as an electron source is taken as an example, but the present invention is not limited to this, and the same applies to a flat panel display device using various electron sources described above. Applicable to.

  The front substrate SUB2 is formed as a fringed shallow dish having an edge that protrudes by being bent toward the back substrate SUB1 at the periphery thereof, and frit glass is applied to the contact portion between the edge and the back substrate to form both substrates. It can also be set as the structure which seals. In this case, the frit glass is applied only on the back substrate side.

  In addition, when a spacer SPC is provided in the sealed space to maintain a distance between the back substrate and the front substrate, the bonding glass of the present invention is applied to the spacer SPC and the planted portion of the spacer SPC. Apply and fix. Usually, the spacer SPC is installed on the scanning wiring s. In this embodiment, an example is given in which the sealing frame MFL is positioned in the sealing region where the wiring is drawn out and bonded with the bonding glass F between the front substrate SUB2 and the rear substrate SUB1.

  Here, examples of the frit glass of the present invention will be described.

FIG. 4 is a diagram illustrating components of the V ₂ O ₅ glass in the present invention. In FIG. 4, a plurality of glass names VTW01 to VBW07 are shown depending on the difference in the content of each component. Each component is shown in weight% (w%) in terms of oxide.

VTW01~09 _{is, V 2 O 5: 25~50wt%} , BaO: 5~30wt%, TeO 2: 20~40wt%, WO 3: 1~25wt%, P 2 O 5: is prepared in the 0 to 20 wt% It is a lead-free glass sample. Each sample was produced as follows.

Starting materials were V ₂ O ₅ (manufactured by High Purity Chemical Laboratory, purity 99.9%), BaO (manufactured by Wako Reagent, purity 99.9%), TeO ₂ (manufactured by High Purity Chemical Laboratory, purity 99.9). %), WO ₃ (manufactured by Wako Reagent, purity 99.9%), P ₂ O ₅ (manufactured by High Purity Chemical Laboratory, purity 99.9%). In order to produce the V-based glass base material, the respective raw materials are first mixed at a weight ratio shown in FIG. When the raw material contains P ₂ O ₅ , all the raw materials except P ₂ O ₅ are mixed in advance. This is because P ₂ O ₅ is highly hygroscopic and is not left in the atmosphere for a long time. A mixed powder other than P ₂ O ₅ is put in an alumina crucible, and the alumina crucible is put on a balance, and a predetermined amount of P ₂ O ₅ is weighed, and simultaneously mixed with a metal spoon. At this time, in order to avoid moisture absorption from the atmosphere, mixing using a mortar or ball mill is not performed.

  The alumina crucible containing the above raw material mixed powder is placed in a glass melting furnace and heating is started. The temperature increase rate is set to 5 ° C./min, and the temperature is maintained for 1 hour from the time when the target temperature is reached. In this embodiment, the target temperature is fixed at 1000 ° C. The molten glass is held for 1 hour with stirring. After the holding, the alumina crucible is taken out from the melting furnace and cast into a graphite mold heated to 300 ° C. in advance. The glass cast in the graphite mold was moved to a strain relief furnace that had been heated to a strain relief temperature in advance, and the strain was removed by holding for 1 hour, and then cooled to room temperature at a rate of 1 ° C./min. The obtained glass has a size of 30 mm × 40 mm × 80 mm. The obtained glass block was cut into a size of 4 mm × 4 mm × 15 mm, and the thermal expansion coefficient, electric resistivity, and density were evaluated. The remaining glass from which the block was removed was crushed and used as a powder sample for DTA analysis (suggested thermal analysis) for glass characteristic temperature evaluation and for button flow test.

  FIG. 5 is an explanatory diagram of a temperature profile of a so-called button flow test. In the button flow test, glass powder formed into a button shape is placed on a glass substrate on which an insulating film or metal film (wiring, etc.) has been formed, and this is heated and cooled to the underlying insulating film or metal film. This is a test for observing the wettability, reactivity, presence or absence of cracks, and the number of bubbles caused by gas. The temperature profile is as shown in FIG. That is, a button-like sample glass is placed on a glass substrate on which an insulating film or a metal film (wiring, etc.) is formed at room temperature, and this is heated at 5 ° C. per minute and held at 420 ° C. for 30 minutes. Thereafter, the temperature is lowered to 200 ° C. at 2 ° C. per minute and left to cool to room temperature.

In this example, the test was performed by placing a cylindrical glass powder compact having a diameter of 10 mm and a height of 5 mm on soda lime glass and heat-treating it. In this test, if the button diameter after heat treatment (referred to as the flow diameter) is 15 mm or more, it is determined that the wettability with the sealing material is good.
As a result of such a test, it was found that VTW04 was the best among the VTW series glass under the condition of sealing at 420 ° C. Moreover the composition of the surrounding Results VTW04 study details, namely in terms of _{oxide, V 2 O 5: 35~45wt%} , BaO: 10~20wt%, TeO 2: 20~30wt%, WO 3: 5~15wt% , P ₂ O ₅ : The characteristic temperature of the glass adjusted to the range of 0 to ₅ wt% is low, and is particularly effective for sealing applications at a low temperature of 450 ° C. or less.
Explain the next test.

The VBW series glass described in FIG. 4 is a series in which the vicinity of the composition of VTW04, which has the most excellent properties for sealing applications among the VTW series glasses, is examined in detail. VBW01~07 the _{V 2 O 5: 30~45wt%,} BaO: 15~30wt%, TeO 2: 20~35wt%, WO 3: 5~20wt%, ZnO: means glass sample prepared in 0-10 wt% To do. As a result of the examination similar to the above, it was shown that VBW03 is the best in the VBW series.

Since the thermal expansion coefficient of soda lime glass, which is the sealing material used in this example, is about 85 × 10 ⁻⁷ / ° C., the thermal expansion coefficient of the bonding glass of FIG. 4 must be lowered. In this example, VBW03 was used as a representative glass in FIG. 4, and Zr ₂ (WO ₄ ) (PO ₄ ) ₂ (hereinafter referred to as ZWP) was used as a low expansion filler. The thermal expansion coefficient of ZWP is −32 × 10 ⁻⁷ / ° C.

  FIG. 6 is a diagram showing the relationship between the ZWP filler mixing amount and the thermal expansion coefficient. When the bonding glass base material is VBW03, the thermal expansion coefficient suitable for the bonding application can be adjusted by mixing about 30 wt% of the ZWP filler.

In addition, the V ₂ O ₅ -TeO ₂ -WO ₃ -P ₂ O ₅ system and the V ₂ O ₅ -TeO ₂ -WO ₃ -ZnO system lead-free glass have the thermal expansion coefficient and flow characteristics without devitrification. Additives recommended for adjustment include MgO, La ₂ O ₃ , Nb ₂ O ₃ and Sb ₂ O ₃ .

  The same button flow test was conducted using VBW03 mixed with fillers having various particle sizes. FIG. 7 is a diagram showing the correlation between the total surface area of the mixed fillers and the flow diameter at 420 ° C. This result shows that the fluidity of the frit is better as the particle size of the filler is larger and the mixing amount is smaller.

  As a result of the button flow test, a VBW03 + 30 wt% ZWP frit was used for bonding for forming a vacuum vessel seal of the flat panel display of this example.

  FIG. 8 is an explanatory diagram of a bonded glass evaluation test piece bonded using a VBW03 + 30 wt% ZWP frit. Moreover, FIG. 9 is explanatory drawing of intensity | strength evaluation using the bonding glass evaluation test piece of FIG. As shown in FIG. 8, the bonded glass evaluation test piece includes the first part 100 and the second part 200 having the sizes (widths w1, w2, heights h1, h2, and thicknesses d1, d2) shown in FIG. Are formed in a T shape with the bonding glass F of the present invention. The T-shaped joint dimensions are as shown. w1 = 25 mm, w2 = 15 mm, h1 = 50 mm, h2 = 20 mm, thickness d1 = 2.8 mm, d2 = 2.8 mm.

  As shown in FIG. 9, one end of the first component 100 of the bonded glass evaluation test piece of FIG. 9A described in FIG. 8 is inserted into the groove 350 of the sample fixing jig 300 of FIG. 9B. As shown in FIG. 9C, the first component 100 is fixed by screwing a screw 310 into the screw hole 320. The sample fixing jig 300 is fixed to the fixing table 400. 9C is a top view, and FIG. 9C is a side view.

  As shown in FIG. 9A and FIG. 9C, the pressing tool 500 is pressed against the second component 200 and the load W is applied to the bonded glass evaluation test piece fixed to the jig in this manner. . The load W is gradually increased, and the load W at the time when the bonded portion by the VBW03 + 30 wt% ZWP bonded glass F breaks is measured.

  As a result of the measurement, the bonding strength of the test piece prepared at a bonding temperature of 380 ° C. to 450 ° C. is 30 to 60 MPa, and in the above bonding glass evaluation, the VBW03 + 30 wt% ZWP bonding glass is used. A sufficient strength to form and maintain this for a long time was obtained. In addition, because it is lead-free glass, even if there is a wiring in the lower layer of the bonding glass, it does not corrode the wiring, and it does not cause cracks or bubbles in the insulating layer or wiring and is extremely effective. It is a good sealing material.

  As a result of performing the same bonding strength test on the other VTW series and VBW series, a bonding strength value equivalent to VBW03 + 30 wt% ZWP was obtained by adjusting the thermal expansion coefficient.

In this embodiment, the structure using the MIM as the electron source is taken as an example, but the present invention is not limited to this, and the same applies to the flat display device using the various electron sources described above. Applicable.

It is a schematic plan view which mainly demonstrates the structure of the flat type display apparatus of this invention. FIG. 2 is a perspective view more specifically showing an example of the overall structure of the flat panel display device shown in FIG. 1. It is a figure which shows the AA 'cross section figure of FIG. _{V 2 O 5 - TeO 2 -} WO 3 - P 2 O 5 system _{and, V 2 O 5 - TeO 2} - is a diagram illustrating the composition and properties Table of WO ₃ -ZnO system sealing glass. It is explanatory drawing of the temperature profile of what is called a button flow test. It is a figure explaining the characteristic table of the frit which mixed ZWP filler with VBW03. It is a figure which shows the relationship between a filler surface area and a flow diameter. It is explanatory drawing of the joining glass evaluation test piece joined using frit glass. It is explanatory drawing of intensity | strength evaluation using the joining glass evaluation test piece of FIG.

Explanation of symbols

SUB1... Rear substrate, SUB2... Front substrate, s (s1, s2,... Sm)... Scanning signal wiring, d (d1, d2, d3...). ELS: Electron source, ELC: Connection electrode, AD: Anode, BM: Black matrix, PH (PH (R), PH (G), PH (B)) ... Phosphor Layer, SDR... Scanning signal line drive circuit, DDR... Image signal line drive circuit.

Claims (14)

In terms of _{oxide, V 2 O 5: 25~50wt%} , BaO: 5~30wt%, TeO 2: 20~40wt%, WO 3: 1~25wt%, P 2 O 5: containing 0 to 20 wt% Bonding glass. In terms of _{oxide, V 2 O 5: 35~45wt%} , BaO: 10~20wt%, TeO 2: 20~30wt%, WO 3: 5~15wt%, P 2 O 5: containing 0-5 wt% Bonding glass. In terms of _{oxide, V 2 O 5: 35~45wt%} , BaO: 5~20wt%, TeO 2: 20~35wt%, WO 3: 1~15wt%, ZnO: 1~10wt%, Sb 2 O 3: Bonding glass containing 1 to 10 wt%. In terms of oxide, SrO, 0.5-10% containing _{GeO 2, La 2 O 3,} Cr 2 O 3, Nb 2 O 5, Y 2 O 3, MgO, a compound selected from CeO _2, ErO ₂ The bonding glass according to any one of claims 1 to 3, wherein   The glass for bonding according to any one of claims 1 to 4, comprising 5 to 30% by volume of a ceramic filler material. The ceramic filler material is SiO ₂ , ZrO ₂ , Al ₂ O ₃ , ZrSiO ₄ , zirconium phosphate-based compound ((ZrO) ₂ P ₂ O ₇ , (ZrO) ₂ P ₂ O ₇ Ca _0.5 Zr ₂ (PO ₄ ) ₃ , Zr ₂ (WO ₄ ) (PO ₄ ) ₂ ), cordierite, mullite, eucryptite, or a mixture of two or more thereof. . A back substrate having an electron source array on its inner surface;
Comprising a phosphor pattern having an arrangement corresponding to the electron source array on the inner surface and an acceleration electrode, and a front substrate having the outer surface as a display surface;
A flat panel display device having a vacuum container that is formed by sealing each of the inner surfaces of the back substrate and the front substrate with a bonding glass interposed in a sealing portion at the periphery of both substrates,
At least one end surface of the back substrate has a wiring region formed with a wiring made of a metal film connected to the electron source array and drawn to the edge;
The sealing portion includes the wiring region included in the back substrate,
The bonding glass, in terms of _{oxide, V 2 O 5: 25~50wt%} , BaO: 5~30wt%, TeO 2: 20~40wt%, WO 3: 1~25wt%, P 2 O 5: 0 A flat panel display device containing ˜20 wt%. A back substrate having an electron source array on its inner surface;
Comprising a phosphor pattern having an arrangement corresponding to the electron source array on the inner surface and an acceleration electrode, and a front substrate having the outer surface as a display surface;
A flat panel display device having a vacuum container that is formed by sealing each of the inner surfaces of the back substrate and the front substrate with a bonding glass interposed in a sealing portion at the periphery of both substrates,
At least one end surface of the back substrate has a wiring region formed with a wiring made of a metal film connected to the electron source array and drawn to the edge;
The sealing portion includes the wiring region included in the back substrate,
The bonding glass, in terms of _{oxide, V 2 O 5: 35~45wt%} , BaO: 5~20wt%, TeO 2: 20~35wt%, WO 3: 1~15wt%, ZnO: 1~10wt% , Sb ₂ O ₃ : 1 to 10 wt%, A flat panel display device. A compound selected from SrO, GeO ₂ , La ₂ O 3, Cr ₂ O ₃ , Nb ₂ O ₅ , Y ₂ O ₃ , MgO, CeO ₂ and ErO _{2 in} terms of oxide is added to the bonding glass in an amount of 0.00. The flat display device according to claim 7 or 8, characterized by containing 5 to 10 wt%.   The flat panel display device according to claim 7, wherein the bonding glass contains a ceramic filler material in an amount of 5 to 30% by volume. The ceramic filler material is SiO ₂ , ZrO ₂ , Al ₂ O ₃ , ZrSiO ₄ , zirconium phosphate-based compound ((ZrO) ₂ P ₂ O ₇ , (ZrO) ₂ P ₂ O ₇ Ca _0.5 Zr ₂ (PO ₄ 11. The flat panel display according to claim 10, wherein the flat panel display is any one of a cordierite, a mullite, a eucryptite, or a mixture of two or more thereof, ₃ , Zr ₂ (WO ₄ ) (PO ₄ ) ₂ ). apparatus.   The back substrate is flat, has an edge frame integrally on a peripheral edge of the front substrate, and an end surface of the edge frame and the back substrate are sealed with the bonding glass. The flat panel display device according to any one of 7 to 10.   A frame glass separate from the rear substrate and the front substrate is provided at each peripheral edge of the rear substrate and the front substrate, and the gap between the rear substrate, the front substrate and the frame glass is sealed with the bonding glass. 11. The flat panel display device according to claim 7, wherein the flat panel display device is stopped. Inside the vacuum vessel formed by sealing the back substrate and the front substrate, there is a spacer for holding a gap between the back substrate and the front substrate, the spacer, the back substrate, and the front substrate, The flat panel display device according to claim 7, wherein the flat panel display device is sealed with the bonding glass.

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