JP2007166559A - Voltage-controlled oscillator, pll circuit, signal processing circuit and tuner pack - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a voltage-controlled oscillator in which an oscillation amplitude can be set small and facilitate uniforming the property. <P>SOLUTION: The voltage-controlled oscillator in this invention is a voltage-controlled oscillator 103 which changes the frequency of an oscillation signal S103 in response to an oscillation frequency control voltage S35, and has: a differential amplifier type oscillator 50 having a pair of transistors of differential amplifier type and outputting the oscillation signal S103 from the pair of transistors; and an oscillation frequency control circuit 51 which is connected to the pair of transistors and which changes an equivalent capacity in response to the oscillation frequency control voltage S35. Transistors Q1 and Q2 for constituting the pair of transistors are configured so that it may operate in a region in which an output current does not change substantially. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a voltage-controlled oscillator, a PLL circuit, a signal processing circuit, and a tuner pack, and in particular, a PLL of an intermediate frequency signal processing circuit that detects a video intermediate frequency signal in a television receiver or a video playback device with a built-in television tuner. The present invention relates to a voltage controlled oscillator used in a circuit.

  In recent years, television receivers are shifting to flat-screen televisions such as plasma televisions and liquid crystal televisions instead of conventional CRTs. As a result, tuner packs incorporating a tuner circuit and an intermediate frequency signal processing circuit (VIF circuit) have come to show a tendency toward miniaturization. If the mounting area of the tuner pack is reduced, the distances between the tuner circuit, the intermediate frequency signal processing circuit and the peripheral components become very close, and mutual interference of signals used in the tuner circuit, the intermediate frequency signal processing circuit and the peripheral components occurs. There is a problem.

  A tuner pack system incorporating a tuner circuit and an intermediate frequency signal processing circuit will be described below.

  FIG. 4 is a diagram showing the configuration of the tuner pack. As shown in FIG. 4, the tuner pack built in the television receiver includes an antenna 10, a tuner circuit 11, a SAW filter 12, and an intermediate frequency signal processing circuit 101.

The antenna 10 is an antenna that receives radio waves in the UHF band or the VHF band.
The tuner circuit 11 selects a desired channel frequency from the television high frequency signal S10 received by the antenna 10, converts it to an intermediate frequency, and outputs a signal S11. For example, the video signal is converted into a video intermediate frequency signal of 58.75 MHz in Japan and 45.75 MHz in the United States.

  The SAW filter (surface acoustic wave filter) 12 is a filter that passes a signal in the frequency band of the intermediate frequency signal, attenuates a signal other than the intermediate frequency band of the signal S11, and outputs it as an intermediate frequency signal S12.

  The intermediate frequency signal processing circuit 101 demodulates the video signal from the intermediate frequency signal S12. The intermediate frequency signal processing circuit 101 includes an IF amplifier 21, a detector 22, a video amplifier 23, and a PLL (Phase Locked Loop) circuit 102.

  The IF amplifier (intermediate frequency amplifier) 21 is a signal amplifier that amplifies the intermediate frequency signal S12 and outputs the signal S21.

The PLL circuit 102 outputs a signal S31b having the same frequency and phase as the signal S21.
The detector 22 demodulates the video signal by synchronously detecting the signal S21 based on the signal S31b, and outputs the signal S22.

  The video amplifier 23 amplifies the signal S22 and outputs the video signal S23 to the video signal terminal 24.

  With the above configuration, the video signal S23 is demodulated from the high-frequency TV signal S10 received by the antenna 10.

  Hereinafter, the PLL circuit 102 used in the intermediate frequency signal processing circuit 101 will be described.

  The PLL circuit 102 includes a phase detector 30, a low-pass filter (LPF) 34, a voltage controlled oscillator (VCO) 103, and a phase shifter 31. The voltage controlled oscillator 103 includes a differential amplification type oscillator 32 and a voltage / current conversion circuit 33.

  The phase shifter 31 shifts the phase of the output S103 of the voltage controlled oscillator 103 and outputs a signal S31a. The phase detector 30 detects and outputs a frequency difference (phase difference) S30 between the signal S31a and the signal S21. The frequency difference (phase difference) S30 is smoothed by the low-pass filter 34 and becomes the oscillation frequency control voltage S35, which is input to the voltage controlled oscillator 103. The voltage-current conversion circuit 33 converts the oscillation frequency control voltage S35 into a control current S33 and feeds it back to the differential amplification oscillator 32. The differential amplification type oscillator 32 changes the frequency of the output signal S103 based on the control current S33.

  With the above-described operation, the frequency of the signal S103 output from the voltage controlled oscillator 103 becomes the received video intermediate frequency (for example, 58.75 MHz in Japan). That is, the voltage controlled oscillator 103 controls the oscillation frequency control voltage S35 so as to output a signal having the same frequency as the signal S21. Further, the phase difference between the signal S21 and the signal S31a output from the phase shifter 31 becomes 90 degrees, and the circuit operates as a PLL.

  On the other hand, the phase shifter 31 outputs a signal S31b whose phase is shifted by 90 degrees with respect to the signal S31a. As a result, in the PLL circuit 102, the phase of the output signal S21 from the IF amplifier 21 and the output signal S31b of the phase shifter 31 are equal.

Hereinafter, a conventional voltage controlled oscillator 103 used in the PLL circuit 102 will be described.
FIG. 5 is a diagram showing a configuration of a conventional voltage controlled oscillator 103. As shown in FIG. 5, the voltage controlled oscillator 103 includes a differential amplification oscillator 32 and a voltage / current conversion circuit 33. The oscillation frequency of the differential amplification oscillator 32 is controlled by a control current S33 output from the voltage-current conversion circuit 33.

  A differential amplification type oscillator 32 shown in FIG. 5 has NPN transistors Q11 and Q12 that form a differential amplification type transistor pair by connecting the emitters of each other and connecting the base and collector of each other, and the emitters of the transistors Q11 and Q12. , GND, a capacitor Cext and a coil Lext constituting an LC resonance circuit connected between the collectors of the transistors Q11 and Q12 (between differential outputs), and a collector of the transistor Q11 or Q12 And resistors R22 and R23 connected between VCC terminal 1 and VCC terminal 1. Note that the capacitor Cext and the coil Lext constituting the LC resonance circuit are usually connected to the outside of the semiconductor integrated circuit.

  When the voltage at the oscillation frequency control terminal 35 changes, the control current S33 changes, and the current i12 of the current source I12 of the differential amplification oscillator 32 changes. At this time, since the transistors Q11 and Q12 are used in a saturated state, the parasitic capacitance such as the junction capacitance between the base and the collector and the diffusion capacitance between the base and the emitter when viewed from the base changes greatly. A capacitor Cext constituting an LC resonance circuit is connected to the bases of the transistors Q11 and Q12. When the current i12 changes, the parasitic capacitances of the transistors Q11 and Q12 change, so that the value of the resonance capacitance (the sum of Cext and the parasitic capacitances of the transistors Q11 and Q12) changes equivalently, and the oscillation frequency changes.

  The oscillation amplitude of the differential amplification type oscillator 32 is such that the transistors Q11 and Q12 are used in a saturated state, so that the base-emitter voltage Vbe and the collector-emitter saturation voltage Vce (sat) of the transistors Q11 and Q12 are (Vbe−Vce (sat)). That is, the oscillation amplitude has a value depending on the characteristics of the transistor.

  The oscillation amplitude of the conventional voltage-controlled oscillator 103 is (Vbe−Vce (sat)), and is so large that the characteristics are adversely affected in a small tuner pack. Specifically, when the oscillation amplitude is large, there is a problem described below, particularly in a recent small tuner pack.

  When the LC resonant circuit is connected to the outside of the semiconductor integrated circuit, the oscillation signal S101 output from the voltage controlled oscillator 103 passes through the input portion of the intermediate frequency signal processing circuit 101 via the mounting substrate. Thus, when the intermediate frequency signal S12 input to the intermediate frequency signal processing circuit 101 is weak (weak electric field), the oscillation signal output from the voltage controlled oscillator 103 that wraps around from the LC resonance circuit to the input unit. Becomes larger. For this reason, the PLL circuit 102 does not lock the phase to the intermediate frequency signal S12 but locks the phase to the oscillation signal output from the voltage controlled oscillator 103 that has entered the input unit from the LC resonance circuit (also known as self-locking). Called). In other words, when the oscillation amplitude is large, there is a problem that the intermediate frequency signal is very easily unlocked in a weak electric field.

  Further, when the harmonic signal of the oscillation signal S101 and the input signal S10 of the tuner circuit 11 are close in frequency, a low frequency signal (beat) of the frequency difference is generated and becomes video noise or audio noise, and the image quality and sound quality are improved. There is a problem that it falls. In particular, with the recent miniaturization of tuner packs, the distance between the tuner circuit 11 and the intermediate frequency signal processing circuit 101 is becoming increasingly narrow, and the interference becomes significant.

  In addition, capacitive coupling between the pin connected to the LC resonance circuit and the adjacent pin may adversely affect the internal integrated circuit connected to the adjacent pin. Therefore, in the tuner pack using the conventional voltage controlled oscillator 103, the adjacent pins of the LC resonance circuit are often provided with GND pins and NC pins (unconnected pins), and the number of pins increases more than necessary. There is.

  Further, when the oscillation amplitude is large, the amplitude inside the semiconductor integrated circuit is also large. For this reason, when the wiring of the output signal S103 of the voltage controlled oscillator 103 and the output signals S31a and S31b of the phase shifter 31 are close to the input part of the IF amplifier 21 in the mask layout, due to capacitive coupling between the wirings, etc. The oscillation signal of the voltage controlled oscillator 32 goes around to the IF amplifier 21. For this reason, the PLL circuit 102 does not lock the phase to the intermediate frequency signal S12, but has a problem that the PLL circuit 102 locks the phase to the signal that has passed from the voltage controlled oscillator 32 to the IF amplifier 21.

In order to solve such a problem, a voltage controlled oscillator capable of reducing the oscillation amplitude has been proposed (for example, see Patent Document 1).
JP-A-6-85536

  However, the control range of the oscillation frequency in the voltage controlled oscillator described in Patent Document 1 and the conventional voltage controlled oscillator shown in FIG. 5 is such that the junction capacitance between the base and the collector of the transistors Q11 and Q12 and the diffusion capacitance between the base and the emitter. Since it largely depends on the parasitic capacitance, it is difficult to set freely because of the large influence of process variation and the like. That is, it is difficult to combine characteristics at the design stage.

  As described above, the voltage controlled oscillator described in Patent Document 1 can set the oscillation amplitude small, but has a problem that it is difficult to combine characteristics.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a voltage controlled oscillator that can set an oscillation amplitude small and easily combine characteristics.

  In order to achieve the above object, a voltage controlled oscillator according to the present invention is a voltage controlled oscillator that changes a frequency of an oscillation signal in accordance with a control voltage, and includes a differential amplification type transistor pair, and the transistor pair A transistor constituting the transistor pair, the oscillation means outputting the oscillation signal from the capacitor, the capacitor means connected to the transistor pair, and the control means for changing the equivalent capacitance of the capacitor means according to the control voltage Is configured to operate in a region where the output current does not substantially change.

  Thus, the voltage controlled oscillator according to the present invention changes the oscillation frequency by changing the equivalent capacitance when viewed from the differential amplification type transistor pair by the control voltage. Therefore, the voltage controlled oscillator according to the present invention can set the oscillation frequency characteristic depending on the capacitance of the capacitance means without depending on the parasitic capacitance of the transistors constituting the differential amplification type transistor pair. Thereby, it is possible to easily combine the characteristics. The transistors constituting the differential amplification type transistor pair operate in a region where the output current does not substantially change. Here, as the “transistor”, for example, a bipolar transistor or a MOS transistor can be used. Therefore, the “region in which the output current does not substantially change” referred to here is an operation region that does not saturate if the “transistor” is composed of a bipolar transistor, and a saturation region that is composed of a MOS transistor. As a result, it is less affected by parasitic capacitance and the like than when the transistors constituting the differential amplification type transistor pair are operated in a region where the output current changes. Therefore, it is possible to easily combine the characteristics. Further, since the frequency is not changed by controlling the current supplied to the differential amplification type transistor pair, the current value supplied to the differential amplification type transistor pair can be arbitrarily set. Thereby, the oscillation amplitude can be set arbitrarily. That is, the voltage controlled oscillator according to the present invention can set the oscillation amplitude to be small and can easily combine the characteristics.

  The oscillation means is connected to the transistor pair, a first current source that supplies a constant current to the transistor pair, a second current source that supplies a current corresponding to the control voltage to the transistor pair, and the transistor pair. And an LC resonance circuit.

  As a result, the oscillation amplitude is set by the current supplied from the first current source, and the change in the oscillation amplitude when the control voltage is changed by the current supplied from the second current source can be suppressed. For example, when the control voltage increases, the equivalent capacitance when viewed from the differential amplification type transistor pair of the capacitance means increases and the oscillation amplitude decreases. The current of the second current source increases when the control voltage increases, and shows the characteristic of increasing the oscillation amplitude. Therefore, the effect of the decrease of the oscillation amplitude in the capacitor means is offset, and the oscillation amplitude is increased regardless of the control voltage. Can be kept constant.

  In addition, the control means includes a third current source that supplies current to the capacity means according to the control voltage, and the equivalent capacity may be changed according to the current supplied from the third current source. Good.

  Thus, the oscillation frequency can be changed by changing the equivalent capacitance when viewed from the differential amplification type transistor pair. Further, by combining the characteristics of the second current source and the third current source, the oscillation amplitude can be kept constant regardless of the control voltage.

  The voltage-controlled oscillator further includes a voltage-current conversion circuit that converts the control voltage into a control current, and the control current controls drive currents of the second current source and the third current source. May be.

  Thus, the oscillation means and the control means can easily control the current supplied to the differential amplification type transistor pair and the capacitance means by mirroring the control current.

  The oscillation means includes a first transistor, a second transistor in which a base of the first transistor is connected to a collector, a second transistor in which a collector of the first transistor is connected to a base, and the first transistor. A first resistor connected to the collector of the second transistor and a second resistor connected to the collector of the second transistor, wherein the first transistor and the second transistor constitute the transistor pair; The first current source and the second current source are connected in parallel to an emitter of the first transistor and an emitter of the second transistor, and the capacitor means includes the first transistor and the second transistor. It may be connected to the base of the transistor.

  Thereby, the oscillation amplitude can be arbitrarily set by setting the resistance values of the first resistor and the second resistor and the current value of the first current source.

  The capacitor means includes a third transistor having a base connected to the base of the second transistor, a fourth transistor having a base connected to the base of the first transistor, and the third transistor. A third resistor connected to the collector of the fourth transistor; a fourth resistor connected to the collector of the fourth transistor; a first capacitor connected between a base and a collector of the third transistor; And a second capacitor connected between a base and a collector of the fourth transistor, and the third current source may be connected to an emitter of the third transistor and an emitter of the fourth transistor.

  Thus, the characteristics of the oscillation frequency with respect to the control voltage are determined based on the capacitance values of the first capacitor and the second capacitor. Therefore, the characteristics of the oscillation frequency with respect to the control voltage can be easily adjusted.

  In addition, the voltage-current conversion circuit includes a fifth transistor in which a reference voltage is applied to a base and a sixth transistor in which the control voltage is applied to a base, one of which is connected to the emitter of the fifth transistor. A fifth resistor, one connected to the emitter of the sixth transistor, the other connected to the other of the fifth resistor, the other of the fifth resistor and the sixth resistor And a fifth current source connected to the collector of the fifth transistor.

  As a result, the control current and the reference voltage can be compared to increase or decrease the control current.

  The second current source includes a seventh transistor having a collector connected to the emitter of the first transistor and the emitter of the second transistor, and a seventh transistor connected to the emitter of the seventh transistor. And a third current source connected to the emitter of the third transistor and the emitter of the fourth transistor, the eighth transistor having a collector connected to the emitter of the fourth transistor, and the emitter of the eighth transistor. An eighth resistor, and the fifth current source includes a collector of the fifth transistor, a base of the seventh transistor and a base of the eighth transistor, and a base connected to the collector of the eighth transistor. A transistor and a ninth resistor connected to the emitter of the ninth transistor may be provided.

  Thereby, the current value of the fifth current source is mirrored by the second current source and the third current source. Therefore, the current values of the second current source and the third current source can be changed based on the control voltage.

  The capacitance values of the first capacitor and the second capacitor may be larger than the parasitic capacitance between the base and collector of the third transistor and the fourth transistor.

  As a result, the capacitance values of the first capacitor and the second capacitor become dominant with respect to the characteristic of the oscillation frequency with respect to the control voltage. In addition, the oscillation frequency control range can be widened.

  The second current source and the third current source may be formed such that the amplitude of the signal is constant regardless of the frequency.

Thereby, the oscillation amplitude can be kept constant regardless of the control voltage.
Further, the present invention may be implemented as a PLL circuit, a signal processing circuit, and a tuner pack using the voltage controlled oscillator.

  The present invention can provide a voltage controlled oscillator in which the oscillation amplitude can be set small and characteristics can be easily combined. Furthermore, it is possible to provide a PLL circuit, a signal control circuit, and a tuner pack that include a voltage controlled oscillator that can set the oscillation amplitude small and can easily combine characteristics.

  Hereinafter, embodiments of a voltage controlled oscillator according to the present invention will be described in detail with reference to the drawings.

  The voltage controlled oscillator according to the present embodiment changes the equivalent capacitance value when viewed from the differential output terminal according to the control voltage. Thus, since the oscillation frequency is controlled regardless of the parasitic capacitance of the transistors constituting the differential amplification type oscillator, it is possible to easily combine the characteristics. Further, since the oscillation frequency is not changed by the current supplied to the differential amplification oscillator, the current value supplied to the differential amplification oscillator can be arbitrarily set. Thereby, the oscillation amplitude can be set arbitrarily.

First, the configuration of the voltage controlled oscillator in the present embodiment will be described.
FIG. 1 is a diagram showing a configuration of a voltage controlled oscillator in the present embodiment.

  A voltage controlled oscillator 103 shown in FIG. 1 is a circuit that changes the frequency of an oscillation signal to be output in accordance with the voltage applied to the oscillation frequency control terminal 35. The differential amplification oscillator 50, the oscillation frequency control circuit 51, The voltage-current conversion circuit 33 is provided.

  The differential amplification type oscillator 50 includes a differential amplification type transistor pair and outputs an oscillation signal from the differential amplification type transistor pair (differential output terminals OUT1 and OUT2). The first transistor Q1 And a second transistor Q2, a first current source I1, a second current source I2, a capacitor Cext, a coil Lext, a first resistor R1, and a second resistor R2.

  The transistors Q1 and Q2 are NPN transistors that connect each other's emitters and connect each other's base and collector to form a differential amplification type transistor pair. That is, the base of the transistor Q1 is connected to the collector of the transistor Q2, and the collector of the transistor Q1 is connected to the base of the transistor Q2. The collector of the transistor Q1 and the base of the transistor Q2 are connected to the differential output terminal OUT1, which is one end of the differential output terminal, and the differential of which the collector of the transistor Q2 and the base of the transistor Q1 are the other terminal of the differential output terminal Connected to the output terminal OUT2.

  Current source I1 and current source I2 are connected in parallel between the emitters of transistor Q1 and transistor Q2 and ground. The current source I1 supplies a constant current i1 to the differential amplification oscillator 50. The current source I 2 supplies a current i 2 corresponding to the voltage applied to the oscillation frequency control terminal 35 to the differential amplification oscillator 50.

  The capacitor Cext and the coil Lext constitute an LC resonance circuit, and are connected between the collector of the transistor Q1 and the collector of the transistor Q2. That is, the LC resonance circuit is connected between the differential output terminals OUT1 and OUT2. The capacitor Cext and the coil Lext are connected to the outside of the semiconductor integrated circuit.

  The resistor R1 is connected between the collector of the transistor Q1 and the VCC terminal 1 to which the power supply voltage is applied.

The resistor R2 is connected between the collector of the transistor Q2 and the VCC terminal 1.
The oscillation frequency control circuit 51 is connected to the differential output terminals OUT1 and OUT2 (the base of the transistor Q1 and the base of the transistor Q2), and is viewed from the differential output terminal OUT1 or OUT2 according to the voltage applied to the oscillation frequency control terminal 35. The equivalent capacitance, and the third transistor Q3, the fourth transistor Q4, the third current source I3, the third resistor R3, the fourth resistor R4, The capacitor C1 and the second capacitor C2.

  The transistors Q3 and Q4 are NPN transistors that connect their emitters to form a differential amplification type transistor pair. The base of the transistor Q3 is connected to the base (differential output terminal OUT1) of the transistor Q2. The base of the transistor Q4 is connected to the base (differential output terminal OUT2) of the transistor Q1.

  Current source I3 is connected between the emitters of transistors Q3 and Q4 and ground. The current source I3 supplies a current i3 corresponding to the voltage applied to the oscillation frequency control terminal 35 to the oscillation frequency control circuit. The equivalent capacitance when viewed from the differential output terminals OUT1 and OUT2 is changed according to the current i3.

  The resistor R3 is connected between the collector of the transistor Q3 and the VCC terminal 1. The resistor R4 is connected between the collector of the transistor Q4 and the VCC terminal 1.

  The capacitor C1 is connected between the base and collector of the transistor Q3. The capacitor C2 is connected between the base and collector of the transistor Q4. Capacitors C1 and C2 are sufficiently larger than the base-collector capacitance of transistor Q3 or Q4.

  The voltage-current conversion circuit 33 is a circuit that converts a voltage applied to the oscillation frequency control terminal 35 into a control current S33, and includes a fifth transistor Q5, a sixth transistor Q6, a fourth current source I4, A fifth current source I5, a fifth resistor R5, and a sixth resistor R6 are provided.

  The reference voltage Vref is applied to the base of the transistor Q5. The transistor Q6 has an oscillation frequency control voltage S35 applied to the oscillation frequency control terminal 35 applied to the base, and a ground connected to the collector. Transistors Q5 and Q6 are PNP transistors forming a differential amplification type transistor pair. The reference voltage Vref is a reference voltage for determining the magnitude of the oscillation frequency control voltage S35 applied to the oscillation frequency control terminal 35. For example, when the oscillation frequency control voltage S35 is equal to the reference voltage Vref, the oscillation frequency is 58.75 MHz which is the center frequency of the domestic video intermediate frequency.

  One end of resistor R5 is connected to the emitter of transistor Q5. One end of resistor R6 is connected to the emitter of transistor Q6, and the other end is connected to the other end of resistor R5.

  The current source I4 is connected between the other end of the resistor R5 and the other end of the resistor R6 and the VCC terminal 1. Current source I5 is connected between the collector of transistor Q5 and ground.

  The current source I2 of the differential amplification type oscillator 50 includes a seventh NPN transistor Q7 and a seventh resistor R7. Transistor Q7 has a collector connected to the emitter of transistor Q1 and the emitter of transistor Q2. Resistor R7 is connected between the emitter of transistor Q7 and ground.

  The current source I3 of the oscillation frequency control circuit 51 includes an eighth NPN transistor Q8 and an eighth resistor R8. Transistor Q8 has a collector connected to the emitter of transistor Q3 and the emitter of transistor Q4. The resistor R8 is connected between the emitter of the transistor Q8 and the ground.

  The current source I5 of the voltage-current conversion circuit 33 includes a ninth NPN transistor Q9 and a ninth resistor R9. Transistor Q9 has its base and collector connected to the collector of transistor Q5, the base of transistor Q7 and the base of transistor Q8. The resistor R9 is connected between the emitter of the transistor Q9 and the ground.

  With the above configuration, the current source I2 and the current source I3 form a current mirror for the current source I5. That is, the control current S33 controls the currents i2 and i3 that are drive currents of the current source I2 and the current source I3.

  Next, the operation of the voltage controlled oscillator in the present embodiment will be described. First, a method for controlling the oscillation frequency will be described.

  When the voltage at the oscillation frequency control terminal 35 is higher than the reference voltage Vref, the current flowing through the transistor Q9 of the current source I5 increases. As a result, the current i3 of the transistor Q8 mirror-connected to the transistor Q9 increases. As the current i3 increases, the gain G of the oscillation frequency control circuit 51 increases.

  Capacitors C1 and C2 are connected to both ends of the capacitor Cext. When the oscillation frequency control circuit 51 is viewed from one end (differential output terminal OUT1 or OUT2) of the capacitor Cext, the equivalent input capacitors (mirror capacitors) Cin1 and Cin2 between the GND and the capacitor C1 or C2 have a gain G, respectively. It has been doubled. Therefore, when the gain G is increased, the input capacitors Cin1 and Cin2 are equivalently increased. The capacitance value connected in parallel to the coil Lext is obtained by adding the input capacitances Cin1 and Cin2 to the capacitance Cext. Therefore, when the input capacitances Cin1 and Cin2 increase, the oscillation frequency decreases. That is, the oscillation frequency decreases as the voltage applied to the oscillation frequency control terminal 35 increases.

  FIG. 2 is a diagram showing the relationship between the frequency control voltage and the oscillation frequency of the voltage controlled oscillator 103 in the present embodiment. As the solid line 80 shown in FIG. 2 increases, the oscillation frequency decreases as the voltage applied to the oscillation frequency control terminal 35 increases.

  Conversely, when the voltage at the oscillation frequency control terminal 35 is lower than the reference voltage Vref, the current flowing through the transistor Q9 decreases and the current i3 flowing through the oscillation frequency control circuit 51 decreases. As the current i3 decreases, the gain G of the oscillation frequency control circuit 51 decreases. Therefore, the input capacitors Cin1 and Cin2 are equivalently reduced. As the input capacitances Cin1 and Cin2 become smaller, the oscillation frequency increases. Therefore, when the voltage applied to the oscillation frequency control terminal 35 is small, the oscillation frequency increases as indicated by a solid line 80 shown in FIG. As described above, the voltage controlled oscillator 103 according to the present embodiment can change the capacitance value for the differential output terminals OUT1 and OUT2 and change the oscillation frequency in accordance with the voltage applied to the oscillation frequency control terminal 35. it can.

  Hereinafter, a method for controlling the oscillation frequency will be described using mathematical expressions. An equivalent input capacitance Cin1 between the pair of GNDs when the oscillation frequency control circuit 51 is viewed from one end (differential output end OUT1) of the capacitance Cext is expressed as (Equation 1). Here, the transistors Q1, Q2, Q3, and Q4 are characterized in that they operate in an operation region that is not saturated. That is, transistors Q1, Q2, Q3 and Q4 operate in a region where the output current does not substantially change. Various parasitic capacitances can be ignored. The capacitance values of the capacitors C1 and C2 are C, the resistance values of the load resistors R3 and R4 are RL2, and the gain of the oscillation frequency control circuit 51 is G. Re is an emitter resistance, which is Vt / (i3 / 2). Vt is Kb × T / q (Kb: Boltzmann constant, T: absolute temperature, q: electron charge).

(Equation 1)
Cin1 = C1 × (G + 1) ≈C1 × RL2 / re
= C × RL2 × (i3 / 2Vt)

  Similarly, when the oscillation frequency control circuit 51 is viewed from the other end (differential output end OUT2) of the capacitor Cext, an equivalent input capacitor Cin2 between the pair GND is expressed as (Equation 2).

(Equation 2)
Cin2 = C2 × (G + 1) ≈C2 × RL2 / re
= C × RL2 × (i3 / 2Vt)
The capacitor Cext is equivalently connected in parallel to the capacitor Cin shown in (Equation 3).

(Equation 3)
1 / Cin = 1 / Cin1 + 1 / Cin2
Cin = (C × RL2 × i3) / (4Vt)

  The oscillation frequency f of the voltage controlled oscillator 103 is expressed by (Equation 4) when the parasitic capacitance connected to the capacitor Cext is equivalently Cp.

(Equation 4)
f = 1 / 2π√ (Lex × (Cext + Cin + Cp))
Ignoring that the parasitic capacitance Cp is sufficiently smaller than the capacitance Cin, f≈1 / 2π√ (Lex × (Cext + Cin))
= 1 / 2π√ (Lex × (Cext + (C × RL2 × i3) / (4Vt)))

  From the above equation (Equation 4), it can be seen that the oscillation frequency f changes depending on the current i3 of the oscillation frequency control circuit 51. When the current i3 increases, the oscillation frequency f increases, and when the current i3 decreases, the oscillation frequency f decreases. Moreover, the oscillation frequency control range can be set by setting each value of the coil Lext, the capacitor Cext, the capacitor C1, the capacitor C2, the resistor R3, and the resistor R4.

For example, Lext = 245 nH, Cext = 21 pF, capacitance values C1 and C2 of capacitance C = 0.5 pF, resistance values of resistors R3 and R4 RL2 = 1.0 kΩ, i3 = 1 mA to 3 mA, Vt = Kb × T / q = If it is 26 mV,
Cin = 4.8 pF to 14.4 pF
f = 54.0 MHz to 63.3 MHz
(Mainly video intermediate frequency of 58.75MHz -4.8MHz ~ + 4.6MHz)
And can be calculated simply. Thus, voltage controlled oscillator 103 in the present embodiment can realize a wide frequency control range. However, it should be noted that there is an error in the above calculated value because the package capacitance, the metal wiring capacitance, and the parasitic capacitance of the transistor are actually connected to both ends of the capacitance Cext.

  If the capacitors C1 and C2 are not connected and only the parasitic capacitance between the bases and collectors of the transistors Q3 and Q4 is connected, the parasitic capacitance is about 0.01 pF. ) And (Equation 4), the oscillation frequency control range is as follows.

Cin = 0.1pF-0.3pF
f = 69.7MHz-70.0MHz

  In the above calculation, the center frequency is shifted from 58.75 MHz, but it can be seen that the oscillation frequency control range can be secured only about ± 150 kHz from the center frequency.

  In this way, by connecting C1 and C2 having a capacitance value sufficiently larger than the parasitic capacitance between the bases and collectors of the transistors Q3 and Q4, it is several tens of times that when the capacitors C1 and C2 are not used. An oscillation frequency control range can be secured.

  In particular, when the voltage controlled oscillator 103 is used for the intermediate frequency signal processing circuit 101, the oscillation frequency control range is in the state where the SAW filter 12 is connected, with the video intermediate frequency of 58.75 MHz as the center in Japan. The high frequency side requires about +600 kHz, and the low frequency side requires about −1 MHz. In the United States, centering on the video intermediate frequency of 45.75 MHz, the high frequency side requires about +600 kHz, and the low frequency side requires about −2 MHz. For this reason, it is very important to be able to freely set the oscillation frequency control range.

  As described above, the voltage controlled oscillator 103 according to the present embodiment changes the current i3 supplied to the oscillation frequency control circuit 51 in accordance with the voltage applied to the oscillation frequency control terminal 35, so that the differential output terminal The equivalent capacitance when viewed from OUT1 and OUT2 is changed. Thereby, the oscillation frequency can be changed according to the voltage applied to the oscillation frequency control terminal 35. A wide oscillation frequency control range can be realized by connecting C1 and C2 having sufficiently larger capacitance values than the parasitic capacitance between the bases and collectors of the transistors Q3 and Q4.

  Further, the oscillation frequency control range can be set by each value of the coil Next, the capacitor Cext, the capacitor C1, the capacitor C2, the resistor R3, and the resistor R4. As a result, the frequency control range can be easily adjusted because it is less susceptible to variations in parasitic capacitance and the like than the conventional voltage controlled oscillator.

  Next, a method for controlling the oscillation amplitude will be described using mathematical expressions. An example in which the voltage at the differential output terminal OUT2 is high and the voltage at the differential output terminal OUT1 is low will be described. That is, the transistors Q1 and Q4 are turned on and the transistors Q2 and Q3 are turned off. At this time, the potential Vb1 of the oscillation signal output terminal OUT1 and the potential Vb2 of the oscillation signal output terminal OUT2 are expressed by the following (Equation 5), and the oscillation amplitude Vo can be obtained simply as the following (Equation 6). it can.

  Here, the constant current of the current source I1 is i1, the current of the current source I2 is i2, the currents flowing through the collectors of the transistors Q1 and Q2 are i6 and i7, the current of the current source I3 is i3, and the load resistors R1 and R2 are The resistance values are equally RL1.

  Since the transistors Q1, Q2, Q3 and Q4 are used in an operating region where they are not saturated, their base currents are ignored. Further, it is assumed that the capacitance Cin of the above equation (Equation 3) connected equivalently to this is smaller than the capacitance value of the capacitance Cext, and that the LC resonance circuit is ideal with no energy loss. Thus, the internal current of the LC resonance circuit is closed, and the flow of current in and out is ignored.

(Equation 5)
Vb1≈Vcc-R1 × i6
= Vcc-RL1 * (i1 + i2)
Vb2≈Vcc-R2 × i7
= Vcc-RL1 * 0 = Vcc

(Equation 6)
Vo≈Vb2-Vb1
= RL1 × (i1 + i2)

  From the above equation (Equation 6), it can be seen that if the variable current i2 is set sufficiently smaller than the constant current i1, the oscillation amplitude Vo is mainly determined by the product of the load resistance value RL1 and the constant current i1. Therefore, an arbitrary oscillation amplitude Vo can be realized by setting the resistance values of the resistors R1 and R2 and the current i1 supplied from the current source I1. Therefore, the voltage controlled oscillator in the present embodiment can set the oscillation amplitude small.

  When the base-emitter voltage is Vbe and the collector-emitter saturation voltage Vce (sat), the base-collector voltage (Vb2-Vb1 = Vo) is the base-emitter voltage and the collector-emitter saturation voltage. Are smaller than the voltage difference (Vbe−Vce (sat)), the transistors Q1 and Q2 operate in an operating region where they are not saturated. By operating the transistors Q1 and Q2 in an operation region where the transistors Q1 and Q2 are not saturated, the influence of parasitic capacitance and the like is less than when operating in a saturated state. Therefore, the oscillation frequency control range for the voltage applied to the oscillation frequency control terminal 35 can be easily adjusted. (Equation 7) is an expression showing a condition for operating in an operating region where the transistors Q1 and Q2 are not saturated.

(Equation 7)
Vbe-Vce (sat)> Vb2-Vb1
= RL1 × (i1 + i2)

  By setting the resistance value RL1, the current i1, and the current i2 so as to satisfy the above equation (Equation 7), the transistors Q1 and Q2 operate in an operating region where they are not saturated. For example, if Vbe = 700 mV and Vce (sat) = 200 mV, the left side of the above equation (Expression 7) is 500 mV. In this case, assuming that the current i2 is sufficiently smaller than the current i1, and RL1 = 1 kΩ and i1 = 200 μA, the right side of the above equation (Equation 7) is 200 mV, and the transistors Q1 and Q2 operate in an operation region that is not saturated. Further, when the above condition is substituted into the above equation (Formula 6), the oscillation amplitude Vo becomes 200 mV, and it can be seen that the oscillation amplitude can be sufficiently reduced.

  However, in practice, since various parasitic elements are connected to the LC resonance circuit, there is energy loss, and current flows in and out of the LC resonance circuit. Therefore, it should be noted that the above formula is a rough approximation formula and has an error.

  Next, the influence of the capacitors C1 and C2 on the oscillation amplitude will be described. The charge / discharge currents Δi flowing through the capacitors C1 and C2 have the same absolute value and flow in the opposite direction. When the transistor Q3 is turned off, a discharge current flows from the capacitor C1 to the differential amplification oscillator 50 side. Therefore, in the above equation (Equation 5), the current flowing through the resistor R1 is reduced to (i1 + i2−Δi). Therefore, Vb1 increases. Further, when the transistor Q4 is turned on, a charging current flows through the capacitor C2 from the differential amplification oscillator 50 side, so that a current of Δi flows through the resistor R2, and Vb2 decreases. Therefore, when the capacitors C1 and C2 are connected to the LC resonance circuit, Vb1 increases and Vb2 decreases, so the oscillation amplitude becomes smaller than the above equation (Equation 6).

  Here, the charge / discharge current Δi flowing through the capacitors C 1 and C 2 depends on the gain G of the oscillation frequency control circuit 51. The gain G of the oscillation frequency control circuit 51 is determined by the current i3 of the current source I3, and the current i3 varies depending on the voltage of the oscillation frequency control terminal 35. That is, when the voltage at the oscillation frequency control terminal 35 changes, the charge / discharge current Δi changes and the oscillation amplitude changes.

  FIG. 3 is a diagram showing the oscillation amplitude with respect to the voltage of the oscillation frequency control terminal 35. When the voltage of the oscillation frequency control terminal 35 is high, the current i3 is large and the gain G of the oscillation frequency control circuit 51 is large. As a result, the charge / discharge current Δi increases and the oscillation amplitude decreases. Therefore, as shown by the solid line 81 in FIG. 3, when the voltage at the oscillation frequency control terminal 35 increases, the oscillation amplitude decreases. On the contrary, when the voltage of the oscillation frequency control terminal 35 is low, the current i3 becomes small and the gain G becomes small. As a result, the charge / discharge current Δi is reduced, and a decrease in oscillation amplitude is suppressed. Therefore, when the voltage at the oscillation frequency control terminal 35 decreases, the oscillation amplitude increases.

  The voltage controlled oscillator in the present embodiment changes the current i2 of the current source I2 based on the voltage of the oscillation frequency control terminal 35, thereby changing the voltage of the oscillation frequency control terminal 35 (when the oscillation frequency is changed). The fluctuation of the oscillation amplitude can be suppressed.

  Similarly to the current i3 of the current source I3, the current i2 of the current source I2 increases when the voltage of the oscillation frequency control terminal 35 is high. As shown in the above equation (Formula 6), when the current i2 increases, the oscillation amplitude increases. That is, a characteristic opposite to the characteristic with respect to the oscillation amplitude when the current i3 increases is shown. Therefore, fluctuations in oscillation amplitude when the voltage at the oscillation frequency control terminal 35 changes can be offset. Thus, by combining the characteristics of the current i2 and the current i3 with respect to the voltage of the oscillation concentrator control terminal 35, as shown by the solid line 82 shown in FIG. 3, the voltage of the oscillation frequency control terminal 35 (oscillation frequency) is independent. The oscillation amplitude can be made constant. For example, the characteristics of the current i2 and the current i3 can be matched by changing the mirror ratio of the current source I2 and the current source I3 with respect to the current source I5.

  As described above, the voltage controlled oscillator according to the present embodiment appropriately sets the resistance value RL1 of the resistors R1 and R2, the current i1 of the current source I1, and the current i2 of the current source I2, thereby setting the oscillation amplitude. In a range smaller than the conventional range of about 500 mVpp to 700 mVpp (Vbe-Vce (sat)), for example, it can be freely set to about 100 mVpp to 200 mVpp. Furthermore, this oscillation amplitude can be maintained substantially constant. For this reason, it is possible to reduce adverse effects on the intermediate frequency signal processing circuit 101 and the pre-stage tuner circuit 11 caused by the conventional oscillation amplitude being larger than necessary.

  As described above, the voltage controlled oscillator 103 according to the present embodiment changes the current i3 supplied to the oscillation frequency control circuit 51 in accordance with the voltage applied to the oscillation frequency control terminal 35, whereby the differential output terminal OUT1 and The equivalent capacity when viewed from OUT2 is changed. Thereby, the oscillation frequency can be changed according to the voltage applied to the oscillation frequency control terminal 35. A wide oscillation frequency control range can be realized by connecting C1 and C2 having sufficiently larger capacitance values than the parasitic capacitance between the bases and collectors of the transistors Q3 and Q4.

  In addition, the oscillation frequency control range of the voltage controlled oscillator 103 in the present embodiment can be set by each value of the coil Next, the capacitor Cext, the capacitor C1, the capacitor C2, the resistor R3, and the resistor R4. Thus, unlike the conventional voltage controlled oscillator, the frequency control range can be easily adjusted because it is not greatly affected by parasitic capacitance or the like.

  In addition, the voltage controlled oscillator 103 in the present embodiment can realize an arbitrary oscillation amplitude by setting the resistance values of the resistors R1 and R2 and the current i1 supplied from the current source I1. Therefore, the oscillation amplitude can be reduced. For this reason, it is possible to reduce adverse effects on the intermediate frequency signal processing circuit 101 and the pre-stage tuner circuit 11 which are caused by the conventional oscillation amplitude being larger than necessary.

  In addition, voltage controlled oscillator 103 in the present embodiment causes transistors Q1 and Q2 to operate in an operating region in which they are not saturated. As a result, the influence of parasitic capacitance and the like is less than when operating in a saturated state. Therefore, the oscillation frequency control range for the voltage applied to the oscillation frequency control terminal 35 can be easily adjusted.

  The voltage controlled oscillator 103 according to the present embodiment changes the currents i2 and i3 of the current source I2 and the current source I3 according to the voltage applied to the oscillation frequency control terminal 35, thereby making the oscillation amplitude substantially constant. Can be maintained.

  Although the voltage controlled oscillator according to the embodiment of the present invention has been described above, the present invention is not limited to this embodiment.

  For example, in the above description, the LC resonance circuit composed of the capacitor Cext and the coil Lext is connected between the collector of the transistor Q1 and the collector of the transistor Q2 of the differential amplification oscillator 50, but this is not limitative. For example, the LC resonance circuit may be connected between the collector of the transistor Q1 and the power supply, and the LC resonance circuit and the load resistor R1 may be connected in parallel.

  In the above description, the voltage controlled oscillator is described as being configured with a bipolar transistor, but may be configured with, for example, a MOS transistor.

  In the above description, the LC resonance circuit is connected to the outside of the semiconductor integrated circuit. However, when the oscillation frequency is high, the LC resonance circuit may be incorporated.

  Furthermore, in the above description, the oscillation frequency control circuit has the circuit configuration shown in FIG. 1, but is not limited to this as long as the capacitance value is changed according to the control voltage. For example, a varicap may be used.

  The present invention can be applied to a voltage controlled oscillator, a PLL circuit, a signal processing circuit, and a tuner pack, and in particular, an intermediate frequency signal processing for detecting a video intermediate frequency signal provided in a television receiver or a video playback device with a built-in television tuner. It can be applied to a voltage controlled oscillator used in a circuit.

It is a figure which shows the structure of the voltage controlled oscillator in this Embodiment. It is a figure which shows the relationship between the frequency control voltage and oscillation frequency of the voltage controlled oscillator in this Embodiment. It is a figure which shows the relationship between the frequency control voltage and oscillation amplitude of the voltage controlled oscillator in this Embodiment. It is a figure which shows the structure of a tuner system. It is a figure which shows the structure of the conventional voltage controlled oscillator.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 VCC terminal 10 Antenna 11 Tuner circuit 12 SAW filter 21 Intermediate frequency amplifier 22 Detector 23 Video amplifier 24 Video signal output terminal 30 Phase detector 31 Phase shifter 32, 50 Differential amplification type oscillator 33 Voltage current conversion circuit 34 Low frequency Pass filter 35 Oscillation frequency control terminal 51 Oscillation frequency control circuit 80, 81, 82 Solid line 101 Intermediate frequency signal processing circuit 102 PLL circuit 103 Voltage controlled oscillator Q1-Q9, Q11, Q12 Transistors R1-R6, R22, R23 Resistors C1, C2 , Cex capacity Lext coil I1 to I5, I12 Current source i1 to i3, i12 Current Vref Reference voltage OUT1, OUT2 Differential output terminals S10 to S12, S21 to S23, S30, S31a, S31b, S103 Signal S33 Control current S35 Frequency control voltage

Claims (13)

A voltage controlled oscillator that changes the frequency of the oscillation signal according to the control voltage,
An oscillation means having a differential amplification type transistor pair and outputting the oscillation signal from the transistor pair;
Capacitive means connected to the transistor pair;
Control means for changing the equivalent capacity of the capacity means according to the control voltage,
The voltage control oscillator, wherein the transistors constituting the transistor pair are configured to operate in a region where the output current does not substantially change. The oscillation means is
A first current source for supplying a constant current to the transistor pair;
A second current source for supplying a current corresponding to the control voltage to the transistor pair;
The voltage controlled oscillator according to claim 1, further comprising an LC resonance circuit connected to the transistor pair. The control means includes
A third current source for supplying a current to the capacitor means according to the control voltage;
The voltage-controlled oscillator according to claim 2, wherein the equivalent capacitance is changed according to a current supplied from the third current source. The voltage controlled oscillator further includes:
A voltage-current conversion circuit for converting the control voltage into a control current;
The voltage controlled oscillator according to claim 3, wherein the control current controls drive currents of the second current source and the third current source. The oscillation means is
A first transistor;
A second transistor having a base of the first transistor connected to a collector and a collector of the first transistor connected to a base;
A first resistor connected to the collector of the first transistor;
A second resistor connected to the collector of the second transistor;
The first transistor and the second transistor constitute the transistor pair;
The first current source and the second current source are connected in parallel to the emitter of the first transistor and the emitter of the second transistor;
The voltage-controlled oscillator according to claim 4, wherein the capacitor means is connected to bases of the first transistor and the second transistor. The capacity means is
A third transistor having a base connected to the base of the second transistor;
A fourth transistor having a base connected to a base of the first transistor;
A third resistor connected to the collector of the third transistor;
A fourth resistor connected to the collector of the fourth transistor;
A first capacitor connected between a base and a collector of the third transistor;
A second capacitor connected between the base and collector of the fourth transistor,
The voltage-controlled oscillator according to claim 5, wherein the third current source is connected to an emitter of the third transistor and an emitter of the fourth transistor. The voltage-current converter circuit is
A fifth transistor having a reference voltage applied to the base;
A sixth transistor to which the control voltage is applied to a base;
A fifth resistor, one connected to the emitter of the fifth transistor;
A sixth resistor, one connected to the emitter of the sixth transistor and the other connected to the other of the fifth resistors;
A fourth current source connected to the other of the fifth resistor and the other of the sixth resistor;
The voltage controlled oscillator according to claim 6, further comprising: a fifth current source connected to a collector of the fifth transistor. The second current source is
A seventh transistor having a collector connected to the emitter of the first transistor and the emitter of the second transistor;
A seventh resistor connected to the emitter of the seventh transistor;
The third current source is
An eighth transistor having a collector connected to the emitter of the third transistor and the emitter of the fourth transistor;
An eighth resistor connected to the emitter of the eighth transistor;
The fifth current source is
A ninth transistor having a base and a collector connected to a collector of the fifth transistor, a base of the seventh transistor, and a base of the eighth transistor;
The voltage controlled oscillator according to claim 7, further comprising: a ninth resistor connected to an emitter of the ninth transistor. The voltage controlled oscillator according to claim 6, wherein capacitance values of the first capacitor and the second capacitor are larger than a parasitic capacitance between a base and a collector of the third transistor and the fourth transistor. . The said 2nd current source and said 3rd current source are formed so that the amplitude of the said signal may become fixed irrespective of the said frequency. Any one of Claims 3-9 characterized by the above-mentioned. Voltage controlled oscillator. A PLL circuit that outputs a signal having the same frequency and phase as an input signal,
A voltage controlled oscillator according to any one of claims 1 to 10,
The PLL circuit, wherein the voltage control oscillator is controlled to output the same frequency as the input signal. A signal processing circuit for demodulating a video signal from an intermediate frequency signal,
12. A PLL circuit according to claim 11, which outputs a signal having the same frequency and phase as the intermediate frequency signal;
A signal processing circuit comprising: detection means for demodulating the video signal from the intermediate frequency signal based on a signal output from the PLL circuit. A tuner pack that demodulates a received signal into a video signal,
A tuner circuit that selects a signal of a predetermined frequency band included in the received signal and outputs an intermediate frequency signal;
A tuner pack comprising: the signal processing circuit according to claim 12, which demodulates a video signal from the intermediate frequency signal.

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