JP2007165626A - Light emitting element and its manufacturing method - Google Patents
Light emitting element and its manufacturing method Download PDFInfo
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- JP2007165626A JP2007165626A JP2005360442A JP2005360442A JP2007165626A JP 2007165626 A JP2007165626 A JP 2007165626A JP 2005360442 A JP2005360442 A JP 2005360442A JP 2005360442 A JP2005360442 A JP 2005360442A JP 2007165626 A JP2007165626 A JP 2007165626A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 106
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 claims abstract description 29
- 229910001195 gallium oxide Inorganic materials 0.000 claims abstract description 29
- 238000000034 method Methods 0.000 claims abstract description 21
- 239000004065 semiconductor Substances 0.000 claims abstract description 18
- 239000000463 material Substances 0.000 claims abstract description 13
- 239000011241 protective layer Substances 0.000 claims description 29
- 229910005191 Ga 2 O 3 Inorganic materials 0.000 claims description 27
- 239000013078 crystal Substances 0.000 claims description 7
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 6
- 229910018072 Al 2 O 3 Inorganic materials 0.000 claims description 4
- 229910052750 molybdenum Inorganic materials 0.000 claims description 2
- 229910052715 tantalum Inorganic materials 0.000 claims description 2
- 238000005530 etching Methods 0.000 abstract description 9
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 abstract description 7
- 150000001875 compounds Chemical class 0.000 abstract description 4
- 239000010410 layer Substances 0.000 description 34
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 10
- 229910002704 AlGaN Inorganic materials 0.000 description 9
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 8
- 239000007789 gas Substances 0.000 description 6
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 6
- 239000010409 thin film Substances 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 239000012159 carrier gas Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 4
- 239000010408 film Substances 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 125000005842 heteroatom Chemical group 0.000 description 2
- 239000011777 magnesium Substances 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 229910017083 AlN Inorganic materials 0.000 description 1
- MHYQBXJRURFKIN-UHFFFAOYSA-N C1(C=CC=C1)[Mg] Chemical compound C1(C=CC=C1)[Mg] MHYQBXJRURFKIN-UHFFFAOYSA-N 0.000 description 1
- 229910002601 GaN Inorganic materials 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000012811 non-conductive material Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48464—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
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- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
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- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
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Abstract
Description
本発明は、基板保護層を有するガリウム酸化物の基板上に結晶成長させて形成された発光素子、及び、その製造方法に関する。 The present invention relates to a light emitting element formed by crystal growth on a gallium oxide substrate having a substrate protective layer, and a method for manufacturing the same.
従来の発光素子として、ＳｉＣからなる基板上にＧａＮからなるｎ型層およびｐ型層を積層したもの等が知られている（例えば、特許文献１参照）。 As a conventional light emitting device, a device in which an n-type layer and a p-type layer made of GaN are stacked on a substrate made of SiC is known (for example, see Patent Document 1).
これに対して、基板を紫外領域の光を透過するものとし、可視領域から紫外領域の光を透過する無色透明の導電体を得ることができ、その導電体を基板に用いて垂直電極構造とすることが可能であり、基板側をも光の取り出し面とすることができる発光素子として、ガリウム酸化物の基板を使用して発光素子を形成したものが開発されている(例えば、特許文献２参照)。
しかし、特許文献２に開示された発光素子は、ＧａＮ層等のエピタキシャル層の成長工程においては、窒素源としてＮＨ３が用いられ、キャリアガスとして水素ガスが用いられる。ガリウム酸化物の基板、特に、Ｇａ２Ｏ３基板は、この水素ガスにより基板裏面がエッチングされ、光の透過性が低下すると共に、基板平面性が劣化する。 However, in the light emitting device disclosed in Patent Document 2, NH 3 is used as a nitrogen source and hydrogen gas is used as a carrier gas in a growth process of an epitaxial layer such as a GaN layer. A gallium oxide substrate, particularly a Ga 2 O 3 substrate, is etched by the hydrogen gas on the back side of the substrate, so that light transmittance is lowered and substrate planarity is deteriorated.
水素キャリアによるエッチングは、高温熱処理（例えば、１１００℃での熱処理）によるダメージと、低温熱処理（例えば、６５０℃での熱処理）によるダメージが観察される。このダメージによるエッチング跡をＳＥＭ観察すると、（０１０）面、（１００）面が特にエッチングされやすいことがわかる。しかし、エピタキシャル成長面を（００１）面としても、基板裏面側の微細なキズ等からエッチングが進行し、基板裏面側にエッチング跡が生じないよう結晶成長させることは困難である。 In the etching using a hydrogen carrier, damage due to high-temperature heat treatment (for example, heat treatment at 1100 ° C.) and damage due to low-temperature heat treatment (for example, heat treatment at 650 ° C.) are observed. When an SEM observation of the etching trace due to this damage is made, it can be seen that the (010) plane and the (100) plane are particularly easily etched. However, even if the epitaxial growth surface is the (001) plane, it is difficult to grow crystals so that etching progresses from fine scratches or the like on the back surface side of the substrate and no trace of etching occurs on the back surface side of the substrate.
よって、ガリウム酸化物基板上にＧａＮ層等を成長させて形成した発光素子において、基板裏面から出射光を取出すには研磨等で平坦化する必要があり、また、発光素子製造工程において、基板裏面の平面性が悪く化合物半導体成長工程に種々の悪影響を与えることになる。 Therefore, in a light emitting device formed by growing a GaN layer or the like on a gallium oxide substrate, it is necessary to flatten by polishing or the like in order to take out emitted light from the back surface of the substrate. The flatness of the film is poor, and various adverse effects are exerted on the compound semiconductor growth process.
従って、本発明の目的は、ガリウム酸化物基板の化合物半導体成長工程において使用する水素ガスによってもエッチング等の影響を受けず、基板平面性がよく、基板の透明性に優れたガリウム酸化物基板上に形成された発光素子、及び、その製造方法を提供することにある。 Accordingly, an object of the present invention is to provide a substrate on a gallium oxide substrate that is not affected by etching or the like even by the hydrogen gas used in the compound semiconductor growth process of the gallium oxide substrate, has good substrate flatness, and excellent substrate transparency. It is an object to provide a light emitting device formed in the above and a manufacturing method thereof.
本発明は、上記目的を達成するために、裏面に基板保護層を有し、表面に半導体材料を結晶成長させるガリウム酸化物基板と、前記半導体材料を前記ガリウム酸化物基板の前記表面に結晶成長させて形成した発光素子部とを有する発光素子を提供する。 In order to achieve the above object, the present invention provides a gallium oxide substrate having a substrate protective layer on the back surface and crystal growth of a semiconductor material on the surface, and crystal growth of the semiconductor material on the surface of the gallium oxide substrate. There is provided a light emitting element having a light emitting element portion formed in this manner.
また、本発明は、上記目的を達成するために、表面に半導体材料を結晶成長させるガリウム酸化物基板の裏面に基板保護層を形成する保護層形成工程と、前記半導体材料を前記ガリウム酸化物基板の前記表面に結晶成長させて発光素子部を形成する発光素子部形成工程と、前記発光素子部を電気的に接続して発光素子に組立てる組立工程とを有する発光素子の製造方法を提供する。 In order to achieve the above object, the present invention provides a protective layer forming step of forming a substrate protective layer on the back surface of a gallium oxide substrate on which a semiconductor material is crystal-grown, and the semiconductor material is formed on the gallium oxide substrate. There is provided a method for manufacturing a light emitting device, comprising: a light emitting device portion forming step for forming a light emitting device portion by growing a crystal on the surface of the light emitting device; and an assembly step for electrically connecting the light emitting device portion to assemble the light emitting device.
本発明の発光素子及びその製造方法によれば、ガリウム酸化物基板の化合物半導体成長工程において使用する水素ガスによってもエッチング等の影響を受けず、基板平面性がよく、基板の透明性に優れたガリウム酸化物基板上に形成された発光素子、及び、その製造方法を提供することが可能となる。 According to the light emitting device and the method for manufacturing the same of the present invention, the hydrogen gas used in the compound semiconductor growth process of the gallium oxide substrate is not affected by etching or the like, the substrate flatness is good, and the transparency of the substrate is excellent. It is possible to provide a light-emitting element formed over a gallium oxide substrate and a manufacturing method thereof.
（第１の実施の形態）
（ガリウム酸化物基板）
図１は、発光素子を形成する成長基板であるガリウム酸化物基板を示す図である。ガリウム酸化物基板としては、Ｇａ２Ｏ３基板、特に、β―Ｇａ２Ｏ３基板が挙げられる。以下では、ガリウム酸化物基板としてＧａ２Ｏ３基板を用いて説明する。
(First embodiment)
(Gallium oxide substrate)
FIG. 1 is a diagram showing a gallium oxide substrate which is a growth substrate on which a light emitting element is formed. Examples of the gallium oxide substrate include a Ga 2 O 3 substrate, particularly a β-Ga 2 O 3 substrate. Hereinafter, description will be made using a Ga 2 O 3 substrate as the gallium oxide substrate.
Ｇａ２Ｏ３基板１は、片面にＣＶＤ法、スパッタ法等により、基板保護層２が形成されている。基板保護層２としては、１２００℃の耐熱性を有する材料で構成されるのが好ましく、ＴｉＮ，Ｗ，ＷＳｉ，ＢＰ，Ａｌ２Ｏ３，Ｍｏ,Ｔａ,ＧａＮ,ＡｌＮ等が挙げられる。この中でも、導電性を有するＴｉＮ，Ｗ，ＷＳｉ，ＢＰが特に好ましい。この実施例では、導電性を有するＴｉＮを基板保護層２として用いる。また、基板保護層２は、少なくともピンホールの発生しない程度の膜厚を有することが好ましく、例えば、５００Å〜５０００Åの膜厚が好ましい。 The Ga 2 O 3 substrate 1 has a substrate protective layer 2 formed on one side by a CVD method, a sputtering method or the like. The substrate protective layer 2 is preferably made of a material having heat resistance of 1200 ° C., and examples thereof include TiN, W, WSi, BP, Al 2 O 3 , Mo, Ta, GaN, and AlN. Among these, TiN, W, WSi, and BP having conductivity are particularly preferable. In this embodiment, conductive TiN is used as the substrate protective layer 2. Moreover, it is preferable that the board | substrate protective layer 2 has a film thickness which does not generate | occur | produce a pinhole at least, for example, the film thickness of 500 to 5000 mm is preferable.
（発光素子の形成）
図２は、ＭＯＣＶＤ法を示す概略図であり、ＭＯＣＶＤ装置の主要部を示す概略断面を示す。ＭＯＣＶＤ装置１００は、真空ポンプおよび排気装置（図示せず）を備えた排気部１０６が接続された反応容器１０１と、Ｇａ２Ｏ３基板１を載置するサセプタ１０２と、サセプタ１０２を加熱するヒータ１０３と、サセプタ１０２を回転、上下移動させる制御軸１０４と、Ｇａ２Ｏ３基板１に向って斜め、または水平に原料ガスを供給する石英ノズル１０５と、各種原料ガスを発生する、ＴＭＧ（トリメチルガリウム）ガス発生装置１１１、ＴＭＡ（トリメチルアルミニウム）ガス発生装置１１２、ＴＭＩ（トリメチルインジウム）ガス発生装置１１３等を備える。なお、必要に応じてガス発生装置の数を増減してもよい。窒素源としてＮＨ３が用いられ、キャリアガスとしてＨ２が用いられる。ＧａＮ薄膜を形成するときは、ＴＭＧとＮＨ３が、ＡｌＧａＮ薄膜を形成するときは、ＴＭＡ、ＴＭＧおよびＮＨ３が、ＩｎＧａＮ薄膜を形成するときは、ＴＭＩ、ＴＭＧおよびＮＨ３が用いられる。
ＭＯＣＶＤ装置１００により薄膜を形成するには、例えば、以下のように行う。まず、Ｇａ２Ｏ３基板１は、基板保護層２を下面にし、薄膜が形成される面を上にしてサセプタ１０２に保持され、反応容器１０１内に設置される。
(Formation of light emitting element)
FIG. 2 is a schematic view showing the MOCVD method, and shows a schematic cross section showing the main part of the MOCVD apparatus. The MOCVD apparatus 100 includes a reaction vessel 101 connected to an exhaust unit 106 having a vacuum pump and an exhaust device (not shown), a susceptor 102 on which the Ga 2 O 3 substrate 1 is placed, and a heater that heats the susceptor 102. 103, a control shaft 104 that rotates and moves the susceptor 102 up and down, a quartz nozzle 105 that supplies a source gas obliquely or horizontally toward the Ga 2 O 3 substrate 1, and TMG (trimethyl) that generates various source gases. A gallium)
In order to form a thin film by the MOCVD apparatus 100, for example, the following is performed. First, the Ga 2 O 3 substrate 1 is held in the susceptor 102 with the substrate protective layer 2 facing down and the surface on which the thin film is formed facing up, and is placed in the reaction vessel 101.
（ＬＥＤ素子の構成）
図３は、第１の実施の形態に係る発光素子としてのＬＥＤの構成を示すものである。
(Configuration of LED element)
FIG. 3 shows a configuration of an LED as a light emitting element according to the first embodiment.
このＬＥＤ素子１０は、ｎ型の導電型を有するＧａ２Ｏ３基板１を有し、Ｇａ２Ｏ３基板１上にＳｉドープのｎ＋−ＧａＮ層１２と、Ｓｉドープのｎ−ＡｌＧａＮ層１３と、ＩｎＧａＮ／ＧａＮの多重量子井戸構造を有するＭＱＷ（Ｍｕｌｔｉｐｌｅ−Ｑｕａｎｔｕｍ Ｗｅｌｌ）１４と、Ｍｇドープのｐ−ＡｌＧａＮ層１５と、Ｍｇドープのｐ＋−ＧａＮ層１６と、ＩＴＯ(Indium Tin Oxide)からなるｐ電極１７とを順次積層して形成されており、Ｇａ２Ｏ３基板１の下面には基板保護層２を有する。 This LED element 10 has a Ga 2 O 3 substrate 1 having an n-type conductivity, and a Si-doped n + -GaN layer 12 and a Si-doped n-AlGaN layer 13 on the Ga 2 O 3 substrate 1. And MQW (Multiple-Quantum Well) 14 having a multiple quantum well structure of InGaN / GaN, Mg-doped p-AlGaN layer 15, Mg-doped p + -GaN layer 16, and ITO (Indium Tin Oxide). A p-electrode 17 is sequentially laminated, and a substrate protective layer 2 is provided on the lower surface of the Ga 2 O 3 substrate 1.
ｎ＋−ＧａＮ層１２およびｐ＋−ＧａＮ層１６は、１１００℃の成長温度条件でキャリアガスとしてＮ２を使用し、ＮＨ３とトリメチルガリウム（ＴＭＧ）をＧａ２Ｏ３基板１が配置されたリアクタ内に供給することにより形成される。ｎ＋−ＧａＮ層１２についてはｎ型の導電性を付与するためのドーパントとしてモノシラン（ＳｉＨ４）をＳｉ原料として使用し、ｐ＋−ＧａＮ層１６についてはｐ型の導電性を付与するためのドーパントとしてシクロペンタジエニルマグネシウム（Ｃｐ２Ｍｇ）をＭｇ原料として使用する。また、ｎ−ＡｌＧａＮ層１３およびｐ−ＡｌＧａＮ層１５については、上記したもののほかに更にＴＭＡをリアクタ内に供給することによって形成される。 The n + -GaN layer 12 and the p + -GaN layer 16 use N 2 as a carrier gas under the growth temperature condition of 1100 ° C., and the Ga 2 O 3 substrate 1 is arranged with NH 3 and trimethylgallium (TMG). It is formed by feeding into the reactor. For n + -GaN layer 12, monosilane (SiH 4 ) is used as a Si raw material as a dopant for imparting n-type conductivity, and for p + -GaN layer 16, p-type conductivity is imparted. Cyclopentadienyl magnesium (Cp 2 Mg) is used as a Mg raw material as a dopant. The n-AlGaN layer 13 and the p-AlGaN layer 15 are formed by further supplying TMA into the reactor in addition to the above.
ＭＱＷ１４は、１１００℃の成長温度条件でキャリアガスとしてＨ２を使用し、トリメチルインジウム（ＴＭＩ）とＴＭＧをリアクタ内に供給することによって形成される。ＩｎＧａＮの形成時にはＴＭＩとＴＭＧが供給され、ＧａＮの形成時にはＴＭＧが供給される。
The
（ＬＥＤ素子の製造工程）
まず、ＭＯＣＶＤ装置のサセプタに基板保護層２を下にしてＧａ２Ｏ３基板１を搭載する。
(LED element manufacturing process)
First, the Ga 2 O 3 substrate 1 is mounted on the susceptor of the MOCVD apparatus with the substrate protective layer 2 facing down.
（ＧａＮ形成工程）
次に、所定の温度（４００℃）に昇温して、Ｎ２の供給を開始する。続いてリアクタ内の昇温を開始し、１１００℃となったときに昇温を停止し、その温度を維持するとともにＴＭＧを６０ｓｃｃｍ供給することによって膜厚１μｍのｎ＋−ＧａＮ層１２を形成する。次に、リアクタへのＮ２の供給を停止し、Ｈ２を供給する。
(GaN formation process)
Next, the temperature is raised to a predetermined temperature (400 ° C.), and supply of N 2 is started. Subsequently, the temperature inside the reactor is started, and when the temperature reaches 1100 ° C., the temperature rise is stopped, and the temperature is maintained and TMG is supplied at 60 sccm to form the n + -GaN layer 12 having a thickness of 1 μm. . Next, the supply of N 2 to the reactor is stopped and H 2 is supplied.
以降、ｎ−ＡｌＧａＮ層１３、ＭＱＷ１４、ｐ−ＡｌＧａＮ１５層、ｐ＋−ＧａＮ層１６、およびｐ電極１７を順次形成する。
Thereafter, the n-AlGaN layer 13, the
上記の工程により、Ｇａ２Ｏ３基板１に形成された複数の発光素子は、ダイシング等により個別の発光素子に切断されて、ベアチップが作製される。 Through the above steps, the plurality of light emitting elements formed on the Ga 2 O 3 substrate 1 are cut into individual light emitting elements by dicing or the like, and a bare chip is manufactured.
尚、上記の説明では、ＭＱＷ構造の発光素子としたが、ヘテロ構造、ダブルへテロ構造、単一量子井戸構造等であっても同様に本発明が適用できる。 In the above description, the light emitting element has the MQW structure, but the present invention can be similarly applied to a hetero structure, a double hetero structure, a single quantum well structure, or the like.
（発光素子の組立て）
上記のようにＧａ２Ｏ３基板１から取出された個々のベアチップは、以下のような工程により、発光装置として組立てられる。
(Assembly of light emitting element)
Each bare chip taken out from the Ga 2 O 3 substrate 1 as described above is assembled as a light emitting device through the following steps.
Ｇａ２Ｏ３基板１、エピタキシャル層２１、ｐ電極１７で構成される発光素子は、回路基板等へ挿入接続されるリードピン３１を有するサブマウント３０に導電性の金属ペースト等を介して実装される。サブマウント３０は、ｎ型のシリコン基板で形成されているので、ＬＥＤ素子１０を静電気から保護するためのツェナーダイオードとして動作し、導電性を有する基板保護層２は、サブマウント３０上に形成されたｐ型半導体層３０ａに電気的に接続され、ｐ電極１７は、ボンディング電極１９、ボンディング部２０を介してボンディングワイヤ２２によりサブマウント３０に電気的に接続される。以上の工程により、回路基板等へ実装可能な発光素子ユニットとして完成する。
A light-emitting element composed of the Ga 2 O 3 substrate 1, the epitaxial layer 21, and the p-electrode 17 is mounted on a submount 30 having lead pins 31 inserted and connected to a circuit board or the like via a conductive metal paste or the like. . Since the submount 30 is formed of an n-type silicon substrate, the submount 30 operates as a Zener diode for protecting the LED element 10 from static electricity, and the conductive substrate protection layer 2 is formed on the submount 30. The p-type semiconductor layer 30a is electrically connected, and the p-electrode 17 is electrically connected to the submount 30 by the bonding wire 22 through the
（実施の形態の効果）
第１の実施の形態によれば、Ｇａ２Ｏ３基板のエピタキシャル成長工程において使用する水素ガスによってもＧａ２Ｏ３基板がエッチング等の影響を受けず、基板平面性が維持でき、Ｇａ２Ｏ３基板の透明性に優れた発光素子、及び、その製造方法が可能となる。
(Effect of embodiment)
According to the first embodiment, Ga 2 O 3 Ga 2 O 3 substrate by the hydrogen gas used in the epitaxial growth process of the substrate is not affected, such as etching, to maintain the substrate flatness, Ga 2 O 3 A light emitting device excellent in the transparency of the substrate and a method for manufacturing the light emitting device are possible.
そして、基板保護層として導電性を有する材質を使用することで、基板保護層はｎ電極として機能するので、基板保護層は２つの機能を果たすことになり、生産性向上及びコスト低減に繋がる。また、Ｇａ２Ｏ３基板の透明性が維持されるので、基板裏面から発光素子の出射光を取出す構成にすることも可能となる。 By using a conductive material as the substrate protective layer, the substrate protective layer functions as an n-electrode, so that the substrate protective layer fulfills two functions, leading to productivity improvement and cost reduction. Further, since the transparency of the Ga 2 O 3 substrate is maintained, it is possible to adopt a configuration in which the emitted light of the light emitting element is extracted from the back surface of the substrate.
（第２の実施の形態）
図４は、第２の実施の形態に係る発光素子としてのＬＥＤの構成を示すものである。
(Second Embodiment)
FIG. 4 shows a configuration of an LED as a light emitting element according to the second embodiment.
第２の実施の形態は、第１の実施の形態において、サブマウント３０に対して、発光素子１０のｐ側ｎ側を上下逆に配置して構成したものである。すなわち、Ｇａ２Ｏ３基板１から取出されたベアチップは、ｐ電極１７がサブマウント３０に導電性の金属ペースト等を介して実装されると共に、導電性を有するＴｉＮで形成された基板保護層２はｎ電極として機能するので、ボンディング電極１９、ボンディング部２０を介してボンディングワイヤ２２によりサブマウント３０上に形成されたｐ型半導体層３０ａに電気的に接続される。以上の工程により、回路基板等へ実装可能な発光素子ユニットとして完成する。
The second embodiment is configured by arranging the p-side n-side of the light emitting element 10 upside down with respect to the submount 30 in the first embodiment. That is, the bare chip taken out from the Ga 2 O 3 substrate 1 has the p-electrode 17 mounted on the submount 30 via a conductive metal paste or the like, and the substrate protective layer 2 formed of conductive TiN. Since it functions as an n-electrode, it is electrically connected to a p-type semiconductor layer 30 a formed on the submount 30 by a bonding wire 22 through a
（第３の実施の形態）
図５は、第３の実施の形態に係る発光素子としてのＬＥＤの構成を示すものである。
(Third embodiment)
FIG. 5 shows a configuration of an LED as a light emitting element according to the third embodiment.
第３の実施の形態は、第１の実施の形態において、基板保護層２として導電性を有しないＡｌＮを用いた構成となっている。第１の実施の形態と同様にしてＭＯＣＶＤ法によりエピタキシャル層２１を形成し、その後、基板保護層２を研磨、ＣＭＰ（Ｃｈｅｍｉｃａｌ Ｍｅｃｈａｎｉｃａｌ Ｐｏｌｉｓｈｉｎｇ）法、エッチング等により除去する。 The third embodiment has a configuration using AlN having no conductivity as the substrate protective layer 2 in the first embodiment. Similar to the first embodiment, the epitaxial layer 21 is formed by MOCVD, and then the substrate protective layer 2 is removed by polishing, CMP (Chemical Mechanical Polishing), etching, or the like.
基板保護層２の除去後に、エピタキシャル層２１の両側に、フォトリソグラフィ技術を用いたパターニングを作製し、蒸着によりｐ電極１７、およびｎ電極１８を形成する。 After removing the substrate protective layer 2, patterning using a photolithography technique is made on both sides of the epitaxial layer 21, and the p electrode 17 and the n electrode 18 are formed by vapor deposition.
上記の工程により、Ｇａ２Ｏ３基板１に形成された発光素子は、ダイシング等により個別の発光素子に切断されて、ベアチップが作製される。 Through the above steps, the light emitting elements formed on the Ga 2 O 3 substrate 1 are cut into individual light emitting elements by dicing or the like, and a bare chip is manufactured.
（発光素子の組立て）
Ｇａ２Ｏ３基板１、エピタキシャル層２１、ｐ電極１７、及びｎ電極１８で構成される発光素子は、回路基板等へ挿入接続されるリードピン３１を有するサブマウント３０に導電性の金属ペースト等を介して実装される。サブマウント３０は、ｎ型のシリコン基板で形成されているので、ＬＥＤ素子１０を静電気から保護するためのツェナーダイオードとして動作し、ｎ電極１８はサブマウント３０上に形成されたｐ型半導体層３０ａに電気的に接続され、ｐ電極１７は、ボンディング電極１９、ボンディング部２０を介してボンディングワイヤ２２によりサブマウント３０に電気的に接続される。以上の工程により、回路基板等へ実装可能な発光素子ユニットとして完成する。
(Assembly of light emitting element)
A light emitting element composed of the Ga 2 O 3 substrate 1, the epitaxial layer 21, the p electrode 17, and the n electrode 18 is made of a conductive metal paste or the like on a submount 30 having lead pins 31 inserted and connected to a circuit board or the like. Implemented through. Since the submount 30 is formed of an n-type silicon substrate, it operates as a Zener diode for protecting the LED element 10 from static electricity, and the n-electrode 18 is a p-type semiconductor layer 30a formed on the submount 30. The p electrode 17 is electrically connected to the submount 30 by the bonding wire 22 through the
（実施の形態の効果）
第３の実施の形態によれば、第１の実施の形態の効果に加え、基板保護層として導電性を有しない材質を使用できるので、材料選択の幅が拡大して、製造プロセスへの制約を小さくできるという効果を有する。
(Effect of embodiment)
According to the third embodiment, in addition to the effects of the first embodiment, a non-conductive material can be used as the substrate protective layer, so that the range of material selection is expanded and the manufacturing process is restricted. Can be reduced.
（第４の実施の形態）
図６は、第４の実施の形態に係る発光素子としてのＬＥＤの構成を示すものである。
(Fourth embodiment)
FIG. 6 shows a configuration of an LED as a light emitting element according to the fourth embodiment.
第４の実施の形態は、第３の実施の形態において、サブマウント３０に対して、発光素子１０のｐ側ｎ側を上下逆に配置して構成したものである。すなわち、Ｇａ２Ｏ３基板１から取出されたベアチップは、ｐ電極１７がサブマウント３０に導電性の金属ペースト等を介して実装されると共に、ｎ電極１８は、ボンディング電極１９、ボンディング部２０を介してボンディングワイヤ２２によりサブマウント３０上に形成されたｐ型半導体層３０ａに電気的に接続される。以上の工程により、回路基板等へ実装可能な発光素子ユニットとして完成する。
In the fourth embodiment, the p-side n-side of the light emitting element 10 is arranged upside down with respect to the submount 30 in the third embodiment. That is, in the bare chip taken out from the Ga 2 O 3 substrate 1, the p electrode 17 is mounted on the submount 30 via a conductive metal paste or the like, and the n electrode 18 is bonded to the
１ Ｇａ２Ｏ３基板
２ 基板保護層
１０ ＬＥＤ素子
１２ ｎ＋−ＧａＮ層
１３ ｎ−ＡｌＧａＮ層
１４ ＭＱＷ
１５ ｐ−ＡｌＧａＮ層
１６ ｐ＋−ＧａＮ層
１７ ｐ電極
１８ ｎ電極
１９ ボンディング電極
２０ ボンディング部
２１ エピタキシャル層
２２ ボンディングワイヤ
３０ サブマウント
３１ リードピン
1 Ga 2 O 3 substrate 2 substrate protective layer 10
15 p-
Claims (10)
前記半導体材料を前記ガリウム酸化物基板の前記表面に結晶成長させて形成した発光素子部とを有する発光素子。 A gallium oxide substrate having a substrate protective layer on the back surface and crystal growth of a semiconductor material on the surface;
A light emitting element having a light emitting element portion formed by crystal growth of the semiconductor material on the surface of the gallium oxide substrate.
前記半導体材料を前記ガリウム酸化物基板の前記表面に結晶成長させて発光素子部を形成する発光素子部形成工程と、
前記発光素子部を電気的に接続して発光素子に組立てる組立工程とを有する発光素子の製造方法。 A protective layer forming step of forming a substrate protective layer on the back surface of the gallium oxide substrate on which the semiconductor material is crystal-grown on the surface;
A light emitting element part forming step of forming a light emitting element part by crystal-growing the semiconductor material on the surface of the gallium oxide substrate;
A method of manufacturing a light emitting device, comprising: assembling the light emitting device by electrically connecting the light emitting device portions.
The method for manufacturing a light emitting device according to claim 9, wherein the substrate protective layer is made of Al 2 O 3 or AlN.
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| WO2007111432A1 (en) * | 2006-03-28 | 2007-10-04 | Seoul Opto Device Co., Ltd. | Light emitting device having zener diode therein and method of fabricating the same |
| KR101020958B1 (en) * | 2008-11-17 | 2011-03-09 | 엘지이노텍 주식회사 | Method for manufacturing a gallium oxide substrate, light emitting device and method for fabricating the same |
| JP5491065B2 (en) * | 2009-04-30 | 2014-05-14 | 住友電気工業株式会社 | Method for producing wafer product and method for producing gallium nitride based semiconductor optical device |
| KR101047652B1 (en) | 2009-12-18 | 2011-07-07 | 엘지이노텍 주식회사 | Light emitting device and manufacturing method |
| CN102034912B (en) | 2009-12-29 | 2015-03-25 | 比亚迪股份有限公司 | Light-emitting diode epitaxial wafer, manufacturing method and manufacturing method of chip |
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| JPH09306848A (en) * | 1996-05-16 | 1997-11-28 | Nec Corp | Growing semiconductor crystalline film |
| JPH11243253A (en) * | 1998-02-25 | 1999-09-07 | Sony Corp | Growth of nitride-based iii-v compound semiconductor, manufacture of semiconductor device, substrate for growth of nitride-based iii-v compound semiconductor, manufacture of the substrate for growth of nitride-based iii-v compound semiconductor |
| JP2003163375A (en) * | 2001-11-29 | 2003-06-06 | Sanyo Electric Co Ltd | Nitride semiconductor element and its manufacturing method |
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| US6486499B1 (en) * | 1999-12-22 | 2002-11-26 | Lumileds Lighting U.S., Llc | III-nitride light-emitting device with increased light generating capability |
| JP4754711B2 (en) * | 2000-06-21 | 2011-08-24 | 昭和電工株式会社 | Group III nitride semiconductor light-emitting diode, light-emitting diode lamp, light source, group III nitride semiconductor light-emitting diode electrode and manufacturing method thereof |
| JP3679097B2 (en) * | 2002-05-31 | 2005-08-03 | 株式会社光波 | Light emitting element |
| JP2004031513A (en) * | 2002-06-24 | 2004-01-29 | Sharp Corp | Semiconductor light emitting element |
| JP3795007B2 (en) * | 2002-11-27 | 2006-07-12 | 松下電器産業株式会社 | Semiconductor light emitting device and manufacturing method thereof |
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| JPH09306848A (en) * | 1996-05-16 | 1997-11-28 | Nec Corp | Growing semiconductor crystalline film |
| JPH11243253A (en) * | 1998-02-25 | 1999-09-07 | Sony Corp | Growth of nitride-based iii-v compound semiconductor, manufacture of semiconductor device, substrate for growth of nitride-based iii-v compound semiconductor, manufacture of the substrate for growth of nitride-based iii-v compound semiconductor |
| JP2003163375A (en) * | 2001-11-29 | 2003-06-06 | Sanyo Electric Co Ltd | Nitride semiconductor element and its manufacturing method |
| JP2005340308A (en) * | 2004-05-24 | 2005-12-08 | Koha Co Ltd | Method of manufacturing semiconductor device |
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