JP2007139850A - Electrooptical apparatus, electronic apparatus, and method for manufacturing electrooptical apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide: an electrooptical apparatus such that the capacity value of a holding capacity per unit area can be increased while greatly varying neither electric characteristics nor reliability of a thin film transistor; electronic apparatus equipped with the electrooptical apparatus; and a method for manufacturing the electrooptical apparatus. <P>SOLUTION: In a liquid crystal device 1, a dielectric layer 5 of the holding capacity 1h has a first dielectric layer 5a covering the top surface of a lower electrode 3c and a second dielectric layer 5b formed between a layer above the first dielectric layer 5a and the same layer with a gate insulating layer 4, and the second dielectric layer 5b is formed of the same insulating film with the gate insulating layer 4 to a thickness thinner than the gate insulating layer 4. Further, the first dielectric layer 5a has a larger dielectric constant than the second dielectric layer 5b. Consequently, the capacity value of the holding capacity 1h per unit area can be increased. The gate insulating film 4 comprises silicon nitride films 4a and 4b, so neither electric characteristic nor reliability varies in the thin film transistor 1c. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an electro-optical device such as a liquid crystal device including a thin film transistor and a storage capacitor on an element substrate, an electronic apparatus including the electro-optical device, and a method for manufacturing the electro-optical device.

In an active matrix type liquid crystal device or the like, a thin film transistor for pixel switching and a pixel electrode electrically connected to a data line through the thin film transistor are formed on an element substrate that holds liquid crystal with an opposing substrate. The orientation of the liquid crystal is controlled for each pixel by an image signal applied to the pixel electrode from the data line through the thin film transistor. In order to improve the charge retention characteristics when driving the liquid crystal, a storage capacitor is formed on the element substrate, and the storage capacitor often uses a gate insulating layer of a thin film transistor as a dielectric layer. Here, if the capacitance value per unit area of the storage capacitor is increased, the charge retention characteristics are improved. On the other hand, if the occupied area is reduced, the pixel aperture ratio is increased as the capacitance value per unit area is increased. Can do. Therefore, a plurality of insulating films such as a silicon oxide film and a silicon nitride film are stacked to form a gate insulating layer, while a dielectric layer is formed by an insulating film having a smaller number of layers than the gate insulating layer. A structure in which the capacitance value per unit area of the capacitance is increased has been proposed (see, for example, Patent Document 1).
Japanese Patent Laid-Open No. 06-3504

  In recent years, with the miniaturization of the pixel region, there has been an increasing demand for increasing the capacitance value per unit area of the storage capacitor. In order to meet such a demand, for example, an insulating film having a high dielectric constant such as an aluminum oxide film is used for the gate insulating layer instead of the silicon oxide film or the silicon nitride film, and the dielectric layer of the storage capacitor is also used. An aluminum oxide film may be used. However, when an aluminum oxide film or the like is used instead of a silicon oxide film or a silicon nitride film in the gate insulating layer, the electrical characteristics and reliability of the thin film transistor change greatly, and the characteristics and reliability of the electro-optical device cannot be guaranteed. There is a point.

  In view of the above problems, an object of the present invention is to provide an electro-optical device capable of increasing the capacitance value per unit area of a storage capacitor without greatly changing the electrical characteristics and reliability of the thin film transistor, and the electro-optical device. Another object of the present invention is to provide an electronic apparatus and a method for manufacturing an electro-optical device.

  Another object of the present invention is to provide an electro-optical device capable of increasing a capacitance value per unit area of a storage capacitor without changing any of the electrical characteristics and reliability of the thin film transistor, an electronic apparatus including the electro-optical device, and an electric device An object of the present invention is to provide a method for manufacturing an optical device.

  In order to solve the above problems, in the present invention, each pixel region of an element substrate includes a thin film transistor, a pixel electrode electrically connected to the thin film transistor, and a lower electrode on a lower layer side than the gate insulating layer of the thin film transistor. In the electro-optical device including the storage capacitor, the dielectric layer of the storage capacitor includes a first dielectric layer covering an upper surface of the lower electrode, an upper layer of the first dielectric layer, and the gate insulating layer. And a second dielectric layer formed between the same layers, the second dielectric layer having a thickness smaller than that of the gate insulating layer and the same insulating film as at least a part of the gate insulating layer The first dielectric layer is made of an oxide film made of the same metal material as the lower electrode, and has a higher dielectric constant than the second dielectric layer.

  In the present invention, the dielectric layer of the storage capacitor includes the first dielectric layer covering the upper surface of the lower electrode and the second dielectric layer formed between the upper layer of the first dielectric layer and the same layer as the gate insulating layer. The second dielectric layer is formed of the same insulating film as a part of the gate insulating layer, but is thinner than the gate insulating layer. The first dielectric layer is made of an oxide film having a higher dielectric constant than that of the second dielectric layer. Therefore, in the dielectric layer of the storage capacitor, the thickness of the second dielectric layer can be considerably thinner than that of the conventional gate insulating layer by the amount of the first dielectric layer, and Since the dielectric constant of the first dielectric layer is high, the capacitance value per unit area of the storage capacitor can be increased. Therefore, while it is possible to improve the charge retention characteristic while keeping the occupied area of the storage capacitor as it is, the pixel aperture ratio can be increased if the occupied area is reduced by the amount of increase in the capacitance value per unit area. it can. In addition, it is possible to improve both the charge retention characteristic and the pixel aperture ratio. Furthermore, as the gate insulating layer, since the insulating film that has been used can be used as it is, the electrical characteristics and reliability of the thin film transistor are not significantly changed.

  That is, even when the oxide film constituting the first dielectric layer is used as a part of the gate insulating layer, most of the gate insulating layer uses the insulating film used so far, so that the electrical characteristics of the thin film transistor And reliability does not change significantly. Further, if the oxide film constituting the first dielectric layer is not used as a part of the gate insulating layer, the entire gate insulating layer is formed of the insulating film used so far. Sex does not change at all.

  In the present invention, the first dielectric layer may be configured to cover an upper surface and a side surface of the lower electrode.

  In the present invention, the gate electrode of the thin film transistor is formed of the same metal material as the lower electrode between the same layers as the lower electrode of the storage capacitor, and the oxide film includes the lower electrode and the gate electrode. It is preferable that only the upper surface of the lower electrode is covered. That is, if the oxide film constituting the first dielectric layer is not used as a part of the gate insulating layer, the entire gate insulating layer is formed of the insulating film used so far, so that the electrical characteristics and reliability of the thin film transistor can be improved. Sex does not change at all.

  In the present invention, the gate electrode of the thin film transistor is formed of the same metal material as the lower electrode between the same layers as the lower electrode of the storage capacitor, and the oxide film includes the lower electrode and the gate electrode. It is preferable that only the upper and side surfaces of the lower electrode are covered. That is, if the oxide film constituting the first dielectric layer is not used as a part of the gate insulating layer, the entire gate insulating layer is formed of the insulating film used so far, so that the electrical characteristics and reliability of the thin film transistor can be improved. Sex does not change at all.

  In the present invention, the first dielectric layer is made of, for example, an anodic oxide film for the lower electrode. The first dielectric layer may be, for example, a gas phase oxide film for the lower electrode.

  In the present invention, the lower electrode is made of, for example, aluminum, aluminum alloy, tantalum, tantalum alloy, niobium, niobium alloy, titanium, or titanium alloy. With such a metal material, the dielectric constant of the oxide film is higher than that of the silicon oxide film or silicon nitride film, and it has a resistance value that can be used as a wiring. Here, when the lower electrode or the gate electrode has a laminated structure of a plurality of metal layers, at least the surface side thereof is made of, for example, aluminum, aluminum alloy, tantalum, tantalum alloy, niobium, niobium alloy, titanium, or titanium alloy. It only has to be configured.

  When the electro-optical device to which the present invention is applied is a liquid crystal device, the element substrate holds liquid crystal as an electro-optical material between the element substrate and a counter substrate disposed to face the element substrate.

  The electro-optical device according to the present invention can be used as a display unit in an electronic apparatus such as a mobile computer or a mobile phone.

  In the present invention, each pixel region of the element substrate includes a thin film transistor, a pixel electrode electrically connected to the thin film transistor, and a storage capacitor having a lower electrode on a lower layer side than the gate insulating layer of the thin film transistor. In the method of manufacturing an optical device, a metal film forming step of forming a metal film for forming a gate electrode of the thin film transistor and a lower electrode of the storage capacitor on the element substrate, and patterning the metal film to form the gate electrode And a patterning step for forming the lower electrode, and a first dielectric comprising an oxide film having a dielectric constant higher than that of the gate insulating layer by oxidizing at least the surface side of the lower electrode of the gate electrode and the lower electrode. An oxide film forming step for forming a body layer; forming the gate insulating layer on the gate electrode; and An insulating film forming step of forming a second dielectric layer thinner than the gate insulating layer on the surface side of the electric conductor layer, and a semiconductor layer constituting the active layer of the thin film transistor is formed above the gate insulating layer A semiconductor layer forming step.

  In this case, in the oxide film forming step, it is preferable that the oxide film is formed by anodizing only the surface side of the lower electrode of the gate electrode and the lower electrode.

  In another embodiment of the present invention, a thin film transistor in each pixel region of the element substrate, a pixel electrode electrically connected to the thin film transistor, and a storage capacitor including a lower electrode on a lower layer side than the gate insulating layer of the thin film transistor, A metal film forming step of forming a metal film for forming a gate electrode of the thin film transistor and a lower electrode of the storage capacitor on the element substrate, and a surface of the metal film. Among them, an oxide film forming step of forming an oxide film having a dielectric constant higher than that of the gate insulating layer at least in a region where the lower electrode is to be formed, and patterning the oxide film and the metal film to form the gate electrode And a patterning step for forming the lower electrode having the first dielectric layer made of the oxide film on the upper surface, and an upper layer of the gate electrode An insulating film forming step of forming the gate insulating layer and forming a second dielectric layer thinner than the gate insulating layer on the surface side of the first dielectric layer; and And a semiconductor layer forming step of forming a semiconductor layer constituting an active layer of the thin film transistor.

  In this case, in the oxide film forming step, it is preferable that the oxide film is formed in a region of the surface of the metal film that avoids a region where the gate electrode is to be formed.

  In the present invention, in the insulating film forming step, the gate insulating layer is formed by a plurality of insulating films, and the insulating layer having a smaller number of layers than the gate insulating layer is formed on the surface side of the first dielectric layer. Preferably, the second dielectric layer is formed by a film.

  In this case, in the insulating film forming step, for example, after forming a lower-layer-side insulating film among the plurality of insulating films, the lower-layer-side insulating film is formed on the surface side of the first dielectric layer. It is preferable to form the remaining second gate insulating layer after etching away a part thereof.

  Embodiments of the present invention will be described below with reference to the drawings. In the drawings used for the following description, the scales are different for each layer and each member in order to make each layer and each member large enough to be recognized on the drawing.

[Embodiment 1]
(Overall configuration of liquid crystal device)
FIGS. 1A and 1B are a plan view of a liquid crystal device (electro-optical device) as viewed from the side of the counter substrate together with each component formed thereon, and a cross-sectional view thereof taken along the line HH ′. .

  1A and 1B, a liquid crystal device 1 according to this embodiment includes a TN (Twisted Nematic) mode, an ECB (Electrically Controlled Birefringence) mode, or a VAN (Vertical Aligned Nematic) mode transmissive active matrix type. In the liquid crystal device, the element substrate 10 (element substrate) and the counter substrate 20 (counter substrate) are bonded to each other through the sealing material 22, and the liquid crystal 1f is held therebetween. In the element substrate 10, the data line driving IC 60 and the scanning line driving IC 30 are mounted on the end region located outside the sealing material 22, and the mounting terminals 12 are formed along the substrate side. Yes. The sealing material 22 is an adhesive made of a photo-curing resin or a thermosetting resin for bonding the element substrate 10 and the counter substrate 20 around them, and is used for setting the distance between the substrates to a predetermined value. Gap materials such as glass fiber or glass beads are blended. Note that a liquid crystal injection port 25 is formed in the sealing material 22 by the discontinuous portion, and after the liquid crystal 1f is injected, the sealing material 22 is sealed with the sealing material 26.

  As will be described in detail later, on the element substrate 10, thin film transistors 1c and pixel electrodes 2a as switching elements are formed in a matrix, and an alignment film 19 is formed on the surface thereof. On the other hand, on the counter substrate 20, a frame 24 (not shown in FIG. 1B) made of a light-shielding material is formed in the inner region of the sealing material 22, and the inner side becomes the image display region 1a. Yes. Although not shown, a light shielding film called a black matrix or black stripe is formed on the counter substrate 20 in a region facing the vertical and horizontal boundary regions of each pixel. An alignment film 29 is formed. Although not shown in FIG. 1B, an RGB color filter is formed together with the protective film in a region of the counter substrate 20 facing each pixel of the element substrate 10, thereby the liquid crystal device 1. Can be used as a color display device for electronic devices such as mobile computers, mobile phones, and liquid crystal televisions.

(Configuration of element substrate 10)
FIG. 2 is an explanatory diagram showing an electrical configuration of the element substrate of the liquid crystal device shown in FIG. As shown in FIG. 2, a plurality of source lines 6a (data lines) and gate lines 3a (scanning lines) are formed in the element substrate 10 in a direction corresponding to the image display area 1a in a direction intersecting with each other. A pixel 1b is formed at a position corresponding to the intersection of the wirings. The gate line 3a extends from the scanning line driving IC 30 and the source line 6a extends from the data line driving IC 60. Further, on the element substrate 10, a thin film transistor 1c for pixel switching for controlling driving of the liquid crystal 1f is formed in each pixel 1b (pixel region), and a source line 6a is electrically connected to a source of the thin film transistor 1c. The gate line 3a is electrically connected to the gate of the thin film transistor 1c.

  Furthermore, the capacitor substrate 3b is formed in the element substrate 10 in parallel with the gate line 3a. In this embodiment, a liquid crystal capacitor 1g configured between the thin film transistor 1c and the counter substrate 20 is connected in series, and a holding capacitor 1h is connected in parallel to the liquid crystal capacitor 1g. Here, the capacitor line 3b is connected to the scanning line driving IC 30, but is held at a constant potential.

  In the liquid crystal device 1 configured as described above, the image signal supplied from the source line 6a is written to the liquid crystal capacitor 1g of each pixel 1b at a predetermined timing by turning on the thin film transistor 1c for a certain period. The image signal of a predetermined level written in the liquid crystal capacitor 1g in this way is held in the liquid crystal capacitor 1g for a certain period, and the hold capacitor 1h prevents the image signal held in the liquid crystal capacitor 1g from leaking. ing.

(Configuration of each pixel)
3 and 4 are a plan view of one pixel of the liquid crystal device according to Embodiment 1 of the present invention and a cross-sectional view when the liquid crystal device is cut at a position corresponding to A1-B1. In FIG. 3, the pixel electrode is indicated by a thick and long dotted line, the gate line and a thin film formed simultaneously with it are indicated by a solid line, the source line and a thin film formed simultaneously with it are indicated by a one-dot chain line, It is shown with a thin and short dotted line.

  As shown in FIG. 3, in the element substrate 10, a region surrounded by the gate line 3a and the source line 6a is configured as a pixel 1b, and the pixel 1b includes amorphous silicon that forms an active layer of a bottom-gate thin film transistor 1c. A semiconductor layer 7a made of a film is formed. A gate electrode is formed by a protruding portion from the gate line 3a. Of the semiconductor layer 7a constituting the active layer of the thin film transistor 1c, the source line 6a overlaps as a source electrode at the end on the source side, and the drain electrode 6b overlaps at the end on the drain side. A capacitor line 3b is formed in parallel with the gate line 3a.

  Further, the pixel 1b is formed with a storage capacitor 1h in which a protruding portion from the capacitor line 3b is the lower electrode 3c and an extended portion from the drain electrode 6b is the upper electrode 6c. Further, the pixel electrode 2a made of an ITO film is electrically connected to the upper electrode 6c through contact holes 81 and 91.

  The A1-B1 cross section of the element substrate 10 configured as described above is expressed as shown in FIG. First, a gate line 3a (gate electrode) and a capacitor line 3b are formed on an insulating substrate 11 made of a glass substrate or a quartz substrate, and at a position shifted laterally from the gate electrode (gate line 3a). A lower electrode 3c of the storage capacitor 1h is formed. A gate insulating layer 4 is formed on the upper layer side of the gate line 3a so as to cover the gate line 3a. A semiconductor layer 7a (intrinsic polysilicon film) constituting an active layer of the thin film transistor 1c is formed on the gate insulating layer 4 and above the gate line 3a. Of the semiconductor layer 7a, an ohmic contact layer 7b made of a doped silicon film and a source line 6a made of an aluminum film or a chromium film are formed in the upper layer of the source region, and the ohmic contact layer 7c, A drain electrode 6b made of an aluminum film or a chromium film is formed to form a thin film transistor 1c. Further, the upper electrode 6c of the storage capacitor 1h made of an aluminum film or a chromium film is formed by the extended portion of the drain electrode 6b.

  Further, on the upper layer side of the source line 6a, drain electrode 6b, and upper electrode 6c, a passivation film 8 made of a silicon nitride film or the like and a planarizing film 9 made of a photosensitive resin layer are respectively formed as interlayer insulating films. The pixel electrode 2 a formed on the surface of the planarizing film 9 is electrically connected to the upper electrode 6 c via the contact hole 91 formed in the planarizing film 9 and the contact hole 81 formed in the passivation film 8. And is electrically connected to the drain region of the thin film transistor 1c through the upper electrode 6c and the drain electrode 6b. An alignment film 19 is formed on the surface of the pixel electrode 2a.

  The counter substrate 20 is disposed so as to face the element substrate 10 configured as described above, and the liquid crystal 1 f is held between the element substrate 10 and the counter substrate 20. The counter substrate 20 is provided with a color filter 26 for each color, a counter electrode 28, and an alignment film 29, and a liquid crystal capacitor 1g (see FIG. 2) is formed between the pixel electrode 2a and the counter electrode 28. Note that a black matrix, a protective film, or the like may be formed on the counter substrate 20 side, but the illustration thereof is omitted.

(Configuration of gate insulating layer and dielectric layer)
In the liquid crystal device 1 configured as described above, first, the gate electrode 3a, the capacitor line 3b, and the lower electrode 3c are made of an aluminum film. The gate insulating layer 4 has a two-layer structure of a thick silicon nitride film 4a on the lower layer side and a thin silicon nitride film 4b on the upper layer side. The film thickness of the lower silicon nitride film 4a is, for example, about 300 nm, and the film thickness of the upper silicon nitride film 4b is, for example, about 100 nm.

  In the storage capacitor 1h of this embodiment, the dielectric layer 5 formed between the lower electrode 3c and the upper electrode 6c includes a first dielectric layer 5a that covers the upper surface of the lower electrode 3c, and the first dielectric layer. And a second dielectric layer 5b stacked on top of the layer 5a.

  The first dielectric layer 5a is made of an aluminum oxide film formed by oxidizing the surface side of the lower electrode 3c, and covers the upper surface and side surfaces of the lower electrode 3c. The upper surface and side surfaces of the capacitor line 3b are also covered with the aluminum film 5c. However, an aluminum oxide film is not formed on the upper surface and side surfaces of the gate line 3a.

  The second dielectric layer 5 b is formed between the same layers as the gate insulating layer 4, but has a thinner film thickness than the gate insulating layer 4. That is, in the storage capacitor 1h, the opening 41 is formed in the lower thick silicon nitride film 4a constituting the gate insulating layer 4, and the upper thin silicon nitride film 4b is connected to the second dielectric via the opening 41. The body layer 5b is laminated on the first dielectric layer 5a. In the upper layer side of the first dielectric layer 5a, an insulating film having the same thickness as the gate insulating layer 4 is formed along the edge of the lower electrode 3c, and the second dielectric layer 5b This is surrounded by a thick insulating film.

  In the dielectric layer 5 configured in this way, the aluminum oxide film constituting the first dielectric layer 5a has a dielectric constant of about 10, whereas the second dielectric layer 5b and the gate insulating film 4 are The silicon nitride film to be formed has a dielectric constant of about 7-8. Moreover, in the dielectric layer 5, the thickness of the silicon nitride film constituting the second dielectric layer 5 b (the thickness of the silicon nitride film 4 b) is the same as the thickness of the silicon nitride film constituting the gate insulating layer 4 (silicon nitride). It is thinner than the sum of the film thicknesses of the films 4a and 4b.

(Manufacturing method of the liquid crystal device 1)
FIGS. 5A to 5F and FIGS. 6A to 6E are process cross-sectional views illustrating a method for manufacturing the element substrate 10 used in the liquid crystal device 1 of the present embodiment. In order to manufacture the element substrate 10, the following steps are performed in a state of a large substrate on which many element substrates 10 can be obtained. In the following description, the large substrate is also described as the element substrate 10.

  First, in the metal film forming step shown in FIG. 5A, an aluminum film 3 (gate line 3a (gate electrode) and lower electrode having a thickness of, for example, 130 nm is formed on the surface of an insulating substrate 11 such as a large glass substrate or a quartz substrate. A metal film for forming 3c).

  Next, in the patterning step shown in FIG. 5B, the aluminum film 3 is patterned using a photolithography technique to form the gate line 3a (gate electrode), the capacitor line 3b, and the lower electrode 3c.

  Next, in the oxide film forming step shown in FIG. 5C, power is supplied only to the capacitor line 3b out of the gate line 3a and the capacitor line 3b, and the capacitor line 3b and the lower electrode 3c are anodized to form the lower electrode. A first dielectric layer 5a made of an aluminum oxide film is formed on the top and side surfaces of 3c. At this time, an aluminum oxide film 5c is also formed on the upper surface and side surfaces of the capacitor line 3b. On the other hand, the gate line 3a is not anodized and an aluminum oxide film is not formed.

  Next, in the insulating film forming step shown in FIG. 5D, after the thick silicon nitride film 4a constituting the lower layer side of the gate insulating layer 4 is formed with a film thickness of about 300 nm by plasma CVD, FIG. As shown in e), an opening 41 is formed by etching away the silicon nitride film 4a in the region overlapping the first dielectric layer 5a (lower electrode 3c) in the silicon nitride film 4a using photolithography technology. To do. Next, as shown in FIG. 5F, a thin silicon nitride film 4b constituting the upper layer side of the gate insulating layer 4 is formed with a film thickness of about 100 nm by plasma CVD. As a result, the gate insulating layer 4 made of the thick silicon nitride film 4a and the thin silicon nitride film 4b is formed on the upper layer side of the gate electrode 3a, while the aluminum oxide film is made on the upper layer side of the lower electrode 3c. A dielectric layer 5b including the first dielectric layer 5a and the second dielectric layer 5b made of the silicon nitride film 4b is formed. In the upper layer side of the first dielectric layer 5a, an insulating film having the same thickness as the gate insulating layer 4 is formed along the edge of the lower electrode 3c, and the second dielectric layer 5b This is surrounded by a thick insulating film.

  Next, in the semiconductor layer forming step shown in FIG. 6A, an ohmic contact made of an intrinsic silicon film having a thickness of, for example, 300 nm and an n-type silicon film having a thickness of, for example, 50 nm are formed by plasma CVD. After sequentially forming the contact layers, patterning is performed using a photolithography technique, and the ohmic contact layer 7d and the semiconductor layer 7a are simultaneously formed.

  Next, as shown in FIG. 6B, after forming an aluminum film or a chromium film having a thickness of, for example, 130 nm, patterning is performed using a photolithography technique, and the source line 6a, the drain electrode 6b, and the upper electrode 6c. Form. Subsequently, using the source line 6a and the drain electrode 6b as a mask, the ohmic contact layer 5b between the source line 6a and the drain electrode 6b is removed by etching to separate the source and the drain. As a result, the ohmic contact layer 5d is removed from the region where the source line 6a and the drain electrode 6b are not formed, and ohmic contact layers 5b and 5c are formed. At that time, a part of the surface of the semiconductor layer 7a is etched. In this way, the bottom gate type pixel switching thin film transistor 1c is formed.

  Next, as shown in FIG. 6C, a passivation film 8 made of a silicon nitride film having a thickness of, for example, 200 nm is formed by a plasma CVD method, and then the passivation film 8 is etched using a photolithography technique. The contact hole 81 is formed.

  Next, as shown in FIG. 6D, a photosensitive resin is applied by spin coating, and then exposed and developed to form a planarizing film 9 having contact holes 91.

  Next, as shown in FIG. 6E, an ITO film having a thickness of, for example, 50 nm is formed by sputtering, and then patterned using a photolithography technique to form a pixel electrode 2a. Subsequently, after a polyimide film for forming the alignment film 19 shown in FIG. 4 is formed, a rubbing process is performed.

  In this way, the element substrate 10 on which various wirings and TFTs are formed in the state of a large substrate is bonded to the separately formed large counter substrate 20 and the sealing material 22 and then cut into a predetermined size. As a result, the liquid crystal injection port 25 is opened, and after the liquid crystal 1 f is injected between the element substrate 10 and the counter substrate 20 from the liquid injection port 25, the liquid crystal injection port 25 is sealed with a sealing material 26.

(Main effects of this form)
As described above, in the liquid crystal device 1 according to the present embodiment, the dielectric layer 5 of the storage capacitor 1h includes the first dielectric layer 5a made of an aluminum oxide film covering the upper surface of the lower electrode 3c, and the first dielectric layer. And a second dielectric layer 5b formed between the same layer as the gate insulating layer 4 and the second dielectric layer 5b having a thickness smaller than that of the gate insulating layer 4 The same insulating film (silicon nitride film 4b) as the upper layer side of the layer 4 is formed. Moreover, the first dielectric layer 5a is an aluminum oxide film having a dielectric constant of about 10, and has a dielectric constant higher than that of the second dielectric layer 5b made of the silicon nitride films 4a and 4b having a dielectric constant of 7 to 8. high. For this reason, in the dielectric layer 5 of the storage capacitor 1h, the thickness of the second dielectric layer 5b is larger than that of the conventional gate insulating layer 4 by the amount of the first dielectric layer 5a. Since the dielectric constant of the first dielectric layer 5a is high, the capacitance value per unit area of the storage capacitor 1h can be increased by 15 to 25%. Therefore, it is possible to improve the charge retention characteristic while leaving the occupied area of the holding capacitor 1h as it is, while increasing the capacitance value per unit area, the pixel aperture ratio can be increased by reducing the occupied area. Can do. In addition, it is possible to improve both the charge retention characteristic and the pixel aperture ratio. Furthermore, since the insulating films (silicon nitride films 4a and 4b) used so far can be used as they are for the gate insulating layer 4, the electrical characteristics and reliability of the thin film transistor 1c do not change greatly.

  In particular, in this embodiment, since the aluminum oxide film constituting the first dielectric layer 5a is not used as a part of the gate insulating layer 4, the entire gate insulating layer 4 is the insulating film (silicon nitride film used so far). 4a and 4b), the electrical characteristics and reliability of the thin film transistor 1c do not change at all.

[Embodiment 2]
FIG. 7 is a cross-sectional view of the liquid crystal device according to Embodiment 2 of the present invention. Note that the liquid crystal device of the present embodiment has the same basic configuration as that of Embodiment 1, and therefore, common portions are denoted by the same reference numerals and description thereof is omitted.

  Also in the liquid crystal device 1 shown in FIG. 7, as in the first embodiment, the gate electrode 3a, the capacitor line 3b, and the lower electrode 3c are made of an aluminum film. The gate insulating layer 4 has a two-layer structure of a thick silicon nitride film 4a on the lower layer side and a thin silicon nitride film 4b on the upper layer side. The film thickness of the lower silicon nitride film 4a is, for example, about 300 nm, and the film thickness of the upper silicon nitride film 4b is, for example, about 100 nm. In the storage capacitor 1h, the dielectric layer 5 formed between the lower electrode 3c and the upper electrode 6c includes a first dielectric layer 5a covering the upper surface of the lower electrode 3c, and the first dielectric layer 5a. And a second dielectric layer 5b laminated on the upper layer. The first dielectric layer 5a is made of an aluminum oxide film formed by oxidizing the surface side of the lower electrode 3c, and covers the upper surface and side surfaces of the lower electrode 3c. The upper surface and side surfaces of the capacitor line 3b are also covered with the aluminum film 5c. The second dielectric layer 5 b is formed between the same layers as the gate insulating layer 4, but has a thinner film thickness than the gate insulating layer 4. That is, in the storage capacitor 1h, the opening 41 is formed in the lower thick silicon nitride film 4a constituting the gate insulating layer 4, and the upper thin silicon nitride film 4b is connected to the second dielectric via the opening 41. The body layer 5b is laminated on the first dielectric layer 5a. In the dielectric layer 5 thus configured, the aluminum oxide film has a dielectric constant of about 10, whereas the silicon nitride film has a dielectric constant of about 7-8. Moreover, in the dielectric layer 5, the thickness of the silicon nitride film constituting the second dielectric layer 5 b (the thickness of the silicon nitride film 4 b) is the same as the thickness of the silicon nitride film constituting the gate insulating layer 4 (silicon nitride). It is thinner than the sum of the film thicknesses of the films 4a and 4b.

  Here, in Embodiment 1, the aluminum oxide film is not formed on the upper surface and the side surface of the gate line 3a, but in this embodiment, the aluminum oxide film 5d is also formed on the upper surface and the side surface of the gate line 3a. ing.

  Also in the liquid crystal device 1 configured as described above, as in the first embodiment, the dielectric layer 5 of the storage capacitor 1h includes the first dielectric layer 5a covering the upper surface of the lower electrode 3c and the first dielectric layer. 5a and a second dielectric layer 5b formed between the same layers as the gate insulating layer 4. The second dielectric layer 5b has a smaller film thickness than the gate insulating layer 4 and has a thickness smaller than that of the gate insulating layer 4. Is formed of the same insulating film as at least a part of the film. Moreover, the first dielectric layer 5a has a higher dielectric constant than the second dielectric layer 5b. Therefore, it is possible to improve the charge retention characteristic while leaving the occupied area of the holding capacitor 1h as it is, while increasing the capacitance value per unit area, the pixel aperture ratio can be increased by reducing the occupied area. Can do. In addition, it is possible to improve both the charge retention characteristic and the pixel aperture ratio.

  Furthermore, as for the gate insulating layer 4, the aluminum oxide film 5d is also formed on the upper surface and the side surface of the gate line 3a. However, since the insulating film (silicon nitride film) used so far can be used as it is, the thin film transistor The electrical characteristics and reliability of 1c do not change greatly.

  The manufacturing method of the liquid crystal device 1 configured as described above is basically the same as that of the first embodiment. However, the lower electrode 3c is anodized in the oxide film forming step shown in FIG. When the first dielectric layer 5a made of an aluminum oxide film is formed on the upper surface and the side surface of 3c, the gate line 3a is also fed to anodize to form the aluminum oxide film 5d.

Other steps are the same as those in the first embodiment, and thus the description thereof is omitted. In the oxide film forming step shown in FIG. 5C, when the first dielectric layer 5a made of an aluminum oxide film is formed on the capacitor line 3b and the lower electrode 3c, the aluminum oxide film 5d is also formed on the gate line 3a. If formed, gas phase oxidation such as thermal oxidation, pressurized steam oxidation or ozone oxidation in an atmosphere containing oxygen (O ₂ , O ₃ , H ₂ O, etc.) instead of anodic oxidation. May be performed.

[Embodiment 3]
FIG. 8 is a cross-sectional view of the liquid crystal device according to Embodiment 3 of the present invention. 9A to 9G are process cross-sectional views illustrating a method for manufacturing the element substrate 10 used in the liquid crystal device 1 of the present embodiment. Note that the liquid crystal device of the present embodiment has the same basic configuration as that of Embodiment 1, and therefore, common portions are denoted by the same reference numerals and description thereof is omitted.

  Also in the liquid crystal device 1 shown in FIG. 8, as in the first embodiment, the gate electrode 3a, the capacitor line 3b, and the lower electrode 3c are made of an aluminum film. The gate insulating layer 4 has a two-layer structure of a thick silicon nitride film 4a on the lower layer side and a thin silicon nitride film 4b on the upper layer side. The film thickness of the lower silicon nitride film 4a is, for example, about 300 nm, and the film thickness of the upper silicon nitride film 4b is, for example, about 100 nm.

  In the storage capacitor 1h of this embodiment, the dielectric layer 5 formed between the lower electrode 3c and the upper electrode 6c includes a first dielectric layer 5a that covers the upper surface of the lower electrode 3c, and the first dielectric layer. And a second dielectric layer 5b stacked on top of the layer 5a. The first dielectric layer 5a is made of an aluminum oxide film formed by oxidizing the surface side of the lower electrode 3c, is formed only on the upper surface of the lower electrode 3c, and is not formed on the side surface. The aluminum film 5c is also formed on the upper surface of the capacitor line 3b, but not on the side surface.

  The second dielectric layer 5 b is formed between the same layers as the gate insulating layer 4, but has a thinner film thickness than the gate insulating layer 4. That is, in the storage capacitor 1h, the opening 41 is formed in the lower thick silicon nitride film 4a constituting the gate insulating layer 4, and the upper thin silicon nitride film 4b is connected to the second dielectric via the opening 41. The body layer 5b is laminated on the first dielectric layer 5a. In the dielectric layer 5 thus configured, the aluminum oxide film has a dielectric constant of about 10, whereas the silicon nitride film has a dielectric constant of about 7-8. Moreover, in the dielectric layer 5, the thickness of the silicon nitride film constituting the second dielectric layer 5 b (the thickness of the silicon nitride film 4 b) is the same as the thickness of the silicon nitride film constituting the gate insulating layer 4 (silicon nitride). It is thinner than the sum of the film thicknesses of the films 4a and 4b.

  Further, similarly to the first embodiment, in this embodiment, the aluminum oxide film is not formed on the upper surface and the side surface of the gate line 3a.

  Therefore, according to the present embodiment, it is possible to improve the charge retention characteristics while keeping the area occupied by the storage capacitor 1h, and to replace the aluminum oxide film constituting the first dielectric layer 5a with the gate insulating layer 4. Since it is not used as a part, the entire gate insulating layer 4 is composed of the insulating film used so far, so that the electrical characteristics and reliability of the thin film transistor 1c are not changed at all. Play.

  In order to manufacture such an element substrate 10 of the liquid crystal device 1, first, in the metal film forming step shown in FIG. 9A, the thickness of the surface of the insulating substrate 11 such as a large glass substrate or a quartz substrate is, for example, A 130 nm aluminum film 3 (metal film for forming the gate line 3a (gate electrode) and the lower electrode 3c) is formed.

  Next, in the oxide film forming step shown in FIG. 9B, an aluminum oxide film 5e is formed on the surface of the aluminum film 3 by anodic oxidation or vapor phase oxidation, and then, as shown in FIG. The aluminum oxide film 5e is removed from the region where the line 3a (gate electrode) is to be formed. In this way, the aluminum oxide film 5f is formed only in the region of the surface of the aluminum film 3 that avoids the region where the gate line 3a (gate electrode) is to be formed.

  Next, in the patterning step shown in FIG. 9 (d), the aluminum oxide film 5f and the aluminum film 3 are patterned by using a photolithography technique, and a capacitor provided with a gate line 3a (gate electrode) and an aluminum film 5c on the upper surface. A lower electrode 3c having a line 3b and a first dielectric layer 5a made of an aluminum film on the upper surface is formed.

  Next, in the insulating film forming step shown in FIG. 9E, after the thick silicon nitride film 4a constituting the lower layer side of the gate insulating layer 4 is formed with a film thickness of about 300 nm by plasma CVD, FIG. As shown in f), by using the photolithography technique, the silicon nitride film 4a in the region overlapping the first dielectric layer 5a (lower electrode 3c) in the silicon nitride film 4a is removed by etching to form the opening 41. To do. Next, as shown in FIG. 9G, a thin silicon nitride film 4b constituting the upper layer side of the gate insulating layer 4 is formed with a film thickness of about 100 nm by plasma CVD. As a result, the gate insulating layer 4 made of the thick silicon nitride film 4a and the thin silicon nitride film 4b is formed on the upper layer side of the gate electrode 3a, while the aluminum oxide film is made on the upper layer side of the lower electrode 3c. A dielectric layer 5b including the first dielectric layer 5a and the second dielectric layer 5b made of the silicon nitride film 4b is formed. Subsequent semiconductor layer forming steps and the like are the same as those in the first embodiment, and thus description thereof is omitted.

[Embodiment 4]
FIG. 10 is a cross-sectional view of a liquid crystal device according to Embodiment 4 of the present invention. Since the basic configuration of the liquid crystal device of this embodiment is the same as that of Embodiments 1 and 3, common portions are denoted by the same reference numerals, and description thereof is omitted. .

  Also in the liquid crystal device 1 shown in FIG. 10, as in the first and third embodiments, the gate electrode 3a, the capacitor line 3b, and the lower electrode 3c are made of an aluminum film. The gate insulating layer 4 has a two-layer structure of a thick silicon nitride film 4a on the lower layer side and a thin silicon nitride film 4b on the upper layer side. The film thickness of the lower silicon nitride film 4a is, for example, about 300 nm, and the film thickness of the upper silicon nitride film 4b is, for example, about 100 nm.

  In the storage capacitor 1h of this embodiment, the dielectric layer 5 formed between the lower electrode 3c and the upper electrode 6c includes a first dielectric layer 5a that covers the upper surface of the lower electrode 3c, and the first dielectric layer. And a second dielectric layer 5b stacked on top of the layer 5a.

  The first dielectric layer 5a is made of an aluminum oxide film formed by oxidizing the surface side of the lower electrode 3c, is formed only on the upper surface of the lower electrode 3c, and is not formed on the side surface. The aluminum film 5c is also formed on the upper surface of the capacitor line 3b, but not on the side surface.

  In the third embodiment, the aluminum oxide film is not formed on the upper surface of the gate line 3a. However, in this embodiment, the aluminum oxide film 5d is also formed on the upper surface of the gate line 3a. However, the aluminum oxide film 5d is not formed on the side surface of the gate line 3a.

  Also in the liquid crystal device 1 configured as described above, the charge retention characteristics can be improved while maintaining the occupied area of the storage capacitor 1h as in the third embodiment. As for the gate insulating layer 4, the aluminum oxide film 5d is also formed on the upper surface and the side surface of the gate line 3a. However, since the insulating film (silicon nitride film) used so far can be used as it is, the thin film transistor The electrical characteristics and reliability of 1c do not change greatly.

  The manufacturing method of the liquid crystal device 1 configured as described above may omit the step shown in FIG. 9C among the manufacturing steps of the liquid crystal device 1 according to Embodiment 3, and the other steps are the same. The description is omitted.

[Other embodiments]
In the first to fourth embodiments, the gate line 3a, the capacitor line 3b, and the lower electrode 3c are formed of an aluminum film, but may be formed of a tantalum film. In this case, the first dielectric layer 5a is composed of a tantalum oxide film, and the tantalum oxide film has a dielectric constant of about 250, which is considerably higher than the dielectric constant of the silicon nitride film (about 7 to 8). Therefore, the capacity per unit area of the storage capacitor 1h can be increased by 15 to 25% even when compared with the first to fourth embodiments. For the gate line 3a, the capacitor line 3b, and the lower electrode 3c, an aluminum alloy, a tantalum alloy, niobium, a niobium alloy, titanium, a titanium alloy, or the like may be used in addition to an aluminum film or a tantalum film. Further, the oxide film may not be the same metal, and the metal of the oxide film may be any of the above metals.

  In the above embodiment, an insulating film having the same thickness as the gate insulating layer 4 is formed along the edge of the lower electrode 3c in the upper layer side of the first dielectric layer 5a. Although the dielectric layer 5b is surrounded by this thick insulating film, the whole upper layer side of the first dielectric layer 5a may be covered with the thin second dielectric layer 5b. In the above embodiment, the gate insulating layer 4 has a structure in which two identical insulating films are formed. However, the gate insulating layer 4 has two or more different types of insulating films laminated. It may be a structure. Furthermore, although the upper electrode 6c is constituted by the extended portion of the drain electrode 6b, the present invention may be applied to a liquid crystal device in which the pixel electrode 2a itself is formed as an upper electrode of the storage capacitor 1h.

  In the first to fourth embodiments, the TN mode, ECB mode, and VAN mode active matrix liquid crystal devices have been described as examples. However, in an IPS (In-Plane Switching) mode liquid crystal device (electro-optical device), The present invention may be applied.

  Furthermore, the electro-optical device is not limited to a liquid crystal device, and an organic EL (electroluminescence) device, for example, is electrically connected to a thin film transistor in each pixel region on an element substrate holding an organic EL film as an electro-optical material. Since the pixel electrode connected to and the storage capacitor having the lower electrode on the lower layer side than the gate insulating layer of the thin film transistor are formed, the present invention may be applied to such an organic EL device.

[Embodiment of Electronic Device]
FIG. 11 shows an embodiment in which the liquid crystal device according to the present invention is used as a display device of various electronic devices. The electronic device shown here is a personal computer, a cellular phone, or the like, and includes a display information output source 170, a display information processing circuit 171, a power supply circuit 172, a timing generator 173, and the liquid crystal device 1. Further, the liquid crystal device 1 includes a panel 175 and a drive circuit 176, and the above-described liquid crystal device 1 can be used. The display information output source 170 includes a memory such as a ROM (Read Only Memory) and a RAM (Random Access Memory), a storage unit such as various disks, a tuning circuit that tunes and outputs a digital image signal, and the like, and is generated by a timing generator 173. Display information such as an image signal in a predetermined format is supplied to the display information processing circuit 171 based on the various clock signals. The display information processing circuit 171 includes various well-known circuits such as a serial-parallel conversion circuit, an amplification / inversion circuit, a rotation circuit, a gamma correction circuit, a clamp circuit, and the like, executes processing of input display information, and outputs the image. The signal is supplied to the drive circuit 176 together with the clock signal CLK. The power supply circuit 172 supplies a predetermined voltage to each component.

(A), (b) is the top view which looked at the liquid crystal device to which this invention is applied from the opposite substrate side with each component formed on it, and its HH 'sectional drawing, respectively. It is explanatory drawing which shows the electrical structure of the element substrate of the liquid crystal device shown in FIG. It is a top view for one pixel of the liquid crystal device concerning Embodiment 1 of the present invention. It is sectional drawing when a liquid crystal device is cut | disconnected in the position corresponded to A1-B1 of FIG. (A)-(f) is process sectional drawing which shows the manufacturing method of the element substrate used for the liquid crystal device of this form. (A)-(e) is process sectional drawing which shows the manufacturing method of the element substrate used for the liquid crystal device of this form. It is sectional drawing of the liquid crystal device which concerns on Embodiment 2 of this invention. It is sectional drawing of the liquid crystal device which concerns on Embodiment 3 of this invention. (A)-(g) is process sectional drawing which shows the manufacturing method of the element substrate used for the liquid crystal device of this form. It is sectional drawing of the liquid crystal device which concerns on Embodiment 4 of this invention. It is explanatory drawing at the time of using the liquid crystal device which concerns on this invention as a display apparatus of various electronic devices.

Explanation of symbols

1 liquid crystal device, 1b pixel, 1c thin film transistor, 1f liquid crystal, 1g liquid crystal capacitor, 1h holding capacitor, 2a pixel electrode, 3a gate line (gate electrode / scanning line), 3b capacitor line (wiring), 3c lower electrode, 4 gate insulation Layer, 4a, 4b silicon nitride film, 5 dielectric layer, 5a first dielectric layer, 5b second dielectric layer, 6a source line (data line), 6b drain electrode

Claims (15)

In each of the pixel regions of the element substrate, an electro-optical device including a thin film transistor, a pixel electrode electrically connected to the thin film transistor, and a storage capacitor including a lower electrode on a lower layer side than the gate insulating layer of the thin film transistor.
The dielectric layer of the storage capacitor includes a first dielectric layer covering the upper surface of the lower electrode, and a second dielectric layer formed between the upper layer of the first dielectric layer and the same layer as the gate insulating layer. With body layers,
The second dielectric layer is formed of an insulating film having a thickness smaller than that of the gate insulating layer and the same insulating film as at least a part of the gate insulating layer;
The electro-optical device, wherein the first dielectric layer is made of an oxide film made of the same metal material as the lower electrode, and has a dielectric constant higher than that of the second dielectric layer.   The electro-optical device according to claim 1, wherein the first dielectric layer covers an upper surface and a side surface of the lower electrode. The gate electrode of the thin film transistor is formed of the same metal material as the lower electrode between the same layers as the lower electrode of the storage capacitor,
2. The electro-optical device according to claim 1, wherein the oxide film covers only an upper surface of the lower electrode among the lower electrode and the gate electrode. The gate electrode of the thin film transistor is formed of the same metal material as the lower electrode between the same layers as the lower electrode of the storage capacitor,
The electro-optical device according to claim 2, wherein the oxide film covers only an upper surface and a side surface of the lower electrode among the lower electrode and the gate electrode.   5. The electro-optical device according to claim 1, wherein the first dielectric layer is formed of an anodized film for the lower electrode.   The said lower electrode consists of a metal in any one of aluminum, an aluminum alloy, a tantalum, a tantalum alloy, niobium, a niobium alloy, titanium, and a titanium alloy, The Claim 1 thru | or 5 characterized by the above-mentioned. Electro-optic device.   The electro-optical device according to claim 1, wherein the element substrate holds liquid crystal as an electro-optical material between the element substrate and a counter substrate disposed to face the element substrate. apparatus.   An electronic apparatus comprising the electro-optical device according to claim 1. Manufacture of an electro-optical device provided with a thin film transistor, a pixel electrode electrically connected to the thin film transistor, and a storage capacitor having a lower electrode on the lower layer side of the gate insulating layer of the thin film transistor in each pixel region of the element substrate In the method
Forming a metal film for forming a gate electrode of the thin film transistor and a lower electrode of the storage capacitor on the element substrate; and
A patterning step of patterning the metal film to form the gate electrode and the lower electrode;
An oxide film forming step of oxidizing at least a surface side of the lower electrode of the gate electrode and the lower electrode to form a first dielectric layer made of an oxide film having a dielectric constant higher than that of the gate insulating layer;
An insulating film forming step of forming the gate insulating layer above the gate electrode and forming a second dielectric layer thinner than the gate insulating layer on the surface side of the first dielectric layer;
And a semiconductor layer forming step of forming a semiconductor layer constituting an active layer of the thin film transistor on the gate insulating layer.   10. The electro-optical device according to claim 9, wherein, in the oxide film forming step, the oxide film is formed by anodizing only the surface side of the lower electrode of the gate electrode and the lower electrode. Manufacturing method. Manufacture of an electro-optical device provided with a thin film transistor, a pixel electrode electrically connected to the thin film transistor, and a storage capacitor having a lower electrode on the lower layer side of the gate insulating layer of the thin film transistor in each pixel region of the element substrate In the method
Forming a metal film for forming a gate electrode of the thin film transistor and a lower electrode of the storage capacitor on the element substrate; and
An oxide film forming step of forming an oxide film having a dielectric constant higher than that of the gate insulating layer in at least a region where the lower electrode is to be formed in the surface of the metal film;
A patterning step of patterning the oxide film and the metal film to form the gate electrode and forming the lower electrode having a first dielectric layer made of the oxide film on an upper surface;
An insulating film forming step of forming the gate insulating layer above the gate electrode and forming a second dielectric layer thinner than the gate insulating layer on the surface side of the first dielectric layer;
And a semiconductor layer forming step of forming a semiconductor layer constituting an active layer of the thin film transistor on the gate insulating layer.   12. The manufacturing of an electro-optical device according to claim 11, wherein, in the oxide film forming step, the oxide film is formed in a region of the surface of the metal film that avoids a region where the gate electrode is to be formed. Method.   In the insulating film forming step, the gate insulating layer is formed by a plurality of insulating films, and the first dielectric layer is formed on the surface side by the insulating film having a smaller number of layers than the gate insulating layer. 13. The method for manufacturing an electro-optical device according to claim 9, wherein two dielectric layers are formed.   In the insulating film forming step, after forming an insulating film on the lower layer side among the plurality of insulating films, a part of the insulating film on the lower layer side is removed by etching on the surface side of the first dielectric layer. 14. The method of manufacturing an electro-optical device according to claim 13, wherein the remaining second gate insulating layer is formed.   The metal layer is made of any one of aluminum, aluminum alloy, tantalum, tantalum alloy, niobium, niobium alloy, titanium, and titanium alloy. Manufacturing method of the electro-optical device.

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