JP2007133371A - Display device and method for manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To form a pixel electrode and a metal film, using one resist mask when manufacturing a laminated structure by forming the metal film on the pixel electrode. <P>SOLUTION: A conductive film and the metal film that serves as the pixel electrode are laminated. A resist pattern, having a thick film region and a region with film thickness smaller than that of the thick film region is formed on the metal film, by using an exposure mask having a semitransparent section. The pixel electrode and the metal film, in contact with a portion of the pixel electrode, are formed by using the resist pattern. As a result, the pixel electrode and the metal film are formed by using a single resist mask. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

    The present invention relates to a semiconductor device having a pixel electrode, and more particularly to a display device.

    When an active matrix display device is manufactured, a wiring connected to a semiconductor film of a thin film transistor (TFT) is generally formed, and a conductive film to be a pixel electrode is formed over the wiring. Therefore, a resist mask for forming wiring and a resist mask for forming pixel electrodes are necessary.

    As another example, there is an example in which a conductive film connected to a semiconductor film of a TFT is formed, and this conductive film is also functioned as a pixel electrode, and a metal film is formed on the conductive film (for example, Patent Document 1). . Unlike the example described above, this employs a transparent conductive film as the conductive film, and the transparent conductive film is directly connected to the semiconductor film. Since many transparent conductive films have high resistance, a metal film is formed on the transparent conductive film in order to cover the magnitude of the electrical resistance of the transparent conductive film.

Patent Document 1 in which a transparent conductive film is directly connected to a semiconductor film also requires a resist mask for forming a pixel electrode by etching the transparent conductive film and a resist mask for etching a metal film.
JP-A-6-230425

    In a conventional active matrix display device, a resist mask is required in each layer when forming a laminated wiring. In particular, when a pixel electrode is formed, there are many stacked structures, and at least a resist mask for forming the pixel electrode and a resist mask for etching a film to be stacked with the pixel electrode are necessary, and the number of manufacturing steps is large. Therefore, the manufacturing cost of a semiconductor device such as a display device has not been reduced.

    In view of the above, an object of the present invention is to form a pixel electrode and a film to be stacked with the pixel electrode with a single resist mask to shorten the manufacturing process.

    One of the characteristics of the present invention is that a thin film transistor over a substrate, a pixel electrode electrically connected to the thin film transistor, and a metal film in contact with the pixel electrode are formed so as to cover a step portion of the pixel electrode. The film is in contact with the pixel electrode. The pixel electrode exposed from the metal film is formed on a flat surface.

    With this configuration, the pixel electrode can be prevented from being cut off at the step portion. Breakage means that a film is formed on a surface with a stepped portion, so that the film is cracked at the stepped portion, or the film coverage is poor at the stepped portion, and the film is not partially formed. Say that.

    One of the features of the present invention includes a thin film transistor over a substrate, a pixel electrode electrically connected to the thin film transistor, and a metal film in contact with the pixel electrode, and the metal film has a smaller planar area than the pixel electrode, The side surface of the metal film is disposed along the side surface of the pixel electrode, and the side surface of the metal film is located inside the side surface of the pixel electrode.

    With this configuration, the metal film can be used as a part of the light shielding film, and the alignment of the light shielding film can be simplified.

    A thin film transistor on a substrate, a pixel electrode electrically connected to the thin film transistor, a metal film in contact with a part of the pixel electrode, a partition formed on the pixel electrode and the metal film, and exposing a part of the pixel electrode And an electroluminescent layer formed in contact with the partition wall and the pixel electrode, and an electrode on the electroluminescent layer, and at least one side surface of the metal film is inclined and covered with the partition wall. A display device.

    With this configuration, a short circuit of the light emitting element can be prevented in the electroluminescence display device.

    A single resist pattern can be used to form a pixel electrode and a metal film in contact with part of the pixel electrode. Since two patterns of the pixel electrode and the metal film can be formed using one resist pattern, the manufacturing process can be shortened and a low-cost display device can be realized.

    According to the present invention, the number of manufacturing steps can be reduced as compared with the conventional method, and the manufacturing cost of the semiconductor device can be reduced. In addition, since the metal film is formed in contact with the pixel electrode, the pixel electrode can be prevented from being cut off at the step portion. An inexpensive display device with few display defects and high reliability can be formed.

    Hereinafter, embodiments of the present invention will be described. However, the present invention can be implemented in many different modes within a practicable range. It will be readily appreciated by those skilled in the art that various changes and modifications can be made without departing from the spirit and scope of the present invention. Therefore, the present invention is not construed as being limited to the description of the embodiment. Further, the embodiments described below can be appropriately combined.

(Embodiment 1)
In this embodiment, a method of forming a top gate type TFT on a substrate 1 will be described with reference to FIG. The substrate 1 is a light-transmitting substrate such as a quartz substrate, a glass substrate, or a plastic substrate. The substrate 1 may be a light-shielding substrate, a semiconductor substrate, or an SOI (Silicon on Insulator) substrate.

An insulating film 2 is formed on the substrate 1 as a base film. As the insulating film 2, a single layer of an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film (SiO _x N _y ), or a stack including at least two of these films is used. Next, an island-shaped semiconductor film 3 is formed on the insulating film 2.

    The island-shaped semiconductor film 3 is formed by forming a semiconductor film over the entire surface of the insulating film 2 by sputtering, LPCVD, plasma CVD, or the like and then processing the semiconductor film using a mask formed by photolithography or the like. To form. When the island-shaped semiconductor film 3 is formed of a crystalline semiconductor film, a method of forming a crystalline semiconductor film directly on the substrate 1 and a crystallizing process by heat treatment after forming an amorphous semiconductor film on the substrate 1 There is a method in which a crystalline semiconductor film is formed. In the latter method, the heat treatment at the time of crystallization is performed by using a heating furnace, laser irradiation, irradiation of light emitted from a lamp instead of laser light (hereinafter referred to as lamp annealing), or a combination thereof. Done.

    Alternatively, the crystalline semiconductor film may be formed by a thermal crystallization method in which the heat treatment is performed after nickel or the like is added to the amorphous semiconductor film. Note that in the case where a crystalline semiconductor film is obtained by performing crystallization using a thermal crystallization method using nickel, it is preferable to perform gettering treatment for removing nickel after crystallization.

In the case of manufacturing a crystalline semiconductor film by crystallization by laser irradiation, a continuous-wave (CW) laser beam or a pulsed laser beam (pulse laser beam) can be used. The laser beam that can be used here is a gas laser such as an Ar laser, a Kr laser, or an excimer laser, single crystal YAG, YVO ₄ , forsterite (Mg ₂ SiO ₄ ), YAlO ₃ , GdVO ₄ , or polycrystalline ( (Ceramics) YAG, Y ₂ O ₃ , YVO ₄ , YAlO ₃ , GdVO ₄ with one or more of Nd, Yb, Cr, Ti, Ho, Er, Tm, Ta added as dopants A laser oscillated from one or more of laser, glass laser, ruby laser, alexandrite laser, Ti: sapphire laser, copper vapor laser, or gold vapor laser as a medium can be used. By irradiating the fundamental wave of such a laser beam and the second to fourth harmonic laser beams of these fundamental waves, a crystal having a large grain size can be obtained. For example, a second harmonic (532 nm) or a third harmonic (355 nm) of an Nd: YVO ₄ laser (fundamental wave 1064 nm) can be used. This laser can be emitted by CW or pulsed oscillation. When injected at a CW, the power density of the laser is about 0.01 to 100 MW / cm ² (preferably 0.1 to 10 MW / cm ²⁾ is required. Then, irradiation is performed at a scanning speed of about 10 to 2000 cm / sec.

Note that single crystal YAG, YVO ₄ , forsterite (Mg ₂ SiO ₄ ), YAlO ₃ , GdVO ₄ , or polycrystalline (ceramic) YAG, Y ₂ O ₃ , YVO ₄ , YAlO ₃ , GdVO ₄ , dopants Nd, Yb, Cr, Ti, Ho, Er, Tm, Ta, a laser using a medium added with one or more, an Ar ion laser, or a Ti: sapphire laser should oscillate continuously It is also possible to perform pulse oscillation at an oscillation frequency of 10 MHz or more by performing Q switch operation, mode synchronization, or the like. When the laser beam is oscillated at an oscillation frequency of 10 MHz or more, the semiconductor film is irradiated with the next pulse during the period from when the semiconductor film is melted by the laser beam to solidification. Therefore, unlike the case of using a pulse laser having a low oscillation frequency, the solid-liquid interface can be continuously moved in the semiconductor film, so that crystal grains continuously grown in the scanning direction can be obtained.

    When ceramic (polycrystal) is used as the medium, it is possible to form the medium in a free shape in a short time and at low cost. When a single crystal is used, a cylindrical medium having a diameter of several millimeters and a length of several tens of millimeters is usually used. However, when ceramic is used, a larger one can be made.

    Since the concentration of dopants such as Nd and Yb in the medium that directly contributes to light emission cannot be changed greatly regardless of whether it is a single crystal or a polycrystal, there is a certain limit to improving the laser output by increasing the concentration. However, in the case of ceramic, since the size of the medium can be remarkably increased as compared with the single crystal, a significant output improvement can be realized.

    Further, in the case of ceramic, a medium having a parallelepiped shape or a rectangular parallelepiped shape can be easily formed. When a medium having such a shape is used to cause oscillation light to travel in a zigzag manner inside the medium, the oscillation optical path can be made longer. As a result, amplification is increased and oscillation can be performed with high output. Further, since the laser beam emitted from the medium having such a shape has a quadrangular cross-sectional shape at the time of emission, it is advantageous for shaping into a linear beam as compared with a round beam. By shaping the emitted laser beam using an optical system, it is possible to easily obtain a linear beam having a short side length of 1 mm or less and a long side length of several mm to several m. Become. In addition, by irradiating the medium with the excitation light uniformly, the linear beam has a uniform energy distribution in the long side direction.

    By irradiating the semiconductor film with this linear beam, the entire surface of the semiconductor film can be annealed more uniformly. When uniform annealing is required up to both ends of the linear beam, it is necessary to arrange a slit at both ends to shield the energy attenuating portion.

    When a semiconductor film is annealed using a linear beam having a uniform intensity obtained in this manner and an electronic device is manufactured using this semiconductor film, the characteristics of the electronic device are good and uniform.

    Next, if necessary, a small amount of impurity element (boron or phosphorus) is doped into the semiconductor film in order to control the threshold value of the TFT. Here, an ion doping method that is plasma-excited without mass separation is used.

    The island-like semiconductor film 3 is formed with a thickness of 25 to 80 nm (preferably 30 to 70 nm). There is no limitation on the material of the semiconductor film, but it is preferably formed of silicon or a silicon germanium (SiGe) alloy.

    Then, a gate insulating film 4 is formed so as to cover the island-shaped semiconductor film 3. As the gate insulating film 4, a single layer or a laminated structure such as a thermal oxide film, a silicon oxide film, a silicon nitride film, or a silicon oxynitride film can be used. The gate insulating film 4 in contact with the island-like semiconductor film 3 is preferably a silicon oxide film. This is because when the gate insulating film 4 is a silicon oxide film, trap levels at the interface with the island-shaped semiconductor film are reduced. When the gate electrode is made of Mo, the gate insulating film in contact with the gate electrode is preferably a silicon nitride film. This is because the silicon nitride film does not oxidize Mo.

    Here, a 115 nm thick silicon oxynitride film (composition ratio Si = 32%, O = 59%, N = 7%, H = 2%) is formed as the gate insulating film 4 by a plasma CVD method.

    Next, a conductive layer is formed over the gate insulating film 4, the shape of the conductive layer is processed using a mask formed by a photolithography method or the like, and the gate electrode 5 is formed. Examples of the gate electrode material include Mo, Ti, W, Al, Nd, Cr, and alloys of these elements. Alternatively, the gate electrode 5 may be configured by stacking these elements or alloys of these elements. Here, the gate electrode is formed of Mo. Next, an impurity element is doped into the island-shaped semiconductor film 3 using the gate electrode 5 or the resist as a mask to form a channel formation region 8 and an impurity region 9 to be a source region and a drain region.

    Thereafter, a first interlayer insulating film 6 is formed using silicon nitride. Then, the impurity element added to the island-like semiconductor film 3 is activated and hydrogenated. The first interlayer insulating film 6 need not be formed.

    Next, the second interlayer insulating film is formed using a light-transmitting inorganic material (silicon oxide, silicon nitride, silicon oxynitride, or the like) or a low dielectric constant organic compound material (photosensitive or non-photosensitive organic resin material). 7 is formed. Alternatively, the second interlayer insulating film may be formed using a material containing siloxane. Siloxane is a material in which a skeleton structure is formed by a bond of silicon (Si) and oxygen (O). As a substituent, an organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent. The second interlayer insulating film 7 may have a laminated structure.

    Next, a resist mask is formed using a photomask, and the first interlayer insulating film 6, the second interlayer insulating film 7, and the gate insulating film 4 are selectively etched using the mask to form contact holes. Form. Then, the resist mask is removed.

    Then, a conductive film is formed on the second interlayer insulating film 7 by sputtering or printing. The conductive film may be a transparent conductive film or may have reflectivity. In the case of a transparent conductive film, for example, an indium tin oxide (ITO) film in which tin oxide is mixed with tin oxide, an indium tin silicon oxide (ITSO) film in which indium tin oxide (ITO) is mixed with silicon oxide, An indium zinc oxide (IZO) film, a zinc oxide film, or a tin oxide film in which zinc oxide is mixed with indium oxide can be used. Note that IZO is a transparent conductive material formed by sputtering using a target in which 2 to 20 wt% of zinc oxide (ZnO) is mixed with ITO.

    A transparent conductive film 10 is formed on the second interlayer insulating film 7, and then a metal film 11 is laminated on the transparent conductive film 10. The transparent conductive film 10 and the metal film 11 can be continuously formed by sputtering.

    Since the transparent conductive film has many materials having high resistance, the metal film 11 is preferably a material having lower resistance than the transparent conductive film. For example, Ti, Mo, Ta, Cr, W, Al, etc. can be used. Alternatively, a two-layer structure in which any of Ti, Mo, Ta, Cr, and W and Al are stacked, or a three-layer structure in which Al is sandwiched between metals such as Ti, Mo, Ta, Cr, and W may be used. Next, after a resist film is applied over the entire surface of the metal film 11, exposure is performed using an exposure mask shown in FIG.

    In the case where an ITO film is used as the transparent conductive film, a process for crystallizing the ITO film by heat treatment becomes necessary. In that case, an ITO film may be formed by sputtering, and the metal film 11 may be formed after firing. When an ITSO film is used, the number of steps is reduced because a crystallization step is unnecessary.

    In FIG. 1A, the exposure mask includes light shielding portions 12a and 12b that shield exposure light and a semi-transmissive portion 13 through which part of the exposure light passes. The semi-transmissive portion 13 is provided with a semi-permeable film 19 to reduce the light intensity of the exposure light. The light shielding portions 12 a and 12 b are configured by laminating a metal film 20 on a semipermeable membrane 19. The width of the light shielding part 12b is indicated by t1, and the width of the semi-transmissive part 13 is indicated by t2. Here, an example in which a semi-permeable film is used for the semi-transmissive part is shown, but the present invention is not limited to this. A diffraction grating pattern may be used for the semi-transmissive portion.

    When the resist film is exposed using the exposure mask shown in FIG. 1A, a non-exposed region 14a and an exposed region 14b are formed in the resist film. At the time of exposure, light wraps around the light shielding portions 12a and 12b or passes through the semi-transmissive portion 13 to form an exposure region 14b shown in FIG.

    When the development is performed, the exposed region 14b is removed, and as shown in FIG. 1B, a resist pattern 15a having two film thicknesses and a resist pattern 16a having a substantially uniform film thickness are obtained. Obtained on the metal film 11. The resist pattern 15a has a thick film region and a thin film region. The thin film region is adjusted by adjusting the exposure energy or the transmittance of the semi-transmissive film 19. Can be adjusted. The resist pattern 15a is asymmetrical and the resist pattern 16a is symmetrical.

    Next, the metal film 11 and the transparent conductive film 10 are etched by dry etching. Dry etching is performed by a dry etching apparatus using a high-density plasma source such as ECR (Electron Cyclotron Resonance) or ICP (Inductive Coupled Plasma).

    Although an example using an ICP etching apparatus is shown here, the present invention is not limited to this. For example, a parallel plate etching apparatus, a magnetron etching apparatus, an ECR etching apparatus, or a helicon etching apparatus may be used. .

    Etching of the metal film 11 and the transparent conductive film 10 may be performed by wet etching. However, since dry etching is suitable for fine processing, dry etching is preferable. In addition, since the material of the metal film 11 and the transparent conductive film 10 is different from that of the second interlayer insulating film 7, the second interlayer insulating film 7 is in contact with the metal film 11 and the transparent conductive film 10 even when dry etching is performed. A large etching selectivity can be obtained. In order to further increase the etching selectivity, at least the uppermost layer of the second interlayer insulating film 7 may be formed of a silicon nitride film.

    Thus, as shown in FIG. 1C, on the second interlayer insulating film 7, a pattern composed of a laminate of the transparent conductive film 17a and the metal film 17b, and a laminate of the transparent conductive film 18a and the metal film 18b. Is formed.

    Next, the resist patterns 15a and 16a are ashed or etched (FIG. 2A). By this step, the thin region of the resist pattern 15a is etched, and the entire resist pattern 15a, 16a is thinned by the thickness of the thin region. Then, resist patterns 15b and 16b are formed. Since the resist patterns 15a and 16a are etched not only in the film thickness direction but also in the width direction, the widths of the resist patterns 15b and 16b are smaller than the widths of the metal films 17b and 18b and the transparent conductive films 17a and 18a. Therefore, the side surfaces of the resist patterns 15b and 16b do not coincide with the side surfaces of the underlying metal film and the transparent conductive film, and the side surfaces of the resist patterns 15b and 16b recede. In FIG. 2B, the resist pattern 15b is asymmetrical and the resist pattern 16b is symmetrical.

    Next, the metal film 18b is etched using the resist pattern 15b to form a metal film 18c (FIG. 2B). At this time, it is preferable that the material of the metal film 18b has a high selection ratio with respect to the transparent conductive film 18a so that the transparent conductive film 18a is not unnecessarily etched. For example, if the material of the transparent conductive film 18a is ITSO, the material of the metal film 18b is preferably Ti, Mo, Cr, Al or the like, and the metal film 18b may have a laminated structure made of these materials. Then, a metal film 18c having a smaller pattern than the transparent conductive film 18a, that is, a plane area is formed. On the other hand, the metal film 17b is also etched using the resist pattern 16b to form a metal film 17c having a smaller plane area than the transparent conductive film 17a.

    The etching of the metal films 17b and 18b in FIGS. 2A to 2B may be performed by dry etching or wet etching, but in FIG. 2B, the metal films 17c and 18c are etched by dry etching. The case of forming is illustrated. When dry etching is performed, the side surface in the cross section of the metal film 18c is asymmetric. This is because the shape of the resist pattern 15b is asymmetric, so that the metal film 18c reflecting the shape is formed. The metal film 18c has a cross-sectional shape in which the other side surface is more inclined than the one side surface. The metal film 17c is formed so that the side surface coincides with the side surface of the resist pattern 16b. One side surface of the metal film 18c is on an extension line of one side surface of the resist pattern 15b, and the other side surface coincides with the other side surface of the resist pattern 15b.

    When the metal films 17b and 18b are wet-etched, the etching proceeds isotropically, so that a metal film smaller than the resist patterns 15b and 16b is formed. FIG. 4 shows a diagram when wet etching is performed. In FIG. 4A, the metal films 17b and 18b are wet etched to form the metal films 17d and 18d. Others are the same as those in FIG.

    The side surfaces of the resist patterns 15b and 16b do not coincide with the side surfaces of the metal films 17d and 18d. Therefore, even when the same resist patterns 15b and 16b are used as masks, smaller metal films 17d and 18d are formed by wet etching than dry etching.

    FIG. 4B is a diagram in the case where the metal film 17d is formed by stacking three layers. For example, the metal film 17d has a laminated structure in which an aluminum film 92a is sandwiched between Ti films 91a and 93a, and the side surfaces of the metal film 17d and the resist pattern 16b do not match. Also, the metal film 18d has a laminated structure in which the aluminum film 92b is sandwiched between the Ti films 91b and 93b, and the side surfaces of the metal film 18d and the resist pattern 15b do not match.

In FIG. 4 (A), (B) , the transparent conductive film 17a, since 18a is formed by dry etching, the side surface has an angle theta ₁ nearly perpendicular or 90 degrees to the substrate surface. On the other hand, the metal film 17d, 18 d are formed by wet etching, isotropic etching, the side surface thereof has an acute angle theta ₂ with respect to the substrate surface. Therefore, when the angle θ ₁ of the side surface of the transparent conductive film is compared with the angle θ ₂ of the side surface of the metal film, θ ₁ > θ ₂ is satisfied. Note that the angle θ ₁ is the inclination angle of the side surface of the transparent conductive film with respect to the surface of the substrate 1, the angle θ ₂ is the inclination angle of the side surface of the metal film with respect to the surface of the substrate 1, and θ ₁ , θ ₂ is within the range of 0 ° to 90 °.

In the case where the metal film has a stacked structure as shown in FIG. 4B, the etching rate may be different depending on each layer. Along with this, the angles formed by the side surfaces of the respective layers with respect to the substrate surface may be different. Therefore, when the metal film is laminated, the angle formed by the side surface of the lowermost film with respect to the substrate surface is θ ₂ .

Note that the side surfaces of the metal films 17d and 18d and the transparent conductive films 17a and 18a, which are transparent conductive films, may not be smooth but may have irregularities. In that case, the angle θ ₁ and the angle θ ₂ may be determined as appropriate. For example, a rough straight line or curve can be drawn on the uneven side surface, and the angle θ ₁ and the angle θ ₂ can be determined using the straight line or the curve. Moreover, based on the uneven side surface, a plurality of angles θ ₁ and angle θ ₂ can be taken, and the average values thereof can be set to angle θ ₁ and angle θ ₂ . The most reasonable method should be used.

    As described above, the metal films 17c and 18c or the metal films 17d and 18d are formed by either the dry etching method or the wet etching method. Regardless of which etching method is used, the metal film 17c and the metal film 18c or the metal films 17d and 18d having side surfaces recessed from the side surfaces of the transparent conductive films 17a and 18a are formed. That is, the metal film 17c or the metal film 17d having a smaller planar area than the transparent conductive film 17a and the metal film 18c or 18d having a smaller planar area than the transparent conductive film 18a are formed. One of the factors is that the resist patterns 15a and 16a that are masks for forming the transparent conductive films 17a and 18a and the resist patterns 15b and 16b that are masks for forming the metal film are different in size. This is because the patterns 15b and 16b are smaller.

    Thereafter, the resist patterns 15b and 16b are removed (FIG. 2C). Then, a wiring or electrode composed of the transparent conductive film 17a and the metal film 17c, and a wiring or electrode composed of the transparent conductive film 18a and the metal film 18c are formed. The transparent conductive film 18a functions as a pixel electrode. If the resist patterns 15b and 16b are removed from FIGS. 4A and 4B, wirings or electrodes made of the transparent conductive film 17a and the metal film 17d, and wirings or electrodes made of the transparent conductive film 18a and the metal film 18d are formed. The

    When the metal film 18b is etched using the resist pattern 15b as a mask, a part of the surface of the transparent conductive film 18a is slightly etched. In particular, when the metal film 18c is formed by dry etching, it is difficult to achieve a selective ratio with the underlying transparent conductive film, so that a part of the surface of the transparent conductive film 18a is more easily etched. Therefore, when the film thickness a and the film thickness b of the transparent conductive film 18a in FIG. 2C are compared, the film thickness a <film thickness b. The film thickness a refers to the average film thickness of the transparent conductive film 18a in a portion not overlapping with the metal film 18c or the metal film 18d, and the film thickness b refers to the film of the transparent conductive film 18a at the bottom of the contact hole reaching the impurity region 9. Say thick.

    In the case where a light-emitting element is stacked over the TFT illustrated in FIG. 2C and a light-emitting device that emits light in the direction of the substrate 1 is formed, the transmittance is increased due to the thin film thickness of the transparent conductive film 18a. Can provide. Therefore, the thinner film thickness a is preferable. Further, when the metal film 18b is etched using the resist pattern 15b as a mask, the surface of the transparent conductive film 18a can be etched, so that dust on the surface can be removed and light-emitting elements caused by dust can be prevented from being short-circuited. .

    One side surface of the metal film 18c formed in this embodiment is inclined. Therefore, when used in a liquid crystal display device, rubbing can be performed smoothly on the side surface of the metal film 18c by rubbing from the inclined side surface of the metal film 18c. When rubbing is performed from the direction in which the side surface of the metal film 18c is vertical, the rubbing may be incomplete due to stress applied to the rubbing cloth at the vertical side surface portion, and alignment may be incomplete. Therefore, rubbing is preferably performed from the side where the side surface of the metal film 18c is inclined.

    Further, when the metal films 17d and 18d inclined on both side surfaces are formed by wet etching as shown in FIG. 4, the rubbing can be smoothly performed from either direction, which is more effective.

    FIG. 3 shows a top view of FIG. FIG. 2C is a cross-sectional view taken along the line AA ′ of FIG. As can be seen from FIG. 3, the wiring or electrode formed by laminating the transparent conductive film 17a and the metal film 17c functions as a source electrode or a drain electrode of the TFT, and also functions as a source wiring. Further, the wiring or electrode made of the transparent conductive film 18a and the metal film 18c functions as a source electrode or a drain electrode of the TFT, and also functions as a pixel electrode. Strictly speaking, a portion of the transparent conductive film 18a that does not overlap with the metal film 18c functions as a pixel electrode and transmits light. Further, the capacitor wiring 21 is formed from the same layer as the gate electrode 5, and the capacitor wiring 21 forms a capacitor by overlapping with the transparent conductive film 18a. Note that the capacitor wiring 21 may be formed in a layer different from the gate electrode 5. The side surface of the metal film 17c does not coincide with the side surface of the transparent conductive film 17a, and is located inside the side surface of the transparent conductive film 17a. The side surface of the metal film 18c does not coincide with the side surface of the transparent conductive film 18a, and is located inside the side surface of the transparent conductive film 18a. The relationship between the metal film 17d and the transparent conductive film 17a described in FIG. 4 and the relationship between the metal film 18d and the transparent conductive film 18a are the same.

    In the present embodiment, it is very beneficial to form a transparent conductive film functioning as a pixel electrode on a flat surface in order to prevent the transparent conductive film from being cut off. When the metal film 18c is formed by etching, the surface of the lower transparent conductive film 18a exposed from the metal film 18c is also slightly etched. Therefore, if the transparent conductive film 18a is formed on a stepped surface and the film thickness of the transparent conductive film is non-uniform, the thin transparent conductive film portion is etched by etching to form the metal film 18c. There is a possibility that the transparent conductive film breaks. When disconnection occurs, light leakage occurs at the disconnected portion, or the area of the pixel electrode is reduced and the aperture ratio is decreased. Therefore, it is preferable to form the transparent conductive film 18a exposed from the metal film 18c on a flat surface. For this purpose, it is preferable to form the second interlayer insulating film 7 from an organic material and form a second interlayer insulating film having a flat surface.

    When a laminate of a metal film and a conductive film is formed according to the present invention, the conductive film is positioned in contact with the metal film. However, the conductive film is not necessarily located in contact with the metal film at the portion where the level difference is large. This is because there is a possibility that the conductive film is cut off by the step. Therefore, it is preferable to dispose a metal film on the conductive film in the contact hole portion reaching the impurity region 9 in FIG.

    FIG. 19 shows a state where the conductive film is cut off at the contact hole. Due to the inclination of the side surface of the contact hole, the conductive films 94 and 95 are partially cut off. However, if the metal films 96 and 97 are formed on the conductive films 94 and 95 in the contact hole portion, even if the transparent conductive film is cut, the cut conductive films are electrically connected to each other through the metal film. Can be connected. In this case, the metal films 96 and 97 are in contact with the second interlayer insulating film 7 on the side surface of the contact hole. Further, since the conductive film in the contact hole portion does not function as a pixel electrode, there is no problem even if the metal film is left on the upper portion. Therefore, in the configuration of the present embodiment, even if the transparent conductive film is cut off at the contact hole, the metal film formed on the top can supplement the electrical connection of the transparent conductive film, and display defects can be prevented. .

    Further, it is preferable that the metal film be left on the conductive film even in a portion where the conductive film has a step due to the capacitor wiring 21 in FIG. Even if the conductive film is cut off due to a step, the conductive films can be electrically connected to each other through the metal film, so that a capacitor can be reliably formed.

    The shape of the transparent conductive film 18a in FIG. 3 is an example, and other shapes may be used. For example, a pixel electrode used for an IPS (In-Plane-Switching) method or an FFS (Fringe Field Switching) method by providing a comb-like edge, or an MVA (Multi-Domain Vertical Alignment) method by inserting a slit. The pixel electrode can be used in a PVA (Patterned Vertical Alignment) method.

    As described above, since the transparent conductive film and the metal film can be formed using one resist pattern, the number of manufacturing steps can be reduced. In addition, while using a transparent conductive film as a wiring or an electrode, by laminating a metal film, the resistance can be reduced and the conductivity can be increased.

    While the transparent conductive film 10 and the metal film 11 are etched from the state shown in FIG. 1B, the resist patterns 15a and 16a are also naturally etched. When the resist patterns 15b and 16b are formed, the resist pattern is ashed or etched. Thus, the step of forming the resist patterns 15b and 16b may not be provided.

    In this embodiment, the top gate TFT having an island-shaped semiconductor film made of a crystalline semiconductor film is described. However, the present embodiment can also be applied to a bottom gate TFT made of a crystalline semiconductor film. In this embodiment, the island-shaped semiconductor film has the impurity region 9 and the channel formation region 8 which become the source region and the drain region, but can also have a low concentration impurity region, an offset region, and the like.

(Embodiment 2)
This embodiment will be described with reference to FIG. Embodiment 1 can be referred to for the kind of substrate constituting the TFT described in this embodiment, the formation method and material of each layer, and the like.

    An insulating film 402 is formed over the substrate 401 as a base film. Note that the base film is not necessarily provided. Next, a conductive layer is formed over the insulating film 402, and the shape of the conductive layer is processed using a mask formed by a photolithography method or the like, so that the gate electrode 403 is formed.

    A gate insulating film 404 is formed so as to cover the gate electrode 403. An amorphous semiconductor film is formed over the gate insulating film 404. There is no limitation on the material of the amorphous semiconductor film, but it is preferably formed of silicon or a silicon germanium (SiGe) alloy. Subsequently, a conductive layer is formed over the amorphous semiconductor film. For example, an amorphous silicon film containing phosphorus can be used for the conductive layer. Then, the island-shaped semiconductor film 405 and the conductive layer 406 are formed by processing the shapes of the amorphous semiconductor film and the conductive layer using a mask formed by a photolithography method or the like.

    A transparent conductive film 407 and a metal film 408 are stacked over the conductive layer 406. Note that a reflective conductive layer may be used instead of the transparent conductive film. The transparent conductive film material described in Embodiment 1 can be used as the transparent conductive film. Next, after a resist film is applied over the entire surface of the metal film 408, exposure is performed using an exposure mask shown in FIG.

    In FIG. 5A, the exposure mask includes light shielding portions 409a and 409b and a semi-transmissive portion 410. A diffraction pattern or a semipermeable membrane can be used for the semipermeable portion 410. When the resist film is exposed using the exposure mask shown in FIG. 5A, a non-exposed region 411 and an exposed region 412 are formed in the resist film. Then, development is performed to form resist patterns 413a and 414a as shown in FIG. The resist pattern 414a is exposed at the light shielding portion 409b and developed, and the region 422 (the left portion from the broken line of the resist pattern 414a) and the region 423 exposed and developed at the semi-transmissive portion 410 (the right portion from the broken line of the resist pattern 414a). ).

    Next, the metal film 408 and the transparent conductive film 407 are etched by dry etching. Then, as shown in FIG. 5C, a pattern formed by stacking the transparent conductive film 415 and the metal film 416 and a pattern formed by stacking the transparent conductive film 419 and the metal film 420 are formed. This etching may be performed by wet etching. However, since dry etching is suitable for fine processing, dry etching is preferable. In addition, since the material of the metal film 408 and the transparent conductive film 407 is different from that of the gate insulating film 404, a large etching selectivity can be obtained even when dry etching is performed. Further, in order to increase the etching selectivity between the two, at least the uppermost layer of the gate insulating film 404 may be formed of a silicon nitride film.

    Next, as shown in FIG. 6A, the resist patterns 413a and 414a are ashed or etched. By this step, the region 423 of the resist pattern 414a is removed. Further, the film thickness of the region 422 of the resist pattern 414a is reduced by the film thickness d2 of the region 423, and the resist pattern 414b is formed. The resist pattern 413a is also ashed by the film thickness d2 to form a resist pattern 413b. Further, since the width direction is also etched, the widths of the resist patterns 413b and 414b are smaller than the widths of the metal films 416 and 420 and the transparent conductive films 415 and 419. Therefore, the side surfaces of the resist patterns 413b and 414b do not coincide with the side surfaces of the underlying metal film and the transparent conductive film, and the side surfaces of the resist patterns 413b and 414b recede. The angles formed by the both side surfaces of the resist pattern 414b with respect to the substrate surface are different from each other. On the other hand, the resist pattern 413b has substantially the same angle between both side surfaces with respect to the substrate surface.

    Next, the metal film 416 is etched using the resist pattern 414b to form the metal film 421. In addition, the metal film 420 is etched using the resist pattern 413b to form the metal film 424. (FIG. 6B). At this time, the transparent conductive film 415 is prevented from being unnecessarily etched. The metal films 424 and 421 are formed in a pattern smaller than the transparent conductive films 419 and 415. Further, using the transparent conductive films 415 and 419 as masks, the conductive layer 406 is etched to form conductive layers 417 and 418. A part of the island-shaped semiconductor film 405 is also slightly etched. One end of the transparent conductive film 419 and one end of the conductive layer 417, and one end of the transparent conductive film 415 and one end of the conductive layer 418 coincide with each other. The metal films 421 and 424 are formed in the same process.

    Further, the conductive layer 406 may be etched at the same time as the etching for forming the metal films 421 and 424.

    Then, the resist patterns 413b and 414b are removed, and a wiring or electrode composed of the transparent conductive film 419 and the metal film 424 and a wiring or electrode composed of the metal film 421 and the transparent conductive film 415 are formed. The transparent conductive film 415 functions as a pixel electrode (FIG. 6C).

    The conductive layers 417 and 418 can be formed at the same time as the etching shown in FIG. 5C. However, as shown in FIG. 6, it is preferable that the conductive layers 417 and 418 be formed during or after the metal films 424 and 421 are formed. This is because if the island-shaped semiconductor film is exposed at the stage of FIG. 5C, the island-shaped semiconductor film may be further etched when the metal films 424 and 421 are formed.

    The etching in FIG. 6B may be dry etching or wet etching. When dry etching is performed, as shown in FIGS. 6B and 6C, the cross-sectional shape of the metal film 421 is asymmetrical to reflect the shape of the resist pattern 414b. That is, the metal film 421 has a cross-sectional shape in which the other side surface is more inclined than the one side surface, one side surface is on an extension line of one side surface of the resist pattern 414b, and the other side surface is the other side of the resist pattern 414b. Match the side of the. The metal film 424 is formed so that the side surface coincides with the side surface of the resist pattern 413b.

    The case where the metal films 421 and 424 are formed by wet etching will be described with reference to FIG. Instead of the metal films 421 and 424 formed by dry etching, metal films 425 and 426 are formed when formed by wet etching.

In the case of wet etching, metal films 425 and 426 smaller than the resist patterns 413b and 414b are formed as shown in FIG. 8, and the side surfaces of the resist patterns 413b and 414b do not coincide with the side surfaces of the metal films 425 and 426. Therefore, even when the same resist pattern 413b, 414b is used as a mask, a metal film having a smaller planar area is formed by wet etching rather than dry etching. Similarly to FIG. 4, the case of forming a metal film by wet etching, the angle theta ₁ at the side surfaces of the transparent conductive film 415,419, comparing the angle theta ₂ in the side surface of the metal film 425 and 426, theta ₁ > has become a θ _2. Note that the angle θ ₁ is the inclination angle of the side surface of the transparent conductive film with respect to the surface of the substrate 401, the angle θ ₂ is the inclination angle of the side surface of the metal film with respect to the surface of the substrate 401, and θ ₁ , θ ₂ is within the range of 0 ° to 90 °. Also, the metal film 425 and 426 when a laminated structure as shown in FIG. 4 (B), the angle at which the side surface of the lowermost film with respect to the substrate surface and theta _2.

    Note that in wet etching, the conductive layer 406 may be etched at the same time as the etching in FIG. 5C or after the metal films 425 and 426 in FIG. 6B are formed.

    Regardless of which etching method is used to form the metal film, the metal film 425 or metal film 424 whose side surface recedes from the side surface of the transparent conductive film 419, or the metal film 421 or metal film 426 that recedes from the side surface of the transparent conductive film 415. Is formed. That is, the metal film 424 or 425 having a smaller planar area than the transparent conductive film 419 and the metal film 421 or 426 having a smaller planar area than the transparent conductive film 415 are formed.

    Then, the resist patterns 413b and 414b are removed, and a wiring or an electrode including the transparent conductive film 419 and the metal film 424 and a wiring or an electrode including the metal film 421 and the transparent conductive film 415 are formed (FIG. 6C). If the resist patterns 413b and 414b are removed from FIG. 8, a wiring or electrode made of the transparent conductive film 419 and the metal film 425, and a wiring or electrode made of the transparent conductive film 415 and the metal film 426 are formed.

    When a laminate of the metal film 421 and the transparent conductive film 415 is formed using the resist pattern 414a having regions with different film thicknesses of the present invention, a part of the surface of the transparent conductive film 415 is formed when the metal film 421 is formed. Somewhat etched. In particular, when the metal film 421 is formed by dry etching, a selective ratio with the lower transparent conductive film 415 is difficult to be obtained, so that a part of the surface of the transparent conductive film 415 is more easily etched. Therefore, the film thickness a of the transparent conductive film 415 in FIG. 6C (the film thickness of the transparent conductive film 415 exposed from the metal film 421) and the film thickness c (the transparent conductive film in contact with the gate insulating film 404 and the metal film 421). (Film thickness c), the film thickness a <film thickness c. The film thickness a and the film thickness c are average film thicknesses.

    When a light emitting device is formed on the TFT of FIG. 6C to form a light emitting device, the film thickness a <film thickness c has the following effects. A light-emitting device that emits light toward the substrate 401 can provide a bright display because the film thickness a is thin. In addition, since the surface of the transparent conductive film 415 can be etched, dust on the surface can be removed and a short circuit of the light-emitting element can be prevented.

    One side surface of the metal film 421 formed in this embodiment is inclined. Therefore, when used in a liquid crystal display device, rubbing can be performed smoothly on the side surface of the metal film 421 by rubbing from the inclined side surface of the metal film 421. When rubbing is performed from the direction in which the side surface of the metal film 421 is vertical, the rubbing may be incomplete due to stress applied to the rubbing cloth at the vertical side surface portion, and the alignment may be incomplete. Therefore, rubbing is preferably performed from the side where the side surface of the metal film 421 is inclined.

    Further, when the metal films 425 and 426 inclined on both side surfaces are formed by wet etching as shown in FIG. 8, the rubbing can be smoothly performed in either direction, which is more effective.

    FIG. 7 shows a top view of FIG. FIG. 6C is a cross-sectional view taken along the line AA ′ of FIG. As shown in FIG. 7, the wiring or electrode formed by stacking the transparent conductive film 419 and the metal film 424 functions as a source electrode or a drain electrode of the TFT and also functions as a source wiring. Further, the wiring or electrode formed of the transparent conductive film 415 and the metal film 421 functions as a source electrode or a drain electrode of the TFT, and also functions as a pixel electrode. Strictly speaking, a portion of the transparent conductive film 415 that does not overlap with the metal film 421 functions as a pixel electrode. In addition, the capacitor wiring 430 formed from the same layer as the gate electrode 403 overlaps with the transparent conductive film 415 to form a capacitor. Note that the capacitor wiring 430 may be formed from a layer different from that of the gate electrode. The side surface of the metal film 424 does not coincide with the side surface of the transparent conductive film 419 and is located inside the side surface of the transparent conductive film 419. The side surface of the metal film 421 does not coincide with the side surface of the transparent conductive film 415 and is located inside the side surface of the transparent conductive film 415. The relationship between the metal film 425 and the transparent conductive film 419 and the relationship between the metal film 426 and the transparent conductive film 415 described with reference to FIG.

    Further, covering the transparent conductive film 415 formed over the step due to the capacitor wiring 430, the gate electrode 403, or the island-shaped semiconductor film 405 with the metal film 421 prevents the transparent conductive film functioning as a pixel electrode from being cut off. It is beneficial to do. Since the transparent conductive film 415 is also slightly etched when the metal film 421 is formed by etching, the transparent conductive film is cut off during the etching if the thickness of the transparent conductive film is not uniform. Therefore, it is preferable to use a transparent conductive film portion on a flat surface that is easily formed with a uniform thickness as the pixel electrode. For that purpose, the metal film 421 may be formed so as to cover the transparent conductive film 415 located on the stepped surface. Then, the transparent conductive film 415 on the stepped surface is not etched and is not cut off.

    Further, in order to cover the transparent conductive film 415 on the step surface with the metal film 421, the thickness of the region 423 of the resist pattern 414a in FIG. 5B is d2, and the thinnest thickness among the regions 422 is d1. In this case, at least d1> d2. That is, when the resist is ashed in FIG. 6A, the film thickness d2 is ashed, and the film thickness of the entire resist is decreased by d2. Even if the film thickness is decreased by d2 by this ashing, the film thickness d2 is reduced in the region 422. This is because the resist needs to remain. Therefore, at least in the resist pattern 414a, the thickness d1 of the thinnest portion of the region 422 is preferably larger than the thickness d2 of the region 423.

    Through the above steps, a bottom-gate TFT having an island-shaped semiconductor film made of an amorphous semiconductor film can be formed. While using a transparent conductive film as a wiring or an electrode, by laminating a metal film, the resistance can be lowered and the conductivity can be increased. In addition, since it is not necessary to provide a resist pattern for forming the metal film 421, the number of steps can be reduced.

    Note that as another TFT structure of this embodiment mode, a structure of a TFT having a channel protective film is shown in FIG. 9A, the same components as those in FIGS. 5 to 8 are denoted by the same reference numerals, and detailed description thereof is omitted.

    The process until the island-shaped semiconductor film 405 is formed over the substrate 401 is similar to that illustrated in FIG. Next, an insulating film such as a silicon nitride film is formed, and the insulating film is processed by etching to form a channel protective film 601 near the center on the island-shaped semiconductor film 405. After that, a conductive layer 406, a transparent conductive film 407, and a metal film 408 are sequentially formed so as to cover the channel protective film 601. Then, a resist film is applied on the entire surface of the metal film 408. The resist film is exposed using an exposure mask having a semi-transmissive portion and then developed to form resist patterns 413a and 414a.

    Next, etching is performed by dry etching using the resist patterns 413a and 414a, so that a conductive layer 417, a conductive layer 418, a transparent conductive film 415, a transparent conductive film 419, a metal film 416, and a metal film 420 are formed. The transparent conductive film 415 functions as a pixel electrode (FIG. 9B). The channel protective film 601 serves as a protective film for preventing the island-like semiconductor film 405 from being etched when the conductive layers 417 and 418 are formed.

    Next, the resist patterns 413a and 414a are ashed to form resist patterns 413b and 414b (FIG. 9C). The metal films 420 and 416 are etched using the resist patterns 413b and 414b to form metal films 424 and 421 (FIG. 9D). FIG. 9D illustrates the case where the metal films 424 and 421 are formed by dry etching. Note that the metal films 425 and 426 shown in FIG. 8 may be formed by wet etching. The shapes of the end portions of the metal film and the transparent conductive film at that time are the same as described in FIG.

    The TFT having the channel protective film 601 has the following effects. First, when dry etching is performed in the etching process of the transparent conductive film 407 and the metal film 408 shown in FIG. 9B, there is no concern that the island-shaped semiconductor film is etched. Therefore, the degree of freedom in the etching process of the transparent conductive film and the metal film is increased, and the etching can be performed under optimum etching conditions. Further, fine processing can be performed by dry etching. Furthermore, the island-shaped semiconductor film 405 can be formed thin, and the characteristics of the TFT can be improved. Therefore, it is optimal for an active matrix organic light emitting diode that requires a TFT that allows a large current to flow through the driving TFT.

    Another TFT structure is shown in FIG. This configuration is a bottom gate TFT formed of a crystalline semiconductor film. The steps are similar to those in FIG. 5A until the gate insulating film 404 is formed over the substrate 401. Then, a crystalline semiconductor film is formed over the gate insulating film. The crystalline semiconductor film may be formed directly on the gate insulating film, or the amorphous semiconductor film may be formed and then crystallized to form the crystalline semiconductor film as in the first embodiment. The crystalline semiconductor film is processed by etching to form an island-shaped semiconductor film 405. A pair of impurity regions 602 and a channel formation region 603 are formed in the island-shaped semiconductor film 405 by selectively doping the island-shaped semiconductor film 405 with impurities. After the interlayer insulating film 604 is formed over the island-shaped semiconductor film 405, a contact hole reaching the impurity region 602 is formed in the interlayer insulating film 604, and a metal film is stacked over the transparent conductive film and the transparent conductive film. Then, etching is performed using the resist pattern exposed and developed with the exposure mask shown in FIG. 5A, and an electrode or a wiring including the transparent conductive film 419 and the metal film 424, and the metal film 421 and the transparent conductive film 415 are used. An electrode or wiring to be formed is formed. In the structure of FIG. 10, when the interlayer insulating film 604 is formed of an organic resin material or the like, the interlayer insulating film 604 has a flat surface. That is, since the transparent conductive film 415 can be formed on a flat surface, the transparent conductive film 415 can be prevented from being cut off during the etching for forming the metal film 421.

    Note that the TFT illustrated in FIG. 10 may include an impurity region in addition to the pair of impurity regions 602.

    9 and 10, the characteristics of the shape of the metal film resulting from the etching method for forming the metal films 421 and 424 are the same as described above. Instead of the metal films 421 and 424, the metal films 425 and 426 having a shape as shown in FIG. 8 can be formed by wet etching, or a metal film having a stacked structure may be used. Further, although the transparent conductive film is used as the conductive film functioning as the pixel electrode, a reflective conductive film may be used. As the material of the transparent conductive film, the material shown in Embodiment Mode 1 can be used.

    This embodiment can be freely combined with Embodiment 1 as far as practicable.

(Embodiment 3)
In this embodiment, the exposure mask used in Embodiments 1 and 2 will be described with reference to FIG. 11A to 11C are top views of the light shielding portion 12b and the semi-transmissive portion 13 of the exposure mask shown in FIG. 1 or FIG. The width of the light shielding portion 12b of the exposure mask is indicated by t1, and the width of the semi-transmissive portion 13 is indicated by t2.

    The semi-transmissive portion 13 can be provided with a diffraction grating pattern, and FIGS. 11A and 11B show a diffraction grating pattern having a slit portion composed of a plurality of slits below the resolution limit of the exposure apparatus. Yes. The diffraction grating pattern is a pattern in which at least one pattern such as a slit and a dot is arranged. When a plurality of patterns such as slits and dots are arranged, they may be arranged periodically or aperiodically. By using a fine pattern below the resolution limit, it is possible to modulate the substantial exposure amount and to adjust the film thickness after development of the exposed resist.

    The direction in which the slit of the slit portion extends may be parallel to one side of the light shielding portion 303 like the slit portion 301 or perpendicular to one side of the light shielding portion 303 like the slit portion 302. Alternatively, an oblique direction with respect to one side of the light shielding portion 303 may be a direction in which the slit extends. The resist used in this photolithography process is preferably a positive resist.

    As another example of the semi-transmissive portion, FIG. 11C illustrates an example in which a semi-transmissive film 304 having a function of reducing the light intensity of exposure light is provided. As the semipermeable membrane, in addition to MoSiN, MoSi, MoSiO, MoSiON, CrSi, or the like can be used. An exposure method using an exposure mask having a semi-transmissive portion is also called a halftone exposure method.

    When the exposure light shown in FIGS. 11A to 11C is irradiated with exposure light, the light intensity of the light shielding portion 303 is zero and the light intensity of the light transmitting portion 305 is 100%. On the other hand, the intensity of light passing through the slit portions 301 and 302 or the semi-transmissive portion having the light intensity reducing function constituted by the semi-transmissive film 304 can be adjusted in a range of 10 to 70%. An example of a typical light intensity distribution is shown in FIG. When the semi-transmissive portion is a diffraction grating pattern, the adjustment of the light intensity passing through the semi-transmissive portion is realized by adjusting the pitch and slit width of the slit portions 301 and 302.

    This embodiment can be freely combined with Embodiments 1 and 2.

(Embodiment 4)
In this embodiment, an EL (Electro Luminescence) display device will be described with reference to FIGS. Embodiments 1 and 2 can be referred to for the formation method and material of the substrate and each layer constituting the TFT. The TFTs of FIGS. 12 and 13 are described using the structure of the top gate type TFT of Embodiment 1, but may be a bottom gate type TFT structure. The same components as those in Embodiment 1 shown in FIGS. 1 and 2 are denoted by the same reference numerals, and detailed description thereof is omitted. However, the pixel configuration is not limited to those shown in FIGS. 12 and 13, and other pixel configurations may be used.

    FIG. 12A shows a top view of a pixel portion of an EL display device. The pixel is provided with two TFTs, a switching TFT 140 and a driving TFT 141 that controls a current flowing through the EL element. The gate electrode 5 b of the driving TFT 141 is electrically connected to the transparent conductive film 123 and the metal film 124 that serve as the source electrode or drain electrode of the switching TFT 140. FIG. 12B is a cross-sectional view taken along lines A-A ′ and B-B ′ of FIG.

    A TFT is formed on the substrate 1 by the method of the first embodiment. An insulating film 2 is formed on the substrate 1, and island-like semiconductor films 3a and 3b are formed thereon. The island-like semiconductor films 3a and 3b are amorphous semiconductor films or crystalline semiconductor films. Subsequently, the gate insulating film 4 and the gate electrodes 5a and 5b are formed. The gate electrode 5a extends from the gate wiring, and the gate electrode 5b is formed separately from the gate wiring (gate electrode 5a). Using the gate electrodes 5a and 5b as a mask, the island-shaped semiconductor films 3a and 3b are doped with an impurity element, and a pair of impurity regions and a channel formation region are formed in each of the island-shaped semiconductor films 3a and 3b. Next, a first interlayer insulating film 6 and a second interlayer insulating film 7 are formed on the gate electrodes 5a and 5b.

    Next, the gate insulating film 4, the first interlayer insulating film 6 and the second interlayer insulating film 7 are etched to form contact holes reaching the pair of impurity regions of the island-shaped semiconductor film. At the same time, the first interlayer insulating film 6 and the second interlayer insulating film 7 are etched to form a contact hole reaching the gate electrode 5b. A transparent conductive film is formed on the second interlayer insulating film 7, and a metal film is further laminated thereon. Then, the transparent conductive film and the metal film are etched by the same method as in Embodiment Mode 1, and the wiring or electrode made of the metal film 122 and the transparent conductive film 121, the wiring or electrode made of the metal film 124 and the transparent conductive film 123, and the metal film 126. Then, a wiring or electrode made of the transparent conductive film 125 and a wiring or electrode made of the metal film 128 and the transparent conductive film 127 are formed. The transparent conductive film 127 functions as a pixel electrode.

    The metal films 122, 124, and 126 have a similar relationship with the transparent conductive films 121, 123, and 125 located in the lower layer, and have a pattern that is slightly smaller than the respective transparent conductive films. In order to form the metal films 122, 124, and 126, etching is performed using a resist pattern exposed and developed with an exposure mask having a light-shielding portion, like the resist pattern 16a shown in FIG. On the other hand, since the transparent conductive film 127 partially functions as a pixel electrode, the metal film 128 does not necessarily have a similar relationship with the transparent conductive film 127 and has a smaller pattern than the transparent conductive film 127. Therefore, in order to form the transparent conductive film 127 and the metal film 128, using a resist pattern exposed and developed with an exposure mask having a semi-transmissive part and a light-shielding part like the resist pattern 15a shown in FIG. Etch.

    After forming the metal films 122, 124, 126, and 128, the surface of the portion of the transparent conductive film 127 exposed from the metal film 128 is polished to remove the metal film residue on the transparent conductive film. good. Polishing can be performed by a CMP (Chemical-Mechanical Polishing) method or the like. In this polishing, since the electroluminescent layer subsequently formed on the transparent conductive film 127 is a very thin film, the electroluminescent layer is not uniformly formed by the residue of the metal film. There is an effect of preventing the conductive layer 131 on the layer from being short-circuited.

After that, an insulating film 129 (also referred to as a partition wall) is formed over the TFT. The insulating film 129 is formed so as to expose a portion of the transparent conductive film 127 that functions as a pixel electrode. The insulating film 129 is formed so as to cover the metal film 128. This is because if the metal film 128 is exposed from the insulating film 129, it causes a short circuit failure of the EL element. On the other hand, the insulating film 129 is formed to have a curved surface with the film thickness continuously decreasing near the transparent conductive film 127 exposed. This is to prevent the electroluminescent layer formed on the upper portion from being cut off by the step of the insulating film 129. There is a concern that the end portion of the metal film 128 is likely to be exposed from the insulating film 129 due to the shape of the insulating film 129 having a curved surface. However, as described in Embodiments 1 and 2, the metal film 128 formed in the present invention has a configuration in which the end portion is inclined or has an angle θ ₂ , so that it is difficult to be exposed from the insulating film 129. It is very suitable for an EL display device.

When the metal film 128 is formed by dry etching, the shape of the resist pattern formed on the upper surface is reflected, and the metal film 128 closer to the curved surface of the insulating film 129 is seen in the cross-sectional view of FIG. The end of this is inclined more than the other end. As seen from the top view of FIG. 12A, of the four sides of the metal film 128, two sides that are further away from the end of the transparent conductive film 127 have a larger slope than the remaining two sides. On the other hand, when the metal film 128 is formed by wet etching, the end portion of the metal film 128 has an angle θ ₂ that is sharper than the angle θ ₁ at the end portion of the transparent conductive film 127. Therefore, in any of the formation methods, the end portion of the metal film 128 close to the curved surface of the insulating film 129 is formed with an inclination or an angle θ ₂ , so that it is difficult to be exposed from the insulating film 129.

    Subsequently, the electroluminescent layer 130 is formed so as to be in contact with the transparent conductive film 127 exposed from the insulating film 129, and then the conductive layer 131 is formed. In the above structure, if the TFT for driving the light emitting element is an N-channel TFT, the transparent conductive film 127 corresponds to the cathode and the conductive layer 131 corresponds to the anode. When a transparent conductive film is used for the conductive layer 131, a display device that emits light upward and downward is obtained.

    FIG. 13 shows an EL display device having a structure different from that of FIG. FIG. 13A is a top view of a pixel portion of an EL display device, and FIG. 13B is a cross-sectional view taken along lines A-A ′ and B-B ′ in FIG.

    FIG. 13B is similar to FIG. 12B until the contact holes reaching the pair of impurity regions of the island-like semiconductor film are formed after the second interlayer insulating film 7 is formed and etched. . A switching TFT 1101 and a driving TFT 1102 are formed. After that, a conductive layer is formed and etched to form wirings or electrodes 1103a to 1103d.

    A third interlayer insulating film 1104 is formed over the wirings or electrodes 1103a to 1103d. The third interlayer insulating film 1104 is preferably formed of an organic resin film. This is because a transparent conductive film which is formed on the third interlayer insulating film 1104 and functions as a pixel electrode can be formed on a flat surface.

    The third interlayer insulating film 1104 is etched to form a contact hole reaching the wiring or electrode 1103d. A transparent conductive film and a metal film are stacked over the third interlayer insulating film 1104 and etched to form a transparent conductive film 1105 and a metal film 1106. The transparent conductive film 1105 and the metal film 1106 are etched using a resist pattern exposed and developed with an exposure mask having a semi-transmissive portion, like the resist pattern 15a shown in FIG. The transparent conductive film 1105 functions as a pixel electrode.

    The contact hole formed in the second interlayer insulating film 7 and the contact hole formed in the third interlayer insulating film 1104 are preferably formed to overlap each other. By overlapping the contact holes, the aperture ratio can be increased. On the other hand, the level difference in the contact hole becomes large and the problem of disconnection of the transparent conductive film 1105 also appears. However, the problem of disconnection is compensated by leaving the metal film 1106 on the transparent conductive film 1105 in the contact hole portion. be able to.

    After the metal film 1106 is formed, the insulating film 129, the electroluminescent layer 130, and the conductive layer 131 are formed as in FIG.

    In the present embodiment, the conductive film used as the pixel electrode has been described as the transparent conductive film, but a reflective conductive film may be used. As the material of the transparent conductive film, the material shown in Embodiment Mode 1 can be used. In addition, this embodiment can be freely combined with Embodiments 1 to 3 within a feasible range.

(Embodiment 5)
In this embodiment, an example in which the present invention is applied to a liquid crystal display device will be described.

    First, a method for manufacturing a liquid crystal display panel is described with reference to FIG. First, a bottom-gate TFT is formed over a substrate 401 as in FIG. 6C of Embodiment 2. The structure of the TFT is not limited to the TFT in FIG. 6C of Embodiment 2, and TFTs having various structures can be used.

    After forming the TFT by the method of Embodiment 3, an alignment film 801 is formed so as to cover the metal films 424 and 421 and the transparent conductive films 419 and 415. Then, a substrate 805 provided with a color filter 802, a light-shielding film 807, a counter electrode 803, and an alignment film 804 is prepared, and the substrate 401 and the substrate 805 are bonded to each other with a sealant (not shown). The light shielding film 807 is disposed so as to overlap with the TFT, and the color filter 802 is disposed so as to overlap with the transparent conductive film 415 functioning as a pixel electrode. After that, when the liquid crystal 806 is injected, a display device having a display function is completed. Although not shown, a polarizing plate is attached to the substrates 401 and 805 on the side opposite to the liquid crystal 806. The liquid crystal display panel is completed through the above steps. Note that a reflective conductive film can be used instead of the transparent conductive film.

    Next, in the present embodiment, the arrangement of the metal film formed on the transparent conductive film in the liquid crystal display device will be described. FIG. 14B is an example of a top view of the liquid crystal display device, and FIG. 14A is a cross-sectional view taken along line AA ′ of FIG. An island-shaped semiconductor film 405 overlaps with the gate wiring 403, and a gate wiring portion overlapping with the island-shaped semiconductor film 405 becomes a gate electrode. That is, 403 is a gate wiring and a gate electrode. In addition, a stacked film of a metal film 424 serving as a source wiring and a transparent conductive film 419 is electrically connected to the island-shaped semiconductor film 405 through a conductive layer 417, and a metal film serving as a drain wiring through the conductive layer 418. A stacked film of 421 and the transparent conductive film 415 is electrically connected. The capacitor wiring 808 forms a capacitor in a portion overlapping with the transparent conductive film 415. The capacitor wiring 808 may be formed in the same layer as the gate wiring 403 or may be formed in a different layer. The light shielding film 807 is indicated by a broken line. The light-shielding film 807 overlaps with the source wiring, the drain wiring, and the TFT, but does not overlap with a portion that functions as a pixel electrode of the transparent conductive film 415.

    A metal film 421 on the transparent conductive film 415 is formed along the edge of the transparent conductive film 415. Specifically, the side surface of the metal film 421 is formed along the side surface of the transparent conductive film 415. However, the side surface of the metal film 421 does not coincide with the side surface of the transparent conductive film 415 and is located inside the side surface of the transparent conductive film 415. By forming the metal film 421 along the edge of the transparent conductive film 415 in this manner, the placement accuracy of the light shielding film 807 that shields light between the pixel electrodes can be reduced. This is because even if the position of the light shielding film 807 is slightly shifted, the metal film 421 functions as a light shielding film, so that the position shift of the light shielding film 807 is allowed within the range where the metal film 421 exists. In particular, as shown in FIG. 14, when the light shielding film is provided on the counter substrate, high alignment accuracy is required. Therefore, it is effective to form the metal film 421 on the transparent conductive film along the edge of the pixel electrode in order to ensure light shielding between the pixels.

    FIG. 15 is described as a configuration of another liquid crystal display device. FIG. 15 shows an example in which an interlayer insulating film is provided in the configuration of FIG. FIG. 15A is a cross-sectional view taken along line A-A ′ of the top view of the liquid crystal display device illustrated in FIG. An island-shaped semiconductor film 405 overlaps with the gate wiring 403, and a gate wiring portion overlapping with the island-shaped semiconductor film 405 becomes a gate electrode. Further, the source wiring 501 is electrically connected to the island-shaped semiconductor film 405 through the conductive layer 417, and the drain wiring 502 is electrically connected through the conductive layer 418. The capacitor wiring 808 forms a capacitor in a portion overlapping with the transparent conductive film 504. The capacitor wiring 808 may be formed from the same layer as the gate wiring 403 or may be formed from another layer.

    An interlayer insulating film 503 is formed over the source wiring 501 and the drain wiring 502, and a contact hole reaching the drain wiring 502 is formed in the interlayer insulating film 503. The interlayer insulating film 503 is an organic resin film or an inorganic insulating film. A transparent conductive film 504 and a metal film 505 are formed on the interlayer insulating film 503. When the interlayer insulating film 503 is an organic resin film, a step due to the gate electrode 403 and the island-shaped semiconductor film 405 is relieved, so that the transparent conductive film 504 functioning as a pixel electrode can be formed over a flat surface. Therefore, the pixel electrode can be taken wider than the configuration of FIG. 14, and the aperture ratio can be improved.

    The transparent conductive film 504 and the metal film 505 are formed by etching using a resist pattern exposed and developed with an exposure mask having a light-shielding portion, like the resist pattern 16a shown in FIG. A connection portion between the transparent conductive film 504 and the drain wiring 502 has a large step, and the transparent conductive film 504 may be disconnected. Therefore, the metal film 505 is preferably left on the transparent conductive film 504.

    Similarly to FIG. 14B, the top view of FIG. 15B is formed so that the metal film 505 extends along the edge of the transparent conductive film 504, and can function as a part of the light shielding film. ing.

    As the transparent conductive film 504, the transparent conductive film material described in Embodiment 1 can be used.

    FIG. 16 shows an example in which a metal film on a transparent conductive film is used to align liquid crystal in a plurality of directions. FIG. 16A is a top view of the pixel portion, and FIG. 16B is a cross-sectional view of the vicinity of the liquid crystal layer along AA ′ in FIG. One pixel is formed of a TFT 1001, a transparent conductive film 1002 functioning as a pixel electrode, and a metal film 1003 formed thereon. Reference numeral 1004 denotes a counter substrate, 1005 denotes a counter electrode, 1006 denotes a liquid crystal, and 1007 denotes an alignment film. A plurality of metal films 1003 are arranged on one transparent conductive film 1002. The cross-sectional shape of each metal film 1003 is triangular, and the liquid crystal in one pixel is aligned in two directions by the inclined surface. Each metal film is formed on the transparent conductive film 1002 in a ridge shape. Such a configuration is called a so-called MVA (Multi-domain Vertical Alignment) system, and can provide a large viewing angle characteristic. In the cross-sectional view of FIG. 16B, the cross section of the metal film 1003 is triangular, but may be trapezoidal. Also in that case, the liquid crystal in one pixel can be aligned in two directions by the slope.

    FIG. 17 shows another arrangement example of the metal film in the MVA method. FIG. 17A is a top view of the pixel portion, and FIG. 17B is a cross-sectional view of the vicinity of the liquid crystal layer along AA ′ in FIG. One pixel is formed of a TFT 1201, a transparent conductive film 1202 functioning as a pixel electrode, and a metal film 1203 formed thereon. Reference numeral 1204 denotes a counter substrate, 1205 denotes a counter electrode, 1206 denotes a liquid crystal, and 1207 denotes an alignment film. In FIG. 17, the metal film 1203 forms a plurality of protrusions, and each protrusion has a vertex and is shaped like a quadrangular pyramid. Therefore, the number of the slopes of the protrusions, that is, the liquid crystal in one pixel is aligned in four directions. In addition to the quadrangular pyramid, the shape of the projection may be a triangular pyramid or the like. Therefore, the configuration of FIG. 17 can obtain a larger viewing angle characteristic than that of FIG.

    The example described in this embodiment can also be used as a substitute for a slit that gives a specific orientation to liquid crystal such as a PVA (Patterned Vertical Alignment) method. By substituting for the PVA type slit, the process of forming the slit in the transparent conductive film to be the pixel electrode can be reduced.

    FIG. 18 shows another arrangement example of the metal film. A transparent conductive film 1502 functioning as a pixel electrode is electrically connected to the TFT 1503, and a metal film 1501 is stacked on the transparent conductive film 1502. The metal film 1501 has a comb-teeth shape.

    As described above, by devising the arrangement of the metal film on the transparent conductive film, light shielding can be ensured and the viewing angle characteristics can be improved. In addition, since it is not necessary to form a special mask for forming the metal film, the number of manufacturing steps can be reduced.

    Note that the TFT illustrated in FIGS. 13 to 18 has a bottom-gate structure, but is merely an example, and other TFT configurations can be used. Moreover, this embodiment can be freely combined with Embodiments 1 to 4 as long as practicable.

(Embodiment 6)
As a semiconductor device of the present invention, a video camera, a digital camera, a goggle type display (head mounted display), a navigation system, a sound reproduction device (car audio, audio component, etc.), a notebook personal computer, a game machine, a portable information terminal (mobile) A display capable of playing back a recording medium such as a computer, a mobile phone, a portable game machine, or an electronic book), and an image playback apparatus (specifically, Digital Versatile Disc (DVD)) provided with a recording medium, and displaying the image. And the like). Specific examples of these semiconductor devices are shown in FIGS.

    FIG. 20A illustrates a digital camera, which includes a main body 2101, a display portion 2102, an imaging portion, operation keys 2104, a shutter 2106, and the like. Note that FIG. 20A is a view from the display portion 2102 side, and the imaging portion is not shown. According to the present invention, a digital camera that is inexpensive, has few display defects, and is highly reliable can be realized.

    FIG. 20B shows a laptop personal computer, which includes a main body 2201, a housing 2202, a display portion 2203, a keyboard 2204, an external connection port 2205, a pointing mouse 2206, and the like. According to the present invention, a notebook personal computer that is inexpensive, has few display defects, and has high reliability can be realized.

    FIG. 20C illustrates a portable image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 2401, a housing 2402, a display portion A2403, a display portion B2404, and a recording medium (DVD or the like). A reading unit 2405, operation keys 2406, a speaker unit 2407, and the like are included. A display portion A2403 mainly displays image information, and a display portion B2404 mainly displays character information. Note that an image reproducing device provided with a recording medium includes a home game machine and the like. According to the present invention, it is possible to realize an inexpensive image reproduction apparatus with few display defects and high reliability.

    FIG. 20D illustrates a display device, which includes a housing 1901, a support base 1902, a display portion 1903, speakers 1904, a video input terminal 1905, and the like. This display device is manufactured by using a thin film transistor formed by the manufacturing method described in the above embodiment for the display portion 1903 and a driver circuit. The display device includes a liquid crystal display device, a light emitting device, and the like, and specifically includes all information display devices such as a computer, a television receiver, and an advertisement display. According to the present invention, a display device that is inexpensive, has few display defects, and has high reliability, in particular, a large display device having a large screen of 22 inches to 50 inches can be realized.

    21 includes a main body (A) 901 including operation switches 904, a microphone 905, and the like, a display panel (A) 908, a display panel (B) 909, a speaker 906, and the like. The main body (B) 902 is connected by a hinge 910 so as to be opened and closed. The display panel (A) 908 and the display panel (B) 909 are housed in the housing 903 of the main body (B) 902 together with the circuit board 907. The pixel portions of the display panel (A) 908 and the display panel (B) 909 are arranged so as to be visible from an opening window formed in the housing 903.

    In the display panel (A) 908 and the display panel (B) 909, specifications such as the number of pixels can be set as appropriate in accordance with the function of the mobile phone 900. For example, the display panel (A) 908 can be combined as a main screen and the display panel (B) 909 can be combined as a sub-screen.

    According to the present invention, a portable information terminal that is inexpensive, has few display defects, and has high reliability can be realized.

    The mobile phone according to the present embodiment can be transformed into various modes depending on the function and application. For example, a mobile phone with a camera may be obtained by incorporating an image sensor at the hinge 910. In addition, the above-described effects can be obtained even when the operation switches 904, the display panel (A) 908, and the display panel (B) 909 are housed in one housing. Further, even when the configuration of the present embodiment is applied to an information display terminal having a plurality of display units, the same effect can be obtained.

    As described above, various electronic devices can be completed by using any one of the structures or manufacturing methods of Embodiments 1 to 8 as the display portion in FIG. 20 or the display panel in FIG.

    In the present invention, a conductive film functioning as a pixel electrode and a metal film stacked thereover can be formed using one mask. Further, when the conductive film is cut off by a step, the cut conductive films can be connected to each other by the metal film. Through the above steps, an inexpensive semiconductor device with few manufacturing steps can be manufactured, and a highly reliable semiconductor device can be realized.

10 is a cross-sectional view illustrating a manufacturing process of a semiconductor device. (Embodiment 1) 10 is a cross-sectional view illustrating a manufacturing process of a semiconductor device. (Embodiment 1) FIG. 6 is a top view of a semiconductor device. (Embodiment 1) 10 is a cross-sectional view illustrating a manufacturing process of a semiconductor device. (Embodiment 1) 10 is a cross-sectional view illustrating a manufacturing process of a semiconductor device. (Embodiment 2) 10 is a cross-sectional view illustrating a manufacturing process of a semiconductor device. (Embodiment 2) FIG. 6 is a top view of a semiconductor device. (Embodiment 2) 10 is a cross-sectional view illustrating a manufacturing process of a semiconductor device. (Embodiment 2) 10 is a cross-sectional view illustrating a manufacturing process of a semiconductor device. (Embodiment 2) FIG. 14 is a cross-sectional view of a semiconductor device. (Embodiment 2) The top view of an exposure mask and the figure which shows light intensity distribution. (Embodiment 3) 2A and 2B are a top view and a cross-sectional view of an EL display device. (Embodiment 4) 2A and 2B are a top view and a cross-sectional view of an EL display device. (Embodiment 4) The top view and sectional drawing of a liquid crystal display device. (Embodiment 5) The top view and sectional drawing of a liquid crystal display device. (Embodiment 5) The top view and sectional drawing of a liquid crystal display device. (Embodiment 5) The top view and sectional drawing of a liquid crystal display device. (Embodiment 5) The top view of a liquid crystal display device. (Embodiment 5) FIG. 14 is a cross-sectional view of a semiconductor device. (Embodiment 1) Illustration of electronic equipment. (Embodiment 6) Mobile phone illustration. (Embodiment 6)

Explanation of symbols

1 substrate 2 insulating film 3 island-like semiconductor film 4 gate insulating film 5 gate electrode 6 first interlayer insulating film 7 second interlayer insulating film 8 channel forming region 9 impurity region 10 transparent conductive film 11 metal film 12a light shielding portion 12b light shielding portion 13 Semi-transmissive portion 14a Non-exposed region 14b Exposed region 19 Semi-transmissive film 20 Metal film 15a Resist pattern 16a Resist pattern 17a Transparent conductive film 17b Metal film 18a Transparent conductive film 18b Metal film 16b Resist pattern 15b Resist pattern 17c Metal film 18c Metal film 21 Capacitive wiring

Claims (9)

A thin film transistor on a substrate;
A pixel electrode electrically connected to the thin film transistor;
A metal film in contact with the pixel electrode,
The pixel electrode has a stepped portion, and the metal film is in contact with the pixel electrode so as to cover the stepped portion of the pixel electrode,
The display device, wherein the pixel electrode exposed from the metal film is formed on a flat surface. A thin film transistor on a substrate;
A pixel electrode electrically connected to the thin film transistor;
A metal film in contact with the pixel electrode,
The thin film transistor has an island-shaped semiconductor film on a gate electrode through a gate insulating film,
The pixel electrode is electrically connected to the island-shaped semiconductor film through a conductive layer,
The pixel electrode has a stepped portion, and the metal film is in contact with the pixel electrode so as to cover the stepped portion of the pixel electrode,
The pixel electrode exposed from the metal film is formed on a flat surface,
The display device, wherein the step portion of the pixel electrode is in the pixel electrode portion overlapping the island-shaped semiconductor film. A thin film transistor on a substrate;
An interlayer insulating film formed on the thin film transistor and having a contact hole;
A pixel electrode electrically connected to the thin film transistor through the contact hole;
A metal film in contact with the pixel electrode,
The pixel electrode has a stepped portion, and the metal film is in contact with the pixel electrode so as to cover the stepped portion of the pixel electrode,
The pixel electrode exposed from the metal film is formed on a flat surface,
The display device, wherein the step portion of the pixel electrode is in the pixel electrode portion located in the contact hole. A thin film transistor on a substrate;
A pixel electrode electrically connected to the thin film transistor;
A metal film in contact with the pixel electrode,
The metal film has a smaller planar area than the pixel electrode,
The side surface of the metal film is along the side surface of the pixel electrode,
The display device according to claim 1, wherein a side surface of the metal film is positioned inside a side surface of the pixel electrode. In claim 4,
The display device, wherein the metal film is a light shielding film. A thin film transistor on a substrate;
A pixel electrode electrically connected to the thin film transistor;
A metal film in contact with the pixel electrode;
A partition wall formed on the pixel electrode and the metal film and exposing a part of the pixel electrode;
An electroluminescent layer formed in contact with the partition and the pixel electrode;
An electrode on the electroluminescent layer,
At least one side surface of the metal film is inclined and is covered with the partition wall. In any one of Claims 1 thru | or 6,
Of the pixel electrodes, when comparing the first film thickness of the portion in contact with the metal film and the second film thickness of the portion not in contact with the metal film, the first film thickness is the second film. A display device characterized by being thicker than the thickness. An island-shaped semiconductor film is formed on the substrate,
Forming a gate electrode on the island-shaped semiconductor film via a gate insulating film;
Forming an interlayer insulating film having a flat surface on the gate electrode;
Forming a contact hole reaching the island-shaped semiconductor film in the interlayer insulating film;
A laminate of a conductive film and a metal film is formed on the interlayer insulating film,
On the metal film, using an exposure mask having a semi-transmissive portion, a resist pattern having a thick region and a thin region is formed.
A manufacturing method of a display device, wherein a pixel electrode formed of the conductive film and a metal film in contact with the pixel electrode are formed using the resist pattern. Forming a gate electrode on the substrate;
Forming an island-shaped semiconductor film on the gate electrode through a gate insulating film;
Forming a source electrode and a drain electrode on the island-shaped semiconductor film via a conductive layer;
Forming an interlayer insulating film having a flat surface on the source electrode and the drain electrode;
Forming a contact hole reaching the source electrode or the drain electrode in the interlayer insulating film;
A laminate of a conductive film and a metal film is formed on the interlayer insulating film,
On the metal film, using an exposure mask having a semi-transmissive portion, a resist pattern having a thick region and a thin region is formed.
A manufacturing method of a display device, wherein a pixel electrode formed of the conductive film and a metal film in contact with the pixel electrode are formed using the resist pattern.

Images