JP2007127701A - Display driver - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display driver which extends an operating time of electronic equipment by reducing power consumption in a reference voltage generating circuit for generating a gradation reference voltage to be supplied to a signal driver. <P>SOLUTION: A liquid crystal display device 100 comprises: the signal driver 130 which generates gradation signal voltages Vpix according to display data (gradation data) and supplies them to display pixels Px arranged on a display panel 110; a reference voltage generating circuit 150 which generates gradation reference voltages Vo through Vn for generating the gradation signal voltages Vpix in the signal driver 130; a gradation voltage generation control circuit 160 which controls each generating operation of the gradation reference voltages Vo through Vn in the reference voltage generating circuit 150; and a timing control circuit 140 which supplies a voltage generation control signal at least to the gradation voltage generation control circuit 160. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a display driving device, and more particularly to a display driving device applicable as a signal driver of a display device such as a liquid crystal display device.

  In recent years, as a display device (display) for displaying images, character information, and the like in imaging devices such as digital video cameras and digital still cameras, which are remarkably popular, and portable devices such as mobile phones, portable audio devices, and electronic dictionaries, In addition, as a monitor and display for information equipment such as computers and video equipment such as television receivers, liquid crystal display devices (Liquid Crystal Display; LCD) and other devices are thin and lightweight and can be used for low power consumption. Display devices with excellent image quality are often used.

Hereinafter, a schematic configuration of a main part of a liquid crystal display device will be briefly described as an example of a display device in the prior art.
FIG. 4 is a schematic diagram showing a main part configuration of a liquid crystal display device adopting an active matrix driving method, and FIG. 5 is a block diagram showing a schematic configuration of a signal driver applied to the liquid crystal display device in the prior art. It is.

  As shown in FIG. 4, the liquid crystal display device according to the prior art is provided with a plurality of scanning lines SLp and a plurality of signal lines DLp so as to be orthogonal to the row direction and the column direction, and the scanning lines SLp and signal lines. A display panel 110P in which display pixels (liquid crystal display pixels) Px are arranged in the vicinity of each intersection of DLp, a scan driver (gate driver) 120P connected to the scan line SLp, and a signal driver connected to the signal line DLp (Data driver) 130P, and a known configuration including a timing control circuit (LCD controller) 140P that generates and outputs a vertical control signal and a horizontal control signal for controlling operation timing in the scanning driver 120P and the signal driver 130P. Have.

  Here, for example, as shown in FIG. 5, the signal driver 130 </ b> P includes a latch circuit 131 </ b> P that is composed of digital signals, sequentially captures and holds display data for one row supplied as serial data, and outputs the display data as parallel data. The decoder circuit 132P that takes in the display data for one row output from the latch circuit 131P, converts it into gradation data and outputs it, and the gradation reference voltages V0 to Vn supplied from outside the signal driver 130P. A digital signal that is converted to a grayscale signal voltage Vpix composed of an analog signal having a voltage value corresponding to the grayscale data output from the decoder circuit 132P, and is output to the signal line DLp disposed in each column of the display panel 110P. An analog conversion circuit (D / A converter; DAC) 133P.

  The gradation reference voltages V0 to Vn for generating the gradation signal voltage Vpix corresponding to the gradation data are, for example, as shown in FIG. A gradation amplifier having a resistance divider circuit 151P having a ladder resistor to which VDD and VSS are applied at both ends, and an individual amplifier AMP corresponding to each of a plurality of stages of voltage components (reference voltages) generated by the resistor divider circuit 151P And a reference voltage generation circuit 150P including the circuit 152P.

In such a reference voltage generation circuit 150P, a plurality of stages (for example, n gradations; n is a positive integer) from each connection contact of the plurality of stages of resistive elements RS (ladder resistance) constituting the resistance dividing circuit 151P. A voltage component is generated, and the amplifier AMP provided in the gradation amplifier circuit 152P individually amplifies the voltage component of each stage to a predetermined voltage level, and the digital-analog conversion circuit 133P as the gradation reference voltages V0 to Vn. To be supplied.
Such a reference voltage generation circuit of the display device is described in detail, for example, in Patent Document 1 and the like.

In the display device (liquid crystal display device) shown in FIG. 4, for example, display data corresponding to image information for one screen of the display panel 110P is temporarily stored in a display memory (RAM) (not shown). Hold) and sequentially read out each row of the display panel and supply it to the signal driver 130P (latch circuit 131P). The resistance dividing circuit 151P constituting the reference voltage generation circuit 150P includes a ladder resistor including a resistance element RS having a resistance value corresponding to gamma correction processing according to the characteristics of the display panel 110P (display pixel Px). It may be.
Such a signal driver and a reference voltage generation circuit are described in detail, for example, in Patent Document 2.

JP 2003-122325 A (pages 4 to 6, FIGS. 1 and 2) JP 2004-21163 A (pages 8 to 9, page 12, FIG. 3, FIG. 9)

  As described above, in the digital drive type display device (liquid crystal display device), the gradation reference voltage V0 for n gradations generated by the reference voltage generation circuit 150P including the resistance dividing circuit 151P and the gradation amplifier circuit 152P. ˜Vn are supplied to a digital-analog converter (DAC), and gradation data (display data) composed of a digital signal is converted into a gradation signal voltage Vpix composed of an analog signal to display each display arranged on the display panel 110P. It was configured to display desired image information by supplying the pixel Px.

  Here, the reference voltage generation circuit 150P generates a plurality of gradation reference voltages V0 to Vn having individual voltage values corresponding to the number of all gradation levels that can be taken by the gradation data (for n gradations). Therefore, as shown in FIG. 5, the gradation amplifier circuit 152P has a configuration in which a plurality of voltage components generated by the resistance divider circuit 151P are individually amplified by the amplifier AMP. It is necessary to provide a number (n) of amplifiers AMP corresponding to the number of bits (the number of gradation levels; n gradations). Conventionally, the plurality of amplifiers AMP constituting the gradation amplifier circuit 152P are collectively controlled to be turned on and off, and further, during the display period of the image information on the display panel 110P (supply of the gradation signal voltage Vpix). During the operation period), it was always set to the on state.

  Therefore, depending on the image information to be displayed, of the gradation reference voltages V0 to Vn for n gradations, the level not used in the generation process of the gradation signal voltage Vpix in the digital-analog converter (DAC) 133P. Even when there is a gray level reference voltage, since drive power is always supplied to all the amplifiers AMP, the amplifier AMP that generates a gray level reference voltage that is not used is useless. It had the problem of consuming electric power.

  Such a problem is caused by, for example, a display driving method in which image information that is driven by a battery and does not use too many gradations is displayed for a certain period or for a long time, such as a mobile phone. When this is adopted, the usage time (battery driving time) of the electronic device is shortened, and there is a problem that usability and convenience are inferior.

  Accordingly, in view of the above problems, the present invention reduces display power consumption in a reference voltage generation circuit that generates a gradation reference voltage supplied to a signal driver, and can improve the usage time of an electronic device. An object is to provide an apparatus.

  According to a first aspect of the present invention, in the display driving device for supplying gradation signal voltages corresponding to display data to a plurality of display pixels arranged two-dimensionally on a display panel, the display driving device includes at least the display Reference voltage generating means for generating a plurality of gradation reference voltages corresponding to all gradation levels that can be taken by gradation data corresponding to the data, and the gradation data is converted to each level based on the plurality of gradation reference voltages. A gradation signal voltage generation unit that converts the gradation signal voltage having a predetermined voltage value for each tone and supplies the gradation signal voltage to each display pixel via a signal line disposed in the display panel; and the gradation data A gradation voltage generation control means for individually controlling the generation operation of each of the plurality of gradation reference voltages in the reference voltage generation means, and at least the gradation signal voltage generation section and the voltage generation control means Characterized in that it comprises a timing control means for controlling the operation timing definitive.

According to a second aspect of the present invention, in the display driving device according to the first aspect, the reference voltage generating unit amplifies each of the plurality of voltage components by a voltage generation unit that generates a plurality of voltage components and each of the plurality of voltage components. And a voltage amplifying unit for generating the plurality of gradation reference voltages, wherein the voltage generation control means corresponds to the gradation data corresponding to the gradation data based on all the gradation levels and the display data. Means for comparing the tone level, and the operation of the amplifier for generating the tone reference voltage of the tone level not corresponding to the tone data based on the display data among all the tone levels. And means for stopping.
According to a third aspect of the present invention, in the display driving device according to the second aspect, the means for stopping the operation of the amplifier includes means for cutting off the supply of driving power.

  The display driving device according to the present invention includes a gradation voltage generation control unit that individually controls the generation operation of each of the plurality of gradation reference voltages in the reference voltage generation unit based on the gradation data. It is possible to reduce power consumption by eliminating waste of power consumption related to the voltage generation operation. That is, the gradation data generated based on the display data in the decoder circuit of the signal driver is compared with all the gradation levels in the gradation reference voltage generated by the reference voltage generation means (reference voltage generation circuit). Then, it is determined (detected) whether or not there is an unused gradation level in the gradation data, and if there is an unused gradation level, the gradation reference voltage of the gradation level is set. Since the amplifier (amplifier) for generation is controlled to be turned off, it is possible to cut power supply to the amplifier and reduce power consumption.

Hereinafter, a display driving device according to the present invention will be described in detail with reference to embodiments.
First, a display device to which the display driving device according to the present invention can be applied will be described. Here, as an example of the display device, a liquid crystal display device employing an active matrix driving method will be described and described.

  FIG. 1 is a schematic view showing an embodiment of a display device to which the display driving device according to the present invention can be applied. Here, about the structure equivalent to the prior art mentioned above, the same or same code | symbol is attached | subjected and demonstrated. FIG. 2 is a schematic configuration diagram illustrating an example of a signal driver and a reference voltage generation circuit applied to the display device according to the present embodiment.

  As shown in FIG. 1, a liquid crystal display device (display device) 100 to which a display driving device according to the present invention is applied includes a plurality of scanning lines SL and a plurality of scanning lines SL arranged so as to be orthogonal to the row direction and the column direction. A display panel 110 in which display pixels Px are arranged in the vicinity of each intersection of the signal lines DL, a scanning driver (gate driver) 120 connected to the plurality of scanning lines SL, and a signal driver connected to the plurality of signal lines DL ( Data driver) 130, a timing control circuit (timing control means) 140 for supplying vertical control signals and horizontal control signals to at least the scanning driver 120 and the signal driver 130, and the signal driver 130 according to display data (gradation data). A reference voltage generation circuit (reference voltage generator) that generates gradation reference voltages V0 to Vn for generating the gradation signal voltage Vpix. In addition to the well-known configuration (that is, a configuration equivalent to the above-described prior art (FIG. 4)), each generation operation of the gradation reference voltages V0 to Vn in the reference voltage generation circuit 150 is individually performed. A gradation voltage generation control circuit (gradation voltage generation control means) 160 is controlled. Here, the gradation voltage generation control circuit 160 corresponds to the gradation amplifier control circuit 160A in FIG.

  As shown in FIG. 2, the signal driver 130 applied to the present embodiment is sequentially supplied as serial data, for example, from a display memory (RAM) 200 in which display data for one screen of the display panel 110 is held. A latch circuit 131 that captures and holds display data (digital signal) for a row, and the display data for one row output as parallel data from the latch circuit 131 is decoded and converted into gradation data indicating display gradation ( A voltage value corresponding to each grayscale data for one row output from the decoder circuit 132 based on the grayscale reference voltages V0 to Vn supplied from the decoder circuit 132 to be generated and a reference voltage generation circuit 150 to be described later. A digital signal that is converted to a gradation signal voltage Vpix (analog signal) having the same and output to a signal line DL arranged in each column of the display panel 110 A decoder having a well-known configuration (that is, a configuration equivalent to the above-described conventional technology (FIG. 5)), which is provided with an analog conversion circuit (grayscale signal voltage generation unit) 133, in particular. In the circuit 132, the display data is decoded and converted into gradation data, which is supplied to the digital-analog converter 133 in the subsequent stage, and the gradation data for the one row is supplied to a gradation amplifier control circuit 160A (described later). The gradation voltage generation control circuit 160) is also configured to output.

  In addition, as illustrated in FIG. 2, the reference voltage generation circuit 150 includes, for example, a resistor divider circuit (voltage generator) 151 in which a plurality of resistor elements RS are connected in series, and each resistor element RS of the resistor divider circuit 151. A gradation amplifier circuit (voltage amplifying unit) 152 that amplifies each of the voltage components taken out from the connection contacts by an individual amplifier (amplifier) AMP (that is, the above-described conventional technology (FIG. In particular, in the gradation amplifier circuit 152 applied to this embodiment, each amplifier AMP is based on an amplifier control signal supplied from a gradation amplifier control circuit 160A described later. The on / off operation is controlled individually.

  Here, the on / off operation of each amplifier AMP is controlled, for example, by individually supplying and blocking the driving power to each amplifier AMP based on the amplifier control signal. For example, the amplification operation of each amplifier AMP may be stopped based on an amplifier control signal so that no current flows through each amplifier AMP. The resistance dividing circuit 151 has a ladder resistor composed of a resistance element RS having a resistance value corresponding to the gamma correction processing according to the characteristics of the display panel 110 (display pixel Px), similarly to the configuration shown in the related art. It may be provided.

  The grayscale amplifier control circuit 160A, which is an example of the configuration of the grayscale voltage generation control circuit 160 shown in FIG. 1, will be described in detail later, but generally, each of the one row supplied from the decoder circuit 132 will be described. The actual gradation data converted from the display data of the display pixel Px and all the gradation levels that can be taken to display arbitrary image information on the display panel 110, that is, all the gradation levels generated by the reference voltage generation circuit 150 Compared with the gradation levels for n gradations composed of the gradation reference voltages V0 to Vn, it is determined (detected) whether or not there is a gradation level that is not used in the actual gradation data. In the case where there is an unfinished gradation level, for example, supply of drive power to the amplifier AMP for generating the gradation reference voltage of the gradation level is cut off to turn off the amplifier AMP. It performs a control that. Here, the on / off operation of each amplifier AMP of the gradation amplifier circuit 152 by the gradation amplifier control circuit 160A is controlled by the timing control circuit 140 based on the vertical synchronization signal, the horizontal synchronization signal, and the system clock. It is executed at a timing based on the generation control signal.

  In the present embodiment, a gradation amplifier control circuit 160A that controls the on / off operation of each amplifier AMP that constitutes the gradation amplifier circuit 152 of the reference voltage generation circuit 150 is provided independently of other configurations. However, the present invention is not limited to this. For example, the timing control circuit (that is, the LCD controller) 140 or the reference voltage generation circuit 150 may be built in or integrally formed. There may be.

Next, a drive control method in the display device (display drive device) having the above-described configuration will be described with reference to the drawings.
FIG. 3 is a timing chart showing a drive control method in the display device (signal driver and reference voltage generation circuit, gradation amplifier control circuit) according to the present embodiment. In FIG. 3, for the sake of convenience, the reference voltage generation circuit 150 generates four gradation voltages from V0 to V3 as gradation reference voltages. However, the present invention is not limited to this, and more gradations can be obtained. Needless to say, it may be included.

  In FIG. 3, GST is a display scan start signal (gate start signal), GRES is a gate reset signal, VSAVE is a gradation amplifier control operation enable signal, and AMP CNT CLK is an amplifier control signal capture clock. DAT CLK is a display data take-in clock, and these signals are supplied from the timing control circuit 140 to the gradation amplifier control circuit 160A as voltage generation control signals. SiVSELj (S0VSEL0 to S0VSEL3, S1VSEL0 to S1VSEL3) are output voltage selection signals, VjCNTS (V0CNTS to V3CNTS) are amplifier usage status signals, and these signals are internal signals of the gradation amplifier control circuit 160A. is there. VCNTEN is a gradation amplifier control enable signal, VjCNT (V0CNT to V3CNT) is an amplifier control signal, and these signals are supplied to the gradation amplifier circuit 152 from the gradation amplifier control circuit 160A. Is supplied as In order to simplify the illustration, only a part of the drive control operation is extracted and shown.

  As shown in FIG. 3, the drive control method of the display device (signal driver and reference voltage generation circuit, gradation amplifier control circuit) according to the present embodiment first scans each row of the display panel 120. In synchronization with the rising timing of the display scan start signal (gate start signal) GST to the high level (H) that defines the output start timing of the scan signal at, is supplied from the timing control circuit 140 to the gradation amplifier control circuit 160A. When the gradation amplifier control operation enable signal VSAVE, which is a voltage generation control signal, rises to a high level (H), the gradation amplifier control circuit 160A shifts to the driving state (the amplifier control function is turned on).

  Next, among the display data for one screen once held in the display memory, the display data corresponding to the display pixel Px in the first row is sequentially read out and taken in via the latch circuit 131 and converted into gradation data in the decoder circuit 132. Convert. Here, the gradation data generated by the decoder circuit 132 is supplied to the digital-analog converter (DAC) at the next stage and also to the gradation amplifier control circuit 160A.

  Then, the gradation amplifier control circuit 160A compares the gradation data supplied from the decoder circuit 132 with all the gradation levels (gradation reference voltages) generated by the reference voltage generation circuit 150, and the gradation data Output voltage selection signal SiVSELj (i is an integer satisfying 0 ≦ i ≦ m, j is an integer satisfying 0 ≦ j ≦ n, and is applied to the display pixel Px in the i-th column. The control signal for selecting whether to generate and output the gradation signal voltage Vpix having the gradation reference voltage Vj of the gradation level j is set to the high level (H).

  Such comparison processing between the gradation data and the gradation level is continuously executed for a period of scanning for two screens from the rising timing of the gradation amplifier control operation enable signal VSAVE. During this period, the output voltage selection signal SiVSELj Is set to the high level, it is determined that the amplifier AMP corresponding to the gradation level is being used, and the amplifier use status signal VjCNTS is latched (set) to the high level (H). Here, the reason why the comparison process is executed during the period of scanning for two screens is that polarity inversion is performed in the display drive control of the display panel.

  Next, the gradation amplifier control enable signal VCNTEN is set to a high level (H) at the start timing of the screen scan after the scanning for two screens is completed (the rising timing of the display scan start signal GST). The operation of individually controlling the operation state of each amplifier AMP 152 is started. Specifically, in the comparison process between the gradation data and the gradation level, the amplifier control signal VjCNT corresponding to the amplifier usage signal VjCNTS (amplifier AMP determined to be used) set to the high level. Is kept at the high level, the supply of the driving power to the amplifier AMP is continued and the on state is maintained, while the amplifier control signal corresponding to the amplifier use state signal VjCNTS held at the low level (L). By setting VjCNT to a low level, control is performed to cut off the supply of drive power to the amplifier AMP and shift to the off state.

Such drive control is repeatedly executed for each image display section (period from the rising timing of the display scan start signal GST to the falling timing of the gate reset signal GRES corresponding to the end of the display scan).
Further, when rewriting of display data held in the display memory (RAM) 200 occurs (in the figure, “RAM rewriting occurs” in the screen display section n + 1), the gradation level used (that is, the amplifier) AMP) also changes, so that the gradation amplifier control operation enable signal VSAVE and the gradation amplifier control enable signal VCNTEN are set to a low level (L) before rewriting display data in the display memory 200 (in advance). As a result, the gradation amplifier control circuit 160A and the gradation amplifier circuit 152 are shifted to a non-driving state (stop state, output stop state) (the amplifier control function is turned off), and the amplifier control signals VjCNT for all the amplifiers AMP. Is set to high level to supply drive power to all amplifiers AMP and turn them on. Performs control to set in.

Here, after the gradation amplifier control circuit 160A and the gradation amplifier circuit 152 are set to the non-driven state (the amplifier control function is in the off state), for example, the time until all the amplifiers AMP shift to the on state (rise time) After the elapse of time, rewriting of display data in the display memory (RAM) 200 is started.
After the rewriting of the display data is completed, the gradation amplifier control circuit 160A and the gradation amplifier circuit 152 are set to the drive state (the amplifier control function is turned on) again, and the above-described series of drive control operations are executed. To do.

  As described above, according to the display device (display driving device) according to the present embodiment, the gradation level used in the display data (gradation data) supplied to the signal driver is detected, and the gradation level that is not used is detected. By controlling so that the amplifier of the corresponding gradation amplifier circuit shifts to the off state (stopped state), it is possible to cut the supply of driving power to the amplifier and reduce power consumption.

  Therefore, an electronic device that employs a display driving method that displays image information that is driven by a battery and that does not use a large number of gradations for a certain period or a long time, such as a cellular phone. By applying the display device (display drive device) according to the present embodiment to the device, the use time (battery drive time) can be extended, and an electronic device excellent in usability and convenience can be provided.

  In the above-described embodiment, the case where the amplifier control function is controlled to be turned off prior to the rewriting of display data in the display memory (RAM) 200 has been described. However, the present invention is not limited to this. Instead, for example, the display data rewriting operation in the display memory (RAM) 200 may be detected and the amplifier control function may be controlled to be set off. Specifically, in the display data writing operation to the display memory (RAM), for example, a display memory having a procedure (specification) for executing writing of display data after specifying an index for writing data, and In the case where the memory control circuit is provided, the data writing index designation operation is detected, and the gradation amplifier control circuit 160A and the gradation amplifier circuit 152 are shifted to the non-driven state (stop state, output stop state). It may be one that controls.

  Further, in the above-described embodiment, the case where the amplifier control function is controlled to shift to the on state after the rewriting of the display data in the display memory (RAM) 200 has been described, but the present invention is not limited thereto. For example, the amplifier control function may be controlled to shift to the on state after an arbitrary fixed period of time has elapsed after rewriting of the display data.

It is the schematic which shows one Embodiment of the display apparatus which can apply the display drive device which concerns on this invention. It is a schematic block diagram which shows an example of the signal driver applied to the display apparatus which concerns on this embodiment, and a reference voltage generation circuit. 6 is a timing chart showing a drive control method in the display device (signal driver and reference voltage generation circuit, gradation amplifier control circuit) according to the present embodiment. It is the schematic which shows the principal part structure of the liquid crystal display device which employ | adopted the active matrix type drive system. It is a block diagram which shows schematic structure of the signal driver applied to the liquid crystal display device in a prior art.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Liquid crystal display device 110 Display panel 120 Scan driver 130 Signal driver 131 Latch circuit 132 Decoder circuit 133 Digital-analog converter 140 Timing control circuit 150 Reference voltage generation circuit 151 Resistance dividing circuit 152 Grayscale amplifier circuit 160 Grayscale voltage generation control circuit 160A gradation amplifier control circuit 200 display memory (RAM)
Px display pixel

Claims (3)

In a display driving device for supplying a gradation signal voltage corresponding to display data to a plurality of display pixels arranged two-dimensionally on a display panel,
The display driving device includes at least
Reference voltage generating means for generating a plurality of gradation reference voltages corresponding to all gradation levels that can be taken by the gradation data corresponding to the display data;
The grayscale data is converted into the grayscale signal voltage having a predetermined voltage value for each grayscale based on the plurality of grayscale reference voltages, and each of the grayscale data is transmitted through a signal line provided on the display panel. A gradation signal voltage generation unit to be supplied to the display pixels;
Gradation voltage generation control means for individually controlling the generation operation of each of the plurality of gradation reference voltages in the reference voltage generation means based on the gradation data;
Timing control means for controlling operation timing in at least the gradation signal voltage generation unit and the voltage generation control means;
A display driving device comprising: The reference voltage generation means includes a voltage generation unit that generates a plurality of voltage components, a voltage amplification unit that amplifies each of the plurality of voltage components by an individual amplifier, and generates the plurality of gradation reference voltages, Comprising
The voltage generation control means compares the gradation levels corresponding to the gradation data based on the display data with all the gradation levels, and the display data among the gradation levels. 2. The display driving device according to claim 1, further comprising means for stopping the operation of the amplifier for generating the gradation reference voltage of the gradation level not corresponding to the gradation data based thereon. 3. The display driving device according to claim 2, wherein the means for stopping the operation of the amplifier comprises means for interrupting supply of driving power.

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