JP2007116052A5

JP2007116052A5 -

Info

Publication number: JP2007116052A5
Application number: JP2005308703A
Authority: JP
Filing date: 2005-10-24
Publication date: 2008-12-04
Anticipated expiration: 2025-10-24

Claims

A high-speed interface circuit block including a physical layer circuit for transferring data via a serial bus, and at least one other circuit block;
The high-speed interface circuit block includes:
The first comprises a second protection circuit block,
Each of the first and second protection circuit blocks includes at least one protection circuit provided between the power supply of the high-speed interface circuit block and the power supply of the other circuit block .
The first protection circuit block is disposed closer to the first side than the second protection circuit block when the short side of the high-speed interface circuit block is the first side .
The second protection circuit block is located closer to the third side than the first protection circuit block when a side opposite to the first side of the high-speed interface circuit block is a third side. An integrated circuit device which is arranged.

In claim 1,
The integrated circuit device, wherein the physical layer circuit is disposed between the first and second protection circuit blocks.

In claim 1 or 2,
The third direction of the physical layer circuit when the direction from the first side to the third side is the first direction and the direction opposite to the first direction is the third direction The integrated circuit device, wherein the first protection circuit block is disposed on a side of the physical layer circuit, and the second protection circuit block is disposed on a side of the physical layer circuit in the first direction.

In any one of Claims 1 thru | or 3 ,
The high-speed interface circuit block includes the physical layer circuit and a logic circuit,
The direction from the first side to the third side of the high-speed interface circuit block is defined as a first direction, and the second side, which is the long side of the high-speed interface circuit block, is directed to the fourth side facing the first side. The logic circuit is arranged on the second direction side of the physical layer circuit when the direction toward the second direction is the second direction.

In claim 4 ,
As the other circuit block, including a driver logic circuit block that generates a display control signal,
The integrated circuit device, wherein the driver logic circuit block is disposed on the second direction side of the logic circuit.

In claim 4 or 5 ,
An integrated circuit, wherein L2> L1, where L1 is a length of the physical layer circuit in the first direction and L2 is a length of the logic circuit in the first direction. apparatus.

In claim 6 ,
When the direction opposite to the first direction is a third direction, the first protection circuit block is disposed in a first region on the third direction side of the physical layer circuit, and the physical layer circuit The integrated circuit device is characterized in that the second protection circuit block is arranged in the second region on the first direction side.

In claim 7 ,
An integrated circuit device, wherein a capacitor region in which a capacitor provided between a high potential side power source and a low potential side power source of the high-speed interface circuit block is formed in the first and second regions.

In any one of Claims 1 thru | or 8 .
The high-speed interface circuit block includes the physical layer circuit, a logic circuit, and a power line of a shared power source,
The first protection circuit block includes:
A first protection circuit provided between a power supply of the physical layer circuit and the shared power supply;
A second protection circuit provided between the power supply of the logic circuit and the shared power supply;
A third protection circuit provided between the power supply of the other circuit block and the shared power supply;
The second protection circuit block includes:
A fourth protection circuit provided between the power supply of the physical layer circuit and the shared power supply;
A fifth protection circuit provided between the power supply of the logic circuit and the shared power supply;
An integrated circuit device comprising a sixth protection circuit provided between a power supply of the other circuit block and the shared power supply.

In any one of Claims 1 thru | or 8 .
The high-speed interface circuit block includes the physical layer circuit and a logic circuit,
The first protection circuit block includes:
A first protection circuit provided between the power supply of the physical layer circuit and the power supply of the other circuit block;
A second protection circuit provided between the power supply of the logic circuit and the power supply of the other circuit block;
The second protection circuit block includes:
A fourth protection circuit provided between the power supply of the physical layer circuit and the power supply of the other circuit block;
An integrated circuit device comprising a fifth protection circuit provided between a power supply of the logic circuit and a power supply of the other circuit block.

In claim 9 or 10 ,
When the direction from the first side to the third side of the high-speed interface circuit block is the first direction and the direction opposite to the first direction is the third direction,
The second protection circuit is disposed on the third direction side of the first protection circuit;
The integrated circuit device, wherein the fifth protection circuit is arranged on the first direction side of the fourth protection circuit.

In claim 11 ,
A second power supply line connecting the second protection circuit and the logic circuit is wired on the third direction side of the first power supply line connecting the first protection circuit and the physical layer circuit,
A fifth power supply line connecting the fifth protection circuit and the logic circuit is wired on the first direction side of the fourth power supply line connecting the fourth protection circuit and the physical layer circuit. An integrated circuit device.

In claim 12 ,
When the direction from the second side, which is the long side of the high-speed interface circuit block, to the fourth side facing the second direction is the second direction, and the direction opposite to the second direction is the fourth direction,
A first pad to which the first power line is connected is disposed on the fourth direction side of the first protection circuit;
A second pad to which the second power line is connected is disposed on the third direction side of the first pad;
A fourth pad connected to the fourth power line is disposed on the fourth direction side of the fourth protection circuit;
5. An integrated circuit device, wherein a fifth pad to which the fifth power line is connected is disposed on the first direction side of the fourth pad.

In claim 13 ,
An integrated circuit device, wherein at least one of a receiving pad or a transmitting pad of the physical layer circuit is disposed between the first pad and the fourth pad.

In any one of Claims 1 thru | or 14 .
The integrated circuit device, wherein the protection circuit included in the first and second protection circuit blocks includes a bidirectional diode.

An integrated circuit device according to any one of claims 1 to 15 ,
A display panel driven by the integrated circuit device;
An electronic device comprising: