JP2007096002A - Method of manufacturing semiconductor device, and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To form a silicide layer without giving any damage to a semiconductor substrate in a process for forming a silicide region and a non-silicide region of an MOS (metal oxide semiconductor) transistor employing silicide technique. <P>SOLUTION: A method of manufacturing a semiconductor device includes a step of depositing an organic inorganic hybrid film 112 shown by SiC<SB>w</SB>H<SB>x</SB>O<SB>y</SB>N<SB>z</SB>(w>0, x≥0, y>0, z≥0), so as to cover a gate electrode 103 and source-drain diffusion layers 109, 110 having a first side wall spacer 108; a step of changing a predetermined part in the organic inorganic hybrid film 112 into an oxide layer 115; a step of selectively removing the oxide layer 115, and opening a predetermined part of the gate electrode 103 and the source-drain 109, 110 simultaneously with the forming of a second side wall spacer 116 on the side surface of the first side wall spacer 108; and a step of forming the silicide layer 120 by the silicide formation of the opening parts of the gate electrode 103 and the source-drain diffusion layers 109, 110. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  In the manufacturing process of a MOS transistor using salicide technology, the present invention forms a high-quality silicide layer on the gate electrode and the source / drain diffusion layer on the upper side of the source / drain diffusion layer without causing a defect such as an increase in resistance or disconnection. The present invention relates to a method for manufacturing a semiconductor device and a semiconductor device that prevent the occurrence of junction leakage caused by growing a silicide layer formed in an LDD (Lightly-Doped Drain) region.

  In recent years, miniaturization and speeding-up of element patterns of semiconductor devices have been accelerated. Accordingly, a technique is used in which the impurity diffusion layer in the source / drain region of the MOS transistor is formed as shallow as possible, and a silicide layer, which is a compound of silicon and metal, is formed thereon. On the other hand, in a MOS transistor used for the I / O portion, a silicide layer is generally not formed above the source / drain regions in order to ensure the breakdown voltage of the gate insulating film and the ESD breakdown voltage. That is, a silicide region and a non-silicide region exist on one semiconductor substrate.

Hereinafter, an example of a conventional process for forming a silicide region and a non-silicide region will be described with reference to FIGS. First, as shown in FIG. 18A, a gate electrode 4 made of, for example, a 200 nm polysilicon film is formed on a semiconductor substrate 2 on which an element isolation 1 is formed via a 2 nm gate oxide film 3, for example. It is formed using photolithography technology and dry etching technology. Next, the N-type diffusion layers 5 and 6 having a low impurity concentration, which become a part of the source / drain diffusion layers, are self-implanted by ion implantation (for example, P ⁺ is 5 × 10 ¹³ / cm ² ) using the gate electrode 4 as a mask. Form consistently.

Next, as shown in FIG. 18B, a silicon oxide film 8 is deposited, for example, by 60 nm by the CVD method so as to cover the surface of the substrate 7 to be processed. Next, as shown in FIG. 18C, anisotropic etching of the silicon oxide film 8 is performed to remove the silicon oxide film 8 so that only the side surfaces of the gate electrode 4 are left, and sidewall spacers 9 are formed. To do. Next, as shown in FIG. 18D, the gate electrode 4 and the sidewall spacer 9 are used as a mask, and the source / drain diffusion layers of the source / drain diffusion layer are formed by ion implantation (for example, As ⁺ is 5 × 10 ¹⁵ / cm ² ). High-concentration diffusion layers 10 and 11 to be other portions are formed in a self-aligning manner. Next, as shown in FIG. 18E, a silicon oxide film 13 is deposited, for example, by 20 to 40 nm by the CVD method so as to cover the surface of the substrate 12 to be processed. Next, a resist pattern 14 is formed on a predetermined portion of the silicon oxide film 13 using a known photolithography technique. Next, as shown in FIG. 18 (f), anisotropic etching of the silicon oxide film 13 is performed using a known dry etching technique, and the upper portion 15 of the gate electrode 4 and the source / drain diffusion layers 5 and 6 are formed. The upper portions 16 and 17 are exposed. Next, as shown in FIG. 18 (g), the upper portion 15 of the gate electrode 4 and the upper portions 16 and 17 of the source / drain diffusion layers 5 and 6 are made of, for example, a compound of Si and Co using a known salicide technique. When the silicide layer 18 is formed, a basic structure of a MOS transistor having a silicide region and a non-silicide region is completed. In such a MOS transistor forming process having a silicide region and a non-silicide region, an anisotropic etching that requires a large selection ratio with the underlying silicon substrate 2 is performed, such as anisotropic etching of the silicon oxide film 13. Conventionally, a dry etching technique using a fluorocarbon gas such as CHF ₃ gas has been used as in Patent Document 1.
JP-A-6-310529

  However, when the silicide region and the non-silicide region are formed using the above-described conventional method, the silicide layer formed in the silicide region is disconnected to increase the resistance, the source / drain junction leakage, and the contact resistance variation to the region May occur, and the characteristics of the MOS transistor may deteriorate. This is anisotropic dry etching of the silicon oxide film 13 when forming a silicide region, and an ionized etching gas is implanted into the semiconductor substrate to inhibit the silicidation reaction, or to the semiconductor substrate on which the source / drain layers are formed. One of the causes is thought to be scraping. Conventionally, the dry etching conditions have been set so as not to damage the semiconductor substrate as much as possible. However, in the prior art, as long as the semiconductor substrate is exposed to plasma during dry etching, damage to the semiconductor substrate cannot be completely eliminated.

  Accordingly, an object of the present invention is to solve the conventional drawbacks as described above. In the step of forming the silicide region and the non-silicide region of the MOS transistor, the silicide region is formed without damaging the semiconductor substrate. Another object of the present invention is to provide a method of manufacturing a semiconductor device and a semiconductor device for forming a high-quality silicide layer.

In order to achieve the above object, a method of manufacturing a semiconductor device according to claim 1 of the present invention includes a step of forming a plurality of gate electrodes on a semiconductor substrate through a gate insulating film, and a first side surface of the gate electrode. Forming a sidewall spacer, forming a high-concentration source / drain diffusion layer between the gate electrodes having the first sidewall spacer, and the gate electrode having the first sidewall spacer. And depositing an organic-inorganic hybrid film represented by SiC _w H _x O _y N _z (w> 0, x ≧ 0, y> 0, z ≧ 0) so as to cover the source / drain diffusion layer; A step of converting a predetermined portion of the organic-inorganic hybrid film into an oxide layer; and selectively removing the oxide layer to form a predetermined portion of the gate electrode and the source / drain diffusion layer Forming a second sidewall spacer made of the organic-inorganic hybrid film on the side surface of the first sidewall spacer simultaneously with silicidizing the opening portions of the gate electrode and the source / drain diffusion layer Forming a silicide layer.

  The method for manufacturing a semiconductor device according to claim 2 is the method for manufacturing a semiconductor device according to claim 1, wherein the step of converting a predetermined portion of the organic-inorganic hybrid film into an oxide layer irradiates the organic-inorganic hybrid film with ions. It is performed according to the process.

  A method for manufacturing a semiconductor device according to claim 3 is the method for manufacturing a semiconductor device according to claim 2, wherein the ions are any of oxygen ions, nitrogen ions, or inert gas ions.

  According to a fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the first aspect, wherein the step of selectively removing the oxide layer is performed using a chemical solution containing fluorine.

  According to a fifth aspect of the present invention, in the method of manufacturing the semiconductor device according to the first aspect, the step of selectively removing the oxide layer is performed using a gas containing fluorine.

  A method for manufacturing a semiconductor device according to claim 6 is the method for manufacturing a semiconductor device according to claim 1, wherein at least a surface portion of the second sidewall spacer is converted into an oxide layer, and the second sidewall is formed. Selectively removing the oxide layer of the spacer.

  The method of manufacturing a semiconductor device according to claim 7 is the method of manufacturing a semiconductor device according to claim 6, wherein the step of converting the second sidewall spacer into an oxide layer is performed by applying thermal energy to the second sidewall spacer. And a step of irradiating a gas.

  The method for manufacturing a semiconductor device according to claim 8 is the method for manufacturing a semiconductor device according to claim 7, wherein the gas is a gas containing oxygen or nitrogen.

  The method for manufacturing a semiconductor device according to claim 9 is the method for manufacturing a semiconductor device according to claim 6, wherein the step of converting the second sidewall spacer into an oxide layer includes converting radical species into the second sidewall spacer. It is performed by the process of irradiating.

  The method for manufacturing a semiconductor device according to claim 10 is the method for manufacturing a semiconductor device according to claim 9, wherein the radical species includes an oxygen radical or a nitrogen radical.

  The method for manufacturing a semiconductor device according to claim 11 is the method for manufacturing a semiconductor device according to claim 6, wherein the step of converting the second sidewall spacer into an oxide layer is performed by applying the ions to the second sidewall spacer. It is performed by the process of irradiating.

  A semiconductor device manufacturing method according to a twelfth aspect is the semiconductor device manufacturing method according to the eleventh aspect, wherein the ions include any one of oxygen ions, nitrogen ions, or inert gas ions.

  A method for manufacturing a semiconductor device according to claim 13 is the method for manufacturing a semiconductor device according to claim 6, wherein the step of selectively removing the oxide layer of the second sidewall spacer uses a chemical solution containing fluorine. Do.

  The method of manufacturing a semiconductor device according to claim 14 is the method of manufacturing a semiconductor device according to claim 6, wherein the step of selectively removing the oxide layer of the second sidewall spacer uses a gas containing fluorine. Do.

  16. The method of manufacturing a semiconductor device according to claim 15, wherein the silicide layer formed on the upper surface of the source / drain diffusion layer is grown to a lower region of the first sidewall spacer. I won't let you.

The semiconductor device according to claim 16, a semiconductor substrate, a plurality of gate electrodes formed on the semiconductor substrate via a gate insulating film, a first sidewall spacer formed on a side surface of the gate electrode, A high concentration source / drain diffusion layer formed between the gate electrodes having a first sidewall spacer, and SiC _w H _x formed on a side surface of the first sidewall spacer in the gate electrode in a predetermined region. A second sidewall spacer made of an organic-inorganic hybrid film represented by O _y N _z (w> 0, x ≧ 0, y> 0, z ≧ 0), the gate electrode and the source / drain in a predetermined region And a silicide layer formed by siliciding the diffusion layer.

According to the method of manufacturing a semiconductor device of the first aspect of the present invention, the gate electrode and the source / drain diffusion layer having the first sidewall spacer formed on the semiconductor substrate such as silicon on the side surface are represented by the general formula. Covering with an organic-inorganic hybrid film represented by SiC _w H _x O _y N _z (w> 0, x ≧ 0, y> 0, z ≧ 0), and converting a predetermined portion of the organic-inorganic hybrid film into an oxide layer Thereafter, the oxide layer is selectively removed to open a predetermined portion of the gate electrode and the source / drain diffusion layer that becomes the silicide region. Therefore, the oxide layer is selectively used using a chemical solution that does not etch the semiconductor substrate, such as a chemical solution containing HF. The silicide layer can be formed by removing the oxide layer. For this reason, it is possible to prevent the occurrence of damage such as implantation of new impurity ions into the semiconductor substrate such as the source / drain diffusion layer by dry etching or the semiconductor substrate scraping as in the conventional case. Thereby, disconnection of the silicide layer, leakage of the diffusion layer, and variation in contact resistance can be prevented.

  According to a second aspect of the present invention, in the method of manufacturing a semiconductor device according to the first aspect, the step of converting a predetermined portion of the organic-inorganic hybrid film into an oxide layer is preferably performed by a step of irradiating the organic-inorganic hybrid film with ions. For example, by irradiating an MSQ film, which is one of organic-inorganic hybrid films, with oxygen ions, C, H, and N constituting the MSQ film react with oxygen ions, and C, H, N, etc. of the MSQ film are oxygenated. And are removed to form an oxide layer.

  According to a third aspect of the present invention, in the semiconductor device manufacturing method according to the second aspect of the present invention, the ions are preferably either oxygen ions, nitrogen ions, or inert gas ions. The method of irradiating nitrogen ions or inert gas ions has an advantage that an oxide layer can be formed even when oxygen ions having a small resist pattern thickness and a high etching rate of the resist material cannot be used. . In particular, in the case of inert ions, a reaction layer such as an oxide layer or a nitride layer is not formed on a portion exposed to ions on a semiconductor substrate other than the MSQ film. Therefore, it is very effective when it is not desired to form a reaction layer in a part other than the MSQ film.

  According to a fourth aspect of the present invention, in the method of manufacturing a semiconductor device according to the first aspect, the step of selectively removing the oxide layer is preferably performed using a chemical solution containing fluorine. Since the removal rate of the chemical solution containing fluorine is much higher in the oxide layer than in the MSQ film, the oxide layer can be selectively removed.

  According to a fifth aspect of the present invention, in the method of manufacturing a semiconductor device according to the first aspect, the step of selectively removing the oxide layer is preferably performed using a gas containing fluorine. A gas containing fluorine has the same effect as that of the fourth aspect.

According to claim 6, organic inorganic represented by the general formula formed in the side surface of the first sidewall spacers _{SiC w H x O y N z} (w> 0, x ≧ 0, y> 0, z ≧ 0) Since the second sidewall spacer made of the hybrid film is formed and at least the surface portion of the second sidewall spacer is converted into the oxide layer, the oxide layer is selectively removed, so that a semiconductor such as a chemical solution containing HF is used. The oxide layer of the second sidewall spacer can be removed using a chemical solution that does not etch the substrate. For this reason, it is possible to prevent the occurrence of damage such as implantation of new impurity ions into the semiconductor substrate such as the source / drain diffusion layer by dry etching or the semiconductor substrate scraping as in the conventional case. Thereby, disconnection of the silicide layer, leakage of the diffusion layer, and variation in contact resistance can be prevented.

  According to a seventh aspect of the present invention, in the method of manufacturing a semiconductor device according to the sixth aspect, the step of converting the second sidewall spacer into an oxide layer includes the step of applying thermal energy to the second sidewall spacer and irradiating a gas. Is preferably performed. For example, if oxygen energy is irradiated to the MSQ film and heated to give thermal energy, C, H, N and oxygen in the MSQ film are removed by reaction, and the sidewall spacer is converted to an oxide layer. .

  According to an eighth aspect of the present invention, in the method for manufacturing a semiconductor device according to the seventh aspect, the gas is preferably a gas containing oxygen or nitrogen. Since the method using nitrogen gas does not form an oxide layer in a portion other than the second sidewall spacer of the semiconductor device as in the case of oxygen gas, it is used even when it is not desirable to form an oxide layer in an extra portion. There is an advantage that you can.

  According to a ninth aspect of the present invention, in the method of manufacturing a semiconductor device according to the sixth aspect, the step of converting the second sidewall spacer into the oxide layer is preferably performed by a step of irradiating the second sidewall spacer with radical species. . In this case, an oxide layer is formed by the reactivity of the radical itself.

  According to a tenth aspect of the present invention, in the method for manufacturing a semiconductor device according to the ninth aspect, the radical species preferably include an oxygen radical or a nitrogen radical. In the case of irradiation with oxygen radicals or nitrogen radicals, an oxide layer is formed by the reactivity of the radicals themselves, so that the sidewall spacer can be converted into an oxide layer at a low temperature of 200 ° C. or lower. Therefore, it is very effective for a fine element pattern process in which a comprehensive heat treatment history (thermal budget) during a semiconductor integrated circuit manufacturing process such as source / drain activation is severe.

  According to an eleventh aspect of the present invention, in the method of manufacturing a semiconductor device according to the sixth aspect, the step of converting the second sidewall spacer into an oxide layer is preferably performed by a step of irradiating the second sidewall spacer with ions. Similar to claim 2, the second sidewall spacer is converted into an oxide layer.

  According to a twelfth aspect of the present invention, in the method of manufacturing a semiconductor device according to the eleventh aspect, the ions preferably include any one of oxygen ions, nitrogen ions, or inert gas ions.

  According to a thirteenth aspect of the present invention, in the method of manufacturing a semiconductor device according to the sixth aspect, the step of selectively removing the oxide layer is preferably performed using a chemical solution containing fluorine. Similar to the fourth aspect, the oxide layer can be selectively removed.

  According to a fourteenth aspect of the present invention, in the method of manufacturing a semiconductor device according to the sixth aspect, the step of selectively removing the oxide layer is preferably performed using a gas containing fluorine. A gas containing fluorine has the same effect as that of the fourth aspect.

According to a fifteenth aspect of the present invention, the first sidewall spacer is formed of an organic-inorganic hybrid film represented by SiC _w H _x O _y N _z (w> 0, x ≧ 0, y> 0, z ≧ 0). 2 sidewall spacers are formed, and a silicide layer is formed in the surface region of the semiconductor substrate adjacent to the second sidewall spacer. The silicide layer is not grown to the lower region of the first sidewall spacer. The position in the direction is the same as the end position of the lower portion of the first sidewall spacer, or is in the region of the lower portion of the second sidewall spacer. Thereby, junction leakage of the diffusion layer and variation in contact resistance can be prevented. Usually, the silicide layer during the silicidation reaction grows about 10 nm in the horizontal direction. However, by setting the width of the second sidewall spacer to be longer than the length in which the silicide layer grows in the horizontal direction, It is possible to prevent the occurrence of defects such as junction leakage caused by erosion of the LDD layer under the one sidewall spacer.

According to the semiconductor device of the sixteenth aspect of the present invention, the gate electrode and the source / drain diffusion layer having the first sidewall spacer formed on the semiconductor substrate such as silicon on the side surface have the general formula SiC _w H _After coating with an organic-inorganic hybrid film represented by xO _y N _z (w> 0, x ≧ 0, y> 0, z ≧ 0) and converting a predetermined portion of the organic-inorganic hybrid film into an oxide layer, HF The oxide layer can be selectively removed using a chemical solution that does not etch the semiconductor substrate, such as a chemical solution containing hydrogen, so that the upper portion of the gate electrode and the upper portion of the source / drain diffusion layer serving as the silicide region can be opened. For this reason, it is possible to prevent the occurrence of damage such as implantation of new impurity ions into the semiconductor substrate such as the source / drain diffusion layer or the semiconductor substrate scraping. Thereby, disconnection of the silicide layer, leakage of the diffusion layer, and variation in contact resistance can be prevented.

  A first embodiment of the present invention will be described with reference to FIGS. 1 (a) to 1 (f) and FIGS. 2 (a) and 2 (b) are process cross-sectional views showing a manufacturing process of a MOS transistor having a very small gate length in the first embodiment of the present invention.

The main point of the manufacturing method according to the first embodiment of the present invention is that the general formula SiC _w H _x O _y N _z (w> 0, x ≧) deposited on the upper surface of the gate electrode having the sidewall spacer and the upper surface of the source / drain diffusion layer. The organic / inorganic hybrid film surface represented by 0, y> 0, z ≧ 0) is irradiated with oxygen ions, nitrogen ions or inert gas ions to convert the surface into an oxide layer, and then the oxide layer is selectively removed. By doing so, the silicide region and the non-silicide region are formed by exposing the upper surface of the gate electrode and the upper surface of the source / drain diffusion layer in a predetermined portion. FIG. 1 shows a manufacturing process of a MOS transistor in the case of irradiation with oxygen ions. However, in the case of irradiation with nitrogen ions and inert gas ions, only the process (f) is different. Same as for irradiation. 4 is a cross-sectional view of the step (f) of irradiating nitrogen ions, and FIG. 5 is a cross-sectional view of the step (f) of irradiating inert gas ions, particularly Ar ions.

First, as shown in FIG. 1A, a gate electrode 103 made of, for example, a 200 nm polysilicon film is formed on a semiconductor substrate 101 on which an element isolation 100 is formed via a 2 nm gate oxide film 102, for example. It is formed using photolithography technology and dry etching technology. Next, self-alignment is performed by ion implantation (for example, P ⁺ is 5 × 10 ¹³ pieces / cm ² ) using the N-type diffusion layers 104 and 105 having a low impurity concentration as a part of the source / drain as a mask for the gate electrode 103. To form.

Next, as shown in FIG. 1B, a silicon nitride film 107 is deposited by, for example, 60 nm by a CVD method so as to cover the surface of the substrate 106 to be processed. Next, as shown in FIG. 1C, anisotropic etching of the silicon nitride film 107 is performed to remove the silicon nitride film 107 so that only the side surface of the gate electrode 103 is left, and the first sidewall spacer is removed. 108 is formed. Next, as shown in FIG. 1D, the source / drain is formed by ion implantation (for example, As ⁺ 5 × 10 ¹⁵ / cm ² ) using the gate electrode 103 and the first sidewall spacer 108 as a mask. High-concentration diffusion layers 109 and 110 to be other portions are formed in a self-aligned manner. Next, as shown in FIG. 1 (e), one of the organic-inorganic hybrid films described above so as to cover the surface of the substrate 111 to be processed is SiC _x O _y (x> 0, y> 0). An MSQ (methylsilsesquioxane) film 112 shown is deposited by, for example, 30 nm by plasma CVD. Next, a resist pattern 113 is formed on a predetermined portion of the MSQ film 112 using a known photolithography technique.

  Next, as shown in FIG. 1 (f), for example, oxygen ions 114 are directed toward the surface of the MSQ film 112 so as to be substantially perpendicular to the main surface of the semiconductor substrate, so that a predetermined portion of the MSQ film 112 is irradiated. That is, the surface portion is converted into the oxide layer 115. This process is performed in the same manner even when nitrogen ions are irradiated instead of oxygen ions. In this manner, the surface portion of the first MSQ film 112 becomes the oxide layer 115, and the MSQ film remains under the oxide layer 115. Next, as shown in FIG. 2A, after removing the resist pattern 113 using, for example, sulfuric acid or a mixed solution of sulfuric acid and hydrogen peroxide, a chemical solution containing, for example, 5% of HF is added to the oxide layer 115. The second side wall spacer 116 having a width of 30 nm is formed on the side surface of the first side wall spacer 108 by selective removal, and at the same time, the upper portion 117 of the gate electrode 103 and the source / drain diffusion layers 109 and 110 are formed. The upper portions 118 and 119 are exposed.

  Next, as shown in FIG. 2B, the upper portion 117 of the gate electrode 103 and the upper portions 118 and 119 of the source / drain diffusion layers 109 and 110 are made of, for example, a compound of Si and Co using a known salicide technique. A silicide layer 120 is formed. At this time, the silicide layer 120 grows in the horizontal direction above the source / drain diffusion layers 109 and 110 and enters the lower portion of the second sidewall spacer 116, but the width of the second sidewall spacer 116 is 30 nm. Therefore, the silicide layer 120 does not erode up to the shallow source / drain diffusion layers 104 and 105 below the first sidewall spacer 108 to cause junction leakage. In this way, a basic structure of a MOS transistor having a silicide region and a non-silicide region is completed.

  The feature of the process of this embodiment is in the process of FIGS. 1F and 2A, and the method for forming the oxide layer 115 shown in FIG. 1F will be described more specifically. In order to form the oxide layer 115, a plasma processing apparatus as shown in FIG. 3 is used.

  The plasma processing apparatus will be described. As shown in FIG. 3, a first high frequency power source 202 is connected to a processing chamber 201 that is grounded and whose inner wall is covered with an insulator such as ceramic, alumina, or quartz. An induction coil (upper electrode) 203 to which one high frequency power is applied is provided. When the first high frequency power is applied to the induction coil 203, inductively coupled plasma is generated inside the processing chamber 201. On the other hand, a sample stage (lower electrode) 205 to which a second high-frequency power is applied from the second high-frequency power source 204 is provided at the bottom of the processing chamber 201, and is directed to the sample stage 205 by the second high-frequency power. Ion energy is controlled. Although not shown, a temperature control device that controls the temperature of the sample table 205 in the range of about 0 ° C. to + 80 ° C. with a refrigerant or the like is provided inside the sample table 205. A processing gas is introduced into the processing chamber 201 from an inlet (not shown) through a mass flow controller (not shown), and the pressure in the processing chamber 201 is a turbo pump (not shown). In the range of 0.1 Pa to 10 Pa. The substrate to be processed on which the MSQ film 112 is deposited is placed on the sample stage 205 inside such a plasma processing apparatus, and the first and second high frequency powers are applied to the upper electrode and the lower electrode to apply the MSQ film. 112 is irradiated with oxygen ions 114 substantially perpendicular to the main surface of the semiconductor substrate to replace the MSQ film 112 with the oxide layer 115. Here, when the second high-frequency power is controlled, the incident ion energy incident on the MSQ film 112 can be adjusted, and the formation amount of the oxide layer 115 can be adjusted to a predetermined value.

When irradiating oxygen ions as specific conditions, for example, pressure in the processing chamber 201: 0.6 Pa, first high frequency power: 1000 W, second high frequency power: 300 W, O ₂ flow rate: 100 ml / min, sample stage When the temperature of 205: 60 ° C. is applied, an oxide layer 115 of about 30 nm can be formed on the MSQ film 112. In this case, the lower the pressure in the processing chamber 201 is, the stronger the incident anisotropy of oxygen ions is, and the oxygen ions 114 are irradiated in the vertical direction with respect to the MSQ film 112 by the bias by the second high-frequency power. The oxide layer 115 is formed in the vertical direction.

By irradiating oxygen ions into membrane represented a MSQ film in generalized formula _{SiC w H x O y N z} (w> 0, x ≧ 0, y> 0, z ≧ 0), constituting an MSQ film C, H, N reacts with oxygen ions,
SiC _w H _x O _y N _z + O ⁺ → SiO _v (v = 1 to 2) + CO ₂ ↑ + H ₂ O ↑ + NO ↑ + etc ↑
Through this reaction, an oxide layer is formed.

Also, in the case of irradiation with nitrogen ions, a plasma processing apparatus as shown in FIG. 3 is used. As specific conditions, for example, the pressure in the processing chamber 201: 0.6 Pa, the first high-frequency power: 1000 W, the second By applying a high frequency power of 300 W, a flow rate of N _{2 of} 100 ml / min, and a temperature of the sample stage 205 of 60 ° C., an oxide layer 302 of about 30 nm is formed on the MSQ film 112 by nitrogen ions 301 as shown in FIG. Can be formed. When the MSQ film of SiC _w H _x O _y N _z (w> 0, x ≧ 0, y> 0, z ≧ 0) is irradiated with nitrogen ions, C, H, N and nitrogen ions constituting the MSQ film are React,
SiC _w H _x O _y N _z + N ⁺ → SiO _v (v = 1 to 2) + N ₂ ↑ + HCN ↑ + CN ↑ + etc ↑
Through this reaction, an oxide layer is formed.

In addition, irradiation with inert gas ions such as Ar ions is also performed by the plasma processing apparatus shown in FIG. 3. Specific conditions include, for example, pressure in the processing chamber 201: 0.6 Pa, first high-frequency power: 1000 W, second By applying a high frequency power of 500 W, an Ar flow rate: 100 ml / min, and a temperature of the sample stage 205: 60 ° C., an oxide layer 402 of about 30 nm is formed on the MSQ film 112 by Ar ions 401 as shown in FIG. can do. _{SiC w H x O y N z} (w> 0, x ≧ 0, y> 0, z ≧ 0) is irradiated with Ar ions MSQ film in the form of, C constituting the MSQ film, H, N-inert When gas ions are sputtered,
SiC _w H _x O _y N _z + Ar ⁺ → SiO _v (v = 1 to 2) + N ₂ ↑ + H ₂ ↑ + CO ₂ ↑ + etc ↑
Through this reaction, an oxide layer is formed.

In the process of irradiating the MSQ film with oxygen and nitrogen ions as described above, C, H, and N contained in the MSQ film are combined with oxygen or nitrogen in the intermediate stage of the reaction, and finally become a gas to the processing chamber from the MSQ film. It diffuses and is exhausted to the outside. Alternatively, it is sputtered by Ar ions and exhausted to the outside as a gas such as nitrogen, hydrogen or CO ₂ . It is considered that only the SiO component remains on the surface of the MSQ film and is converted into an oxide layer. Further, when the process of converting the surface layer of the MSQ film 112 into the oxide layer 115 is observed, the Si—CH ₃ bond constituting the MSQ film 112 is affected by oxygen ion, nitrogen ion, Ar ion bombardment, Si—O bond, Si— It is thought that it is formed by changing to an OH bond.

One feature of the structure of the present invention as described above, after forming the pattern of the organic-inorganic hybrid film, but is to alter the surface portion of the film to the oxide layer, actually for example oxygen ions O ₂ plasma After irradiating the MSQ film, which is one of the organic-inorganic hybrid films, and examining the irradiated part by FTIR (Fourier transform infrared absorption spectrum), as shown in FIG. Only the Si—O bond spectrum appears strongly and remains. This indicates that C, H, etc. of the MSQ film are removed by the oxygen ion irradiation and actually converted into an oxide layer.

  In this way, there are Si—O and Si—OH bonds in the oxide layer, but there are many dangling bonds, etc. due to the destruction of interatomic bonds due to ion sputtering, and CVD silicon oxide films, thermal oxide films, etc. The density is low compared to F and it is easy to bind to F- in the HF-containing chemical used in the step of FIG. On the other hand, since the MSQ film 112 is supplied with electrons from a methyl group to Si atoms and has a small number of dangling bonds, it has a property that it is difficult to react with F-. For this reason, in the step of FIG. 2A, if an HF-containing chemical solution is used, this oxide layer can be easily and selectively removed from the remaining MSQ film. That is, the removal rate by the chemical solution is much higher in the oxide layer 115 than in the MSQ film 112, so that the oxide layer 115 can be selectively removed (selectivity ratio: about 10).

  As described above, in the manufacturing method according to the present embodiment, since the silicide region 120 can be formed by wet etching using an HF-containing chemical solution that does not substantially etch the semiconductor substrate, the silicidation reaction is inhibited as in the prior art. Problems such as ion implantation and damage such as chipping of the semiconductor substrate can be avoided. In addition, the problem that the silicide layer grows in the horizontal direction and erodes the LDD layer region can be solved.

  Finally, disconnection of the silicide layer of the MOS transistor, leakage of the diffusion layer, and variation in contact resistance can be prevented.

  The method of irradiating nitrogen ions has an advantage that the oxide layer 115 can be formed even when oxygen ions having a small resist pattern thickness and a high etching speed of the resist material cannot be used. Even in the method of irradiating with Ar ions, the oxide layer 115 can be formed even when the resist pattern is thin and oxygen ions cannot be used. In particular, since Ar ions are inactive, a reaction layer such as an oxide layer or a nitride layer is not formed on a portion of the semiconductor substrate other than the MSQ film 112 exposed to ions. Therefore, it is very effective when it is not desired to form a reaction layer in a part other than the MSQ film 112.

  A second embodiment of the present invention will be described with reference to FIGS. 7 to 9 are process cross-sectional views for explaining a method of manufacturing a semiconductor device according to the second embodiment of the present invention, and show a cross section of the MOS transistor portion as in the first embodiment.

  In this embodiment, in the same manner as the method described in the first embodiment, the second sidewall spacer made of the MSQ film is formed on the side surface of the first sidewall spacer on the side surface of the gate electrode, and at the same time, the gate in the predetermined region is formed. After opening the upper part of the electrode and the upper part of the source / drain diffusion layer to form a silicide region and a non-silicide region, the MSQ film covering the second sidewall spacer and the non-silicide region is converted into an oxide layer. Removal is the main configuration.

First, as shown in FIG. 7A, a known gate electrode 503 made of, for example, a 200 nm polysilicon film is formed on a semiconductor substrate 501 on which an element isolation 500 is formed via a 2 nm gate oxide film 502, for example. It is formed using photolithography technology and dry etching technology. Next, self-alignment is performed by ion implantation (for example, P ⁺ is 5 × 10 ¹³ / cm ² ) using the N-type diffusion layers 504 and 505 having a low impurity concentration, which become a part of the source / drain, as a mask for the gate electrode 503. To form.

Next, as shown in FIG. 7B, a silicon nitride film 507 is deposited by, for example, 60 nm by a CVD method so as to cover the surface of the substrate 506 to be processed. Next, as shown in FIG. 7C, anisotropic etching of the silicon nitride film 507 is performed to remove the silicon nitride film 507 so that only the side surface of the gate electrode 503 is left, and the first sidewall spacer is removed. 508 is formed. Next, as shown in FIG. 7D, the source / drain is formed by an ion implantation method (for example, As ⁺ is 5 × 10 ¹⁵ / cm ² ) using the gate electrode 503 and the first sidewall spacer 508 as a mask. The high-concentration diffusion layers 509 and 510 to be other portions are formed in a self-aligned manner. Next, as shown in FIG. 7E, one of the organic-inorganic hybrid films described above so as to cover the surface of the substrate 511 to be processed is SiC _x O _y (x> 0, y> 0). An MSQ (methylsilsesquioxane) film 512 shown is deposited by, for example, 30 nm by plasma CVD. This MSQ film may contain hydrogen and nitrogen and be represented by the general formula SiC _w H _x O _y N _z (w> 0, x ≧ 0, y> 0, z ≧ 0). Next, a resist pattern 513 is formed on a predetermined portion of the MSQ film 512 using a known photolithography technique.

  Next, as shown in FIG. 7F, the MSQ film 512 is irradiated with, for example, oxygen ions 514 using various methods shown in FIGS. 1F, 4 and 5, and the surface of the MSQ film 512 is irradiated. The portion is converted into the first oxide layer 515. Next, as shown in FIG. 8A, the first oxide layer 515 is selectively removed using, for example, a chemical solution containing 5% of HF, and a width of 30 nm is formed on the side surface of the first sidewall spacer 508. Simultaneously with the formation of the second sidewall spacer 516, the upper portion 517 of the gate electrode 503 and the upper portions 518 and 519 of the source / drain diffusion layers 509 and 510 are exposed. Next, as shown in FIG. 8B, the upper portion 517 of the gate electrode 503 and the upper portions 518 and 519 of the source / drain diffusion layers 509 and 510 are made of, for example, a compound of Si and Co using a known salicide technique. A silicide layer 520 is formed.

  Next, as shown in FIG. 9A, the second sidewall spacer 516 and the MSQ film 512 covering the non-silicide region are irradiated with oxygen gas 521 and at the same time the substrate to be processed is heated, for example, to apply thermal energy. By applying, the MSQ film 512 covering the second sidewall spacer 516 and the non-silicide region is converted into the second oxide layers 522 and 523. In the example of FIGS. 7 to 9, the condition is that the entire MSQ film 512 covering the second sidewall spacer 516 and the non-silicide region is converted into the oxide layers 522 and 523. Next, as shown in FIG. 9B, when the second oxide layers 522 and 523 are selectively removed using, for example, a chemical solution containing 5% of HF, the second sidewall spacer and the non-silicide region are removed. The basic structure of a MOS transistor without a coating film is completed.

  A feature of the present embodiment is a process diagram 9 (a). Next, the formation of the second oxide layers 522 and 523 shown in FIG. 9 (a) will be described in more detail. In order to form the second oxide layers 522 and 523, a heater heating type heat treatment apparatus as shown in FIG. 10 is used.

  In FIG. 10, a sample stage 602 is installed in a processing chamber 601, and a temperature control device including a heater and a thermocouple is provided inside the sample stage 602. The temperature of the sample stage 602 is set to 400 ° C. to 1000 ° C. (The illustration is omitted). Gas is introduced into the processing chamber 601 from the inlet 604 via the mass flow controller 603, and the pressure in the processing chamber is controlled to a range of about 50 Pa to 200 Pa by a dry pump (not shown).

When the step of FIG. 9A is performed, a substrate to be processed on which a second sidewall spacer made of an MSQ film and a coating film on the non-silicide region are formed on the sample stage 602 is installed. The side wall spacers 516 and the MSQ film 512 above the non-silicide regions are irradiated with oxygen gas 521, and thermal energy is applied from the sample stage 602 to the semiconductor substrate 501 to convert it into the second oxide layers 522 and 523. By applying, for example, the pressure in the processing chamber 601: 100 Pa, the flow rate of O ₂ : 1000 ml / min, and the temperature of the sample stage: 700 ° C. as the specific conditions, the MSQ over the second sidewall spacer 516 and the non-silicide region is applied. An oxide layer 522 or 523 having a thickness of about 30 nm can be formed on the film 512. In this case, the oxygen gas isotropically enters the second sidewall spacer and the MSQ film 512 above the non-silicide, so that the second sidewall spacer 516 and the MSQ film 512 above the non-silicide are isotropic. 2 oxide layers 522, 523. In this conversion process, oxygen reacts with C, H, N constituting the MSQ film,
SiC _w H _x O _y N _z + O → SiO _v (v = 1 to 2) + CO ₂ ↑ + H ₂ O ↑ + NO ↑ + etc ↑
It is thought that the following reaction occurs.

In the above embodiment, the amount of conversion of the second sidewall spacer 516 and the MSQ film 512 above the non-silicide region into the oxide layer in the step of FIG. 9A can be achieved by controlling the temperature of the sample stage 602. However, it is also possible to control parameters such as a processing pressure, a gas flow rate, and a processing time in the processing chamber 601 other than this. For example, when the processing pressure, the gas flow rate, and the processing time are increased, the supply amount of oxygen increases, so the amount of oxide layer formed increases. Step 9 was used an oxygen gas as a process gas (a), a compound of oxygen and carbon (CO, etc. CO _2), compounds of oxygen and nitrogen _{(NO, NO 2, N 2} O, etc. N 2 _{O 2} ), And using an oxygen and hydrogen compound (H ₂ O, H ₂ O _2, etc.), the same effect can be obtained.

  In the MOS transistor manufacturing process described with reference to FIGS. 7 to 9, the second sidewall spacer 516 and the MSQ film 512 above the non-silicide region in FIG. 9A are used as the second oxide layers 522 and 523. Although oxygen gas was used for the conversion, other gases, ie nitrogen gas, can also be used.

FIG. 11 is a process cross-sectional view corresponding to FIG. 9A in the process of manufacturing the MOS transistor according to the second embodiment of the present invention and showing a process of irradiating nitrogen gas to convert it into an oxide layer. Nitrogen gas, 702 and 703 are second oxide layers. Also in the case of irradiation with nitrogen gas, the heater heating type heat treatment apparatus shown in FIG. 10 is used to irradiate the side wall spacer 516 and the MSQ film 512 above the non-silicide region with the nitrogen gas 701 and from the sample stage 602 to the semiconductor substrate. Thermal energy is applied to convert it into second oxide layers 702 and 703. As specific conditions, for example, when the pressure in the processing chamber 601 is 100 Pa, the N ₂ flow rate is 1000 ml / min, and the temperature of the sample stage 602 is 700 ° C., the second sidewall spacer 516 and the MSQ film above the non-silicide region are applied. A second oxide layer 702 or 703 having a thickness of about 30 nm can be formed on 512.

Since nitrogen gas is isotropically irradiated as in the case of FIG. 9A, the second sidewall spacer 516 and the MSQ film 512 above the non-silicide region are isotropically applied to the second oxide layers 702 and 703. Converted. When the MSQ film is irradiated with nitrogen gas and heated to give thermal energy, C, H, and N of the MSQ film react with nitrogen,
SiC _w H _x O _y N _z + N → SiO _v (v = 1 to 2) + N ₂ ↑ + HCN ↑ + CN ↑ + etc ↑
In this process, it is considered that the second sidewall spacer and the MSQ film above the non-silicide region are converted into the second oxide layer.

In the method using nitrogen gas, an oxide layer is not formed in a portion other than the second sidewall spacer 516 and the MSQ film 512 above the non-silicide region of the semiconductor device as in the case of oxygen gas. There is an advantage that it can be used even when it is not desirable to form the film. Further, instead of nitrogen gas as an oxide layer forming gas, a compound of oxygen and nitrogen (NO, NO ₂ , N ₂ O, N ₂ O ₂ etc.), a compound of nitrogen and hydrogen (NH ₃ , N ₂ H ₂ etc.) ), And using a compound of nitrogen and carbon (such as C ₂ N ₂ ), the same effect can be obtained. In addition, although the heater heating method is used as the heating method of the sample stage 602, the same effect can be obtained even when a lamp heating method heat treatment apparatus using a halogen lamp or the like is used. The process of this embodiment is an addition of a process of removing the second sidewall spacer once formed. For example, in a semiconductor integrated circuit, when gate electrodes are arranged with a narrow interval on a pattern layout and a contact hole is to be formed between the gates, a contact hole cannot be formed if a second sidewall spacer is present. This is occurring in high density fine pattern integrated circuits. In such a case, it is necessary to remove the second sidewall spacer, and this embodiment can be carried out without damaging the substrate.

  A third embodiment of the present invention will be described with reference to FIGS. In the second embodiment, as the step of converting the second sidewall spacer made of the MSQ film and the coating film of the non-silicide region into the second oxide layer (step corresponding to FIG. 9A), the substrate The method of irradiating oxygen gas or nitrogen gas at the same time as applying thermal energy by heating to high temperature was described. However, since various methods other than the above can be considered as the method for converting to the second oxide layer, they will be described in the present embodiment.

In the following description, only the step of converting the second sidewall spacer and the MSQ film above the non-silicide region into the second oxide layer will be described in correspondence with FIG. The process flow when these are applied to the MOS transistor manufacturing process is the same as that of FIGS. 7 to 8 and FIG. 9B except for the process of FIG. 9A, and will be referred to in the description of the process.
(1) Conversion to Second Oxide Layer Using Oxygen Radical or Nitrogen Radical FIG. 12 shows a second sidewall spacer made of an MSQ film and a non-silicide region coating film by using oxygen radicals. It is process sectional drawing which shows the process converted into an oxide layer, 801 is an oxygen radical, 802 and 803 are 2nd oxide layers. FIG. 14 is a process cross-sectional view showing the process of converting the second sidewall spacer made of the MSQ film and the non-silicide region coating film into the second oxide layer using nitrogen radicals. Radicals 1002 and 1003 are second oxide layers. This step uses the plasma processing apparatus shown in FIG.

  In FIG. 13, the processing chamber 901 of the plasma processing apparatus is grounded, and a gas whose flow rate is controlled by a mass flow controller (not shown) is introduced into the plasma generation chamber 903 from the introduction pipe 902. A high frequency power source 904 is connected to the plasma generation chamber 903, and gas is converted into plasma by the power supplied from the high frequency power source 904 to generate ions and radicals. Since the treatment chamber 901 and the plasma generation chamber 903 are separated from each other, ions disappear in the middle and only radicals reach the treatment chamber 902. A sample stage 905 is installed in the processing chamber 901. Although not shown, the temperature of the sample stage 905 is controlled within a range of about 100 ° C. to 300 ° C. by a heater or the like inside the sample stage 905. A temperature control device is provided. Furthermore, the pressure in the processing chamber 901 is controlled to a range of about 50 Pa to 200 Pa by a dry pump (not shown).

A second sidewall spacer made of an MSQ film and a semiconductor substrate with a coating film formed on the non-silicide region are placed on the sample stage 905 inside the plasma processing apparatus, and the second sidewall spacer 516 and the upper portion of the non-silicide region are placed on top. The MSQ film 512 is irradiated with oxygen radicals 801 or nitrogen radicals 1001 to be converted into second oxide layers 802 803 or 1002 1003. When oxygen radicals are used, the specific conditions such as pressure in the processing chamber 901: 100 Pa, high frequency power: 1000 W, O ₂ flow rate: 1000 ml / min, temperature of the sample stage 905: 150 ° C. The sidewall spacer 516 and the MSQ film 512 on the non-silicide region can be converted into oxide layers 802 and 803 of about 30 nm. By irradiating the side wall spacer with oxygen radicals, C, H, and N of the MSQ film react with oxygen radicals,
SiC _w H _x O _y N _z + O ^* → SiO _v (v = 1 to 2) + CO ₂ ↑ + H ₂ O ↑ + NO ↑ + etc ↑
It is considered that the second oxide layer is converted in the process.

Further, when nitrogen radicals are used, for example, by applying the following conditions: pressure in the processing chamber 901: 100 Pa, high frequency power: 1000 W, N ₂ flow rate: 1000 ml / min, temperature of the sample stage 905: 150 ° C. The sidewall spacer 516 and the MSQ film 512 on the non-silicide region can be converted into oxide layers 1002 and 1003 of about 30 nm. When nitrogen radical irradiation is performed, C, H, and N of the MSQ film react with nitrogen radicals,
SiC _w H _x O _y N _z + N ^* → SiO _v (v = 1 to 2) + N ₂ ↑ + HCN ↑ + CN ↑ + etc ↑
It is considered that the second oxide layer is converted in the reaction process. In the above reaction, since the oxygen radical 801 and the nitrogen radical 1001 are isotropically irradiated in the processing chamber, the second sidewall spacer 516 and the MSQ film 512 above the non-silicide region are also isotropically oxidized. Layers 802, 803 or 1002, 1003 are converted.

  In the case of irradiation with oxygen radicals or nitrogen radicals, an oxide layer is formed due to the reactivity of the radicals themselves. Therefore, the second sidewall spacer 516 and the MSQ film 512 above the non-silicide region are formed on the second sidewall spacer 516 at a low temperature of 200 ° C. or lower. It can be converted into an oxide layer 802, 803 or 1002, 1003. Therefore, it is very effective for a fine element pattern process in which a comprehensive heat treatment history (thermal budget) during a semiconductor integrated circuit manufacturing process such as source / drain activation is severe.

In the above embodiment, oxygen gas is used as the oxygen radical generating gas. However, oxygen and carbon compounds (CO, CO _2, etc.), oxygen and nitrogen compounds (NO, NO ₂ , N ₂ O, N ₂ O _2, etc.) ), Oxygen and hydrogen compounds (H ₂ O, H ₂ O _2, etc.) may be used, and nitrogen gas is used as a nitrogen radical generating gas, but oxygen and nitrogen compounds (NO, NO ₂ , N ₂ O, N ₂ O _2, etc.), nitrogen and hydrogen compounds (NH ₃ , N ₂ H ₂ etc.), nitrogen and carbon compounds (C ₂ N ₂ etc.) can be used to obtain the same effect. Can do. In particular, when oxygen radicals are used, there is a problem that an oxide layer is formed on the semiconductor substrate other than the MSQ film above the sidewall spacer and non-silicide region at the time of radical irradiation. There is an advantage that the second oxide layer can be formed. Moreover, although high frequency electric power was used for radical production | generation, you may use a microwave.
(2) Conversion to second oxide layer using oxygen ions, nitrogen ions, or inert gas ions FIG. 15 shows the covering of the second sidewall spacer made of the MSQ film and the non-silicide region using oxygen ions. It is process sectional drawing which shows the process of converting a film | membrane into a 2nd oxide layer, 1101 is oxygen ion, 1102 and 1103 are 2nd oxide layers. FIG. 16 is a process cross-sectional view showing the process of converting the second sidewall spacer made of the MSQ film and the coating film of the non-silicide region into the second oxide layer using nitrogen ions, 1202 and 1203 are second oxide layers. Further, FIG. 17 is a process sectional view showing a process of converting the second sidewall spacer made of the MSQ film and the coating film of the non-silicide region into the second oxide layer by using inert gas ions, particularly Ar ions. , 1301 are Ar ions, and 1302 and 1303 are second oxide layers. The plasma processing apparatus shown in FIG. 3 is used for irradiation with oxygen ions, nitrogen ions, or Ar ions. In this case, a second sidewall spacer made of an MSQ film and a non-silicide are formed on the sample stage 205 in the processing chamber 201. A substrate on which a region coating film is formed is set, oxygen, nitrogen, or Ar plasma is generated by the first high-frequency power source 202 and a high-frequency voltage is applied to the substrate from the second high-frequency power source 204 to enter the plasma. To control the oxygen / nitrogen / Ar ion energy.

When performing oxygen ion irradiation, specific conditions include, for example, pressure in the processing chamber 201: 0.6 Pa, first high frequency power: 1000 W, second high frequency power: 300 W, O ₂ flow rate: 100 ml / min, sample stage 205. By applying a temperature of 60 ° C., oxide layers 1102 and 1103 having a thickness of about 30 nm can be formed. Then, by irradiating the MSQ film with oxygen ions, C, H, and N of the MSQ film react with oxygen ions,
SiC _w H _x O _y N _z + O ⁺ → SiO _v (v = 1 to 2) + CO ₂ ↑ + H ₂ O ↑ + NO ↑ + etc ↑
It is considered that the second oxide layer is converted in the reaction process.

When performing nitrogen ion irradiation, for example, the pressure in the processing chamber 201: 0.6 Pa, the first high-frequency power: 1000 W, the second high-frequency power: 300 W, the N2 flow rate: 100 ml / min, the temperature of the sample stage 205: By applying the condition of 60 ° C., oxide layers 1202 and 1203 of about 30 nm can be formed. When the MSQ film is irradiated with nitrogen ions, C, H and N constituting the MSQ film react with nitrogen ions,
SiC _w H _x O _y N _z + N ⁺ → SiO _v (v = 1 to 2) + N ₂ ↑ + HCN ↑ + CN ↑ + etc ↑
It is considered that the second oxide layer is converted in the reaction process. In the case of irradiation with Ar ions, for example, the pressure in the processing chamber 201: 0.6 Pa, the first high-frequency power: 1000 W, the second high-frequency power: 500 W, the Ar flow rate: 100 ml / min, the temperature of the sample stage 205 : By applying the conditions of 60 ° C., oxide layers 1302 and 1303 of about 30 nm can be formed. By irradiating the MSQ film with inert gas (Ar) ions, Ar ions sputter C, H, and N of the MSQ film,
SiC _w H _x O _y N _z + Ar ⁺ → SiO _v (v = 1 to 2) + N ₂ ↑ + H ₂ ↑ + CO ₂ ↑ + etc ↑
It is considered that the second oxide layer is converted in the reaction process. Here, for the conversion of the MSQ film to the oxide layer, the conversion amount of the oxide layer can be adjusted to a predetermined value by controlling the second high-frequency power applied to the substrate side. The amount of oxide layer formed can also be adjusted by controlling parameters such as the processing pressure 201, the first high-frequency power, the gas type, the gas flow rate, the temperature of the sample stage, and the processing time.

  In the method using ion irradiation, incident energy of oxygen ions 1101 and nitrogen ions 1201 themselves is used as reaction energy for forming the second oxide layer, and Ar ions 1301 are formed on the second sidewall spacer 516 and the upper part of the non-silicide region. Since the sputtering effect on the MSQ film 512 is utilized, it is not necessary to apply energy such as heat from the outside, and the second oxide layer 1102, 1103 or 1202, 1203 or 1302, 1303 can be converted at a lower temperature. . Therefore, as in (1), the thermal budget is effective for a severe process. When this method is carried out, the surface of the source / drain diffusion layers 504, 505, 509, 510 of the semiconductor substrate 501 is also irradiated with oxygen ions 1101, nitrogen ions 1201, or Ar ions 1301, but the influence of damage to the semiconductor substrate is shown from the experimental results. It was judged that there was no.

In the above embodiment, oxygen gas is used as the oxygen ion gas. However, oxygen and carbon compounds (CO, CO _2, etc.), oxygen and nitrogen compounds (NO, NO ₂ , N ₂ O, N ₂ O _2). Etc.), and oxygen and hydrogen compounds (H ₂ O, H ₂ O ₂ etc.) can be used, and in addition to the nitrogen gas shown above as the nitrogen ion gas, oxygen and nitrogen compounds (NO, NO ₂ , N ₂ O, N ₂ O ₂ etc.), nitrogen and hydrogen compounds (NH ₃ , N ₂ H ₂ etc.), nitrogen and carbon compounds (C ₂ N ₂ etc.) can be used, and as an inert gas ion source The same effect can be obtained by using a gas such as He, Ne, Kr, or Xe instead of Ar.

  In particular, in the case of Ar ion / nitrogen ion irradiation, a thin resist pattern or the like exists on the semiconductor substrate other than the MSQ film above the second sidewall spacer and the non-silicide region at the time of ion irradiation, and the resist is etched. Even when oxygen ions cannot be irradiated, the second oxide layers 1302 and 1303 can be formed. At the same time, since Ar ions are inactive, a reaction layer such as an oxide layer or a nitride layer is formed in a portion exposed to ion irradiation other than the second sidewall spacer and the MSQ film above the non-silicide region. It is also very effective when this is not desirable.

  As described above, the second oxide layer formed by converting the second sidewall spacer made of the MSQ film and the coating film of the non-silicide region by the method described in the second and third embodiments of the present invention is the first oxide layer. Since the film physical properties similar to those of the oxide layer formed in the first embodiment are provided, silicon oxide formed by a normal CVD method or thermal oxidation by wet etching with a HF-containing chemical solution in the step of FIG. 9B. The semiconductor substrate material can be easily and selectively removed at a very high etching rate compared to the film. Particularly, in the oxygen ion / nitrogen ion / inert gas (Ar) ion irradiation method in (2) of the third embodiment, the second oxide layers 1102, 1103 formed by the oxygen / nitrogen / inert gas ion sputtering effect. Since many of the Si-O and Si-OH bonds of 1202, 1203, 1302, and 1303 are broken, the density is particularly small. In the process of FIG. The oxide layer thus formed can be removed more easily.

  Further, in the manufacturing process of the MOS transistor according to the second and third embodiments of the present invention, the second sidewall spacer, the silicide region and the non-silicide region are collectively formed (FIG. 7 (f)), the second sidewall spacer. Since the HF-containing chemical solution is used for both of the process of removing the coating film in the non-silicide region (FIG. 9A), ion implantation that inhibits the silicidation reaction and damage to the semiconductor substrate are caused as in the conventional case. Since the problem of occurrence can be avoided, disconnection of the silicide layer, leakage of the diffusion layer, and variation in contact resistance can be prevented. In all the embodiments described above, the method of selectively removing the second oxide layer using a chemical solution containing fluorine has been described. However, the same effect can be obtained even if selective removal using a gas containing fluorine is performed. be able to. In the first and third embodiments (2), inductively coupled plasma is used for ion generation. However, ECR (Electron Cytron Resonance) type plasma, capacitively coupled plasma, and microwave excitation type are used. Similar effects can be obtained by using plasma or ion irradiation using a known ion implantation method. In the first embodiment, the second embodiment, and the third embodiment, the silicide layer of Si and Co is described as the silicide layer. However, the same effect can be obtained in other silicide layers such as Si and Ni. Needless to say.

  A method for manufacturing a semiconductor device and a semiconductor device according to the present invention include a method for forming an element without damaging a substrate, including forming a MOS transistor having a silicide / non-silicide region without damaging the semiconductor substrate. This is useful for highly integrated semiconductor devices.

FIG. 5D is a process cross-sectional view illustrating the manufacturing method of the semiconductor device according to the first embodiment of the invention. FIG. 2 is a process cross-sectional view subsequent to FIG. 1. 1 is an apparatus schematic diagram of a plasma processing apparatus used in a first embodiment of the present invention. FIG. 6 is a process cross-sectional view illustrating a process of converting to an oxide layer with nitrogen ions according to the first embodiment of the present invention. FIG. 5 is a process cross-sectional view illustrating a process of converting to an oxide layer with Ar ions according to the first embodiment of the present invention. It is a Fourier-transform infrared absorption spectrum figure. It is process sectional drawing explaining the manufacturing method of the semiconductor device by the 2nd Embodiment of this invention. FIG. 8 is a process sectional view subsequent to FIG. 7; FIG. 8 is a process sectional view subsequent to FIG. 7; It is the apparatus schematic of the heat processing apparatus used for the 2nd Embodiment of this invention. It is process sectional drawing explaining the process converted into an oxide layer with the nitrogen gas by the 2nd Embodiment of this invention. It is process sectional drawing explaining the process converted into an oxide layer with the oxygen radical by the 3rd Embodiment of this invention. It is an apparatus schematic of the plasma processing apparatus used for the 3rd Embodiment of this invention. It is process sectional drawing explaining the process converted into an oxide layer with the nitrogen radical by the 3rd Embodiment of this invention. It is process sectional drawing explaining the process converted into an oxide layer with the oxygen ion by the 3rd Embodiment of this invention. It is process sectional drawing explaining the process converted into an oxide layer with the nitrogen ion by the 3rd Embodiment of this invention. It is process sectional drawing explaining the process converted into an oxide layer with Ar ion by the 3rd Embodiment of this invention. It is process sectional drawing for demonstrating the manufacturing method of the conventional semiconductor device.

Explanation of symbols

1,100,500 Element isolation 2,101,501 Semiconductor substrate 3,102,502 Gate insulating film 4,103,503 Gate electrode 5,6,10,11,104,105,109,110,504,505,509
510 N-type diffusion layer 7, 12, 106, 111, 506, 511 Substrate 8, 107, 507 Silicon nitride film 9, 108, 508 First sidewall spacer 13 Silicon oxide film 14, 513 Resist pattern 15, 117 , 517 Gate electrode upper part 16, 17, 118, 119, 518, 519 serving as a silicide region Source / drain diffusion layer upper part 18, 120, 520 serving as a silicide region Silicide layer 112, 512 MSQ (methyl silsesquioxane) Films 114, 514, 1101 Oxygen ions 115, 515 Oxide layers 116, 516 Second sidewall spacers 201, 601, 901 Processing chamber 202 First high frequency power source 203 Coil 204 Second high frequency power sources 301, 1201 Nitrogen ions 401, 1301 Ar ion 521 Oxygen gas 522, 523, 702, 703, 802, 803, 1002, 1003, 1102, 1103, 1202, 1203, 1302, 1303 Second oxide layer 205, 602, 905 Sample stage 603 Mass flow controller 604 Gas inlet 701 Nitrogen Gas 801 Oxygen radical 902 Gas introduction tube 903 Plasma generation chamber 904 High frequency power supply 1001 Nitrogen radical

Claims (16)

A step of forming a plurality of gate electrodes on a semiconductor substrate via a gate insulating film; a step of forming a first sidewall spacer on a side surface of the gate electrode; and the gate electrode having the first sidewall spacer. Forming a high-concentration source / drain diffusion layer, and SiC _w H _x O _y N _z (w>) so as to cover the gate electrode having the first sidewall spacer and the source / drain diffusion layer. 0, x ≧ 0, y> 0, z ≧ 0), an organic-inorganic hybrid film deposition step, a predetermined portion of the organic-inorganic hybrid film is converted into an oxide layer, and the oxide layer is selected The organic inorganic layer is formed on the side surface of the first sidewall spacer at the same time as opening predetermined portions of the gate electrode and the source / drain diffusion layer. Forming a second sidewall spacer made of a hybrid film, a method of manufacturing a semiconductor device including a step of forming a silicide layer by siliciding the opening portion of the gate electrode and the source and drain diffusion layers.   The method of manufacturing a semiconductor device according to claim 1, wherein the step of converting a predetermined portion of the organic-inorganic hybrid film into an oxide layer is performed by irradiating the organic-inorganic hybrid film with ions.   The method for manufacturing a semiconductor device according to claim 2, wherein the ions are oxygen ions, nitrogen ions, or inert gas ions.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the step of selectively removing the oxide layer is performed using a chemical solution containing fluorine.   The method for manufacturing a semiconductor device according to claim 1, wherein the step of selectively removing the oxide layer is performed using a gas containing fluorine.   2. The method of manufacturing a semiconductor device according to claim 1, comprising a step of converting at least a surface portion of the second sidewall spacer into an oxide layer and a step of selectively removing the oxide layer of the second sidewall spacer. .   The method of manufacturing a semiconductor device according to claim 6, wherein the step of converting the second sidewall spacer into an oxide layer is performed by a step of applying a thermal energy to the second sidewall spacer and irradiating a gas.   The method of manufacturing a semiconductor device according to claim 7, wherein the gas is a gas containing oxygen or nitrogen.   The method of manufacturing a semiconductor device according to claim 6, wherein the step of converting the second sidewall spacer into an oxide layer is performed by irradiating the second sidewall spacer with radical species.   The method for manufacturing a semiconductor device according to claim 9, wherein the radical species includes an oxygen radical or a nitrogen radical.   The method for manufacturing a semiconductor device according to claim 6, wherein the step of converting the second sidewall spacer into an oxide layer is performed by irradiating the second sidewall spacer with the ions.   The method of manufacturing a semiconductor device according to claim 11, wherein the ions include any one of oxygen ions, nitrogen ions, and inert gas ions.   7. The method of manufacturing a semiconductor device according to claim 6, wherein the step of selectively removing the oxide layer of the second sidewall spacer is performed using a chemical solution containing fluorine.   7. The method of manufacturing a semiconductor device according to claim 6, wherein the step of selectively removing the oxide layer of the second sidewall spacer is performed using a gas containing fluorine.   2. The method of manufacturing a semiconductor device according to claim 1, wherein a silicide layer formed on the upper surface of the source / drain diffusion layer is not grown to a lower region of the first sidewall spacer. A semiconductor substrate; a plurality of gate electrodes formed on the semiconductor substrate via a gate insulating film; a first sidewall spacer formed on a side surface of the gate electrode; and the first sidewall spacer. A high-concentration source / drain diffusion layer formed between the gate electrodes, and SiC _w H _x O _y N _z (w> 0, formed on a side surface of the first sidewall spacer in the gate electrode in a predetermined region). x ≧ 0, y> 0, z ≧ 0) formed by siliciding the second sidewall spacer made of an organic-inorganic hybrid film and the gate electrode and the source / drain diffusion layer in a predetermined region. A semiconductor device comprising a silicide layer.

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