JP2007094016A - Display drive unit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display drive unit which suppresses occurrence of afterimage of image information displayed on a display panel even in the case of occurrence of unexpected power-off to improve a display quality and suppresses application of a DC voltage to a display pixel to reduce the deterioration of liquid crystal. <P>SOLUTION: A gate driver 20A comprises; charge pump circuits 21 to 23 which generate driving voltages VDD2, VDD3, VGH, and VGL on the basis of a power source voltage VCC; a common signal driving circuit 24 which generates a common signal voltage Vcom on the basis of the driving voltage VDD3; a scan signal generation and output part 25 which generates a scan signal on the basis of the driving voltages VGH and VGL generated by the charge pump circuit 23 and a vertical synchronizing signal and successively applies the scan signal to scan lines SL; and an afterimage processing circuit 26 which detects the reduction in voltage value of the supply voltage VGL to set voltage values of the driving voltage VGL and the common signal voltage Vcom to a ground potential (0V). <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a display driving device applicable to a display device that displays desired image information on a display panel based on a power supply voltage supplied from a detachable power source such as a battery.

In recent years, in information terminals and video equipment such as personal computers and televisions, liquid crystal display devices (Liquid) have been used in place of conventional cathode ray tubes (CRT).
Crystal Display (LCD) has been widely used. Further, in a digital still camera, a mobile phone, an electronic dictionary, a portable information terminal, and other electronic devices that have been widely used in recent years, a liquid crystal display device is generally mounted as a display device for displaying image and character information. .

  In particular, in the field of portable electronic devices, display drive of desired image information is performed by a detachable device power source such as a battery. As a configuration for extending the display drive time, power consumption A liquid crystal display device to which a good image display can be performed without using a light source such as a backlight having a relatively large size is known.

  In such a reflective liquid crystal display device, when the device power supply is turned off, a driving voltage is not supplied to a driver (scanning driver, signal driver, etc.) for displaying image information on the display panel. Each display pixel is in a state where charges corresponding to the image information displayed immediately before the power is turned off are held.

  This charge changes so as to gradually converge to the ground potential by natural discharge through a wiring layer or driver disposed on the display panel, so that the image information is recognized as an afterimage that gradually disappears, The display quality is deteriorated (unsightly, etc.), and at this time, each display pixel is in a state where a DC voltage corresponding to the display state of the image information is held (DC voltage hold state). There was a problem of causing image sticking and deterioration of the liquid crystal.

  Note that in a transmissive liquid crystal display device having a backlight, the afterimage as described above is not recognized by performing control to turn off the backlight when the power is turned off, but the charge held in the display pixel is naturally Since the phenomenon of being gradually discharged by the discharge is the same, it still has the problem of causing burn-in of the display panel and deterioration of the liquid crystal.

  Therefore, as a technique for solving such a problem, for example, as described in Patent Document 1 or the like, a signal is output until a predetermined time (for example, four fields) elapses after the power switch is turned off. Auxiliary capacitor (storage capacitor) connected in parallel to the liquid crystal capacitor (pixel capacitor) that constitutes the display pixel by executing a sequence that sets the output of the driver to the high impedance state and maintains the scanning driver in the active state. The potential of the auxiliary capacitor line (common signal potential) applied to the liquid crystal capacitor is written into the liquid crystal capacitor, the potential of the signal line becomes the same as the potential of the auxiliary capacitor line, and the voltage applied to the liquid crystal constituting the liquid crystal capacitor is It becomes zero. As a result, the afterimage of the display image is erased in a relatively short time, and the state where the direct current voltage is held in the liquid crystal can be eliminated, and deterioration of the liquid crystal can be prevented while suppressing deterioration in display quality. it can.

  Further, in Patent Document 1, etc., when a power switch is turned off, a luminance gradation signal supplied to a signal driver is switched to apply a white display voltage to each display pixel, and image information displayed on a display panel is displayed. A configuration is also described in which deterioration of the liquid crystal is prevented while the deterioration of display quality is suppressed by switching to a white display screen to set the voltage applied to the liquid crystal to zero.

JP 2000-163025 A (Pages 5-7, FIG. 1, FIG. 4, FIG. 5, FIG. 7)

However, the liquid crystal display device that executes the sequence processing for erasing afterimages when the power is turned off as described above has the following problems.
That is, when the liquid crystal display device as described above is applied to a portable electronic device such as a mobile phone or a digital camera, the device power supply has a configuration including a detachable battery or the like. If an unexpected abnormal condition occurs, such as when the power supply voltage is cut off or suddenly drops due to the battery being dropped, etc., the drive voltage, control clock, and various control signals are supplied and input to the driver and peripheral circuits. Is interrupted, the sequence processing for the afterimage processing as described above is not normally performed, and the charge corresponding to the image information displayed immediately before the abnormal state (power cutoff) is displayed on the display pixel (liquid crystal capacitor ), An afterimage is recognized, resulting in a deterioration in display quality (such as unsightlyness), and a DC voltage is continuously applied to the liquid crystal of the liquid crystal capacitor. Accordingly, there is a problem that leads to seizure or deterioration of liquid crystal display panel.

  In the liquid crystal display device described above, a case where a detachable battery or the like is provided as a device power source has been described. However, in a stationary monitor such as a personal computer or a television, the power cable or the monitor cable is disconnected or a power failure occurs. There is a possibility that the same problem may occur due to the supply interruption of the power supply voltage due to the above or a sudden drop.

  Therefore, in view of the above-described problems, the present invention aims to improve display quality by suppressing the occurrence of afterimages of image information displayed on the display panel even when an unexpected power interruption occurs. Another object of the present invention is to provide a display driving device capable of suppressing the deterioration of liquid crystal by suppressing application of a DC voltage to display pixels.

  According to a first aspect of the present invention, there is provided a display driving device that performs drive control for displaying desired image information on a display panel in which a plurality of liquid crystal display pixels are two-dimensionally arranged. The display driving device includes the liquid crystal display pixels. A scan driving circuit for generating and outputting a scanning signal for setting to a selected state, and a signal driving circuit for generating and outputting a display signal voltage to be written to the liquid crystal display pixel set to a selected state based on the scanning signal And a device power supply that supplies a power supply voltage for driving the scan drive circuit and the signal drive circuit, the scan drive circuit based on the power supply voltage supplied from the device power supply at least A scan drive voltage for generating and outputting a scan signal, and a common drive voltage for driving a common signal voltage applied to a common electrode constituting the liquid crystal display pixel. Drive voltage generation means for forming, voltage change detection means for detecting a change in the power supply voltage supplied from the apparatus power supply, and based on a detection signal from the voltage change detection means, the scanning drive voltage and the common signal Specific voltage setting means for forcibly setting the voltage to a specific voltage.

According to a second aspect of the present invention, in the display driving device according to the first aspect, the driving voltage generating unit generates a signal driving voltage for generating and outputting the display signal voltage in the signal driving circuit. And the specific voltage setting means is configured to forcibly set the signal drive voltage to the specific voltage based on a detection signal from the voltage change detection means.
According to a third aspect of the present invention, in the display driving device according to the first or second aspect, the voltage change detecting means detects a decrease in the power supply voltage from a predetermined voltage level.

  According to a fourth aspect of the present invention, there is provided a display driving device that performs driving control for displaying desired image information on a display panel in which a plurality of liquid crystal display pixels are two-dimensionally arranged. The display driving device includes the liquid crystal display pixels. A scan driving circuit for generating and outputting a scanning signal for setting to a selected state, and a signal driving circuit for generating and outputting a display signal voltage to be written to the liquid crystal display pixel set to the selected state based on the scanning signal And a device power supply for supplying a power supply voltage for driving the scan drive circuit and the signal drive circuit, the scan drive circuit based on the power supply voltage supplied from the device power supply at least A scan drive voltage for generating and outputting a scan signal, and a common drive voltage for driving a common signal voltage applied to a common electrode constituting the liquid crystal display pixel, A driving voltage generating means for generating a signal driving voltage for generating and outputting the display signal voltage in the signal driving circuit; a voltage change detecting means for detecting a change in the signal driving voltage; and the voltage change detecting means. And a specific voltage setting means for forcibly setting the scan drive voltage, the common signal voltage, and the signal drive voltage to a specific voltage based on the detected signal.

According to a fifth aspect of the present invention, in the display driving device according to the fourth aspect, the driving voltage generating means switches the connection state of one or a plurality of capacitors based on a switching control signal to obtain a desired voltage. The switching control signal is generated based on a reference clock that is the basis of all control operations in the display driving device.
According to a sixth aspect of the present invention, in the display driving device according to the fourth or fifth aspect, the voltage change detecting means detects a decrease in the signal driving voltage from a predetermined voltage level.

  According to the display driving device of the present invention, in a display driving device applicable to a liquid crystal display device including an active matrix type display panel, display pixels that are two-dimensionally arranged on the display panel are set to a selected state. A scan drive circuit (gate driver) that generates and outputs a scan signal to at least a scan drive voltage for generating a scan signal based on a power supply voltage supplied from a device power supply, and a common electrode of a display pixel Drive voltage generation means comprising a charge pump circuit for generating a common drive voltage for driving the applied common signal voltage, and voltage change detection means (voltage detection circuit section) for detecting a change (decrease) in the power supply voltage And the scanning drive voltage and the common signal voltage are forcibly set to a specific voltage (ground potential: 0 V) based on the detection signal from the voltage change detection means. And a specific voltage setting means (charge discharge circuit section), the scanning drive voltage when the supply of the power supply voltage is cut off or the voltage is lowered due to the disconnection of the apparatus power supply. In addition, each of the voltage supply lines to which the common signal voltage is supplied is connected to the ground potential by the specific voltage setting means, and the scanning signal applied to each scanning line from the scanning drive circuit and each display pixel of the display panel Since the common signal voltage applied to the common electrode provided in common can be forcibly set to the ground potential (0 V), the pixel transistor of each display pixel is controlled to be semiconductive and stored in the liquid crystal capacitor. The charged charge can be discharged quickly.

  Therefore, in the state immediately before the power supply voltage is cut off (normal operation state), the image information displayed on the display panel is quickly erased, so that the occurrence of afterimages can be suppressed and display quality can be improved. In addition, since a state in which a DC voltage is continuously applied to the liquid crystal of the display pixel can be avoided, burn-in of the display panel and deterioration of the liquid crystal can be suppressed.

Hereinafter, a display driving device according to the present invention will be described in detail with reference to embodiments.
First, the overall configuration of a display device to which the display driving device according to the present invention is applied will be described.
FIG. 1 is an overall block diagram showing an example of a schematic configuration of a liquid crystal display device to which a display driving device according to the present invention is applied.

  As shown in FIG. 1, a liquid crystal display device to which a display driving device according to the present invention is applied is roughly a display panel (liquid crystal display panel) 10 in which a plurality of display pixels (liquid crystal display pixels) Px are two-dimensionally arranged. The gate driver (scanning driver; display driving device, scanning driving circuit) 20A connected to the scanning line SL arranged in the row direction of the display panel 10 and the data line arranged in the column direction of the display panel 10 A source driver (data driver; display drive device, signal drive circuit) 30A connected to the DL, and a device power supply 40 such as a battery that directly supplies the power supply voltage VCC to the gate driver 20 and the source driver 30 at least. Has been.

  Here, the display panel 10 includes a plurality of scanning lines SL and a plurality of data lines DL arranged in a direction orthogonal to each other between opposing transparent substrates (not shown), and the scanning lines SL and data lines DL. And a plurality of display pixels Px arranged in the vicinity of each intersection. Each display pixel Px includes a pixel switching thin film transistor (pixel transistor) TFT in which a current path is connected between the pixel electrode constituting the liquid crystal capacitor Clc and the data line DL, and a control terminal is connected to the scanning line SL, and a pixel electrode. And a single common electrode (common electrode) provided opposite to the pixel electrode of each display pixel Px to which the common signal voltage Vcom is applied, and liquid crystal molecules filled and held between the pixel electrode and the common electrode. A liquid crystal capacitor (pixel capacitor) Clc and an auxiliary capacitor (storage capacitor) Ccs connected in parallel to the liquid crystal capacitor Clc and applied with a predetermined voltage Vcs (for example, a common signal voltage Vcom) on the other end side are provided. It has a well-known configuration.

<First Embodiment>
Next, a gate driver and a source driver having a configuration unique to the present invention will be specifically described.
FIG. 2 is a schematic configuration diagram illustrating a first embodiment of the display driving device according to the present invention, and FIG. 3 is a configuration example of an afterimage processing circuit applied to the display driving device according to the first embodiment. FIG.

  As shown in FIG. 2, the gate driver 20A is a charge pump circuit that generates the first drive voltage VDD2 based on the power supply voltage VCC directly supplied from the device power supply 40 (for convenience of illustration, “charge pump”). 21), a charge pump circuit 22 that generates the second drive voltage VDD3, a charge pump circuit 23 that generates the third and fourth drive voltages VGH and VGL based on the second drive voltage VDD3, A common signal drive circuit (referred to as “Vcom circuit” for convenience of illustration) 24 that generates a common signal voltage Vcom to be supplied to the common electrode of the display panel 10 based on the second drive voltage VDD3, and a charge pump circuit 23 Based on the third and fourth drive voltages VGH and VGL generated by the above and the vertical synchronization signal supplied from the source driver 30A described later. A scanning signal generation output unit 25 that generates a scanning signal having a predetermined voltage level and sequentially applies the scanning signal to the scanning lines SL arranged in each row of the display panel 10, and the power supply voltage VCC supplied from the apparatus power supply 40 An afterimage processing circuit 26 that detects a value (decrease in voltage value) and sets at least the voltage values of the drive voltage VGL and the common signal voltage Vcom supplied to the scanning signal generation output unit to the ground potential (0 V). Configured.

  The charge pump circuits (drive voltage generating means) 21, 22, and 23, for example, charge and discharge electric charges by switching and controlling a changeover switch at a predetermined timing with respect to one or a plurality of capacitors. It has a known circuit configuration for generating a drive voltage having Here, an operation clock (switching control signal) for switching and controlling the switches of the charge pump circuits 21, 22, and 23 is generated based on, for example, a control clock supplied from the outside of the apparatus. The first drive voltage VDD2 is an output buffer voltage (signal drive voltage) in a signal voltage generation output unit 33 provided in a source driver 30A described later, and the second drive voltage VDD3 is in the common signal drive circuit 24. This is a voltage (common drive voltage) that defines the voltage level of the common signal voltage Vcom. The third and fourth drive voltages VGH and VGL are respectively the high level and low level of the scanning signal in the scanning signal generation output unit 25. The voltage is defined (scanning drive voltage).

The scanning signal generation output unit 25 generates a scanning signal having a predetermined voltage level (high level) based on a vertical control signal supplied from a display control circuit 31 provided in the source driver 30A described later, By sequentially applying to each scanning line SL at the timing, the display pixel Px connected to the scanning line SL is set to a selection state in which a display signal voltage corresponding to a video signal (display data) can be written.

  As shown in FIG. 3, the afterimage processing circuit 26 is roughly divided into a voltage detection circuit unit (voltage change detection means) 26a for detecting a change (decrease) in the power supply voltage VCC supplied from the apparatus power supply 40, and the voltage detection. A charge discharge circuit unit (specific voltage setting means) for setting each voltage to 0 V by connecting at least the voltage supply lines of the drive voltage VGL and the common signal voltage Vcom to the ground potential (Vgnd) based on the detection signal from the circuit unit 26a. 26b.

  Specifically, the voltage detection circuit unit 26a includes a threshold voltage (voltage drop detection voltage) set by a reference voltage source (not shown) and a detected voltage (power supply voltage VCC supplied from the device power supply 40). Is compared with the voltage divided by the drive voltage VGL generated by the charge pump circuit 23, the resistance element R provided between the output terminal of the comparator CMP and the contact N1, and the contact N1 Detected by amplifying the potential Vdet of the contact N1 to a predetermined voltage level using a CR circuit composed of a capacitive element (capacitor) C provided between the power supply voltage VCC and the drive voltage VGL as operating voltages. And a buffer circuit including a plurality of inverters IV1 and IV2 that output signals.

  That is, the output signal output from the comparator CMP is integrated by the CR circuit for preventing erroneous detection due to power supply noise, and sets the potential Vdet of the contact N1. This potential Vdet is amplified to a predetermined signal level by the buffer circuit and output as a detection signal to the charge discharge circuit section 26b in the next stage.

  Here, the threshold voltage applied to the decrease detection process (voltage comparison process) of the power supply voltage VCC in the comparator CMP is approximately ½ of the operating voltage (power supply voltage VCC−drive voltage VGL) of the comparator CMP, or The voltage level is set to about 1/2 or less. Specifically, when the operating voltage of the comparator CMP is 3V, the detection voltage is set to about 1.5V to 1V. This threshold voltage can be arbitrarily set by using, for example, a well-known potential difference generating element such as a diode forward voltage, a Zener voltage, a transistor band gap voltage, a band gap regulator, or a potential difference generating circuit as a reference voltage source. The voltage can be set to

  The charge discharge circuit unit 26b has, for example, a configuration in which a switch composed of a field effect transistor (FET) or the like is connected between a voltage supply line for the drive voltage VGL and the common signal voltage Vcom and a ground potential (Vgnd). When the detection signal output from the detection circuit unit 26a is equal to or lower than a predetermined voltage (0V or lower; low level), the switch is turned on (on operation) and the ground potential (0V) is applied to each voltage supply line. Then, the drive voltage VGL supplied to the scanning signal generation output unit 25 and the common signal voltage Vcom applied to the common electrode provided in the display panel 10 are set to the ground potential (0 V).

  As shown in FIG. 2, the source driver 30a generates a horizontal control signal and a vertical control signal based on a synchronization signal (horizontal synchronization signal, vertical synchronization signal) and a control clock (system clock) supplied from the outside of the apparatus. In addition, a display control circuit 31 that extracts a luminance gradation component from the video signal, a gamma correction circuit 32 that performs gamma correction processing on the luminance gradation component extracted by the display control circuit 31 and outputs it as display data; Based on the horizontal control signal supplied from the display control circuit 31, a display signal voltage corresponding to the display data is generated and applied to the data line DL arranged in each column of the display panel 10. And a portion 33.

  The signal voltage generation / output unit 33 applies the display signal voltage corresponding to the display data to each data line DL based on the horizontal control signal supplied from the display control circuit 31, thereby the gate driver 20A (scanning signal generation). The display signal voltage is written to each display pixel Px set to a selected state by applying a scanning signal from the output unit 25) (held in the liquid crystal capacitor). Here, the display control circuit 31 operates based on the power supply voltage VCC supplied from the apparatus power supply 40, and the gamma correction circuit 32 and the signal voltage generation output unit 33 are operated by the gate driver 20A (charge pump circuit 21) described above. It operates based on the generated drive voltage VDD2.

Next, a drive control method for a liquid crystal display device to which the display drive device having the above-described configuration is applied will be described in detail.
FIG. 4 is a timing chart illustrating an example of a drive control operation of the display drive device according to the first embodiment.

  In the drive control method in the display drive device (display device) having the above-described configuration, first, the power supply voltage VCC having a predetermined voltage value from the device power supply 40 is normally displayed in the display drive device (gate driver 20A, source driver 30A). In the normal operation state supplied to the gate driver 20A, as shown in FIG. 4, the threshold voltage set in the comparator CMP constituting the voltage detection circuit unit 26a of the afterimage processing circuit 26 provided in the gate driver 20A is higher than the threshold voltage. Since the power supply voltage VCC is higher (power supply voltage VCC> threshold voltage), a high level output signal is output from the comparator CMP, and the high level is output to the charge discharge circuit unit 26b via the CR circuit and the buffer circuit. A detection signal (> 0V) is output.

  As a result, the switch provided in the charge discharge circuit 26b maintains the non-conduction state (off state), so that the voltage supply line to which the drive voltage VGL and the common signal voltage Vcom are supplied is disconnected (cut off) from the ground potential. The drive voltage VGL having a predetermined voltage value is supplied from the charge pump circuit 23 to the scanning signal generation output unit 25 through the voltage supply line, and from the common signal drive circuit 24 through the voltage supply line. A common signal voltage Vcom having a predetermined voltage value is applied to the common electrode of the display panel 10.

  Therefore, a scanning signal having a predetermined voltage value is sequentially applied from the gate driver 20A to each scanning line SL at a predetermined timing, so that the display pixels Px in each row are set to a selected state and are common to the display pixels Px. Since the common signal voltage Vcom that is driven and controlled with a predetermined voltage value is applied to the common electrode provided, the display signal voltage corresponding to the video signal (display data) is normally written to each display pixel and displayed. Desired image information is displayed favorably on the panel 10.

  On the other hand, for example, when an abnormal state occurs such as when the apparatus power supply 40 is dropped, the power supply voltage VCC supplied from the apparatus power supply 40 is cut off or rapidly decreased as shown in FIG. When starting, the voltage value of the output signal (potential Vdet of the contact point N1) output from the comparator CMP that constitutes the voltage detection circuit unit 26a of the afterimage processing circuit 26 also decreases as the voltage value of the power supply voltage VCC decreases. When the threshold voltage set in the comparator CMP is equal to the power supply voltage VCC (power supply voltage VCC≈threshold voltage), no differential voltage is detected by the comparator CMP and an output signal of 0V is output. Further, when the power supply voltage VCC becomes lower than the threshold voltage (power supply voltage VCC <threshold voltage), a low level (<0 V) output signal (see the potential Vdet of the contact N1) is output from the comparator CMP. Is output.

  As a result, a low-level detection signal is output to the charge discharge circuit unit 26b via the CR circuit and the buffer circuit, whereby the switch provided in the charge discharge circuit 26b is switched to a conductive state (on state), and the drive voltage The voltage supply line to which VGL and the common signal voltage Vcom are supplied is connected to the ground potential (0 V), and the ground potential (0 V) is applied to each voltage supply line, so that it is applied to the scanning signal generation output unit 25. The drive voltage VGL changes so as to converge to the ground potential, and the common signal voltage Vcom applied to the common electrode also changes so as to converge to the ground potential.

  When the drive voltage VGL reaches the ground potential, the power supply voltage VCC and the drive voltage VGL, which are the operating voltages of the buffer circuits (inverters IV1, IV2) constituting the voltage detection circuit unit 26a, both become the ground potential. The circuit stops operating, and no detection signal is output to the charge discharge circuit section 26b (a 0V output signal is output).

As described above, the drive voltage VGL and the common signal voltage Vcom supplied to the scan signal generation output unit 25 and the common electrode are set to the ground potential (0 V), so that the scan signal applied to each scan line SL, and Since all the voltages applied to the common electrode provided in common to each display pixel Px are set to 0 V, the pixel transistor TFT of each display pixel Px is set to a semi-conducting state in which it is half-on and its impedance is set. (About 10 ⁹ Ω) is reduced, and the charge accumulated in the liquid crystal capacitance of each display pixel Px is quickly discharged (withdrawn), so that the image information that has been displayed on the display panel until then is displayed. It is erased quickly (display disappears).

  Therefore, even if the power supply voltage is unexpectedly interrupted due to the device power supply (battery) dropping, etc., the charge held in the display pixels can be quickly discharged to eliminate the afterimage and improve the display quality. In addition, it is possible to avoid a state in which a DC voltage is continuously applied to the liquid crystal of the display pixel, and to suppress burn-in of the display panel and deterioration of the liquid crystal.

  In the above-described drive control method for the display drive device, the power supply voltage VCC is abruptly lowered due to the drop of the device power supply 40, etc., so that the source driver 30A operating based on the power supply voltage VCC is supplied to each data line DL. When the output display signal voltage also decreases and changes so as to finally converge to the ground potential (0 V), similar to the scanning signal and common signal voltage Vcom described above, a decrease in the power supply voltage VCC is detected. For example, in the afterimage processing circuit 26 shown in FIGS. 2 and 3, the output of the source driver 30A (that is, the display signal voltage applied to the data line DL) is directly converged to the ground potential (0 V). In the provided charge discharge circuit unit 26b, the low level detection from the voltage detection circuit unit 26a is performed in the same manner as the drive voltage VGL and the common signal voltage Vcom. Based on the signal, the voltage supply line of the drive voltage VDD2 supplied from the charge pump circuit 21 to the source driver 30A (signal voltage generation output unit 33, gamma correction circuit 32, etc.) is connected to the ground potential via a switch. (The route is indicated by a dotted line in the figure).

<Second Embodiment>
Next, a second embodiment of the display driving device according to the present invention will be described.
FIG. 5 is a schematic configuration diagram showing a second embodiment of the display driving apparatus according to the present invention, and FIG. 6 is a configuration example of an afterimage processing circuit applied to the display driving apparatus according to the second embodiment. FIG. Here, about the structure equivalent to 1st Embodiment mentioned above, the same code | symbol is attached | subjected, the description is simplified, and the characteristic structure to this embodiment is demonstrated in detail.

  In the first embodiment described above, the case where the change of the power supply voltage VCC directly supplied from the device power supply 40 is directly detected has been described. However, in the present embodiment, the source driver 30A is generated by the charge pump circuit 21. By detecting the change in the drive voltage VDD2 supplied to the control device, the control clock supply state from the outside of the apparatus is indirectly detected.

  As shown in FIG. 5, the display driving apparatus according to the present embodiment has a configuration including a gate driver 20A and a source driver 30A equivalent to those of the first embodiment described above, and is particularly provided in the gate driver 20A. The detected voltage supplied to the afterimage processing circuit 26 is not the power supply voltage VCC from the apparatus power supply 40 shown in the first embodiment but the drive voltage VDD2 generated by the charge pump circuit 21. Yes.

  Specifically, as shown in FIG. 6, the afterimage processing circuit 26 is a voltage detection circuit section (voltage change detection means) 26c that detects a change in the drive voltage (signal drive voltage) VDD2 supplied from the charge pump circuit 21. Based on the detection signal from the voltage detection circuit unit 26c, the voltage supply lines of the drive voltages VGL, VDD2, and the common signal voltage Vcom are connected to the ground potential, and the voltage value is set to the ground potential (0V). Charge discharge circuit section (specific voltage setting means) 26d.

  As in the first embodiment described above, the voltage detection circuit unit 26c includes a threshold voltage (voltage drop detection voltage) set by a predetermined reference voltage source (not shown) and a drive voltage that is a detected voltage. Comparator CMP that compares a voltage obtained by dividing VDD2 with drive voltage VGL generated by charge pump circuit 23, a resistance element R provided between an output terminal of comparator CMP and contact N2, and a contact A CR circuit composed of a capacitive element (capacitor) C provided between N2 and the ground potential (Vgnd), the power supply voltage VCC and the drive voltage VGL as operating voltages, and the potential Vdet of the contact N2 is amplified to a predetermined voltage level. And a buffer circuit including a plurality of inverters IV1 and IV2 that output as detection signals.

  Here, the drive voltage VDD2 as the detected voltage is generated by, for example, boosting the power supply voltage VCC by the charge pump circuit 21. As is well known, the charge pump circuit determines the connection state of one or a plurality of capacitors, Since it is configured to generate an arbitrary voltage by performing switching control based on a predetermined switching control clock (switching control signal), the decrease in the drive voltage VDD2 detected by the comparator CMP is the above-described first. Similar to the embodiment, it means a state where the operation of the charge pump circuit 21 is stopped and the drive voltage VDD2 is not output (output stop state) in addition to the case where the power supply voltage VCC is lowered. This means that the supply of the switching control clock is stopped.

  The switching control clock for controlling the operation of the charge pump circuit 21 is specifically the horizontal synchronization signal itself, or the operation clock in each driver generated in the display control circuit 31 based on the synchronization signal and the control clock. A frequency-divided signal or a signal having a half period of the horizontal synchronizing signal generated based on the horizontal synchronizing signal and the operation clock in the driver, etc., and supplied from the outside of the apparatus in the display control circuit 31 of the source driver 30A. Are generated based on the synchronization signal and the control clock (reference clock) and supplied as the vertical control signal. Therefore, the supply stop of the switching control clock to the charge pump circuit 21 described above indirectly means the supply stop of the control clock to the source driver 30A (display control circuit 31).

  When the detection signal (or the potential Vdet of the contact N2) output from the voltage detection circuit unit 26c becomes equal to or lower than a predetermined voltage (0 V or lower; low level), the charge discharge circuit unit 26d drives the drive voltages VGL, VDD2, and the common signal. Each voltage supply line to which the voltage Vcom is supplied is connected to the ground potential (0 V) and supplied to the drive voltage VGL supplied to the scanning signal generation output unit 25 and the source driver 30A (signal voltage generation output unit 33). The drive voltage VDD2 and the common signal voltage Vcom applied to the common electrode are set to the ground potential (0 V).

  In the liquid crystal display device to which the display driving device having such a configuration is applied, when the device power supply 40 is dropped and the supply of the power supply voltage VCC is stopped or suddenly drops, or the source driver 30A is externally supplied. When the supply of the control clock to the (display control circuit 31) is stopped, the power supply voltage VCC and the voltage value of the drive voltage VDD2 generated in the charge pump circuit 21 provided in the gate driver 20A are reduced. The detection signal output from the voltage detection circuit unit 26c of the afterimage processing circuit 26 to the charge discharge circuit unit 26d is set to a low level.

  As a result, the switch provided in the charge discharge circuit 26b is switched to the conductive state (ON state), and the voltage supply line to which the drive voltages VGL, VDD2 and the common signal voltage Vcom are supplied is connected to the ground potential (0V). Since the ground potential (0 V) is applied to each voltage supply line, the drive voltages VGL, VDD2, and the common signal voltage Vcom change so as to converge to the ground potential.

  As described above, the scanning voltage generation output unit 25, the signal voltage generation output unit 33, the drive voltages VGL and VDD2 supplied to the common electrode, and the common signal voltage Vcom are set to the ground potential (0 V), so that each scanning line is set. The scanning signal applied to SL, the display signal voltage applied to each data line DL, and the voltage applied to the common electrode provided in common to each display pixel Px are all set to 0V, and the above-mentioned first As in the first embodiment, the pixel transistor TFT of each display pixel Px is set to a semiconductive state, and 0 V is applied to all the data lines DL, so that it is stored in the liquid crystal capacitance of each display pixel Px. The charge that has been discharged is quickly discharged (withdrawn), and the image information that has been displayed on the display panel until then is quickly deleted (display disappears).

  Therefore, not only when the power supply voltage supply is cut off due to the device power supply (battery) dropping, but also when an unexpected abnormal state such as the control clock supply cutoff occurs, it is held in the display pixel. It is possible to improve the display quality by quickly discharging the charge and eliminating the afterimage, and avoiding the state in which the DC voltage is continuously applied to the liquid crystal of the display pixel to prevent the display panel from burning or deterioration of the liquid crystal Can be suppressed.

Next, another configuration example of the liquid crystal display device to which the display driving device according to the present invention is applied will be described.
FIG. 7 is an overall block diagram showing another example of a schematic configuration of a liquid crystal display device to which the display driving device according to the present invention is applied. Here, the description of the same configuration as the liquid crystal display device shown in FIG. 1 is omitted.

  In each of the above-described embodiments, as shown in FIG. 1, the power supply voltage VCC from the device power supply 40 is directly supplied to the gate driver 20A and the source driver 30A, and the video signal from the outside of the device is synchronized. A signal (horizontal synchronization signal, vertical synchronization signal) and a control clock (system clock) are supplied to the source driver 30A. A vertical control signal is generated in the source driver 30A and supplied to the gate driver 20A. Furthermore, although the case where the common signal voltage Vcom is generated in the gate driver 20A and supplied to the common electrode of the display panel 10 has been described, the present invention is not limited to this.

  That is, as a liquid crystal display device to which the display driving device according to the present invention is applied, for example, as shown in FIG. 7, a gate driver 20B that sequentially scans the display pixels Px in each row of the liquid crystal display panel 110 and sets them in a selected state. In addition to the source driver 30B that outputs the display signal voltage based on the video signal to the display pixels Px in the row set to the selected state, the device power supply 40 that supplies the power supply voltage VCC to at least the gate driver 20B and the source driver 30B, a display to be described later Based on various timing signals supplied from the signal generation circuit 60, control signals (horizontal control signal, vertical control signal, etc.) for controlling each operation timing in the gate driver 20B and the source driver 30B, and a common signal voltage Vcom LCD controller 50 that generates and outputs the brightness gradation from the video signal A display signal generation circuit 60 that extracts the minutes and supplies them as display data to the source driver 30B, and generates various timing signals (synchronization signals, control clocks) and supplies them to the LCD controller 50. It may be.

  Here, the gate driver 20B has a configuration including the charge pump circuit units 21 to 23, the display signal generation output unit 25, and the afterimage processing circuit 26 in FIG. 1, and the source driver 30B has a signal voltage generation output in FIG. The LCD controller 50 has a configuration corresponding to the common signal drive circuit 24 and the display control circuit 31 in FIG. 1, and the display signal generation circuit 60 has the configuration including the unit 33. And a configuration corresponding to the gamma correction circuit 32.

  Further, the drive voltages VDD2 and VDD3 generated by at least the charge pump circuit units 21 to 23 provided in the gate driver 20B are supplied to the source driver 30B and the LCD controller 50, respectively. The LCD controller 50 is supplied with a power supply voltage VCC from the apparatus power supply 40.

  Also in this case, similarly to the above-described embodiments, the gate driver 20B includes the charge pump circuits 21 to 23 and the afterimage processing circuit 26, and is generated by the power supply voltage VCC supplied from the apparatus power supply 40 or the charge pump circuit 21. The drive voltage VGL supplied to the scanning signal generation output unit, the common signal voltage Vcom applied to the common electrode of the display panel 10, and the drive voltage supplied to the source driver 30B are detected. By applying the ground potential (0V) to VDD2, the charge held in the display pixel Px can be discharged quickly, so that the image information that has been displayed on the display panel until then can be quickly erased to improve the display quality. The display panel can be improved and the display panel can be baked due to continuous application of a DC voltage to the liquid crystal of the display pixel. It is possible to suppress the attached or deterioration of the liquid crystal.

  In addition, the gate driver 20B includes at least the charge pump circuits 21 to 23, the scanning signal generation output unit 25, and the afterimage processing circuit 26, so that the source driver 20B, the LCD controller 50, and the display signal generation circuit 60 are provided. Since existing driver chips and circuit configurations can be applied as they are, an increase in product cost can be suppressed.

  In each of the above-described embodiments, when a drop in the power supply voltage VCC or the drive voltage VDD2 is detected, the drive voltage VGL, the common signal voltage Vcom, or the source driver (signal voltage (signal voltage) supplied to the scanning signal generation output unit is detected. Although only the case where the drive voltage VDD2 supplied to the generation output unit) is set to the ground potential (0 V) is shown, the present invention is not limited to this and is held in the liquid crystal capacitance of each display pixel. Any other voltage value may be used as long as it is a specific voltage capable of quickly discharging charges.

  When a drop in the power supply voltage VCC or the drive voltage VDD2 is detected, the voltage supply line to which the drive voltages VGL, VDD2, and the common signal voltage Vcom are supplied is connected to the ground potential (0 V) and set to the ground potential. However, the present invention is not limited to this, and the charge held in the liquid crystal capacitance of each display pixel can be quickly discharged to at least one of the scan line, the common electrode, and the data line. As long as an arbitrary voltage can be applied, a specific voltage (ground potential, etc.) may be applied to other voltage supply lines, or other voltage application methods may be applied. There may be.

It is a whole block diagram which shows an example of schematic structure of the liquid crystal display device to which the display drive device which concerns on this invention is applied. 1 is a schematic configuration diagram showing a first embodiment of a display driving device according to the present invention. It is a schematic circuit diagram which shows the example of 1 structure of the afterimage processing circuit applied to the display drive device which concerns on 1st Embodiment. 5 is a timing chart illustrating an example of a drive control operation of the display drive device according to the first embodiment. It is a schematic block diagram which shows 2nd Embodiment of the display drive device which concerns on this invention. It is a schematic circuit diagram which shows one structural example of the afterimage processing circuit applied to the display drive device which concerns on 2nd Embodiment. It is a whole block diagram which shows the other example of schematic structure of the liquid crystal display device to which the display drive device which concerns on this invention is applied.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Display panel 20A, 20B Gate driver 21-23 Charge pump circuit 24 Common signal drive circuit 25 Scan signal generation output part 26 Afterimage processing circuit 26a, 26c Voltage detection circuit part 26b, 26d Charge discharge circuit part 30A, 30B Source driver 31 Display Control circuit 32 Gamma correction circuit 33 Signal voltage generation output unit 40 Device power supply

Claims (6)

In a display drive device that performs drive control to display desired image information on a display panel in which a plurality of liquid crystal display pixels are two-dimensionally arranged,
The display driving device includes:
A scan drive circuit for generating and outputting a scan signal for setting the liquid crystal display pixel to a selected state;
A signal driving circuit that generates and outputs a display signal voltage to be written to the liquid crystal display pixels set in a selected state based on the scanning signal;
An apparatus power supply for supplying a power supply voltage for driving the scan driving circuit and the signal driving circuit;
With
The scan driving circuit includes:
Based on the power supply voltage supplied from the device power supply, at least a scan drive voltage for generating and outputting the scan signal and a common signal voltage applied to a common electrode constituting the liquid crystal display pixel are driven. Drive voltage generating means for generating a common drive voltage for
Voltage change detection means for detecting a change in the power supply voltage supplied from the apparatus power supply;
Specific voltage setting means for forcibly setting the scan drive voltage and the common signal voltage to a specific voltage based on a detection signal from the voltage change detection means;
A display driving device comprising: The drive voltage generation means has a configuration for generating a signal drive voltage for generating and outputting the display signal voltage in the signal drive circuit,
The said specific voltage setting means has the structure which sets the said signal drive voltage to the said specific voltage compulsorily based on the detection signal from the said voltage change detection means. Display drive device. 3. The display driving device according to claim 1, wherein the voltage change detecting unit detects a decrease in the power supply voltage from a predetermined voltage level. In a display drive device that performs drive control to display desired image information on a display panel in which a plurality of liquid crystal display pixels are two-dimensionally arranged,
The display driving device includes:
A scan drive circuit for generating and outputting a scan signal for setting the liquid crystal display pixel to a selected state;
A signal driving circuit that generates and outputs a display signal voltage to be written to the liquid crystal display pixels set in a selected state based on the scanning signal;
An apparatus power supply for supplying a power supply voltage for driving the scan driving circuit and the signal driving circuit;
With
The scan driving circuit includes:
Based on the power supply voltage supplied from the device power supply, at least a scan drive voltage for generating and outputting the scan signal and a common signal voltage applied to a common electrode constituting the liquid crystal display pixel are driven. Drive voltage generation means for generating a common drive voltage for generating the signal drive voltage for generating and outputting the display signal voltage in the signal drive circuit;
Voltage change detecting means for detecting a change in the signal drive voltage;
Specific voltage setting means for forcibly setting the scanning drive voltage, the common signal voltage, and the signal drive voltage to a specific voltage based on a detection signal from the voltage change detection means;
A display driving device comprising: The drive voltage generating means is constituted by a charge pump circuit that generates a desired voltage by switching control of a connection state of one or a plurality of capacitors based on a switching control signal,
5. The display driving device according to claim 4, wherein the switching control signal is generated based on a reference clock that is a basis of all control operations in the display driving device. 6. The display driving device according to claim 4, wherein the voltage change detecting unit detects a decrease in the signal driving voltage from a predetermined voltage level.

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