JP2007073856A - Formation method of conductive pattern, manufacturing method of semiconductor device, and manufacturing method of organic electroluminescent element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method capable of using a coating technique, securing surface flatness, and forming a thinned conductive pattern. <P>SOLUTION: A substrate 1 is coated with a paste material in which a metal fine particle (s) is dispersed into a solvent to coat and film-form a paste material film 3. The paste material film 3 is baked as a conductive material film 5. By patterning the conductive material film 5, a conductive pattern 5a is formed. Then, with the conductive pattern 5a as a gate electrode, a gate insulating film is formed while covering the conductive pattern 5a, and source/drain electrodes are formed at the upper portion. Then, a semiconductor thin film is formed on the gate insulating film between the source/drain electrodes. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method for forming a conductive pattern, a method for manufacturing a semiconductor device, and a method for manufacturing an organic electroluminescent element, and in particular, a method for forming a fine conductive pattern with good accuracy by applying a coating technique, and this formation. The present invention relates to a method for manufacturing a semiconductor device to which the method is applied and a method for manufacturing an organic electroluminescent element.

  Thin film transistors are widely used as pixel transistors in electronic circuits, particularly in active matrix flat panel displays.

  Currently, most thin film transistors are Si-based inorganic semiconductor transistors using amorphous silicon or polycrystalline silicon as a semiconductor layer (active layer). These manufacturing methods use a film forming method that requires a vacuum processing apparatus such as a chemical vapor deposition (CVD) method for forming a semiconductor layer, and thus the process cost is high.

  On the other hand, in an organic thin film transistor using an organic semiconductor, a semiconductor thin film serving as a channel layer can be formed by coating without using a vacuum processing apparatus. For this reason, it is advantageous for cost reduction. Further, the cost can be further reduced by using the coating material not only for the channel layer but also for the gate insulating film, the source / drain electrodes, and the gate electrode.

  FIG. 4 is a cross-sectional view showing a configuration example of an organic thin film transistor. The organic thin film transistor 100 shown in this figure is a bottom gate type. For example, a gate electrode 102 is patterned on a glass substrate 101, and a gate insulating film 103 is provided so as to cover the gate electrode 102. A source / drain electrode 104 is formed in a pattern on the gate insulating film 103 so as to sandwich the gate electrode 102. An organic semiconductor thin film 105 made of, for example, pentacene is provided on at least the gate insulating film 103 sandwiched between the source / drain electrodes 104 (see, for example, Non-Patent Document 1 below). When the organic thin film transistor 100 having such a configuration is manufactured, the organic thin film transistor 100 is formed in order from the components on the glass substrate 101 side.

  In the manufacturing of the organic thin film transistor as described above, when forming a pattern using a coating material for forming the gate electrode 102 and the source / drain electrode 104, an inkjet printing method or a screen printing method is performed (for example, See Patent Document 1 below).

IEEE TRANSACTIONS ON ELECTRON DEVICES, June 6, 1999, VOL.46, NO.6, p.1258-1263 (especially Fig1.) JP-A-2004-88090 (particularly paragraphs 78 and 80)

  However, when the printing method described above is applied to the formation of a conductive pattern, there are the following problems.

  That is, in the case of the screen printing method, the printed film thickness is several μm. For this reason, in the configuration shown in FIG. 4, when the gate electrode 102 is patterned by applying the screen printing method, the thickness of the gate electrode 102 becomes several μm. On the other hand, the gate insulating film 103 provided so as to cover the gate electrode 102 is only about 500 nm. For this reason, in the side wall step portion A of the thick gate electrode 102, the gate insulating film 103 is likely to be disconnected, causing a short circuit between the source / drain electrode 104 formed on the gate electrode 102 and the gate electrode 102. . The minimum line width that can be formed by the screen printing method is about 50 μm, and there is a limit to the formation of a fine pattern.

  On the other hand, the ink jet printing method is a printing method in which droplets having a particle diameter of several μm are applied by spraying onto a predetermined portion of the substrate surface. Therefore, as shown in FIG. 5, the gate electrode 102 formed by the inkjet printing method is composed of a plurality of sprayed droplets m, and the surface flatness is low. Therefore, since the surface of the gate insulating film 103 covering the gate electrode 102 is also affected by the surface state of the gate electrode 102, it is difficult to obtain sufficient flatness. Here, the device performance of the organic thin film transistor as described above greatly depends on the film formation state of the organic semiconductor thin film 105 in the channel formation region B, and it is important that the base interface of the organic semiconductor thin film 105 is kept flat. is there. Therefore, as described above, when the flatness of the surface of the gate insulating film 103 above the gate electrode 102 is not sufficient, it is difficult to form the organic semiconductor thin film 105 in a favorable film formation state. This becomes a factor of deteriorating the device performance of the organic thin film transistor.

  Therefore, the present invention provides a method capable of forming a thin conductive pattern while ensuring surface flatness while using a coating technique, and using the coating technique by applying this forming method. Another object of the present invention is to provide a method of manufacturing a semiconductor device and a method of manufacturing an organic electroluminescent element capable of improving device characteristics.

  The conductive pattern forming method of the present invention for achieving such an object is characterized in that it is carried out by the following procedure. First, a paste material in which metal fine particles are dispersed in a solvent is applied onto a substrate to form a paste material film. Next, the paste material film is baked to form a conductive material film. Thereafter, the conductive material film is patterned to form a conductive pattern.

  In such a forming method, after a paste material film is formed on a flat surface by coating film formation, the paste material film is solidified by baking treatment to form a conductive material film. As a result, a conductive material film that maintains the surface flatness obtained by coating is formed. Therefore, the conductive pattern obtained by patterning this conductive material film is formed with surface flatness. Further, since the film thickness of the paste material film is adjusted by the viscosity of the paste material to be applied, the formation of the paste material film thinned to some extent can suppress the increase in thickness of the conductive pattern.

  The present invention is also a method for manufacturing a semiconductor device to which the conductive pattern forming method described above is applied. After forming the lower electrode by this forming method, an insulating film is formed so as to cover the lower electrode, and further on the insulating film. An upper electrode is formed on the substrate. Here, for example, the lower electrode is formed as a gate electrode or a source / drain electrode. The insulating film is formed as a gate insulating film.

  According to such a method for manufacturing a semiconductor device, by applying the conductive pattern forming method of the present invention described above to the formation of the lower electrode, the insulating film is formed so as to cover the lower electrode that is flat and thin on the surface. Will be formed. For this reason, the insulating film is formed on the substrate in which the step due to the lower electrode is suppressed to a small level without causing a step break on the side wall of the lower electrode. Thereby, insulation between the lower electrode and the upper electrode formed through this insulating film is ensured. As the insulating film, an insulating film having a flat surface that inherits the surface shape of the underlying lower electrode is formed. For this reason, the semiconductor thin film formed on the lower electrode through the insulating film is formed on the insulating film having a flat surface with good film quality.

  Furthermore, the present invention relates to a method for manufacturing an organic electroluminescent element in which an organic layer having at least a light emitting layer is sandwiched between a lower electrode and an upper electrode, and the method for forming a conductive pattern described above is applied. Thus, the lower electrode is formed.

  According to such a method for manufacturing an organic electroluminescent element, by applying the conductive pattern forming method of the present invention described above to the formation of the lower electrode, the organic layer is interposed on the lower electrode formed flat on the surface. Thus, the upper electrode is formed. For this reason, the organic electroluminescent element by which the space | interval of an upper electrode-lower electrode, ie, the film thickness of an organic layer, was equalized with high precision is obtained.

  As described above, according to the method for forming a conductive pattern of the present invention, it is possible to obtain a conductive pattern having a flat surface and a reduced thickness while using a coating technique that is expected to reduce costs. Become.

  According to the method for manufacturing a semiconductor device of the present invention, the lower electrode is formed by applying such a conductive pattern formation method, so that the lower electrode and the upper electrode arranged with the insulating film interposed therebetween are formed. It is possible to ensure the insulation between them and to form a semiconductor thin film with good film quality on this insulating film, so that a semiconductor device with good characteristics can be obtained.

  Furthermore, according to the method for manufacturing an organic electroluminescent element of the present invention, the lower electrode is formed by applying such a method for forming a conductive pattern, whereby the distance between the lower electrode and the upper electrode, that is, the thickness of the organic layer. Can be made uniform with high accuracy, so that an organic electroluminescent element having good light emitting characteristics can be obtained.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

<Method for forming conductive pattern>
FIG. 1 is a cross-sectional process diagram illustrating an example of a method for forming a conductive pattern to which the present invention is applied. Here, an embodiment of a method for forming a conductive pattern will be described with reference to FIG.

  First, as shown in FIG. 1 (1), a paste material film 3 formed by applying a paste material in which metal fine particles s are dispersed is formed on a substrate 1 by coating.

  The substrate 1 may be an insulating substrate such as a glass substrate, a silicon oxide substrate, a sapphire substrate, a plastic film such as polyethersulfone (PES) or polyethylene naphthalate (PEN).

  In addition, as a paste material constituting the paste material film 3, the metal fine particles s are dispersed by using a binder such as a resin, an adhesive, an organic solvent, and the like, and a silver paste, a gold paste, Copper paste, nickel paste, etc. are used. In such a paste material, the viscosity is adjusted so that the paste material film 3 is applied and formed with a film thickness w that matches the film thickness of the target conductive pattern. Specifically, the viscosity of the paste material is set in the range of kinematic viscosity 5 to 50 cst and viscosity 1 to 100 cP. In addition, the paste material is adjusted so that the conductivity after firing the paste material film 3 formed by coating as described later is in the range of 1 to 100 μΩcm. As an example of such a paste material, a silver nano paste [manufactured by Fujikura Kasei Co., Ltd .: XA-9069 (trade name)] is used.

  Then, the paste material is applied onto the substrate 1 by a method appropriately selected from application methods such as a spin coating method, a cap coating method, a spray coating method, and a screen printing method. Here, for example, the paste material film 3 having a film thickness w of 70 nm is applied by spin coating.

  Next, as shown in FIG. 1 (2), the paste material film (3) is fired to form a conductive material film 5. Here, the paste material to be used is subjected to a firing process at a temperature and time at which it is sufficiently fired. When the exemplified silver nanopaste is used, for example, a firing process for 60 minutes on a heating plate at 150 ° C. To do. By such a baking treatment, the resin, adhesive, organic solvent, etc. in the paste material film (3) are removed, and the conductive material film 5 in which the metal fine particles s are bonded and solidified is obtained.

  Thereafter, as shown in FIG. 1 (3), a mask pattern 7 is formed on the conductive material film 5 by transferring the conductive pattern formed here. The mask pattern 7 may be a resist pattern formed by applying a lithography technique, or may be a pattern formed by applying a printing technique such as inkjet printing, screen printing, or stamp printing. However, when it is necessary to form the fine resist pattern 7 with high accuracy, it is preferable to apply a lithography technique.

  Next, as shown in FIG. 1 (4), the conductive material film 5 is patterned by selective wet etching or dry etching etching of the conductive material film 5 from above the mask pattern 7. Thereby, the conductive pattern 5a formed by patterning the conductive material film 5 is formed.

  After the above, as shown in FIG. 1 (5), the mask pattern 7 remaining on the conductive pattern 5a is removed. Here, a remover is used in which only the mask pattern 7 is selectively removed from the substrate 1 and the conductive pattern 5a.

  As described above, according to the method for forming a conductive pattern described with reference to FIG. 1, after the paste material film 3 is formed on the surface flat by coating film formation, the paste material film 3 is solidified by baking treatment to be conductive. The conductive material film 5 is used. As a result, the conductive material film 5 having a small roughness and maintaining the surface flatness obtained by the coating film formation is formed.

  Therefore, the conductive pattern 5a obtained by patterning the conductive material film 5 is formed with surface flatness. Further, since the film thickness w of the paste material film 3 is adjusted by the viscosity of the paste material used for coating film formation, it is possible to form the paste material film 3 and the conductive material film 5 that are thinned to some extent. Thus, the thickening of the conductive pattern 5a is suppressed.

  As a result, it is possible to obtain a conductive pattern 5a that is flat and thin by applying a low-cost coating technique. Further, by obtaining such a conductive pattern 5a, step disconnection at the step side wall portion of the insulating film formed so as to cover the conductive pattern 5a is prevented, and the upper layer formed on the insulating film is prevented. It is possible to ensure insulation from the conductive pattern. Further, since the conductive pattern 5a is flat, the surface flatness of the insulating film on the conductive pattern 5a is also ensured. For this reason, for example, when a semiconductor thin film is formed on this insulating film, its growth is not hindered, and it is possible to form a semiconductor thin film with good film quality.

  Further, by patterning the conductive material film 5 using a mask pattern formed by applying a lithography technique, it is possible to form the fine conductive pattern 5a with good positional accuracy.

<Method for Manufacturing Semiconductor Device>
FIG. 2 is a cross-sectional process diagram illustrating a part of a method of manufacturing a semiconductor device to which the present invention is applied. The method for manufacturing a semiconductor device described in this embodiment is a method for manufacturing a bottom gate type thin film transistor using an organic semiconductor thin film as a channel layer, and includes the method for forming a conductive pattern described with reference to FIG. The following procedure shown in FIG. 2 is performed continuously.

  That is, first, as shown in FIG. 2A, the gate electrode 5a is formed on the substrate 1 as the lower electrode in accordance with the conductive pattern forming method described above. The gate electrode 5a is the conductive pattern described with reference to FIG. 1, and is formed with a flat surface and a thin film thickness according to the above-described formation method.

Next, as shown in FIG. 2B, a gate insulating film 11 is formed on the substrate 1 so as to cover the gate electrode 5a. The gate insulating film 11 is made of an organic insulating material such as polyvinyl phenol, polymethyl methacrylate, polystyrene, polymethyl styrene, silicon oxide (SiO ₂ ), silicon nitride (SiN), aluminum oxide (Al ₂ O ₃ ), hafnium oxide ( Any insulating material such as an inorganic insulating material such as HfO ₂ ) or a composite insulating material of an organic material and an inorganic material may be used. In addition to the spin coating method, the gate insulating film 11 may be formed using a printing technique such as a cap coating method, stamp printing, ink jet printing, or screen printing. Depending on the selected material, a vacuum deposition method, a sputtering method, a CVD method, or the like may be used. However, in consideration of cost reduction of the process, it is preferable to apply a spin coating method or a printing technique.

  Next, as shown in FIG. 2 (3), a source / drain electrode 13 is formed as an upper electrode at a position sandwiching the lower gate electrode 5 a on the gate insulating film 11. These source / drain electrodes 13 are made of metal materials such as gold (Au), titanium (Ti), silver (Ag), metal dispersion materials such as silver paste, poly (3,4-ethylenedioxythiophene) / poly ( It is formed using a conductive polymer such as 4-styrenesulfonate (PEDOT / PSS) or polyaniline.

  The source / drain electrode 13 may be formed by applying the conductive pattern forming method described with reference to FIG. 1, similarly to the formation of the gate electrode 5a. Furthermore, it is preferable to form the source / drain electrodes 13 by applying the above-described printing technique and performing pattern formation simultaneously with film formation from the viewpoint of cost reduction of the process.

  In addition, the source / drain electrode 13 is formed by lift-off in which a resist pattern is formed, a subsequent electrode material film is formed, and an electrode material film is partially removed by removing the resist pattern. It may be done by law. Further, it may be performed by forming an electrode material film, forming a resist pattern thereafter, and pattern etching of the electrode material film using the resist pattern as a mask. In these forming methods, the electrode material film is formed by a film forming method using a spin coating method or a printing technique, a vacuum evaporation method, a sputtering method, a CVD method, or the like depending on a selected material. The formation of the resist pattern is not limited to a normal lithography method, and electron beam lithography may be applied.

  After the above, a semiconductor thin film 15 is formed at a position between the source / drain electrodes 13 as shown in FIG. The semiconductor thin film 15 is configured using a high molecular organic semiconductor material such as poly-3-hexylthiophene (P3HT) or a low molecular organic semiconductor material such as pentacene, anthracene, phthalocyanine, or porphyrin. For the formation of such a semiconductor thin film 15, it is preferable from the viewpoint of cost reduction of the process that the above-described printing technique is applied and pattern formation is performed simultaneously with film formation.

  In addition to this, the semiconductor thin film 15 is formed by a lift-off method in which a resist pattern is formed, a subsequent electrode material film is formed, and an electrode material film is partially removed by removing the resist pattern. May be. Further, it may be performed by forming an electrode material film, forming a resist pattern thereafter, and pattern etching of the electrode material film using the resist pattern as a mask. In these forming methods, the electrode material film is formed by a film forming method using a spin coating method or a printing technique, a vacuum evaporation method, a sputtering method, a CVD method, or the like depending on a selected material. The formation of the resist pattern is not limited to a normal lithography method, and electron beam lithography may be applied.

  Note that the source / drain electrode 13 forming step described with reference to FIG. 2 (3) and the semiconductor thin film 15 forming step described with reference to FIG. 2 (4) may be performed in reverse order. Furthermore, the manufacturing procedure of the above-described embodiment can also be applied when the semiconductor thin film 15 is made of an inorganic material.

  Through the above procedure, a bottom gate type thin film transistor (semiconductor device) 17 is formed on the substrate 1.

  According to the semiconductor device manufacturing method described above, the gate having a flat surface and a reduced thickness can be obtained by applying the method for forming the conductive pattern described with reference to FIG. 1 to the formation of the gate electrode 5a serving as the lower electrode. The electrode 5a is obtained, and the gate insulating film 11 is formed so as to cover the electrode 5a. For this reason, the gate insulating film 11 is formed on the substrate 1 in which the level difference due to the gate electrode 5a is suppressed to be small without causing a step break in the side wall portion A of the gate electrode 5a. Therefore, the insulating property between the gate electrode 11 and the source / drain electrode 15 can be ensured by the gate insulating film 11. Further, disconnection of the source / drain electrode 13 in the side wall portion A is also prevented.

  Furthermore, since the surface of the gate electrode 5a is flat, the surface flatness of the gate insulating film 11 portion on the gate electrode 5a, that is, the channel formation region B is also ensured. Therefore, the growth of the semiconductor thin film 15 formed on the gate insulating film 11 is not hindered in the channel formation region B, and it is possible to form the semiconductor thin film 15 with good film quality.

  As a result, the thin film transistor 17 having good characteristics can be obtained while applying the coating method to the formation of the gate electrode 5a.

  In the embodiment described above, the procedure in which the present invention is applied to the manufacture of a bottom gate type thin film transistor has been described. However, the present invention can also be applied to the manufacture of top-gate thin film transistors. In this case, first, it is important to form the source / drain electrodes as the lower electrodes on the substrate 1 by applying the conductive pattern forming method described with reference to FIG. Thereafter, a semiconductor thin film is formed so as to cover these source / drain electrodes, a gate insulating film is further formed, and then a gate electrode is formed on the gate insulating film to obtain a top gate type thin film transistor.

  In such a top-gate thin film transistor, the method for forming a conductive pattern described with reference to FIG. 1 is applied to the formation of a source / drain electrode, thereby covering the source / drain electrode having a flat surface and a reduced thickness. In this state, a semiconductor thin film and a gate insulating film are formed. For this reason, the step due to the source / drain electrode is suppressed to be small, and the semiconductor thin film and the gate insulating film can be formed without causing a step break. Therefore, as in the embodiment described with reference to FIG. 2, the gate insulating film and the semiconductor thin film can ensure insulation between the source / drain electrodes and the gate insulating film.

  In the manufacturing procedure of the top gate type thin film transistor as described above, when the damage of the base in patterning the source / drain electrode is not a problem, the semiconductor thin film is formed and then described with reference to FIG. The source / drain electrodes may be formed by applying a conductive pattern forming method.

<Method for producing organic electroluminescent element>
FIG. 3 is a cross-sectional process diagram illustrating a part of a method for manufacturing an organic electroluminescent element to which the present invention is applied. The manufacturing method of the semiconductor device described in this embodiment includes the method of forming a conductive pattern described with reference to FIG. 1, and the following procedure shown in FIG.

  That is, first, as shown in FIG. 3A, the lower electrode 5a is formed on the substrate 1 in accordance with the conductive pattern forming method described above. The lower electrode 5a is the conductive pattern described with reference to FIG. 1, and is formed with a flat surface and a thin film thickness according to the above-described forming method.

  The lower electrode 5a is configured using a metal suitable as an anode (or a cathode) in the organic electroluminescent element. Therefore, it is assumed that the paste material film described with reference to FIG. 1 contains fine metal particles suitable as an anode (or a cathode) in the organic electroluminescent element. When the organic semiconductor element formed here constitutes an active matrix display device, the lower electrode 5a is patterned for each pixel while being connected to the thin film transistor formed on the substrate 1. I will do it. On the other hand, when the organic semiconductor element formed here constitutes a passive matrix type display device, the lower electrode 5a is patterned in a wiring shape in which a plurality of lower electrodes 5a are extended in a predetermined direction. To do.

  Next, as shown in FIG. 3B, the insulating pattern 21 is formed in a shape that covers the periphery of the lower electrode 5a and exposes the central portion widely. The insulating pattern 21 is made of, for example, silicon oxide and is provided to insulate and separate the plurality of lower electrodes 5 a formed on the substrate 1.

  Next, as shown in FIG. 3 (3), the organic layer 23 is formed in a state of reliably covering the lower electrode 5 a exposed from the insulating pattern 21. The organic layer 23 includes at least a light emitting layer, and is formed by stacking, for example, a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer in order from the anode side. The organic layer 23 having such a stacked structure is formed by a vapor deposition method when a low molecular material is used, and is formed by a coating or printing method when a high molecular material is used. Further, the organic layer 23 may be formed over the entire surface of the substrate 1.

  After the above, as shown in FIG. 3 (4), the upper electrode 25 is formed above the substrate 1 with the organic layer 23 sandwiched between the lower electrode 5a. The upper electrode 25 becomes a cathode when the lower electrode 5a is formed as an anode, and becomes an anode when the lower electrode 5a is formed as a cathode. Further, when the lower electrode 5a made of metal has a strong light reflection characteristic, the upper electrode 25 is on the side from which emitted light generated in the organic layer 23 is extracted, so that light transmittance is obtained. In this way, it is configured by a thin film.

  When the organic electroluminescent element formed here constitutes an active matrix display device, the upper electrode 25 may be formed over the entire surface of the substrate 1 as an electrode common to each pixel. On the other hand, when the organic semiconductor element formed here constitutes a passive matrix type display device, the upper electrode 25 is patterned in a plurality of wiring shapes intersecting with the lower electrode 5a.

  By the procedure as described above, an organic electroluminescent element 27 in which the organic layer 23 is sandwiched between the lower electrode 5a and the upper electrode 25 is obtained.

  According to the method for manufacturing the organic electroluminescent element described above, the lower electrode 5a having a flat surface and a reduced thickness can be obtained by applying the conductive pattern forming method described with reference to FIG. 1 to the formation of the lower electrode 5a. Will be formed. For this reason, the insulating pattern 21 and the upper electrode 25 can be formed on the substrate 1 in which the level difference due to the lower electrode 5a is suppressed to be small without causing a step break in the side wall portion A of the lower electrode 5a. Thereby, it is possible to prevent the occurrence of light emission failure in the organic electroluminescent element 27.

  Furthermore, since the lower electrode 5a has a flat surface, the uniformity of the film thickness of the organic layer 23 formed on the lower electrode 5a can be improved. Here, in the organic electroluminescent element 27, since the light emitting portion is composed of an extremely thin organic film 23, variation in the film thickness of the organic film 23 in each element portion tends to affect the light emission characteristics. For example, problems such as local concentration of electrolysis at a thin film portion during driving and leakage current may occur, making it difficult to perform stable display. Therefore, as described above, the uniformity of the film thickness of the organic layer 23 on the lower electrode 5a is improved, thereby improving the light emission characteristics.

  As a result, it is possible to obtain the organic electroluminescent element 27 having good light emission characteristics while applying the coating method to the formation of the lower electrode 5a, and display the organic electroluminescent element 27 formed in an array. It becomes possible to improve display characteristics in the apparatus.

  In the embodiment described above, the case where the method for forming a conductive pattern described with reference to FIG. 1 is applied to a method for manufacturing a thin film transistor (semiconductor device) and a method for manufacturing an organic electroluminescent element is illustrated. However, the conductive pattern forming method described with reference to FIG. 1 is not limited to application to these manufacturing methods, and can be applied to the manufacture of sensors and solar cells, for example.

It is sectional process drawing which shows the formation procedure of the electroconductive pattern in embodiment. It is sectional process drawing which shows the manufacture procedure of the semiconductor device in embodiment. It is sectional process drawing which shows the manufacture procedure of the organic electroluminescent element in embodiment. It is sectional drawing explaining an example of background art. It is sectional drawing which shows the problem of formation of the electroconductive pattern by inkjet printing.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ..., s ... Metal fine particle, 3 ... Paste material film, 5 ... Conductive material film, 5a ... Conductive pattern, 5a ... Gate electrode (lower electrode), 7 ... Mask pattern, 11 ... Gate insulating film (insulating film) DESCRIPTION OF SYMBOLS 13 ... Source / drain electrode (upper electrode), 15 ... Semiconductor thin film, 17 ... Thin-film transistor (semiconductor device), 23 ... Organic layer, 25 ... Upper electrode, 27 ... Organic electroluminescent element

Claims (8)

Applying a paste material formed by dispersing metal fine particles in a solvent on a substrate and applying a paste material film; and
Baking the paste material film to form a conductive material film;
Patterning the conductive material film;
Conductive pattern formation method characterized by performing. In the formation method of the electroconductive pattern of Claim 1,
The patterning of the conductive material film is performed by etching from a mask pattern formed on the conductive material film by a lithography technique. In the formation method of the electroconductive pattern of Claim 1,
The patterning of the conductive material film is performed by etching from a mask pattern formed on the conductive material film by a printing technique. Applying a paste material formed by dispersing metal fine particles in a solvent on a substrate and applying a paste material film; and
Baking the paste material film to form a conductive material film;
Patterning the conductive material film to form a lower electrode;
Forming an insulating film so as to cover the lower electrode;
And a step of forming an upper electrode on the insulating film. In the manufacturing method of the semiconductor device according to claim 4,
In the step of forming the lower electrode, a gate electrode or a source / drain electrode is formed as the lower electrode,
In the step of forming the insulating film, a gate insulating film is formed as the insulating film. In the manufacturing method of the semiconductor device according to claim 4,
In the step of forming the lower electrode, a gate electrode is formed as the lower electrode,
In the step of forming the insulating film, a gate insulating film is formed as the insulating film,
In the step of forming the upper electrode, a source / drain electrode is formed as the upper electrode at a position sandwiching the gate electrode,
A method of manufacturing a semiconductor device, comprising: forming a semiconductor thin film over the gate electrode after forming the gate insulating film. The method of manufacturing a semiconductor device according to claim 6.
In the semiconductor thin film forming step, coating film formation using an organic semiconductor material is performed. A method for producing an organic electroluminescent device comprising an organic layer having at least a light emitting layer between a lower electrode and an upper electrode,
Applying a paste material formed by dispersing metal fine particles in a solvent on a substrate and applying a paste material film; and
Baking the paste material film to form a conductive material film;
Patterning the conductive material film to form a lower electrode;
Forming an organic layer on the lower electrode;
And a step of forming an upper electrode on the organic layer.

Images