WO2014049970A1 - Thin film transistor array and image display apparatus - Google Patents

Abstract

This thin film transistor array has display effective regions, each of which is provided with at least an insulating substrate, a gate electrode, a gate insulating layer, a source electrode, a drain electrode, a semiconductor layer, and a first protection layer. A plurality of first protection layers are formed over a plurality of thin film transistors, said first protection layers being formed in stripe shapes on the insulating substrate, and the first protection layers include a plurality of second protection layers that are provided outside of the display effective regions.

Description

Thin film transistor array and image display device

The present invention relates to a thin film transistor array and an image display device.

Due to the remarkable development of information technology, information is frequently sent and received on laptop computers and portable information terminals. It is a well-known fact that in the near future, a ubiquitous society that can exchange information regardless of location will come. In such a society, a lighter and thinner information terminal is desired.

Among the electronic members used in such information terminals, the mainstream of semiconductor materials currently used in thin film transistor elements is silicon. Since formation of a thin film transistor element using a silicon-based material includes a process at a high temperature, the substrate material of the thin film transistor element is required to withstand the process temperature. For this reason, glass is generally used as a substrate on which thin film transistor elements are formed.

However, when glass is used when configuring the information terminal described above, the information terminal is heavy, inflexible, and can be broken by the impact of dropping. Therefore, it can be said that these characteristics resulting from the formation of thin film transistor elements on glass are undesirable as information terminals in the ubiquitous society.

Therefore, in recent years, organic semiconductors have attracted attention as semiconductor materials for thin film transistors. Organic semiconductor materials do not require a heat treatment step at a high temperature unlike silicon-based materials, and thus have an advantage that they are provided on a flexible plastic substrate. Furthermore, since it can be produced by a printing process without using a vacuum process, there is an advantage that the cost can be reduced.

In order to form a semiconductor layer from a solution, methods such as a spin coating method, a dip method, and an ink jet method can be used. Especially, a semiconductor layer can be formed efficiently by applying a printing process. For example, in Patent Document 1, patterning of an organic semiconductor solution is performed by flexographic printing.

Furthermore, in Patent Document 2, by making the semiconductor layer into a stripe shape, alignment accuracy can be improved and production efficiency can be further increased.

However, when the semiconductor layer is an organic semiconductor layer, there is a concern that the organic semiconductor is rapidly deteriorated by moisture in the atmosphere as compared with silicon-based materials. Therefore, in the case of an organic semiconductor, a protective layer for protecting the semiconductor layer from moisture is essential.

Also in the formation of the protective layer, the protective layer can be formed easily and at low cost by applying a wet process. For example, in Patent Document 3, a protective layer is formed by flexographic printing, and a thin film transistor array having a high aperture ratio is simply manufactured.

JP 2006-63334 A JP 2008-235861 A Japanese Patent No. 4743348

However, when patterning the protective layer of the thin film transistor array using the printing method, uneven printing due to ink drying unevenness or inking unevenness is likely to occur at the edge and center of the array. The shape defect is remarkable. Due to the defective shape of the protective layer, the semiconductor layer cannot be covered with the protective layer, and the exposed semiconductor layer is exposed to the atmosphere, so that it deteriorates due to moisture in the atmosphere during and after the device fabrication. The mobility of the constituent elements is reduced.

The present invention provides a thin film transistor array capable of improving the production efficiency and making it difficult to deteriorate the device characteristics in the display effective region, and an image display device including the same.

A first invention for solving the above-described problem is a display including at least an insulating substrate, a gate electrode, a gate insulating layer, a source electrode, a drain electrode, a semiconductor layer, and a first protective layer. A thin film transistor array having an effective region, wherein a plurality of the first protective layers are formed in a stripe shape on the insulating substrate so as to extend over the plurality of thin film transistors, and a plurality of first layers provided outside the display effective region are provided. A thin film transistor array comprising two protective layers.

Further, the second invention is the thin film transistor array according to the first invention, wherein the extending direction of the stripe of the first protective layer is the same as the extending direction of the source wiring.

In a third aspect based on the first aspect, the second protective layer has a stripe shape, is parallel to the first protective layer, and extends in a direction parallel to the extending direction of the source wiring. Further, the thin film transistor array is arranged adjacent to a direction orthogonal to an extending direction of the source wiring in the display effective region.

In a fourth aspect based on the first aspect, the plurality of second protective layers are arranged in a direction in which a source wiring extends from a channel region of an outermost element of the display effective region. The thin film transistor array is formed as a portion extending at least 2 mm of the layer.

The fifth invention is the thin film transistor array according to the first invention, wherein the protective layer is formed of an organic insulating material.

The sixth invention is the thin film transistor array according to the first invention, wherein the protective layer is formed by a relief printing method, an ink jet printing method, or a screen printing method.

The seventh invention is the thin film transistor array according to the first invention, wherein the insulating substrate is a plastic substrate.

The eighth invention is the thin film transistor array according to the first invention, wherein the gate insulating film contains an organic material.

The ninth invention is an image display device comprising the thin film transistor array and an image display medium.

The tenth invention is the image display device according to the ninth invention, wherein the image display medium is of an electrophoretic method.

According to the first invention, it is possible to provide a low-cost and high-quality flexible thin film transistor with high production efficiency. Specifically, when the protective layer of the thin film transistor array has a stripe shape, alignment becomes easy and the throughput of the flexible thin film transistor can be improved. In addition, by providing a first protective layer in the display effective region involved in the display of the flexible thin film transistor and a second protective layer outside the display effective region, the semiconductor layer in the thin film transistor array is protected from moisture in the atmosphere. In addition, since deterioration of element characteristics can be reduced, a high-quality flexible thin film transistor array can be produced with high yield.

As described above, it is possible to provide a thin film transistor array that has high production efficiency and that does not easily deteriorate the element characteristics in the display effective region.

Further, according to the second invention, the alignment accuracy of the protective layer can be improved, and a high-quality flexible thin film transistor array can be produced.

Further, according to the third invention, it is possible to reduce the formation defect of the stripe protective layer located at the end of the display effective area of the thin film transistor array, and to suppress the deterioration of the element characteristics at the end of the display effective area.

In addition, according to the fourth aspect of the present invention, it is possible to reduce the shape defect of the protective layer that covers the channel portion of the outermost element in the display effective region, thereby reducing variation in element characteristic deterioration in the flexible thin film transistor array. Can do.

In addition, according to the fifth invention, since the protective layer is formed of an organic insulating material, it can be used as ink, and the protective layer can be formed by printing. Can be formed.

Further, according to the sixth aspect of the invention, a protective layer can be formed in a short time even on a large area thin film transistor array.

According to the seventh invention, since the insulating substrate is a plastic substrate, a flexible flexible thin film transistor array that is lighter and more flexible than a thin film transistor formed on a conventional glass substrate and that does not break even when dropped is manufactured. can do.

Further, according to the eighth invention, the gate insulating film can be easily formed by a coating method by using a material containing an organic material when the gate insulating film is manufactured, and the flexible thin film transistor array is produced. Efficiency can be improved.

FIG. 1A shows an embodiment of the present invention and is a plan view showing a pattern layout of a schematic configuration of the entire thin film transistor array. FIG. 1B shows an embodiment of the present invention and is a plan view showing a detailed configuration of elements in a display effective region and a dummy protective layer region of a thin film transistor array. FIG. 1C illustrates an embodiment of the present invention, and is a cross-sectional view illustrating a configuration of elements in a display effective region of a thin film transistor array. FIG. 1D shows an embodiment of the present invention and is a cross-sectional view showing a configuration in a dummy protective layer region of a thin film transistor array. FIG. 2A shows an embodiment of the present invention and is a cross-sectional view showing a configuration in a display effective region of an image display device using a thin film transistor array according to the example. FIG. 2B shows an embodiment of the present invention and is a cross-sectional view showing a configuration in a dummy protective layer region of an image display device using a thin film transistor array according to the example. FIG. 3A shows an embodiment of the present invention, and is a plan view showing a schematic configuration of an entire thin film transistor array according to a first comparative example. FIG. 3B shows an embodiment of the present invention and is a cross-sectional view showing a configuration in a display effective region of an image display device using a thin film transistor array according to a first comparative example. FIG. 3C illustrates an embodiment of the present invention and is a cross-sectional view illustrating a configuration in a dummy protective layer region of an image display device using a thin film transistor array according to a first comparative example. FIG. 4A shows an embodiment of the present invention and is a plan view showing a schematic configuration of an entire thin film transistor array according to a second comparative example. FIG. 4B shows an embodiment of the present invention and is a cross-sectional view showing a configuration in a display effective region of an image display device using a thin film transistor array according to a second comparative example. FIG. 4C shows an embodiment of the present invention and is a cross-sectional view showing a configuration in a dummy protective layer region of an image display device using a thin film transistor array according to a second comparative example.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the embodiments, the same components are denoted by the same reference numerals, and redundant description among the embodiments is omitted.

1A to 1D show an example of the configuration of the thin film transistor array 1 of the present embodiment. 1A is an overall pattern layout plan view of the thin film transistor array 1, FIG. 1B is a pattern layout plan view showing in detail the configuration of the region R in FIG. 1A, FIG. 1C is a cross-sectional view taken along line AA ′ in FIG. FIG. 1B is a cross-sectional view taken along the line BB ′ of FIG. 1B.

As shown in FIGS. 1C and 1D, the thin film transistor array 1 includes a gate electrode 11, a capacitor electrode 18, a gate insulating layer 12, a source electrode 13, a drain electrode 14, a semiconductor layer 15, and a protection layer on a plastic substrate (insulating substrate) 10. A layer 16 and a protective layer 17 are provided. A plurality of protective layers (first protective layers) 16 are provided in the display effective area 101, and a plurality of protective layers (second protective layers) 17 are provided outside the display effective area not related to display. Further, as shown in FIGS. 1A and 1B, the protective layer 17 outside the display effective region not related to display is formed from the channel region of the outermost element of the display effective region 101 so as to form a part of the source electrode 13. The dummy protective layer 17 (a) formed by extending 2 mm or more parallel to the extending y direction of (a) and the semiconductor layer 15 are parallel to the source wiring 13 (a) and display. The dummy protective layer 17 (b) is disposed adjacent to the left and right of the effective area 101 (in the x direction orthogonal to the y direction).

1A shows the protective layer 16 of the display effective region 101 and the dummy protective layers 17 (a) and 17 (b), and the gate electrode 11, the capacitor electrode 18, the source electrode 13, and the drain electrode 14 are shown. Was omitted. A region R shown in FIG. 1A is a region including the four elements at the lower left of the display effective region 101 and the surrounding dummy protective layers 17 (a) and 17 (b). In FIG. 1B, illustration of the plastic substrate 10 and the gate insulating film 12 is omitted. The dummy protective layer 17 (a) and the dummy protective layer 17 (b) have the same form.

The plastic substrate 10 according to this embodiment includes polymethylene methacrylate, polyacrylate, polycarbonate, polystyrene, polyethylene sulfide, polyethersulfone, polyolefin, polyethylene terephthalate, polyethylene naphthalate, cycloolefin polymer, polyethersulfone, and triacetyl cellulose. , Polyvinyl fluoride film, ethylene-tetrafluoroethylene, copolymer resin, weather resistant polyethylene terephthalate, weather resistant polypropylene, glass fiber reinforced acrylic resin film, glass fiber reinforced polycarbonate, transparent polyimide, fluororesin, cyclic polyolefin resin, etc. Although it can be used, this invention is not limited to these. These can be used alone or as a composite substrate in which two or more kinds are laminated. A substrate having a resin layer such as a color filter on a glass or plastic substrate can also be used.

For the gate electrode 11, the source electrode 13, the drain electrode 14, and the capacitor electrode 18 according to the present embodiment, a low resistance metal material such as Au, Ag, Cu, Cr, Al, Mg, Li, or an oxide material is preferably used. It is done. Specifically, indium oxide (In ₂ O ₃ ), tin oxide (SnO ₂ ), zinc oxide (ZnO), cadmium oxide (CdO), indium cadmium oxide (CdIn ₂ O ₄ ), cadmium tin oxide (Cd ₂ SnO) ₄ ), zinc tin oxide (Zn ₂ SnO ₄ ), indium zinc oxide (InZnO), and the like. Further, an oxide material doped with impurities is also preferable. For example, indium oxide doped with molybdenum or titanium, tin oxide doped with antimony or fluorine, zinc oxide doped with indium, aluminum, or gallium. Among them, indium tin oxide (ITO) in which tin is doped in indium oxide exhibits a particularly low resistivity. An organic conductive material such as PEDOT (polyethylenedioxythiophene) is also suitable, and is preferably used in the case of a single substance or a plurality of laminated layers with a conductive oxide material. The gate electrode 11, the source electrode 13, and the drain electrode 14 may be made of the same material or different materials. However, in order to reduce the number of steps, it is desirable to use the same material for the source electrode 13 and the drain electrode 14. These electrodes are formed by vacuum deposition, ion plating, sputtering, laser ablation, plasma CVD, photo CVD, hot wire CVD, or the like. It can also be formed by applying the above conductive material in ink or paste form by screen printing, flexographic printing, ink jet method or the like and baking. The present invention is not limited to these.

As materials used for the gate insulating film 12 according to the present embodiment, inorganic materials such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, tantalum oxide, yttrium oxide, hafnium oxide, hafnium aluminate, zirconia oxide, and titanium oxide Or polyacrylate such as PMMA (polymethylmethacrylate), PVA (polyvinyl alcohol), PVP (polyvinylphenol) and the like, but the present invention is not limited thereto. In order to suppress gate leakage current, a preferable resistivity of the insulating material is 10 ¹¹ Ωcm or more, more preferably 10 ¹⁴ Ωcm or more.

Examples of the material used for the semiconductor layer 15 according to this embodiment include an oxide semiconductor and an organic semiconductor. As an oxide semiconductor material, an oxide containing one or more elements selected from zinc, indium, tin, tungsten, magnesium, gallium, that is, zinc oxide, indium oxide, indium zinc oxide, tin oxide, tungsten oxide, zinc oxide Known materials such as gallium indium can be used. Organic semiconductor materials include high molecular organic semiconductor materials such as polythiophene, polyallylamine, fluorenebithiophene copolymers, and derivatives thereof, and pentacene, tetracene, copper phthalocyanine, perylene, 6,13-bis (triisopropylsilyl) Low molecular organic semiconductor materials such as ethynyl) pentacene (TIPS-pentacene) and derivatives thereof, and precursors that are converted into organic semiconductors by heat treatment or the like can be used as the semiconductor material ink. Carbon compounds such as carbon nanotubes or fullerenes, semiconductor nanoparticle dispersions, and the like can also be used as the material for the semiconductor layer. When a semiconductor material ink is used, examples of the solvent include toluene, xylene, indane, tetralin, propylene glycol methyl ether acetate, and the like, but are not limited thereto. These semiconductor layers are formed by a vacuum deposition method, an ion plating method, a sputtering method, a laser ablation method, a plasma CVD method, a photo CVD method, a hot wire CVD method, or the like. The conductive material can be formed by applying an ink-like or paste-like conductive material by screen printing, flexographic printing, ink-jet method, or the like, and drying, but the present invention is not limited thereto. .

Materials used for the protective layer 16 and the dummy protective layer 17 used in this embodiment are polymer solutions such as polyvinylphenol, polymethyl methacrylate, polyimide, polyvinyl alcohol, epoxy resin, fluororesin, and particles such as alumina and silica gel. A dispersed solution is preferably used. In addition, as a method for forming the protective layer, a method of directly forming a pattern using a wet method such as screen printing, letterpress printing, or an inkjet method is preferably used, but is not limited thereto.

The structure of the thin film transistor formed using the pattern forming method of the present embodiment is not particularly limited, and may be a top gate type or a bottom gate type structure. As a difference in structure other than the arrangement of the gate electrode, there are a bottom contact type and a top contact type in which the positions of the semiconductor layers are different. When an organic semiconductor material is used as the semiconductor layer, the bottom contact type is preferable. This is because the bottom contact type can shorten the channel length as compared with the top contact type, so that a large drain current can be obtained.

[Example]
2A and 2B show a cross-sectional structure of a thin film transistor array 1 including a bottom gate bottom contact type flexible thin film transistor array according to the first embodiment. 2A shows a cross-sectional structure in a display effective region of an image display device using the thin film transistor array 1, and a method for manufacturing the thin film transistor array 1 taking the form shown in FIGS. 2A and 2B will be described. The thin film transistor array 1 has a single element size of 500 μm × 500 μm and includes 240 × 320 elements.

As the plastic substrate 10, a polyethylene naphthalate (PEN) film (manufactured by Teijin DuPont) was used. After depositing aluminum on the PEN film to a thickness of 100 nm by sputtering, photolithography and etching were performed using a positive resist, and then the resist was removed to form the gate electrode 11 and the capacitor electrode 18.

Subsequently, polyimide (Neoprim manufactured by Mitsubishi Gas Chemical) was applied as a gate insulating material by a die coater and dried at 180 ° C. for 1 hour to obtain a gate insulating film 12. Next, gold was deposited to a thickness of 50 nm by an evaporation method, photolithography and etching were performed using a positive resist, and then the resist was removed to form the source electrode 13 and the drain electrode 14.

As a semiconductor layer forming material, a mixed solution of tetralin (manufactured by Kanto Chemical) and 6,13-bis (triisopropylsilylethynyl) pentacene (TIPS-pentacene) (manufactured by Aldrich) was used. The flexographic printing method was used for forming the semiconductor layer. In the flexographic printing, a photosensitive resin flexographic plate and a 150-wire anilox roll were used. After the semiconductor material was printed in stripes, the semiconductor layer 15 was formed by drying at 100 ° C. for 60 minutes.

Subsequently, protective layers 16 and 17 were formed. Cytop (manufactured by Asahi Glass) was used as a protective layer forming material. Flexographic printing was used for forming the protective layer. A photosensitive resin flexographic plate was used as the flexographic plate, and a 150-wire anilox roll was used. The flexographic plate has a stripe shape, and the length of each stripe is 180 mm, which is a sum of 176 mm, which becomes the display effective area 101, and 4 mm of the dummy protective layer 17 (a) disposed above and below the display effective area 101. is there. The total number of stripes is 330, which is the sum of 320 stripes to be the display effective area 101 in the array and 10 stripes to be the dummy protective layer 17 (b). Ink is applied to the flexographic plate from the anilox roll, five dummy protective layers 17 (b) are formed at both ends of the display effective area 101, and the display effective area 101 is striped so as to cover the semiconductor layer 15. A protective layer was printed. Then, it dried at 100 degreeC for 90 minute (s), and it was set as the stripe-shaped protective layers 16 * 17, and the flexible thin-film transistor array 1 was formed.

After that, when the display according to this example is driven with the electrophoretic medium 19 interposed between the counter electrode and the counter electrode, the sealing layer can be uniformly formed in the display effective region 101, so that deterioration due to moisture during the manufacturing process is caused. It was suppressed, and good image display with little display unevenness could be performed.

[Comparative Example 1]
A manufacturing method of the bottom gate bottom contact type flexible thin film transistor array 2 taking the form shown in FIGS. 3A, 3B, and 3C will be described. This transistor array has an element size of 500 μm × 500 μm, and includes 240 × 320 elements. In FIG. 3A, illustration of the gate electrode 11, the capacitor electrode 18, the source electrode 13, and the drain electrode 14 is omitted. The dummy protective layer 17 (a) and the dummy protective layer 17 (b) have the same form.

In the same procedure as in Example 1, a gate electrode 11, a capacitor electrode 18, a gate insulating film 12, a source electrode 13, a drain electrode 14, and a semiconductor layer 15 were formed on the PEN film 10.

The flexographic printing method was used for forming the protective layers 16 and 17. For flexographic printing, a photosensitive resin flexographic plate and a 150-wire anilox roll were used. The flexographic plate has a stripe shape, and the length of each stripe is 180 mm, which is a sum of 176 mm, which becomes the display effective area 101, and 4 mm of the dummy protective layer 17 (a) disposed above and below the display effective area 101. is there. The number of stripes is 320 stripes to be the display effective area 101 in the array, and the dummy protective layers 17 (b) having a stripe shape parallel to the protective layers 16 of the display effective area 101 located at both ends of the display effective area 101 are Did not form. As a result, the stripes at the left and right ends of the display effective area 101 have a shape defect. Specifically, the striped protective layers at both ends have a fast solvent volatilization, and the ink is dried before the protective layer is formed, so that the semiconductor layer 15 cannot be covered. Since the semiconductor layer 15 can no longer be protected from moisture in the atmosphere, the flexible thin film transistor array 2 cannot be obtained.

[Comparative Example 2]
A manufacturing method of the bottom gate bottom contact type flexible thin film transistor array 3 taking the form shown in FIGS. 4A, 4B, and 4C will be described. This transistor array has an element size of 500 μm × 500 μm, and includes 240 × 320 elements. In FIG. 4A, the gate electrode 11, the capacitor electrode 18, the source electrode 13, and the drain electrode 14 are not shown. The dummy protective layer 17 (a) and the dummy protective layer 17 (b) have the same form.

In the same procedure as in Example 1, a gate electrode 11, a capacitor electrode 18, a gate insulating film 12, a source electrode 13, a drain electrode 14, and a semiconductor layer 15 were formed on the PEN film 10.

The flexographic printing method was used for forming the protective layers 16 and 17. For flexographic printing, a photosensitive resin flexographic plate and a 150-wire anilox roll were used. The flexographic plate has a stripe shape, and the length of each stripe is 177 mm, which is a combination of 176 mm, which becomes the display effective area 101, and 1 mm of the dummy protective layer 17 (a) disposed above and below the display effective area 101. The total number of the stripes is 330, which is the sum of 320 stripe semiconductor layers serving as the protective layer 16 of the display effective area 101 in the array and 10 stripes serving as the dummy protective layer 17 (b). Ink is applied from the anilox roll to the flexographic plate, and five dummy protective layers 17 (b) are formed at both ends of the display effective region 101, and the protective layer forming material covers the semiconductor layer 15 in the display effective region 101. Thus, the protective layer 16 was formed. However, the shape of the protective layer corresponding to the two rows of elements on the upper and lower ends of the display effective area 101 becomes poor, and the flexible thin film transistor array 3 cannot be obtained. This is because the solvent volatilization was fast at the stripe end of the protective layer, and the ink was dried before the protective layer was formed, so that the semiconductor layer 15 could not be covered.

The flexible thin film transistor of the present invention can be used as a switching element such as flexible electronic paper or a flexible organic EL display. In particular, by forming the dummy protective layer, the yield and throughput in the manufacturing process can be improved. Therefore, a flexible thin film transistor applicable to a wide range such as a flexible display, an IC card, and an IC tag can be manufactured at low cost and with high quality.

DESCRIPTION OF SYMBOLS 1 ... Thin-film transistor array 10 ... Plastic substrate 11 ... Gate electrode 12 ... Gate insulating film 13 ... Source electrode 13 (a) ... Source wiring 14 ... Drain electrode 15 ... Semiconductor layer 16... Protective layer 17 (a) in the display effective region... Dummy protective layer 17 (b) disposed above and below the display effective region. 18 ... Capacitor electrode 19 ... Electrophoretic medium 101 ... Display effective area

Claims (10)

1. A thin film transistor array having a display effective region including at least an insulating substrate, a gate electrode, a gate insulating layer, a source electrode, a drain electrode, a semiconductor layer, and a first protective layer;
   A plurality of the first protective layers are formed in a stripe shape on the insulating substrate so as to span a plurality of thin film transistors,
   A thin film transistor array comprising a plurality of second protective layers provided outside the display effective area.
2. 2. The thin film transistor array according to claim 1, wherein the extending direction of the stripe of the first protective layer is the same as the extending direction of the source wiring.
3. The second protective layer has a stripe shape, is parallel to the first protective layer, and extends in a direction parallel to the extending direction of the source wiring. 2. The thin film transistor array according to claim 1, wherein the thin film transistor array is disposed adjacent to each other in a direction orthogonal to each other.
4. The plurality of second protective layers are formed as portions extending at least 2 mm or more of the first protective layer in the extending direction of the source wiring from the channel region of the outermost element of the display effective region. The thin film transistor array according to claim 1, wherein:
5. 2. The thin film transistor array according to claim 1, wherein the protective layer is made of an organic insulating material.
6. The thin film transistor array according to claim 1, wherein the protective layer is formed by a relief printing method, an ink jet printing method, or a screen printing method.
7. 2. The thin film transistor array according to claim 1, wherein the insulating substrate is a plastic substrate.
8. 2. The thin film transistor array according to claim 1, wherein the gate insulating film contains an organic material.
9. An image display device comprising the thin film transistor array according to claim 1 and an image display medium.
10. The image display device according to claim 9, wherein the image display medium is of an electrophoretic method.

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