JP2007028809A - Offset voltage detector of pwm converter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To detect abnormality of a Hall CT type current detector or a current detection circuit and to compensate for an offset voltage while a load device is connected to a three-phase PWM converter. <P>SOLUTION: In cutting off a voltage of a three-phase power supply 1 of a three-phase PWM converter main circuit, the output of the current detection circuit 6 is recorded in a nonvolatile memory 22 as an offset voltage of a Hall element type current detector HCT. When the three-phase power is turned on, a value read from the memory is compared with a determination threshold value by a comparison portion 24 so that a warning output for determining abnormality of the offset voltage is obtained if the value exceeds the determination threshold value. The current detection circuit output after a predetermined delay time is recorded as the offset voltage from the timing when a power supply phase voltage exceeds a zero-level. The current detection circuit output is continuously recorded in the memory as the offset voltage at the timing when the power supply phase voltage exceeds the zero-level, and the average value is calculated. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a three-phase PWM converter having a capacitor input type rectifier circuit as a main circuit, and in particular, an offset voltage abnormality determination and an offset voltage of a Hall element type current detector that detects an input current from a three-phase power source to the main circuit. The present invention relates to an offset voltage detection device for compensation.

  The three-phase PWM converter can control the power factor to approximately 1 by controlling the input current in a sine wave shape having the same phase as the phase voltage of the AC power supply. A configuration example of the main circuit and the control device is shown in FIG. The main circuit configuration includes a PWM rectifier circuit 2 composed of a switching element such as an IGBT connected to the three-phase AC power source 1, a capacitor 3, and a load. The three-phase AC power source 1 and the PWM rectifier circuit 2 Between the input filter 4, the power supply phase voltage detection circuit 5 connected to the voltage detection terminal provided on the power supply side of the input filter 4, and the current detector HCT provided on the PWM rectifier circuit side of the input filter 4 and its two-phase signal A current detection circuit 6 for obtaining current detection signals for three phases. A DC voltage detection circuit 7 is provided on the output side of the PWM rectifier circuit 2.

  Control of the gate drive circuit 8 that controls the switching element of the PWM rectifier circuit 2 includes detection voltages Vr, Vs, Vt by the power supply phase voltage detection circuit 5, detection currents Ir, Is, It by the current detection circuit 6, and The detected DC voltage Vdc by the DC voltage detection circuit 7 is referred to. That is, the DC voltage Vdc is added to the set value by the DC voltage setter 9, the value output from the voltage regulator 10 and the power supply voltages Vr, Vs, Vt are input to the multiplier 11, and the obtained output is obtained. The detection currents Ir, Is, It (actually voltage signals corresponding to the current) are added, and the energization state of each switching element of the PWM rectifier circuit 2 is controlled via the current regulator 12 and the PWM logic circuit 13, and a desired Obtain the DC voltage value.

  The three-phase PWM converter having such a configuration requires power supply phase voltage detection and input phase current detection in order to control the input phase current in the form of a sine wave having the same phase as the power supply phase voltage.

  Since the power supply frequency is usually 50 Hz or 60 Hz for detecting the power supply phase voltage, insulation and level conversion can be easily realized by applying a transformer, and the possibility of occurrence of failure is low with a robust structure.

  On the other hand, a current detector (Hall CT) using a Hall element is applied to input phase current detection in order to detect a current including a switching frequency (several kHz) component of PWM control from a DC component. Since the Hall CT uses a magnetic material in addition to amplifying a weak voltage with an electronic circuit, an offset voltage may be generated at the output even if the current is zero due to the influence of the residual magnetic east. The generation of the offset voltage causes a DC output voltage ripple, a phase current imbalance, and the like.

  Therefore, there is one in which an offset compensation means is provided in the current control system of the motor drive inverter (see, for example, Patent Document 1). The offset voltage compensation is obtained by measuring / setting the offset amount of the Hall CT when the inverter is stopped, and subtracting the offset set value from the current detection signal when the inverter is operating.

In addition, an abnormality / failure occurrence of the Hall CT may also cause an overcurrent or damage to the switching element of the PWM rectifier circuit. Therefore, when the inverter load is shut down (gate shutoff, switch disconnection), the detected current of the Hall CT ( There is one that determines whether or not there is an abnormality based on whether or not (voltage) is substantially zero (see, for example, Patent Document 2).
Japanese Patent Laid-Open No. 2-123969 JP 2001-157460 A

  As described above, in the inverter for driving the motor, in order to detect the offset voltage of the Hall CT, when the output is stopped while the current does not flow to the Hall CT (when the gate is shut off), and the judgment threshold is exceeded, It is common to determine that there is an abnormality and output an alarm. Further, current control can be compensated by measuring the offset while the inverter is stopped.

  However, in the three-phase PWM converter, even if the operation for controlling the DC voltage to be constant is stopped (the gate of the switching element is cut off), if a load is connected to the DC circuit, the capacitor input type rectifier circuit will be connected to the AC power supply side. Therefore, the same abnormality determination method as the motor drive inverter cannot be applied.

  For this purpose, if the load of the three-phase PWM converter is disconnected, the offset voltage can be measured and the presence or absence of an abnormality can be determined. However, it is essential to install a load switch. Operation is required.

  The same applies to motor-driven inverters. However, when the offset voltage of the Hall CT fluctuates due to a temperature change or the like during the operation of the three-phase PWM converter, an abnormality determination cannot be made and erroneous offset voltage compensation is performed.

  An object of the present invention is to provide an offset voltage detection device for a three-phase PWM converter that solves the above-described problems and is capable of determining an offset voltage abnormality of the Hall CT and further compensating for the offset voltage.

  In order to solve the above problems, the present invention records or stores the offset voltage of the Hall CT at the time when no current flows in the Hall CT of the three-phase PWM converter, and compares the recorded or stored value with a determination threshold value. An offset voltage abnormality can be determined, and offset voltage compensation control can be performed using a recorded or stored offset voltage.

(1) A three-phase PWM converter main circuit configured as a capacitor input type rectifier circuit, and a current detection device that detects an input current from the three-phase power source to the main circuit by a Hall element type current detector and a current detection circuit. And a three-phase PWM converter comprising a control device for controlling the PWM converter main circuit to a power factor of 1,
Means for recording the output of the current detection circuit in a non-volatile memory as an offset voltage of the Hall element type current detector when the three-phase power supply voltage of the main circuit of the three-phase PWM converter is interrupted;
When the three-phase power supply of the three-phase PWM converter main circuit is turned on, the current detection circuit output value read from the non-volatile memory is compared with a determination threshold, and when the determination threshold is exceeded, the Hall element type current detection is performed. Means for determining that the offset voltage of the device is abnormal.

(2) A three-phase PWM converter main circuit configured as a capacitor input type rectifier circuit, and a current detection device that detects an input current from the three-phase power source to the main circuit by a Hall element type current detector and a current detection circuit. And a three-phase PWM converter comprising a control device for controlling the PWM converter main circuit to a power factor of 1,
While the operation of the main circuit of the three-phase PWM converter is stopped, the output of the current detection circuit after a predetermined delay time from the timing when the three-phase power supply phase voltage of the converter has passed the zero level is the offset of the Hall element type current detector. Means for recording or storing in the memory as a voltage;
A means for comparing the value of the current detection circuit output read from the memory with a determination threshold and determining that the offset voltage of the Hall element type current detector is abnormal when the determination threshold is exceeded. Features.

(3) A three-phase PWM converter main circuit configured as a capacitor input type rectifier circuit, and a current detection device for detecting an input current from the three-phase power source to the main circuit by a Hall element type current detector and a current detection circuit. And a three-phase PWM converter comprising a control device for controlling the PWM converter main circuit to a power factor of 1,
Means for continuously storing the current detection circuit output as an offset voltage of the Hall element type current detector in a memory at a timing when the power supply phase voltage passes through a zero level during operation of the three-phase PWM converter main circuit;
Means for obtaining an average value or a moving average value of the values stored in the memory;
A means for comparing the average value or the moving average value with a determination threshold value and determining that the offset voltage of the Hall element current detector is abnormal when the determination threshold value is exceeded.

  (4) The control device includes means for performing offset compensation control using the value read from the memory or the average value or moving average value as an offset voltage compensation signal of the Hall element current detector. And

  As described above, according to the present invention, the offset voltage of the hall CT is recorded or stored at the time when no current flows in the hall CT of the three-phase PWM converter, and the offset voltage is compared by comparing the recorded or stored value with the determination threshold value. To detect an abnormality and to enable offset voltage compensation control using the recorded or stored offset voltage, an abnormality of the Hall CT type current detector or current detection circuit is detected with the load device connected to the three-phase PWM converter. can do. Moreover, offset compensation by Hall CT of the three-phase PWM converter can be performed.

  Further, even when the offset voltage of the Hall CT fluctuates due to a temperature change or the like during the operation of the three-phase PWM converter, an abnormality determination can be made and no erroneous offset voltage compensation occurs.

(Embodiment 1)
FIG. 1 shows an embodiment of the present invention, and parts equivalent to those in FIG. The PWM controller 20 has a functional configuration including, for example, the gate drive circuit 8, the DC voltage setter 9, the voltage regulator 10, the multiplier 11, the current regulator 12, and the PWM logic circuit 13 in FIG. 6. Specifically, it is realized by a hardware configuration or a control computer and its software configuration.

  In the present embodiment, the output (Ir, It) of the current detection circuit is recorded in the nonvolatile memory when the three-phase power supply of the three-phase PWM converter is shut off, and the nonvolatile memory is stored at the next power-on of the three-phase PWM converter. As a result of reading the recorded value of the current detection circuit output from and comparing with the determination threshold value, an alarm is output if the determination threshold value is exceeded. Further, offset compensation is performed using the recorded value of the nonvolatile memory as the offset compensation value of the control device.

  In FIG. 1, an A / D converter 21 converts input currents Ir and It detected by the current detection circuit 6 into digital values. The nonvolatile memory 22 records the output of the A / D converter 21 as the offset voltage of the Hall CT. The power cutoff judgment unit 23 judges the cutoff of the power supply voltage of the three-phase PWM converter, and uses this judgment output as a recording control command for the nonvolatile memory 22. The comparison unit 24 reads the recorded value of the current detection circuit output from the nonvolatile memory at the next power-on of the three-phase PWM converter, and outputs a warning if the determination threshold is exceeded as a result of comparison with the determination threshold. If the recorded value is normal in the comparison result of the comparison unit 24, the control device 20 sets the recorded value in the memory 22 as the offset voltage compensation value, and performs offset-compensated PWM converter control.

  The power cutoff judgment of the three-phase PWM converter by the power cutoff judgment unit 23 is determined by stopping the operation of the three-phase PWM converter and the power supply from the AC power supply is lost, and the following three conditions are satisfied. Judgment is made.

  (A) The voltage signal of the DC voltage detection circuit may once become larger than the determination threshold value.

  (B) The voltage signal of the power supply phase voltage detection circuit disappeared.

  (C) The voltage signal of the DC voltage detection circuit is smaller than the determination threshold value.

  Note that the condition (a) is added because there is a timing when the conditions (b) and (c) are satisfied immediately after the power is turned on, and a large inrush occurs until the charging of the capacitor of the DC unit is completed. This is to avoid detecting the current.

  According to the present embodiment, since the offset voltage is recorded only when the power of the PWM converter is shut down, the offset voltage value is recorded in the nonvolatile memory 22 before the control power is lost, and the offset is recorded when the power is turned on next time. When the voltage value is read from the memory 22 and the determination threshold value is exceeded, an alarm output of an offset voltage abnormality can be obtained. If the offset voltage is normal, the offset voltage compensation control can be performed using the offset voltage value recorded in the memory 22. Further, as in the prior art, it is unnecessary to detect an offset voltage by opening control / operation using a load switch.

  The A / D converter 21 and the non-volatile memory 22 can be used when the control device 20 has a computer configuration. The comparison unit 24 and the power shutoff determination unit 23 are realized by software processing of a computer mounted on the control device 20.

  As alarm output, an alarm that can be recognized by the operator, such as a buzzer and a blinking indicator, and a protective function of the control device are activated.

(Embodiment 2)
FIG. 2 shows another embodiment of the present invention. The difference from FIG. 1 is that a delay timing generation circuit 25 is provided in place of the power shutoff determination unit 23.

  In this embodiment, the current detection circuit output after a predetermined delay time (for example, 2 ms for a 50 Hz power supply and 1.7 ms for a 60 Hz power supply) from the timing when the power supply phase voltage passes the zero level while the three-phase PWM converter is stopped. Is recorded in the non-volatile memory, and the recorded value of the memory is compared with a determination threshold value, and if the determination threshold value is exceeded, an alarm for an abnormal offset voltage is output. Further, offset compensation is performed using the recorded value of the nonvolatile memory as the offset compensation value of the control device.

  The delay timing generation circuit 25 detects the zero level passage of each phase detection voltage Vr, Vt of the power supply phase voltage detection circuit 5 in a state where the operation stop signal of the three-phase PWM converter is given, and from this detection time point A timing signal with the above delay time is generated and used as a recording command to the nonvolatile memory 22.

  The relationship between the power supply phase voltage waveform and the phase current when the operation of the three-phase PWM converter is stopped is the same as that of the capacitor input type rectifier, and as shown in FIGS. 3 and 4, even if the load is connected, No current flows in the region from 30 deg to 45 deg from the zero cross phase of each phase voltage. Therefore, while the operation of the three-phase PWM converter is stopped, it is possible to record an offset voltage after a predetermined time (for example, 2 ms for a 50 Hz power source and 1.7 ms for a 60 Hz power source) after the power source phase voltage passes through the zero level. .

  According to the present embodiment, an abnormality of the current detector or the current detection circuit can be detected while the operation of the three-phase PWM converter is stopped. Moreover, offset voltage compensation of the three-phase PWM converter can be performed. Further, as in the prior art, it is unnecessary to detect an offset voltage by opening control / operation using a load switch.

  In the embodiment, the case where the offset voltage of the Hall element type current detector is recorded in the nonvolatile memory has been described. However, if the control power supply is not stopped, it can be stored in the RAM.

(Embodiment 3)
FIG. 5 shows another embodiment of the present invention. The difference from FIG. 2 is that a zero level detection circuit 26 is provided instead of the delay timing generation circuit 25, and the offset value is continuously generated by the RAM 27 instead of the nonvolatile memory 22. The average value of the offset value is obtained by the moving average calculation unit 28, and abnormality is determined based on the moving average value.

  In this embodiment, during the operation of the three-phase PWM converter, the current detection circuit output is continuously recorded in the memory at the timing when the power supply phase voltage passes through the zero level, the moving average value of the value is obtained, and this average value is obtained. When the value exceeds the determination threshold, an offset voltage abnormality alarm is output. Further, offset compensation is performed using the average value as the offset compensation value of the control device.

  If the control of the power factor 1 of the three-phase PWM converter is normally performed, the input phase current is a sine wave having the same phase as the power supply phase voltage. Therefore, at the timing when the power supply phase voltage passes through the zero level, the input phase current The current is also zero. Therefore, the Hall CT output at the timing when the power supply phase voltage passes through the zero level is recorded. However, in this embodiment, since the ripple component accompanying switching is superimposed on the Hall CT output, the recording at the time of passing through the zero level is continuously performed, and the average value is used as the offset voltage for abnormality determination, thereby causing the ripple. Get detection offsetting minutes.

  According to the present embodiment, an abnormality of the current detector or the current detection circuit can be detected even during the operation of the three-phase PWM converter (load connection state), and offset voltage compensation is performed based on the detected value. be able to. In addition, the abnormality of the Hall CT can be determined periodically during the operation of the three-phase PWM converter, the abnormality of the Hall CT offset voltage due to temperature change etc. can be continuously monitored, and the offset compensation according to the offset voltage fluctuation Can do.

  In the present embodiment, instead of the moving average value, an average value of a plurality of continuous detection values may be used.

The block diagram of the three-phase PWM converter which shows Embodiment 1 of this invention. The block diagram of the three-phase PWM converter which shows Embodiment 2 of this invention. Phase rotation direction: positive relation between phase voltage and phase current. Phase rotation direction: Relationship diagram of phase voltage and phase current in reverse. The block diagram of the three-phase PWM converter which shows Embodiment 3 of this invention. The example of a structure of the main circuit and control apparatus of the conventional three-phase PWM converter.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Three-phase alternating current power supply 2 PWM rectifier circuit 3 Capacitor 4 Input filter 5 Power supply phase voltage detection circuit 6 Input current detection circuit 7 DC voltage detection circuit 20 PWM controller 21 A / D converter 22 Non-volatile memory 23 Power supply interruption determination part 24 Comparator 25 Delay timing generator 26 Zero level detector 27 RAM
28 Moving average calculator

Claims (4)

A three-phase PWM converter main circuit configured in a capacitor input type rectifier circuit, and a current detection device for detecting an input current from a three-phase power source to the main circuit by a Hall element type current detector and a current detection circuit, In a three-phase PWM converter comprising a control device for controlling the PWM converter main circuit to a power factor of 1,
Means for recording the output of the current detection circuit in a non-volatile memory as an offset voltage of the Hall element type current detector when the three-phase power supply voltage of the main circuit of the three-phase PWM converter is interrupted;
When the three-phase power supply of the three-phase PWM converter main circuit is turned on, the current detection circuit output value read from the non-volatile memory is compared with a determination threshold, and when the determination threshold is exceeded, the Hall element type current detection is performed. An offset voltage detecting device for a PWM converter, characterized by comprising means for determining that the offset voltage of the converter is abnormal. A three-phase PWM converter main circuit configured in a capacitor input type rectifier circuit, and a current detection device for detecting an input current from a three-phase power source to the main circuit by a Hall element type current detector and a current detection circuit, In a three-phase PWM converter comprising a control device for controlling the PWM converter main circuit to a power factor of 1,
While the operation of the main circuit of the three-phase PWM converter is stopped, the output of the current detection circuit after a predetermined delay time from the timing when the three-phase power supply phase voltage of the converter has passed the zero level is the offset of the Hall element type current detector. Means for recording or storing in the memory as a voltage;
A means for comparing the value of the current detection circuit output read from the memory with a determination threshold and determining that the offset voltage of the Hall element type current detector is abnormal when the determination threshold is exceeded. A PWM converter offset voltage detection device. A three-phase PWM converter main circuit configured in a capacitor input type rectifier circuit, and a current detection device for detecting an input current from a three-phase power source to the main circuit by a Hall element type current detector and a current detection circuit, In a three-phase PWM converter comprising a control device for controlling the PWM converter main circuit to a power factor of 1,
Means for continuously storing the current detection circuit output as an offset voltage of the Hall element type current detector in a memory at a timing when the power supply phase voltage passes through a zero level during operation of the three-phase PWM converter main circuit;
Means for obtaining an average value or a moving average value of the values stored in the memory;
The PWM comprising: a means for comparing the average value or the moving average value with a determination threshold and determining that the offset voltage of the Hall element current detector is abnormal when the determination threshold is exceeded. Converter offset voltage detector. The control device includes means for performing offset compensation control using a value read from the memory, or the average value or moving average value as an offset voltage compensation signal of the Hall element type current detector. Item 4. The offset voltage detection device for a PWM converter according to any one of Items 1 to 3.

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