JP2007014690A - Game controller - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a game controller capable of surely finding the incorporation of a fraudulent microcomputer by performing mutual authentication between chips, avoiding the increase of the number of signal terminals of the chip and suppressing the enlargement of a package size. <P>SOLUTION: Information for judging the validity of a one-chip microcomputer (75) for a game and chips (50 and 51) for input/output ports is transmitted and received through optical transmission/reception parts (89, 90, 98 and 99). The need of pattern wiring for that on a game control board is eliminated. Further, the need of the signal terminal for inputting and outputting the information for judging the validity in the respective packages of the one-chip microcomputer (75) for the game and the chips (50 and 51) for the input/output ports is eliminated as well, and the efficiency of the package size is improved. Additionally, a fraudulent circuit is not easily interposed on an information transmission route between the one-chip microcomputer for the game and the chips for the input/output ports, thereby improving the reliability of the controller. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a game control device used in a gaming machine such as a pachinko gaming machine or a throttle machine, and more particularly to a game control device in which measures for preventing illegal microcomputer incorporation are taken.

  A gaming machine, for example, a pachinko gaming machine, detects a winning or passing of a hit ball at a winning opening provided on the front surface of the gaming board with a sensor, takes the sensor signal into the gaming control device, and receives a command from the gaming control device. In response, a so-called electric accessory such as an electric open / close winning device such as a tulip on the front of the game board or a symbol variation display device such as a liquid crystal display is driven.

  FIG. 11A is a schematic configuration diagram of the gaming machine. A game control device 1 provided in the gaming machine includes an input port 2 for capturing various game sensor signals, an output port 3 for outputting various game drive signals, and a game microcomputer (hereinafter referred to as a game one-chip microcomputer) 4. And a data bus 5 for connecting these components.

  Since the operation of the gaming machine, in particular, the operation of the electric accessory is controlled exclusively by the game program incorporated in the game one-chip microcomputer 4, the game one-chip microcomputer 4 is replaced with an illegally modified one. This has become a social problem.

  As a countermeasure against such an illegal act, for example, one described in Patent Document 1 (hereinafter referred to as the first conventional technique) is known. In the first prior art, unique identification information (hereinafter referred to as a chip ID) of the gaming one-chip microcomputer 4 is written in the gaming one-chip microcomputer 4 in advance, and the gaming monitoring device 6 is provided outside the gaming control device 1. And the chip ID is transmitted from the game one-chip microcomputer 4 to the game monitoring device 6 as necessary. The game monitoring device 6 stores and saves the chip ID when receiving the first chip ID, and compares the chip ID stored and saved with the received chip ID when receiving the second and subsequent times. In the case of collation match, it is determined that the gaming one-chip microcomputer 4 is a genuine product.

  However, in the first prior art, the chip ID previously written in the game one-chip microcomputer 4 is evaluated by the external game monitoring device 6 to determine whether or not it is a genuine product. Therefore, there is a problem that the following illegal acts cannot be dealt with at all.

  FIG. 11B is a conceptual diagram of fraud. In this figure, the game control device 1 ′ is similar to the game control device 1 described above in that it includes an input port 2, an output port 3 ′, a game one-chip microcomputer 4, and a data bus 5. The difference is that an illegal microcomputer (hereinafter referred to as illegal microcomputer 7) having the same function as the gaming one-chip microcomputer 4 is incorporated in the output port 3 ', and the gaming one-chip microcomputer 4 The connection with the data bus 5 is cut off (cut point 8). In addition, the position of the cutting location 8 is for convenience. In practice, for example, it is often cut off on the back side of a mounted part such as a game one-chip microcomputer 4 and camouflaged so that it is not easily apparent.

  When a request for unique identification information (chip ID) is made from the external game monitoring device 6 to the regular game one-chip microcomputer 4 of the game control device 1 ′ in which such an illegal act has been performed, the game one The chip microcomputer 4 transmits its own chip ID to the game monitoring device 6 as usual. Therefore, the game monitoring device 6 stores and saves the chip ID if the chip ID is received for the first time, and stores and saves the chip ID and the received chip ID if received for the second time or later. Therefore, it is a matter of course that the collation always coincides with each other, and as a result, it is not possible to overlook an illegal act (the existence of the illegal microcomputer 7).

  On the other hand, the actual game control of the gaming control device 1 'in which the illegal act has been performed is not performed by the regular gaming one-chip microcomputer 4, but by the unauthorized microcomputer 7 incorporated in the output port 3'. This is because the unauthorized microcomputer 7 hijacks the data bus 5.

  Incidentally, in FIG. 11B, the illegal microcomputer 7 is incorporated in the output port 3 ', but this is an example. The conditions for the components to be incorporated are that the package size is large and that the data bus 5 is easily hijacked. As long as these points (package size and data bus hijackability) are satisfied, the unauthorized microcomputer 7 may be incorporated in a component other than the output port 3 ′, for example, the input port 2.

  As a technique that can solve the problems of the first conventional technique, for example, a technique described in Patent Document 2 (hereinafter referred to as a second conventional technique) is known. In short, this second prior art is based on the mutual authentication of the unique identification information (chip ID) among a plurality of chips mounted on one gaming machine, thereby making an illegal act (modification) on the gaming one-chip microcomputer itself. In addition, it is possible to detect fraudulent acts (incorporation of illegal microcomputers) into other peripheral chips such as an input / output port chip.

  Specifically, in a gaming machine game control board in which a main CPU, a sub CPU and / or an I / O chip are mounted on a main board or a sub board, the main CPU and the sub CPU are a game control CPU, an identification circuit, It is composed of a chip ID storage circuit of a game control CPU, an ID number storage circuit unique to another chip, a monitoring timer and reset circuit and / or a random number generation circuit, and the I / O chip is unique to an identification circuit and another chip. An ID number storage circuit, a chip ID storage circuit of an I / O chip, a monitoring timer, a reset circuit, and / or a random number generation circuit. The main CPU and each sub CPU and / or I / O chip communicate with a communication line. The main CPU and each sub CPU and / or I / O chip mutually confirm the chip ID. And the one in which mutual chip is configured to authenticate whether legitimate.

JP 2001-137516 A JP 2004-89701 A

  However, in the second prior art described above, by performing mutual authentication of chip IDs among a plurality of chips mounted on one gaming machine, an illegal act (modification or modification) to the gaming one-chip microcomputer itself is performed. Of course, it is useful to be able to detect fraudulent acts (incorporation of illegal microcomputers) into other peripheral chips such as I / O port chips. Since the exchange is performed via the “communication line”, there are the following disadvantages.

  Here, the “communication line” in the second prior art is understood to use a physical signal line from the description of paragraph number “0016” of FIG. Further, since there is an explanation that the communication line “configures a star connection”, it is understood that the communication line is a communication line shared by a plurality of chips, that is, a data bus.

  As a result, in the second prior art, all the chips that perform mutual authentication must be provided with signal terminals for connection to the data bus (communication line). Since the bus is composed of a plurality of signal lines, and the number of the above signal terminals is also required by the number of the signal lines, the signal terminals of all the chips that perform mutual authentication are greatly increased. However, there is a problem that the size of the package is increased.

  Further, since all chips that perform mutual authentication are connected by a data bus (communication line), there is a problem that, for example, an unauthorized circuit may be secretly inserted on the data bus.

  Accordingly, an object of the present invention is to make it possible to reliably detect the incorporation of an unauthorized microcomputer by performing mutual authentication between chips, and to prevent an increase in the number of signal terminals of the chip and suppress an increase in package size. The object is to provide a game control device.

According to the first aspect of the present invention, there is provided a gaming one-chip microcomputer packaged including a gaming CPU for performing gaming control of a gaming machine, and an input for transmitting an input signal from a detecting means used in the gaming to the gaming CPU. A gaming circuit board including a port circuit and an input / output port chip packaged including an output port circuit for transmitting an output signal from the gaming CPU to a driving source used in a game, and the gaming one chip A game control device configured to transmit and receive data for mutual authentication between the microcomputer and the input / output port chip and to enable normal game control on condition that the authentication result is valid Each of the gaming one-chip microcomputer package and the input / output port chip package transmits data to the other chip by optical communication. An optical transmission / reception unit that performs communication, wherein the gaming one-chip microcomputer includes first validity determination means for determining the validity of the input / output port chip based on data received through the optical transmission / reception unit; A game control disabling device for disabling the game control executed by the gaming CPU when the correctness is not determined by the first validity determining device, and the input / output port chip comprises: A second legitimacy judging means for judging legitimacy of the gaming one-chip microcomputer based on data received through the optical transmitter / receiver, and the legitimacy when the legitimacy is not judged by the second legitimacy judging means; A game control device comprising a signal transmission restricting means for restricting signal transmission between a CPU and the input port circuit or the output port.
In the invention according to claim 2, a data bus for transmitting data between the gaming one-chip microcomputer and the input / output port chip is formed on the game control board by pattern wiring. The gaming one-chip microcomputer includes a signal terminal for connecting the data bus and the gaming CPU, and the input / output port chip connects the data bus to the input port circuit and the output port circuit. 2. The game control device according to claim 1, further comprising a signal terminal for transmitting the input signal and the output signal via the data bus.
A third aspect of the present invention is the game control apparatus according to the first aspect, wherein the input signal and the output signal are transmitted via the optical transmission / reception unit.
According to a fourth aspect of the present invention, the gaming one-chip microcomputer includes an optical transmission / reception unit for transmitting information to an inspection device that determines the legitimacy of the gaming one-chip microcomputer. The game one-chip microcomputer is placed between the game one-chip microcomputer and the inspection device outside the case member, and the validity of the game one-chip microcomputer is determined via the optical transmission / reception unit. The game control device according to any one of claims 1 to 3, wherein the game control device is configured to transmit information for the purpose.
According to a fifth aspect of the present invention, the game control board is accommodated in a predetermined case member, and a reflection portion for reflecting a predetermined optical signal is formed on the case member, and the game one-chip microcomputer is provided. 4. The optical signal transmitted between the optical transceiver unit and the optical transceiver unit of the input / output port chip is reflected by the reflecting unit. 5. It is a game control apparatus of description.

According to the first aspect of the present invention, since the information for determining the validity is transmitted / received via the optical transmitter / receiver, there is no need for a pattern wiring on the game control board. Further, the package of the game one-chip microcomputer and the input / output port chip does not require a signal terminal for inputting / outputting information for validity determination, thereby reducing the package size.
In addition, because it is configured to send and receive information for legitimacy determination via the optical transceiver, information transmission between the gaming one-chip microcomputer and the input / output port chip is illegal (compared to pattern wiring). This makes it difficult to intervene a simple circuit and can improve the reliability of the game control device.
According to the second aspect of the present invention, the authentication information is exchanged by the optical signal, so that the safety is high, and the data bus data is input / output by the pattern wiring, so that the data transmission can be speeded up. Since a general-purpose IC chip can be connected and expanded in addition to the game one-chip microcomputer and the input / output port chip, the degree of freedom in designing a circuit unrelated to authentication can be increased.
According to the third aspect of the present invention, the signal terminals for the data bus can be reduced from both the game one-chip microcomputer and the input / output port chip. For this reason, the package size can be reduced and the signal terminals can be effectively used (the number of usable terminals can be increased even with the same number of signal terminals as in the past).
According to the fourth aspect of the present invention, there is no illegal circuit between the inspection device and the game one-chip microcomputer, and more reliable legitimacy monitoring can be performed. In addition, since data transmission between the inspection device and the gaming one-chip microcomputer is performed wirelessly, a connector between the two can be eliminated, and various inconveniences related to connector connection, for example, connector terminals associated with connector attachment / detachment Damage and the like can be avoided, and the life of the game control device can be extended.
According to the fifth aspect of the present invention, in order to perform data transmission / reception by non-line-of-sight communication, the distance between the game one-chip microcomputer arranged on the game control board and the input / output port chip is increased. Even if there are obstacles between chips, information can be accurately transmitted. For this reason, it is possible to relax the chip arrangement restrictions and increase the degree of design freedom.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings, taking application to a pachinko gaming machine as an example.

First, the configuration of the pachinko gaming machine will be described.
FIG. 1 is a front view of a pachinko gaming machine 10 (game machine). The pachinko gaming machine 10 is not particularly limited to this, but a large number of pachinko gaming machines 10 are provided in a game hall by pairing a gaming machine main body 11 and a card unit 12 provided on the side of the gaming machine main body 11.

  The gaming machine main body 11 is provided with a frame-shaped front frame 14 on the front side of the machine frame 13 so as to be openable and closable, and a glass frame 16 and an open / close door 17 can be opened and closed on the front side of the window portion 15 established in the front frame 14. A game board 18 (see FIG. 2 for the detailed configuration of the game board 18) is mounted on the rear side of the window part 15 so as to close the window part 15, and a lower front surface of the front frame 14 is attached. A ball receiving tray 19 and a game ball (pachinko ball) launching operation handle 20 are attached to the side, and a ball supply tray 21 is provided on the open / close door 17 as a game ball storage means. A game ball supplied to a mechanism (not shown) is ejected and reaches the game board 18.

  The card unit 12 processes a prepaid card for lending a game ball. When a player borrows a game ball with a prepaid card, the card unit 12 inserts a prepaid card into the card insertion slot 22 of the card unit 12, If it is possible to lend with the prepaid card, the usable frequency is displayed on the frequency display 23 provided on the gaming machine side, and a ball lending switch 24 provided on the left side of the frequency display 23 is displayed. A ball lending operation for a unit frequency (for example, 1 frequency corresponding to 100 yen) is performed each time the operation is performed. When the card return switch 25 on the right side of the ball lending switch 24 is operated, the prepaid card is discharged from the card insertion slot 22 of the card unit 12.

  FIG. 2 is a front view of the game board 18. An image display unit (also referred to as a decorative symbol display unit) 27a of the effect control device 27 is provided at substantially the center of the game area 26 formed on the surface of the game board 18. The image display portion 27a is provided at a position deeper than the front surface of the recess formed in the center case 27b.

  The display screen of the image display unit 27a of the effect control device 27 is composed of, for example, an LCD (liquid crystal display), a CRT (CRT), or the like. A plurality of variable display areas are provided in the area where the image of the display screen can be displayed. Identification information (decorative symbols: symbols that are displayed in a variable manner corresponding to special symbols) and special symbol variable displays are provided in each variable display region. A character that produces the game is displayed. That is, in the variable display areas provided on the left, middle, and right of the display screen, decorative symbols assigned as identification information (for example, numbers from “0” to “9” and “A” and “B” are displayed. 12 kinds of English characters) are variably displayed (variable display) and a special variability display game is played. In addition, an image based on the progress of the game is displayed on the display screen.

  A decoration device 28 such as a decoration lamp or LED is provided on the upper right side of the image display unit 27a. These decoration devices 28 emit decoration light in various modes according to the progress of the game when an event such as a big hit occurs. To do. Further, on the frame of the center case 27b, a ball passage (hereinafter referred to as a “warp inlet 29”) called “warp inlet” is provided at a position on the left side of the image display portion 27a. The game ball that has flowed down to the warp inlet 29 is discharged from the warp outlet 30, passes through a groove provided on the lower side of the image display unit 27a, and flows into a hole provided directly below the center of the image display unit 27a. Then, by discharging from a communication port provided directly above the start port 31, the possibility of winning a prize to the start port 31 described later is enhanced.

  A normal symbol start gate 32 and a direction changing member 33 are arranged on the left side of the center case 27b. In addition, a plurality of (three on the left side and one on the right side) general winning holes 34 are arranged below the center case 27b, and a start opening provided with an ordinary variable winning device (normal electric accessory) 35. 31 and a special variable winning device 37 having a special winning opening 36 are arranged. On the left side of the special variation winning device 37, there is provided a special symbol display 38 (auxiliary game means) for displaying the special symbol variation display and the special symbol winning memory number of the special symbol variation display game. The special figure indicator 38 is provided with a special figure display part 38a and a special figure storage display part 38b.

  Further, on the right side of the special variation winning device 37, a normal symbol variation display game is executed, or a general symbol display 39 for displaying the normal symbol winning memory number is provided. The universal map display 39 is provided with a universal map display unit 39a and a universal map storage display unit 39b.

  The game of the pachinko gaming machine 10 is performed by launching a game ball toward the game area 26 from a hitting ball launching device (not shown). The launched game balls flow down the game area 26 while changing the rolling direction by a direction changing member 33 such as a windmill or a nail arranged in various places in the game area 26, and the general winning port 34, the start port 31 or a special A prize is won in the variable winning device 37 or is discharged from an out port 40 provided at the bottom of the game area 26. The winning of a game ball to the general winning opening 34 arranged on the left side of the gaming area 26 is detected by a winning opening sensor L60 (see FIG. 4) provided in the general winning opening 34. In addition, winning of a game ball to the general winning opening 34 arranged on the right side of the gaming area 26 is detected by a winning opening sensor R61 (see FIG. 4) provided in the general winning opening 34. Note that “L” and “R” of the winning opening sensor L60 and the winning opening sensor R61 indicate their positions (left and right).

  When a game ball wins the start opening 31, the general winning opening 34, and the big winning opening 36, the number of winning balls corresponding to the type of winning opening is discharged from the payout unit (discharge device) and supplied to the ball supply tray 21. Is done. The winning of the game ball to the start port 31 is detected by the start port SW57 (see FIG. 4). The special symbol random number counter value extracted by the passing timing of the game ball is stored as a special symbol winning memory in a special symbol storage area in the game control device 41 described later for a predetermined number of times (for example, a maximum of four times). The The stored number of special symbol winning memories is displayed on the special symbol memory display unit 38b. The game control device 41 performs a special figure variation display game in the special figure display unit 38a based on the special symbol winning memory.

  When there is a winning game ball at the starting port 31, the image display unit 27a displays the decorative symbols (identification information) composed of the above-described numbers in order and displays an image related to the special-figure display game. . In other words, the decorative display corresponding to the display of the special figure display unit 38a is displayed on the image display unit 27a. The special figure display unit 38a has a role of accurately informing the player of the change display state and the change display result, and the image display unit 27a has a role of producing various displays for improving the interest.

  When a winning at the start port 31 is made at a predetermined timing (specifically, when the special symbol random number counter value at the time of winning detection is a winning value), a big hit state occurs, and the display symbol has a specific result mode. To derive. Specifically, the special symbol display unit 38a stops at a single-digit special symbol that is a winning symbol, and the image display unit 27a stops when three decorative symbols are aligned (big hit symbol). At this time, the special variable winning device 37 is closed so that the special winning opening 36 does not accept the game ball for a predetermined time (for example, 30 seconds) by energizing the special winning opening SOL (solenoid) 65 (see FIG. 4). The state (a state disadvantageous to the player) is converted to an open state (a state advantageous to the player) in which the game ball can be easily received. That is, since the special winning opening 36 is greatly opened for a predetermined time, a game value is given that the player can acquire many game balls during this time.

  The winning of the game ball to the special variation winning device 37 is detected by the count SW 58 (see FIG. 4). The passing of the game ball to the normal symbol start gate 32 is detected by the gate SW 59 (see FIG. 4). The normal symbol random number counter value extracted by the passing timing of the game ball is stored in the normal symbol storage area in the game control device 41 as a normal symbol winning memory for a predetermined number of times (for example, up to four times). Then, the stored number of the normal symbol winning memory is displayed on the general symbol memory display unit 39b.

  When the game ball passes through the normal symbol start gate 32, the game control device 41 starts a general symbol variation display game using the normal symbol display 39 based on the normal symbol winning memory. That is, when the passage detection to the normal symbol start gate 32 is performed at a predetermined timing (specifically, when the normal symbol random number counter value at the time of passage detection is a winning value), the winning state is set and the normal symbol display is performed. The normal symbol displayed on the part 39a stops in the hit state. At this time, the normal variation winning device 35 provided at the upper part of the start port 31 is converted so that the entrance to the start port 31 is expanded only for a predetermined time by energizing the ordinary electric power SOL 67 (see FIG. 4). The possibility of winning the game ball at the start port 31 is increased. The opening time of the normal variation winning device 35 is, for example, 2.9 seconds in the specific gaming state (probability variation state and variation time shortening state), and 0.5 seconds in the normal gaming state, depending on the gaming state. Should change.

  In this way, when a game ball wins the general winning opening 34, the start opening 31 and the big winning opening 36, the number of winning balls corresponding to the type of the winning winning opening is given from the payout unit (discharge device) to the front frame 14. Are discharged to the ball supply tray 21 or the ball tray 19.

  FIG. 3 is a rear view of the pachinko gaming machine 10. As shown in this figure, on the back of the pachinko gaming machine 10, a mechanism for realizing various functions as a gaming machine, for example, a game ball supplied from an island facility of a game hall is received and stored for lending. A mechanism that discharges balls and prize balls according to demand, game balls that are collected by winning at various prize holes provided on the game board, and games that are collected from the outlet without winning any prize In addition to a game ball collection mechanism that guides the ball to a collection ball conveyance path outside the machine, a game control device 41 that controls the overall progress of the game by controlling the operation of the game device provided on the game board 18, A discharge / launch control device 42 that performs discharge and shot control of the hit ball, a power supply device 43 that supplies predetermined power to each part, and the like are provided at appropriate positions. Note that the game control device 41 in this embodiment is detachably attached to a game board back surface constituent member 44 attached to the lower part of the back surface of the game board 18, and each device including the game control device 41 includes: As will be described later, each is covered with a transparent substrate case 101 (see FIG. 7) through which the contents can be seen.

  FIG. 4 is an electrical internal block configuration diagram of the game control device 41. The game control device 41 is connected between a game one-chip microcomputer 45 as a so-called “amusement chip” that controls an accessory necessary for a pachinko game and the like, and a communication terminal 47 mounted on an external information collection terminal device 46. Removes noise components of various detection signals relating to games detected by an external communication terminal 48 for exchanging data and a starting port SW57 described later, and if necessary, performs waveform shaping, signal level adjustment, etc. Filter circuit 49, input port chip 50 (input / output port chip) that selectively captures these detection signals, and various games related to games output from gaming one-chip microcomputer 45 via board 54 described later. Output port chip 51 (input / output port chip) for selectively outputting various drive signals and output port chip 5 Drive signals 52 and 53 that amplify the drive signal extracted from the drive signal to power that can drive a required control load, an in-board bus 54 (data bus), and reset signals for resetting each part of the game control device 41 A reset circuit 55 is provided, and a logic power supply circuit 56 that generates a power supply for logic for operating each part of the game control device 41 is provided.

  In the input port chip 50, various sensors provided in the gaming machine main body 11 through the filter circuit 49, for example, a start port SW (switch) 57, a count SW 58, a gate SW 59, a winning port sensor L60, a winning port sensor. A detection signal from a detection means such as R61 is input, and various control loads such as electric accessories provided in the gaming machine main body 11 from the output port chip 51 via the drive circuits 52 and 53. For example, special figure display 62, special figure storage display 63, general figure display 64, general figure storage display 65, game state display 66, general electric power SOL67, big prize opening SOL68, discharge control device 69, production Drive signals to the control device 27, the panel external information 71, and the like are taken out.

  As described above, the information collecting terminal device 46 includes the communication terminal 47 connected to the external communication terminal 48 of the game control device 41, as well as the information connected to the board external information 71 and the card unit 12 of the pachinko gaming machine 10. A collection terminal 72 and the like are provided, and various information signals from the pachinko gaming machine 10 such as a sales signal, a supply ball number signal, a collected ball number signal, a jackpot signal, a special figure rotation signal, a probability variation signal, and the like are captured. Via the game hall internal network, necessary information is transmitted to a not-shown on-site management device, and the validity evaluation of the game one-chip microcomputer 45 mounted on the game control device 41, that is, the game one A chip ID transmission request is sent to the chip microcomputer 45 regularly or irregularly, and in response to the request, the gaming one-chip microcomputer 45 One-chip microcomputer for gaming by storing and storing the transmitted chip ID in the first reception and comparing the stored chip ID with the received chip ID in the second and subsequent receptions Security processing such as 45 validity evaluation is executed.

  Such a security measure is beneficial in that it can detect an illegal act (modification or replacement) on the gaming one-chip microcomputer 45 itself, but other peripheral chips while leaving the regular gaming one-chip microcomputer 45 left. For example, it is impossible to cope with an illegal act of incorporating an illegal microcomputer into the input port chip 50 or the output port chip 51.

  As explained at the beginning, the legitimate gaming one-chip microcomputer 45 of the gaming control device 41 in which the illegal act has been performed is always operating normally, and in response to a request from the information collecting terminal device 46 This is because the correct chip ID is returned. On the other hand, the actual game control is not performed by the regular game one-chip microcomputer 45, and the illegal microcomputer (incorporated in the input port chip 50 or the output port chip 51). This is because it is performed by the unauthorized microcomputer 7 in FIG.

  Therefore, in the present embodiment, the target chip of the illegal act which is a problem is a peripheral chip in addition to the gaming one-chip microcomputer 45, which has a relatively large package and is connected to the in-board bus 54. In particular, focusing on the fact that they are the input port chip 50 and the output port chip 51, those target chips (the game one-chip microcomputer 45, the input port chip 50 and the output port chip 51) Mutual authentication is performed between them, and the authentication result is output to the information collecting terminal device 46 or output to the inspection device 73 as necessary.

  Furthermore, the feature of this embodiment is that data necessary for the mutual authentication is transmitted and received wirelessly. That is, the gaming one-chip microcomputer 45, the input port chip 50, the output port chip 51, and the inspection device 73 are each referred to as an “optical transceiver” (reference numeral 89 in FIG. 90, 98, 99), and a gaming one-chip microcomputer 45 collects the authentication data (chip ID) of each chip and outputs it to the information collecting terminal device 46, or an inspection device used as necessary 73 is output. Here, the optical communication by the “optical transceiver” (see reference numerals 89, 90, 98, 99 in FIG. 5) is so-called “visible light communication” (VLCC) using light in the visible light region. It is desirable that This is because visible light is safer for humans than infrared rays and radio waves, and there is no legal regulation like radio waves. In addition, white light emitting diodes (LEDs) with excellent responsiveness have been put into practical use, and high-speed communication can be performed by using the LEDs (maximum communication of several Gbps is possible at a distance of several centimeters. )

  FIG. 5 is a block diagram of the game one-chip microcomputer 45, the input port chip 50, the output port chip 51, and the inspection device 73.

  First, the gaming one-chip microcomputer 45 is a one-chip configuration in which a gaming block A for performing gaming control and a management block B (first legitimacy judging means) for managing information are mounted on a common semiconductor substrate. It is. The game block A includes a reset circuit 74, a clock circuit 75, a chip selection circuit 76, a CTC (Counter Timer Circuit) 77, an interrupt controller 78, an external bus interface 79, a game CPU 80, and a game program in a nonvolatile manner. A game ROM 81 for storing the game, a game RAM 82 used as a work area for the game program, and an in-board game control block bus 83 are included.

  The game CPU 80 is not shown in the figure, but various register groups, arithmetic / logic units (ALU), instruction registers (IR), decoders, program counters (PC), stack pointers (SP), data buses connecting these, addresses A CPU core including a bus and various control units in the core, for example, a CPU core of the Z80 architecture, and a game program stored in the game ROM 81 is loaded into the game RAM 82 and executed, whereby the game of the pachinko gaming machine 10 Various functions necessary for control are realized in software.

  The gaming RAM 82 corresponds to the main memory of the gaming CPU 80, and is composed of, for example, a high-speed semiconductor device such as SRAM, and is used as a work area (working area) when executing processing based on the gaming program in the gaming block A. . Note that the gaming RAM 82 can be provided with a battery backup function using a dedicated terminal assigned to one of the terminal groups of the gaming one-chip microcomputer 45, and after the pachinko gaming machine 10 is powered off. It is possible to hold the stored contents.

  The reset circuit 74 resets the game CPU 80 in response to a system reset signal generated by a power-on detection circuit (not shown) when the pachinko gaming machine 10 is turned on, and also allocates various internal resources of the game one-chip microcomputer 45. In the initial state, the interrupt controller 78 generates various interrupt signals periodically or irregularly.

  The clock circuit 75 generates a clock signal necessary for the operation of each block of the game one-chip microcomputer 45 including the game CPU 80 based on a reference signal generated by a high-precision oscillator (not shown). Alternatively, the number of clock inputs is counted according to a mode such as a counter mode to determine whether or not an interrupt is possible.

  The chip selection circuit 76 generates and outputs an input port chip selection signal CSin and an output port chip selection signal CSout in accordance with the control from the gaming CPU 80. These chip selection signals CSin and CSout are composed of a plurality of signals corresponding to the number of input ports of the input port chip 50 and the number of output ports of the output port chip 51. For example, a signal is transmitted via the input port chip 50. In order to capture (detection signal from the start port SW57 etc.), the chip selection signal CSin corresponding to the input signal is activated. Alternatively, when a certain load (such as the special figure display 62) is driven via the output port chip 51, the chip selection signal CSout corresponding to the load is activated.

  The external bus interface 79 controls data input / output between the in-board game control block bus 83 and the in-board bus 54 of the game control device 41 (see FIG. 4).

  Next, the configuration of the management block B that performs information management in the gaming one-chip microcomputer 45 will be described. The management block B includes a management farm 84, a management work RAM 85, a security memory 86, a bus monitor circuit 87, a communication port 88, a chip optical transceiver 89 (optical transceiver), and an inspection device light. A transmission / reception unit 90 (optical transmission / reception unit) and a management block side bus 91 are included. These optical transmission / reception units 89 and 90 receive light signals from a light emitting unit such as an LED that converts arbitrary data into an optical signal and transmits it to the optical transmission / reception unit on the other side, and an optical signal from the other side's optical transmission unit. It has a known configuration including a light receiving unit such as a photodetector that restores the original data.

  The management farm 84 stores a boot program, and when the game one-chip microcomputer 45 is system reset (more precisely, after the self-diagnosis of the management block B executed immediately after the system reset and the initialization process is normally completed). When this boot program is launched, a predetermined simple check is performed, and if it is normal, a protection setting process is executed, and then a predetermined address of the game program (a predetermined address in the address space of the gaming CPU 80; generally in the address space) The process is passed to the first address (0000h).

  The bus monitor circuit 87 monitors the state of the in-board game control block bus 83. When the in-board game control block bus 83 is not used by the game CPU 80, the in-board game control block bus 83 is used as necessary. The game ROM 81, the game RAM 82, the external bus monitoring circuit 78, and the like of the game block A are accessed via, and necessary data (such as the contents of the game program and the game RAM 82) is taken into the management block B.

  In the security memory 86 (configured by a one-time PROM), unique identification information (chip ID) used for identification of the gaming one-chip microcomputer 45 and determination of legitimacy is written. Hereinafter, for the convenience of explanation, the unique identification information used for identification of the gaming one-chip microcomputer 45 and determination of validity is referred to as “first chip ID”. Further, the unique identification information used for identification of the input port chip 50 and determination of validity is “second chip ID”, and the unique identification information used for identification of the output port chip 51 and determination of validity The identification information is referred to as “third chip ID”.

  The management work RAM 85 temporarily holds information on the game block A read through the bus monitor circuit 87 (game program, contents of the game RAM 82, etc.), and the chip ID (the game ID of the game one-chip microcomputer 45). The first chip ID) and the chip ID (second chip ID, third chip ID) of the peripheral chip (input port chip 50 or output port chip 51) taken in via the chip optical transceiver 89 are temporarily stored. Hold on.

  The communication port 88 communicates with the information collection terminal device 46, and in response to a request from the information collection terminal device 46, the storage contents of the management work RAM 85 (the contents of the game program and the game RAM 82 and the contents of the contents). 1 chip ID to 3rd chip ID) is transferred to the requesting information collecting terminal device 46.

  The input port chip 50 and the output port chip 51 have a common configuration, and the configuration of the output port chip 51 will be described as a representative. A plurality of port circuits 92 to 94 (in the input port chip 50). A plurality of input port circuits, a plurality of output port circuits in the case of the output port chip 51), a bus connection circuit 95, a chip ID (in the case of the input port chip 50, a second chip ID, an output) The port chip 51 includes an authentication code memory 96 that holds a third chip ID), a controller 97 (second validity determination means, signal transmission restriction means), and an inspection apparatus side optical transmission / reception unit 98, These input port chip 50 and output port chip 51 are connected to chip selection signals CSin, C from the chip selection circuit 76 of the game one-chip microcomputer 45. According to out, a required port is opened, and in response to a signal from the chip optical transmission / reception unit 89 of the gaming one-chip microcomputer 45, a chip ID held in the authentication code memory 96 (which matches the input port chip 50). The second chip ID, or the third chip ID for the output port chip 51) is read by the controller 97, and the chip ID is read by the game one-chip microcomputer 45 via the inspection device side optical transceiver 98. It returns wirelessly to the chip optical transceiver 89. The inspection device side optical transmission / reception unit 98 receives light signals from a light emitting unit such as an LED that converts arbitrary data into an optical signal and transmits the optical signal to the other side's optical transmission / reception unit, and the other side's optical transmission unit. In other words, it has a known configuration including a light receiving unit such as a photodetector that restores the original data.

  The game one-chip microcomputer 45 includes the chip ID (first chip ID) of the game one-chip microcomputer 45 and the chip ID (second chip ID) of the input port chip 50 in addition to the required information of the game control block A. The chip ID (third chip ID) of the output port chip 51 is output to the information collection terminal device 46 via the communication port 88, or when the inspection device 73 is used, the inspection device light At least the first chip ID, the second chip ID, and the third chip ID of the above information are output to the optical transmission / reception unit 99 of the inspection device 73 via the transmission / reception unit 90. The optical transmission / reception unit 99 receives light signals from the light emitting unit such as an LED that converts arbitrary data into an optical signal and transmits the optical signal to the counterpart optical transmission / reception unit, and the original optical transmission unit. It has a known configuration including a light receiving unit such as a photodetector that restores data.

  The game control device 41 having such an electrical block configuration sequentially executes the game program stored in the game one-chip microcomputer 45, and through the input port chip 50, the start port SW57, the count SW58, While taking in various game sensor signals from the gate SW 59, winning port sensor L60, winning port sensor R61, etc., various driving signals are generated based on these sensor signals, and these driving signals are output to the output port chip 51. Through the drive circuits 52 and 53, a required control load, that is, a special figure display 62, a special figure storage display 63, a general figure display 64, a general figure storage display 65, a game state display 66, By outputting to the electric SOL67, the big prize opening SOL68, the discharge control device 69, the production control device 27, the board external information 71, etc. To control the game control of the game machine 10.

  On the other hand, whether the game control device 41 is legitimate, that is, whether or not the game one-chip microcomputer 45 mounted on the game control device 41 is legitimate is determined by the game one-chip microcomputer 45. This is performed by evaluating the ID information (first chip ID) as the unique identification information written in the security memory 86 by the information collecting terminal device 46. The specific mechanism for determining the validity is also described in detail in the prior art (Patent Document 1) at the beginning. The outline of the procedure is as follows. First, the information collection terminal device 46 issues an information request to the game control device 41 regularly or irregularly. In response to the request, the game control device 41 reads the first chip ID written in the security memory 86 and transmits it to the information collecting terminal device 46. The information collection terminal device 46 stores and stores the information when receiving information for the first time, and compares the stored information with the received information when receiving information for the second time and thereafter. If the information matches, it is determined that the game control device 41 has a legitimate gaming one-chip microcomputer 45. On the other hand, if the information does not match, the gaming one-chip microcomputer 45 that has been illegally modified is determined. It is determined that the game control device 41 is mounted.

  However, such a mechanism alone is beneficial in that it can detect unauthorized replacement of the gaming one-chip microcomputer 45, but other peripheral circuits, for example, for output ports, remain with the regular gaming one-chip microcomputer 45 left. When an illegal microcomputer is incorporated in the chip 51, it cannot be dealt with at all.

  When the information collection terminal device 46 issues an information request to the game control device 41 periodically or irregularly, the game control device 41 is written in the security memory 86 in response to the request. The first chip ID is read and transmitted to the information collecting terminal device 46. The information collecting terminal device 46 saves and stores the information in the case of the first information reception, and has been saved in the second and subsequent information receptions. This is because the information is compared with the received information, and when the information matches, it is determined that the game control device 41 is equipped with a valid game one-chip microcomputer 45, and the legitimate game one-chip microcomputer 45 is left. This is because the information collection terminal device 46 always determines “information coincidence”.

  Therefore, the point of the present embodiment is not only the evaluation of the first chip ID of the gaming one-chip microcomputer 45 but also other peripheral chips that may be incorporated into the unauthorized microcomputer, such as the input port chip 50 and the output port. The above problem is solved by evaluating the ID information (second chip ID, third chip ID) of the game chip 51. In addition, the game one-chip microcomputer 45 and the input port By exchanging data between the chip 50 for output and the chip 51 for output port wirelessly using light, the number of signal terminals of the chip package can be reduced, and an illegal circuit on the signal path between the chips It is to surely prevent the incorporation of.

  FIG. 6 is a plan view of the game control device 41, and FIG. 7 is an exploded view of the game control device 41. In these drawings, the game control device 41 includes a game control board 100 and a box-shaped transparent or translucent board case 101 (case member) for housing the game control board 100. The base member 102 is detachably attached to the game board rear surface constituent member 44, and the lid member 103 is capable of closing the opening surface of the base member 102.

  The base member 102 includes a rectangular bottom surface 104 having an area slightly larger than the plane size of the game control board 100, four bottom side walls 105 to 108 erected from four sides of the bottom surface 104, and a long side Three lid engaging portions 109 to 111 formed on the outer peripheral surfaces of the two bottom side walls 104 and 107 respectively (the lid engaging portions formed on the bottom side wall 107 are hidden behind the bottom side wall 107 and appear. And four caulking receiving portions 112 to 115 formed on the outer peripheral surface of one bottom side wall 106 on the short side. Further, the base member 102 has, for example, “K” -shaped reinforcing ribs 116 formed on the bottom surface 104. Further, the base member 102 is continuous with the reinforcing ribs 116 and has two bottom side walls on the long side. 104 and 107, two internal walls 117 and 118 erected in the vicinity of the bottom side walls 104 and 107, and between the inner walls 117 and 118 and the bottom side walls 104 and 107. Two slide grooves 119 and 120 that are parallel to each other are formed.

  The lid member 103 includes four lid side walls 121 to 124 having the same height as the side wall of the base member 102 and two lid side walls 121 and 123 on the long side of the four lid side walls 121 to 124. Raised side wall portions 125 to 127 obtained by raising a part of one side wall 124 of the short side and a short side, stepped portions 128 continuous from the one side wall 122 of the short side, and raised side wall portions 125 to 127 And the top plate part 129 which continues to the stepped part 128, three recesses 130 to 132 formed between the top plate part 129 and the two lid side walls 121, 123 on the long side, and two long side Three projecting pieces 133 to 135 each formed on the outer peripheral surface of each of the lid side walls 121 and 123 (the projecting pieces formed on the lid side wall 123 are hidden behind the lid side wall 123 and cannot be seen), and a short side Formed on the outer peripheral surface of one side lid wall 122 And a stopper 140, 141 formed on the four sides of the caulking portions 136-139 and the caulking portions 136-139 which are. The lid member 103 has a predetermined number and a predetermined shape of connector holes 142 to 146 in each of the three recesses 130 to 132. It should be noted that, when the game control device 41 is assembled, a required identification index, for example, a board management seal 147 or a game control board seal 148 (reflecting part) is attached to the outer surface of the top board portion 129. At least, the attachment surface (back surface) of the large seal (here, the game control board seal 148) that is attached to the vicinity of the central portion of the top plate portion 129 is a surface treatment (glossy) that easily reflects light. Processing).

  The game control board 100 is obtained by mounting various electronic components and connectors necessary for game control on a printed board such as a bakelite. For example, in the drawing, a plurality of connectors 149 to 154 mounted in the vicinity of a corner of a predetermined surface of a printed circuit board (a surface on the side facing the lid member 103 of the substrate case 101 when being mounted in the substrate case 101), Three IC packages mounted approximately near the center of the predetermined surface are representatively shown.

  Here, one of the three IC packages (the left side of the drawing) is a gaming one-chip microcomputer 45, and the other two (the right side of the drawing) are an input port chip 50 and an output port chip 51, respectively. The package of the gaming one-chip microcomputer 45 is provided with a chip optical transmitter / receiver 89 and an inspection device optical transmitter / receiver 90. Similarly, the packages of the input port chip 50 and the output port chip 51 are also inspected. A device-side optical transmission / reception unit 98 is provided.

  The game control device 41 having such a structure is assembled as follows. First, a game in which a predetermined surface (a surface facing the lid member 103 of the substrate case 101 when the lid member 103 is placed in the substrate case 101) is directed downward with respect to the lid member 103 placed so that the opening faces upward. When the control board 100 is dropped, a plurality of connectors 149 to 154 mounted on a predetermined surface of the game control board 100 are exposed from the connector holes 142 to 146 formed in the lid member 103.

  Next, the base member 102 is covered from above the lid member 103 on which the game control board 100 is placed, and the front ends of the two lid side walls 121 and 123 on the long side of the lid member 103 are placed in the slide grooves 119 and 120 of the base member 102. The base member 102 is slid until the bottom wall 106 of the base member 102 abuts against the stoppers 140 and 141 of the lid member 103. Further, after the protruding pieces 133 to 135 of the lid member 103 are engaged with the lid engaging portions 109 to 111 of the base member 102, the lid members 103 and the base member 102 are detachable by the caulking portions 136 to 139 in a non-removable manner. And unite.

  The non-removable method is to connect and fix the caulking portions 136 to 139 and the caulking receiving portions 112 to 115 of the base member 102 using a unidirectional screw 155, and then to the screw holes of the caulking portions 136 to 139. A liquid quick-drying charging / fixing material is filled in (the hole vacated in the size of the head of the screw 155), and a screw holding member is further inserted into the screw hole from above, and, for example, by ultrasonic welding. This means that the screw holding member is firmly attached to the inner surface of the screw hole. In this way, the base member 102 and the lid member 103 cannot be separated unless the caulking portions 136 to 139 and the caulking receiving portions 112 to 115 are physically destroyed. The reason that four pairs of caulking portions 136 to 139 and caulking receiving portions 112 to 115 are provided is to enable fixing four times at maximum (separation between the legitimate base member 102 and the lid member 103). . Another reason is that the number of times the substrate case 101 is opened can be visually confirmed from the number of the crimping parts 136 to 139 and the crimping receiving parts 112 to 115 that are damaged.

  Fig.8 (a) is AA sectional drawing of FIG. As shown in this figure, at least a game one-chip microcomputer 45, an input port chip 50, and an output port chip 51 are mounted on the game control board 100 housed in a board case 101 where the contents can be seen. Has been. These three chip packages are provided with optical transmission / reception units 89 and 98, respectively, between the gaming one-chip microcomputer 45 and the input port chip 50, and between the gaming one-chip microcomputer 45 and the output port. Data transfer to and from the chip 51 is possible. For example, data (second chip ID) indicating that the input port chip 50 is a legitimate input port chip 50 is transferred from the input port chip 50 to the gaming one-chip microcomputer 45, and the gaming is performed from the output port chip 51. Data (third chip ID) indicating that it is a regular output port chip 51 is transferred to the one-chip microcomputer 45.

  Here, if the input port chip 50 and the output port chip 51 are replaced with illegally modified ones, data transfer from these chips to the gaming one-chip microcomputer 45 is not performed. Alternatively, an incorrect chip ID is transferred. Therefore, the data indicating that the chip is a regular input port chip 50 (second chip ID) or the data indicating that the chip is a regular output port chip 51 (third chip ID) is the gaming one-chip microcomputer 45. Or an incorrect chip ID is sent to the information collection terminal 46, so that the above abnormality (unauthorized modification of the input port chip 50 or the output port chip 51) is finally detected by the security judgment at the information collecting terminal 46. Can do.

  Moreover, data transfer between the gaming one-chip microcomputer 45 and the input port chip 50 and between the gaming one-chip microcomputer 45 and the output port chip 51 is performed as shown by P1 in the figure. Therefore, it is not necessary to provide a signal terminal for data transfer in the package of the gaming one-chip microcomputer 45, the input port chip 50, and the output port chip 51. Therefore, the package size of the game one-chip microcomputer 45, the input port chip 50, and the output port chip 51 can be reduced.

  Furthermore, since the optical communication path P1 is clearly visible from the outside through the transparent substrate case 101, the path P1 cannot be crafted. For example, when the data transfer path is a printed wiring on the game control board 100, an illegal technique such as cutting the printed wiring halfway and inserting an unauthorized electronic circuit there may be considered. Since the route P1 in the case of the route P1 of the embodiment propagates through space, such a technique can be completely sealed.

  In the example of FIG. 8A, direct optical communication between the gaming one-chip microcomputer 45 and the input port chip 50, and between the gaming one-chip microcomputer 45 and the output port chip 51. Although so-called “line-of-sight communication” is performed, the present invention is not limited to this.

  FIG. 8B is a modification of FIG. In this figure, a game control board seal 148 having a glossy back surface is attached to the vicinity of the central portion of the top plate portion 129 of the transparent substrate case 101. The position where the game control board seal 148 is attached is almost directly above the game one-chip microcomputer 45, the input port chip 50, and the output port chip 51.

  In this way, the optical communication path P2 between the gaming one-chip microcomputer 45 and the input port chip 50 and between the gaming one-chip microcomputer 45 and the output port chip 51 is designated as a game control board seal. It is possible to use a so-called “non-line-of-sight communication” using a reflected wave on the back surface of 148. According to this non-line-of-sight communication, as shown in the figure, there is a failure in electronic components or the like between the gaming one-chip microcomputer 45 and the input port chip 50 and between the gaming one-chip microcomputer 45 and the output port chip 51. Even if the object 156 exists, mutual data transfer can be performed without hindrance. For this reason, the freedom degree of design of the game control board 100 improves.

  9 is a cross-sectional view taken along line BB in FIG. As shown in this figure, a chip optical transmission / reception unit 89 is provided in the vicinity of the center of the package of the gaming one-chip microcomputer 45, and an inspection device optical transmission / reception unit 90 is provided near both ends of the package. Is provided so that the position of the chip light transmitting / receiving unit 89 is hidden behind the game control board seal 148, whereas the position of the inspection apparatus light transmitting / receiving unit 90 is set to the game control board seal 148. It is set so that it can be seen from the outside through the lid member 103 of the substrate case 101.

  On the other hand, the optical transmission / reception unit 99 is also provided in the inspection device 73 used as appropriate, and the position of the optical transmission / reception unit 99 is a game when the inspection device 73 is placed near the lid member 103 of the substrate case 101. It is set so as to face the optical transmission / reception unit 90 for an inspection apparatus provided in the package of the one-chip microcomputer 45.

  As described above, data transfer is performed between the optical transmission / reception unit 90 for the inspection device provided in the package of the game one-chip microcomputer 45 and the optical transmission / reception unit 99 of the inspection device 73. 73 determines whether or not the game one-chip microcomputer 45 is a genuine product based on the transfer data (first chip ID) from the game one-chip microcomputer 45, and uses the same transfer data (second chip ID). Based on this, it is determined whether the input port chip 50 is a regular product, and further, based on the transfer data (third chip ID), it is determined whether the output port chip 51 is a regular product. It is possible to reliably detect illegal modification of the input port chip 50 and output port chip 51 as well as unauthorized modification of the one-chip microcomputer 45 for use.

  FIG. 10 is a process flowchart including an unauthorized modification determination process. In this figure, the game control device 41 performs a necessary power-on process (step S11) when power is turned on, and then performs an unauthorized modification determination process (step S12). “Unauthorized remodeling determination process” means collecting the unique identification information (second chip ID, third chip ID) of the input port chip 50 and output port chip 51, and the unique identification information and one-chip microcomputer for gaming. It refers to a series of processes for sending 45 unique identification information (first chip ID) to the information collecting terminal 46 and the inspection device 73 and evaluating whether or not the identification information is correct. When the unique identification information cannot be collected or when the unique identification information is not correct, it is determined that there is an abnormality (the possibility of unauthorized modification is high).

  If an abnormality is determined by the unauthorized modification determination process when the power is turned on, the game CPU (game one-chip microcomputer 45) is not activated, that is, the game CPU (game one-chip microcomputer 45) is disabled. In the activated state, an abnormality handling process (not shown) such as lighting of an abnormality notification lamp is executed (step S18: game control disabling means).

  On the other hand, if the abnormality is not determined in the unauthorized modification determination process at power-on, the game CPU (game one-chip microcomputer 45) is activated to enable the game control (step S14). Then, the timer interruption is waited (step S15), and the unauthorized modification determination process is performed again for each timer interruption (step S16). This “unauthorized modification determination process” also collects the unique identification information (second chip ID, third chip ID) of the input port chip 50 and the output port chip 51 and, as in step S12, the unique identification information. And the unique identification information (first chip ID) of the game one-chip microcomputer 45 are sent to the information collecting terminal 46 and the inspection device 73 to evaluate whether or not the identification information is correct.

  Next, if an abnormality is not determined in the unauthorized modification determination process (“NO” in step S17), the process loops again from step S15. That is, the game CPU (game one-chip microcomputer 45) is allowed to be activated. If the abnormality is determined ("YES" in step S17), the game CPU (game one-chip microcomputer 45) is disabled and the abnormality handling process (not shown) is performed. (For example, turning on the abnormality notification lamp) is executed (step S18).

  Thus, according to the flowchart shown in the drawing, since the illegal modification determination process is executed only once when the power is turned on (step S12), for example, an illegal microcomputer is incorporated in the middle of being transported to the game hall. Or, when an illegal microcomputer is installed outside business hours such as at night, those illegal acts can be detected by an unauthorized modification determination process at power-on. In addition, since the unauthorized modification determination process is repeatedly executed for each timer interruption even after the power is turned on (step S16), for example, it is possible to cope with incorporation of an unauthorized microcomputer during business hours.

  In the above embodiment, the unique identification information (second chip ID, third chip ID) of the input port chip 50 and the output port chip 51 is transferred to the game one-chip microcomputer 45, and the game one chip. Unique identification information (first chip ID) of the game one-chip microcomputer 45 and unique identification information (second chip ID) of the input port chip 50 and output port chip 51 from the microcomputer 45 to the information collecting terminal 46 or the inspection device 73 , The third chip ID) is transferred, and the fraudulent chip is determined by the information collection terminal 46 or the inspection device 73, but is not limited to this mode.

  For example, the gaming one-chip microcomputer 45, the input port chip 50, and the output port chip 51 may determine each other's validity. In this case, the gaming one-chip microcomputer 45 evaluates the unique identification information (second chip ID, third chip ID) of the input port chip 50 and the output port chip 51 and determines whether or not they are valid. In addition, the input port chip 50 evaluates the unique identification information (first chip ID, second chip ID) of the gaming one-chip microcomputer 45 and the output port chip 51, and those are valid. And the output port chip 51 evaluates the unique identification information (first chip ID, third chip ID) of the game one-chip microcomputer 45 and the input port chip 50 and determines them. It is determined whether or not is valid. In any case, when an abnormality is determined, a necessary notification is given and a necessary countermeasure for stopping the game (for example, disabling of the game CPU 80 or the input port chip 50 or the output port chip 51). Is disabled).

It is a front view of the pachinko gaming machine 10 (game machine). 2 is a front view of a game board 18. FIG. It is a rear view of the pachinko gaming machine. 3 is an electrical internal block configuration diagram of a game control device 41. FIG. 4 is a block diagram of a gaming one-chip microcomputer 45, an input port chip 50, an output port chip 51, and an inspection device 73. FIG. 4 is a plan view of the game control device 41. FIG. 4 is an exploded view of the game control device 41. FIG. It is AA sectional drawing of FIG. It is BB sectional drawing of FIG. It is a process flowchart figure containing an unauthorized modification determination process. It is a schematic block diagram of a gaming machine and a conceptual diagram of cheating.

Explanation of symbols

B management block (first legitimacy judging means)
S18 step (game control disabling means)
10 Pachinko machines (game machines)
41 game control device 45 game one-chip microcomputer 50 input port chip (input / output port chip)
51 Output port chip (I / O port chip)
54 In-board bus (data bus)
57 Start port SW (detection means)
58 Count SW (detection means)
59 Gate SW (detection means)
60 Winning mouth sensor L (detection means)
61 Winning mouth sensor R (detection means)
80 gaming CPU
89 Optical transceiver for chip (Optical transceiver)
90 Optical transceiver for inspection equipment (optical transceiver)
92-94 port circuit (input port circuit, output port circuit)
97 controller (second legitimacy judging means, signal transmission regulating means)
98 Inspection device side optical transmitter / receiver (optical transmitter / receiver)
99 Optical transceiver 100 Game control board 101 Board case (case member)
148 Game control board seal (reflective part)

Claims (5)

A gaming one-chip microcomputer packaged including a gaming CPU for controlling gaming machines, an input port circuit for transmitting input signals from detection means used in gaming to the gaming CPU, and the gaming CPU The input / output port chip packaged including the output port circuit that transmits the output signal of the output to the drive source side used in the game is mounted on the game control board,
The game one-chip microcomputer and the input / output port chip transmit and receive data for mutual authentication, and are configured to allow normal game control on the condition that the authentication result is valid. A game control device,
In each of the gaming one-chip microcomputer package and the input / output port chip package, an optical transmission / reception unit that performs data transmission / reception with the other chip by optical communication is formed,
The gaming one-chip microcomputer is:
First legitimacy judging means for judging legitimacy of the input / output port chip based on data received via the optical transceiver;
Game control disabling activating means for disabling game control executed by the gaming CPU when the validity is not determined by the first validity determining means,
The input / output port chip is:
Second legitimacy judging means for judging legitimacy of the gaming one-chip microcomputer based on data received via the optical transceiver;
And a signal transmission restricting means for restricting signal transmission between the gaming CPU and the input port circuit or the output port when the validity is not determined by the second validity determining means. Game control device. The game control board is formed with a data bus for transmitting data between the game one-chip microcomputer and the input / output port chip by pattern wiring,
The gaming one-chip microcomputer includes a signal terminal for connecting the data bus and the gaming CPU,
The input / output port chip includes a signal terminal for connecting the data bus to the input port circuit and the output port circuit,
The game control device according to claim 1, wherein the input signal and the output signal are transmitted via the data bus. The game control device according to claim 1, wherein the input signal and the output signal are transmitted via the optical transceiver. The gaming one-chip microcomputer includes an optical transmission / reception unit for transmitting information to an inspection device that determines the legitimacy of the gaming one-chip microcomputer,
The game control board is accommodated in a predetermined case member,
Information for determining the legitimacy of the gaming one-chip microcomputer is transmitted between the gaming one-chip microcomputer and the inspection device outside the case member via the optical transceiver. The game control device according to claim 1, wherein the game control device is a game control device. The game control board is housed inside a predetermined case member, and a reflection portion that reflects a predetermined optical signal is formed on the case member.
2. The optical signal transmitted between the optical transmission / reception unit of the gaming one-chip microcomputer and the optical transmission / reception unit of the input / output port chip is reflected by the reflection unit. The game control device according to claim 3.

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