JP2007011130A - Lcd display controller - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an LCD (Liquid Crystal Display) display controller which is adaptable to LCD modules of a variety of types and has superior cost benefit. <P>SOLUTION: The LCD display controller (101), having a CPU interface section (105) which interfaces with a CPU, a video memory (104) which stores image data written from the CPU, and an LCD interface section (108) which reads image data out of the video memory and converts the image data into display data, in a format matching an LCD module, has a selector (108) which chooses either the output signal of the LCD interface section (107) or the image write signal from the CPU, and sends the signal out to the LCD module under the control of the CPU interface section (105). <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an LCD (Liquid Crystal Display) display control device, and more particularly to a display control device that can handle various types of LCD modules.

  In general, a dot matrix type LCD panel composed of TFT (Thin Film Transistor) or STN (Super Twisted Nematic) needs to continuously update data displayed at regular intervals. In particular, in order to perform gradation expression in STN type LCD panels, it is necessary to always transfer different data by FRC (Frame Rate Control). Therefore, a method is used in which a VRAM (Video RAM) for temporarily storing display data is provided, and the display data is read from the VRAM at regular intervals and transferred to the LCD panel. In recent years, LCD panels have become more colorized and have higher resolutions, and the required VRAM size has increased. As a result, LCD modules that integrate LCD panels and drive drivers have no VRAM. ing.

  As an LCD display control device for controlling such a dot matrix type LCD module, an LCD control device having a configuration as shown in FIG. 2 has been proposed (Patent Document 1).

  In FIG. 2, reference numeral 201 denotes a conventional LCD display control device, which controls display data of the LCD module 203 under the control of the CPU 202. The image data written from the CPU 202 is temporarily stored in the VRAM 204, and further read out from the VRAM 204 at regular intervals and transferred to the LCD module 203.

  The CPU I / F unit 205 controls the operation timing of each block of the LCD display control device 201 according to the control of the CPU 202.

  The memory control unit 206 controls access to the VRAM 204, writes image data written by the CPU 202 to the VRAM 204, reads image data at regular intervals, and supplies the image data to the LCD I / F unit 207.

  The LCD I / F unit 207 converts the image data read from the VRAM 204 into color data to be output to the LCD module 203. Further, when the LCD module 203 is of the STN type, FRC processing is performed for halftone display and converted into a blinking pattern.

  The LCD module 203 is a type of LCD module that does not incorporate a VRAM, and includes an LCD drive circuit 209 and an LCD panel 210. The LCD driving circuit 209 is a driver circuit for driving the LCD panel 210, and displays an image by controlling each dot of the LCD panel 210 based on the color data given from the display control unit.

  On the other hand, in the monochrome type and the LCD module with a small display size, since the VRAM can be configured with a small capacity memory, there is a type in which the module has a built-in VRAM.

  FIG. 3 is a diagram showing the configuration of the LCD module with VRAM and its control configuration. Since this type of LCD module has a built-in VRAM, an LCD display control device as shown in FIG. 2 is unnecessary.

  In FIG. 3, reference numeral 303 denotes an LCD module with a VRAM, which includes a display control unit 307, a VRAM 304, an LCD drive circuit 309, and an LCD panel 310, and displays image data under the control of the CPU 302.

  The LCD I / F unit 301 is for converting the CPU bus signal into an interface suitable for the LCD module 303 with VRAM.

  The display control unit 307 stores image data provided from the CPU 302 via the LCD I / F unit 301 in the VRAM 304. Further, the image data of the VRAM 304 is read at a constant interval, converted into color data, and given to the LCD drive circuit 309.

  The LCD drive circuit 309 is a driver circuit for driving the LCD panel 310, and displays an image by controlling each dot of the LCD panel 310 based on the color data given from the display control unit 307.

The above is the description of the operation of the conventional LCD display control device.
JP 2004-70148 A

  In the above conventional LCD display control device, when a product lineup is constructed by replacing different types of LCD modules, an LCD display control device corresponding to the interface of each LCD module is required. Therefore, it is necessary to use different printed circuit boards for each product lineup, or to increase the printed circuit board area and to arrange the LCD display control devices of each LCD module on the same printed circuit board. There was a problem that the manufacturing cost of the increased.

  Also, by installing both the LCD display control device 201 in FIG. 2 and the LCD I / F unit 301 in FIG. 3 on the LSI chip on which the LCD display control device is mounted, the product lineup on the same chip and the same printed circuit board However, it is necessary to prepare interface signal terminals for different LCD modules separately. Further, since the VRAM address space of each LCD module is assigned to a separate address space, the address signal terminals are required, and there is a problem that the chip cost increases as the number of LSI chip terminals increases.

  Further, in the conventional LCD display control device of FIG. 2, the number of terminals of the LSI chip is reduced by providing a function of generating an interface signal of the LCD module 303 with VRAM as a function of the LCD I / F unit 207. Although there is a VRAM in the LCD module, it is necessary to connect the VRAM 204 connected to the LCD display control device 201, which is disadvantageous in terms of cost. It was.

  The present invention aims to solve the above problems. In the first invention according to the present invention (Claim 1), a CPU interface unit for interfacing with a CPU, and image data written from the CPU. In an LCD display control device comprising: a video memory for storing image data; and an LCD interface unit for reading image data from the video memory and converting the image data into display data in a format suitable for an LCD module, according to the control of the CPU interface unit. A first selector is provided for selecting one of the output signal of the unit and the image writing signal from the CPU and sending it to the LCD module.

  In a second invention according to the present invention (Claim 2), the CPU interface section includes an LCD type setting section for setting an LCD module type, and an access detecting section for detecting an image data write signal from the CPU. When the CPU access is detected as image data writing, the CPU access signal is sent to the memory control unit and the first changeover switch unit according to the LCD type set in the LCD type setting unit. A second selector for sending to any of the above is provided.

  According to a third aspect of the present invention (Claim 3), in the LCD display control device, each control unit is configured in the same LSI, and the video memory is configured by a general-purpose memory outside the LSI. is there.

  As described above, according to the first aspect of the present invention, the same LCD display control device can support LCD modules having various interface specifications, so the product lineup can be made by replacing different types of LCD modules. Since the printed circuit board can be reduced and the printed circuit board can be shared between the lineups, the manufacturing cost of the apparatus can be reduced. Further, when the LCD display control device is made into an LSI chip, interface signals with different specifications can be output from the same control terminal of the chip, so that it is possible to reduce the number of terminals of the LSI chip and reduce the LSI chip cost.

  According to the invention of claim 2, since the LCD module connected to the LCD display control device has a built-in VRAM, the CPU can share a common address space for writing display image data. When this LCD display control device is made into an LSI chip, the number of address signals given to the LSI chip can be reduced, and the cost of the LSI chip can be reduced.

  According to the third aspect of the present invention, since the video memory for storing the image data is composed of a general-purpose memory outside the LCD display control device, when using an LCD module of a type having a built-in VRAM, a general-purpose for VRAM is used. Since the memory can be deleted, the cost of the apparatus can be reduced.

  FIG. 1 is a diagram showing a configuration of an LCD display control device of the present invention.

  The LCD display control device 101 is connected to the CPU 102 via the CPU bus and operates according to the control of the CPU 102. The VRAM 104 is a memory that stores image data to be displayed on the LCD module 103, and is configured by a large capacity DRAM or SRAM. The LCD module 103 is connected to the LCD display control device 101 and displays image data under the control of the LCD display control device.

  The CPU I / F unit 105 is connected to the CPU 102 and manages the operation of each block in the LCD display control device 101 according to the control of the CPU 102.

  The memory control unit 106 controls access to the VRAM 104, and writes and reads image data. Image data written by the CPU is written to the VRAM 104 via the CPU I / F unit 105 and the memory control unit 106. Further, the memory control 106 reads VRAM data at regular intervals and transfers the image data to the LCD I / F unit 107.

  The display control unit 107 converts the image data read from the VRAM 104 into color data to be output to the LCD module 103. Furthermore, when halftone display is performed by connecting an STN type LCD module, it is converted to a flashing pattern by FRC.

  The interface selector 108 outputs an interface signal output from the CPU I / F to the LCD module 103 when the LCD module 103 is a type having a built-in VRAM according to the control of the CPU I / F unit. On the other hand, if the connected LCD module 103 is a type that does not include a VRAM, a signal output from the LCD I / F unit 107 is output to the LCD module 103.

  FIG. 4 is a diagram illustrating a configuration of the CPU I / F unit 105.

  The operation control register group 401 is a register for setting operation modes of the memory control unit 104 and the LCD I / F unit 107, and is set by the CPU 102 in advance.

  The operation control unit 402 controls the operation timing of the memory control unit and the display control unit 107 according to the operation mode set in the operation control register group 401.

  The VRAM access detection unit 403 detects an access of the CPU 102, and generates an access signal when the CPU 102 writes image data in the VRAM area.

  The LCD type register 404 is a mode register for designating in advance whether the type of the LCD module connected to the LCD display control device of the present invention is a type incorporating a VRAM.

  Reference numeral 405 denotes a bus selector. When the mode set in the LCD type register 404 is a type that does not incorporate VRAM, an access signal to the VRAM area detected by the VRAM access detection unit 403 is sent to the memory control unit 104. On the other hand, when the mode set in the LCD type register 404 is a type incorporating VRAM, an access signal to the VRAM area detected by the VRAM access detection unit 403 is sent to the I / F conversion unit 406.

  The I / F conversion unit 406 converts the bus signal from the bus selector 405 into an interface signal suitable for the LCD module 103 to be connected, and sends the interface signal to the interface selector 108.

  FIG. 5 is a general interface timing of an LCD module of a type not incorporating VRAM. The color data is output as a DATA signal and sent to the LCD module 103 in synchronization with the CLK signal. The HSYNC signal is a horizontal direction synchronization signal and is a synchronization signal output for each line data of the dot matrix. The FSYNC signal is a frame synchronization signal and is a synchronization signal output for each frame of dot matrix type display data.

  These signals are generated by the LCD I / F unit 107 and sent to the LCD module via the interface selector 108.

  FIG. 6 is a general interface timing of an LCD module of a type incorporating VRAM. The CE signal is an LCD module access enable signal, and becomes active when writing image data or command data. The DATA signal is command data or a data signal to be written to VRAM in the LCD module, and data is written in synchronization with the write enable signal WE. The C / D terminal is a signal indicating whether the write data is command data or display image data, and data writing to the LCD module is controlled according to the level of the C / D signal at the time of writing. These signals are generated by the I / F converter 406 and sent to the LCD module via the interface selector 108. The interface timing in FIG. 6 is almost the same as the access timing of the CPU, and can be easily converted by the I / F conversion unit 406.

  In addition to the parallel interface as shown in Fig. 6, there is a serial interface type as the interface of the LCD module with a built-in VRAM. In this case, the I / F converter 406 serializes the CPU access signal. Convert it to an interface and send it out.

  FIG. 7 is a diagram showing an address space in the LCD display control apparatus of the present invention.

  The address space of the VRAM area is arranged at the same address regardless of the type of LCD module to be connected. The VRAM access detection unit 403 generates an access signal when the CPU 102 accesses the VRAM area of FIG. According to the mode set in the LCD type register 404, the access to the VRAM connected to the memory control unit 106 or the access to the VRAM in the LCD module 103 is switched.

  As described above, by setting the LCD type to be used in advance, the display data is updated by writing image data from the CPU to the same address space regardless of the LCD module to be used.

The figure which shows the structure of the LCD display control apparatus of this invention. The figure which shows the structure of the conventional LCD display control apparatus. The figure which shows the structure of the LCD module with VRAM, and its control structure. The figure which shows the structure of CPU I / F part in the LCD display control apparatus of this invention. Interface timing chart for LCD module without VRAM. Interface timing chart for LCD module with VRAM. FIG. 4 is a diagram showing an address space in the LCD display control device of the present invention.

Explanation of symbols

101 LCD display control device 102 CPU
103 LCD module 104 VRAM (Video RAM)
105 CPU I / F Unit 106 Memory Control Unit 107 LCD I / F Unit 108 Interface Selector 401 Operation Control Register Group 402 Operation Control Unit 403 VRAM Access Detection Unit 405 Bus Selector 406 I / F Signal Conversion Unit 404 LCD Type Register

Claims (3)

  A CPU interface unit that interfaces with the CPU, a video memory that stores image data written from the CPU, and an LCD interface unit that reads the image data of the video memory and converts it into display data in a format suitable for the LCD module The LCD display control device includes a first selector that selects and outputs either an output signal of the LCD interface unit or an image write signal from the CPU to the LCD module according to the control of the CPU interface unit. LCD display control device.   2. The LCD display control device according to claim 1, wherein the CPU interface unit includes an LCD type setting unit for setting an LCD module type and an access detection unit for detecting an image data write signal from the CPU. When it is detected that the access is writing image data, the CPU access signal is sent to either the memory control unit or the first changeover switch unit according to the LCD type set in the LCD type setting unit. An LCD display control device comprising a second selector for sending out.   3. The LCD display control device according to claim 1, wherein each control unit is configured in the same LSI, and the video memory is configured by a general-purpose memory outside the LSI.

Images