JP2007007845A - Micro-structure and its fabricating method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a micro-structure not formed on a silicon wafer, a micro-machine having a micro-structure, and a fabricating method of the micro-structure and micro-machine. <P>SOLUTION: A first structural layer 103 is formed on a substrate 101 consisting of an insulating substance such as glass. The structural layer uses multicrystal silicon hot crystallized or laser crystallized using a metal element promoting crystallization. Different from ordinary multicrystal silicon, this multicrystal silicon has a covalent bond which is continued without interruption at the grain boundary, assuring a high braking stress to be favorable for the structural layer. On the first structural layer, a sacrifice layer 104 is formed, and thereover a second structural layer 105 is formed. The second structural layer may be formed from the same material and in the same crystal structure as the first. If the sacrifice layer is removed thereafter, the second structural layer becomes a beam structure, and the micro-structure intended is obtained. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a microstructure formed over an insulating surface and a manufacturing method thereof.

  In recent years, research on micro mechanical systems called MEMS has been actively promoted. MEMS (Micro Electro Mechanical System) is an abbreviation for a micro electro mechanical system, and is sometimes simply called a micro machine. A micromachine generally refers to a microdevice in which “a microstructure having a three-dimensional structure and a movable microstructure” and “an electronic circuit having a semiconductor element” are integrated using a semiconductor microfabrication technique. The microstructure has a three-dimensional structure and a movable part. And it has the function of a switch, a variable capacitor, or an actuator.

  Micromachines can control their microstructures with electronic circuits, so they are not a central processing control type as with conventional computer-based devices. It is thought that it is possible to build an autonomous decentralized system that performs a series of actions to take action through the.

Many studies have been made on the micromachine (see Patent Document 1). Patent Document 1 describes a mechanical device that has been crystallized in a thin film form.
Japanese Patent Application Laid-Open No. 2004-1201

A microstructure constituting a micromachine is manufactured using a semiconductor element manufacturing process using a silicon wafer. In particular, in order to obtain a material having a thickness and strength sufficient for manufacturing a structure, a micromachine that is put into practical use is mainly manufactured using a silicon wafer. However, a process for manufacturing a microstructure has a process different from that for manufacturing a semiconductor element, such as sacrificial layer etching.

In view of mass productivity of a micromachine having a minute structure, reduction in manufacturing cost is desired.

  Thus, an object of the present invention is to provide a microstructure that is not formed on a silicon wafer and a micromachine having the microstructure. Another object of the present invention is to provide a method for manufacturing a microstructure and a micromachine.

  In order to solve the above problems, a microstructure included in a micromachine of the present invention (hereinafter referred to as a semiconductor device) has a layer including polycrystalline silicon that is thermally crystallized or laser crystallized using a metal element. And a space (also referred to as hollow) is provided below or above the layer. Such polycrystalline silicon can be formed over an insulating surface typified by a glass substrate and can be used as a microstructure since it has high strength.

The space may have a single layer structure or a laminated structure. Such a space is formed by removing the sacrificial layer with an etchant introduced through the contact hole. Therefore, when viewed in a cross-sectional view of a semiconductor device, even if the space has a stacked structure, the spaces are preferably connected by contact holes or the like. As a result, the number of steps for removing the sacrificial layer can be reduced.

With such a space, a semiconductor device in which a layer including polycrystalline silicon can move can be provided. The term “movable” includes moving up, down, left and right, and rotating around a certain axis. To move, pressure, electrostatic force, or electromagnetic force can be used.

Specific examples of the present invention are shown below.

One embodiment of the present invention includes a first layer provided over an insulating surface and a second layer including polycrystalline silicon provided over the first layer, and the polycrystalline silicon uses a metal element. The microstructure is a polycrystalline silicon that is crystallized in such a manner that there is a space between the first layer and the second layer.

Another embodiment of the present invention includes a first layer provided on an insulating surface and a second layer having polycrystalline silicon provided on the first layer, and the polycrystalline silicon uses a metal element. A layer of metal, metal compound, silicon, silicon oxide or silicon nitride provided on the first layer is removed by an etching method, and the first layer and the second layer A microstructure is characterized by having a space between layers.

Another embodiment of the present invention includes a first layer provided on an insulating surface and a second layer having polycrystalline silicon provided on the first layer, and the polycrystalline silicon uses a metal element. Crystallized polycrystalline silicon, a layer having a metal, metal compound, silicon, silicon oxide or silicon nitride provided on the first layer is removed by an etching method, and the second layer has an insulating surface Alternatively, the microstructure has a portion which is not in contact with the first layer.

Another embodiment of the present invention includes a first layer provided on an insulating surface and a second layer having polycrystalline silicon provided on the first layer, and the polycrystalline silicon uses a metal element. Crystallized polycrystalline silicon, a layer having a metal, metal compound, silicon, silicon oxide or silicon nitride provided on the first layer is removed by an etching method, and the second layer has an insulating surface Alternatively, the microstructure is a beam structure having a portion not in contact with the first layer.

In the present invention, the second layer can have a structure in which a polycrystalline silicon film and an amorphous silicon film are stacked. In the present invention, the second layer may have a structure in which polycrystalline silicon is laminated, and the crystalline state of the polycrystalline silicon may be different.

In another embodiment of the present invention, a layer including amorphous silicon is formed over an insulating surface, and the amorphous silicon is crystallized using a metal element to form polycrystalline silicon, and above the layer including polycrystalline silicon. Alternatively, a method for manufacturing a microstructure is characterized in that a space is formed below.

Another embodiment of the present invention is to form a first layer on an insulating surface, form a third layer on the first layer, form a second layer having amorphous silicon on the third layer, A method for manufacturing a microstructure is characterized in that amorphous silicon is crystallized using a metal element to form polycrystalline silicon, and a third layer is removed by etching.

In another embodiment of the present invention, a first layer is formed on an insulating surface, a third layer is formed on the first layer, and a second layer having amorphous silicon is formed on the third layer. The amorphous silicon is crystallized using a metal element to form polycrystalline silicon, an insulating layer covering the polycrystalline silicon is formed, a contact hole is formed in the insulating layer, and an etching agent is introduced through the contact hole. And a third layer is removed by etching.

In another embodiment of the present invention, a first layer is formed on an insulating surface, a third layer is formed on the first layer, and a second layer having amorphous silicon is formed on the third layer. Amorphous silicon is crystallized using a metal element to form polycrystalline silicon, and the third layer is removed by etching so that the second layer is not in contact with the insulating surface or the layer bonded to the insulating surface. A method for manufacturing a microstructure is characterized in that a portion is formed.

In another embodiment of the present invention, a first layer is formed on an insulating surface, a third layer is formed on the first layer, and a second layer having amorphous silicon is formed on the third layer. A method for manufacturing a microstructure, characterized in that amorphous silicon is crystallized using a metal element to form polycrystalline silicon, and the third layer is removed by etching, so that the second layer has a beam structure. It is.

In another embodiment of the present invention, a first layer is formed on an insulating surface, a third layer is formed on the first layer, and a second layer having amorphous silicon is formed on the third layer. The amorphous silicon is crystallized using a metal element to form polycrystalline silicon, and the third layer is removed by etching, whereby the second layer has a beam structure, and the second layer has pressure, electrostatic force, or A method for manufacturing a microstructure is characterized by being moved by electromagnetic force.

In the present invention, thermal crystallization or laser crystallization can be used for crystallization. In the present invention, selectively crystallized polycrystalline silicon may be formed by applying a metal element to part of amorphous silicon. In the present invention, selectively crystallized polycrystalline silicon may be formed by irradiating a part of amorphous silicon with a laser.

  The present invention can provide a microstructure that can withstand external force and stress and can control conductivity by using polycrystalline silicon crystallized using a metal element for a structural layer of the microstructure. .

  Embodiments of the present invention will be described below with reference to the drawings. However, the present invention is not limited to the following description. It will be readily understood by those skilled in the art that various changes in form and details can be made without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the following embodiments and examples. Note that in describing the structure of the present invention with reference to the drawings, the same portions are denoted by the same reference numerals in different drawings.

(Embodiment 1)
In this embodiment, a structural example of a semiconductor device including a microstructure of the present invention and a manufacturing method thereof will be described with reference to drawings.

  The semiconductor device having the microstructure of the present invention belongs to the field of micromachines, and has a size of micrometer to millimeter unit. Further, when manufactured to be incorporated as a part of a certain mechanical device, it may have a metric size so that it can be easily handled during assembly.

First, FIG. 6 shows a conceptual diagram of a semiconductor device having the microstructure of the present invention.

  The semiconductor device 11 of the present invention can be used in combination with the electric circuit portion 12 having a semiconductor element and the structure portion 13 formed of a microstructure. The electric circuit unit 12 includes a control circuit 14 that controls the microstructure, an interface 15 that communicates with the external control device 10, and the like. The structure body 13 includes a sensor 16, an actuator 17, a switch, and the like that are formed of a microstructure. An actuator is a component that converts a signal (mainly an electrical signal) into a physical quantity.

  The electric circuit unit 12 can also include a central processing unit for processing information obtained by the structure unit 13.

  The external control device 10 performs operations such as transmitting a signal for controlling the semiconductor device 11, receiving information obtained by the semiconductor device 11, and supplying driving power to the semiconductor device 11.

  The semiconductor device having the microstructure of the present invention is not limited to the above structure example. In other words, the present invention has a microstructure controlled by an electric circuit, and provides a new microstructure.

  Conventionally, when handling a minute object such as a millimeter or less, the structure of a minute object is enlarged, a human or a computer obtains the information to determine the information processing and operation, and the operation is reduced to a minute amount. Needed a process of communicating to the right object.

  However, a semiconductor device having a microstructure according to the present invention can handle a minute thing only by a person or a computer transmitting a high-level conceptual command. That is, when a human or a computer determines a purpose and transmits a command, a semiconductor device having a microstructure can operate by obtaining information on an object using a sensor or the like to perform information processing.

  In the above example, it is assumed that the object is very small. For example, the object itself has a size of a meter unit, but includes a minute signal (for example, a minute change in light or pressure) emitted from the object.

  Next, a method for manufacturing the microstructure of the present invention will be described with reference to the drawings. In the drawings, a top view is shown on the upper side, and a sectional view in the top view OP is shown on the lower side.

  The microstructure of the present invention is formed over a substrate having an insulating surface (hereinafter referred to as an insulating substrate). The insulating substrate is a glass substrate, a quartz substrate, a plastic substrate, or the like. Furthermore, it is also possible to use a conductive substrate such as a metal or a substrate in which an insulating layer is formed over a semiconductor substrate such as silicon. By forming a microstructure on a plastic substrate, a highly flexible and thin semiconductor device can be formed. In addition, a thin semiconductor device can be formed by thinning the glass substrate by polishing or the like.

  First, the base film 102 is formed over the substrate 101 having an insulating surface (see FIG. 1A). As the base film 102, an insulating layer such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film can be formed with a single layer or a stacked structure. Although the case where a two-layer structure is used as the base film 102 is described in this embodiment mode, the base film 102 may have a single-layer structure or a stacked structure of two or more layers.

As the first layer of the base film 102, a silicon oxynitride film formed by using a plasma CVD method and using SiH ₄ , NH ₃ , N ₂ O, and H ₂ as a reactive gas is 10 to 200 nm (preferably 50 to 100 nm). In this embodiment, a silicon oxynitride film with a thickness of 50 nm is formed. Next, a silicon oxynitride film formed using SiH ₄ and N ₂ O as a reaction gas is stacked in a thickness of 50 to 200 nm (preferably 100 to 150 nm) as a second layer of the base film 102 using a plasma CVD method. In this embodiment, a silicon oxynitride film with a thickness of 100 nm is formed.

  Next, an amorphous silicon layer or a polycrystalline silicon film to be the first structural layer 103 included in the microstructure is formed and patterned into an arbitrary shape (see FIG. 1A). The polycrystalline silicon film can be formed from a material containing silicon. Examples of the material containing silicon include a material made of silicon and a silicon germanium material having germanium in an amount of about 0.01 to 4.5 atomic%. The silicon film can have a crystalline state or an amorphous state. In this embodiment mode, an amorphous silicon film is formed and heat treatment using a metal element is performed. A crystallized polycrystalline silicon film is used. For the heat treatment, a heating furnace, laser irradiation, irradiation of light emitted from a lamp instead of laser light (hereinafter referred to as lamp annealing), or a combination thereof can be used.

The structural layer as described above may have a multilayer structure in order to obtain a necessary thickness. For example, a multilayer structure of polycrystalline silicon can be formed by repeating formation of an amorphous silicon film and crystallization by heat treatment. By this heat treatment, the stress in the previously formed polycrystalline silicon film can be relieved, and film peeling and substrate deformation can be prevented. Further, in order to relieve the stress in the film, it can be repeated including patterning.

The structural layer may be formed by stacking films having different crystal states. For example, a stacked structure of an amorphous silicon film and a polycrystalline silicon film can be used.

  When a laminated structure is used in this way, when a material having a large internal stress is used as the structural layer, a thick structural layer cannot be formed at a time. In this case, the structural layer can be formed by repeating film formation and patterning.

When laser irradiation is used in the production of polycrystalline silicon, a continuous wave laser beam (CW laser beam) or a pulsed laser beam (pulse laser beam) can be used. As the laser beam, Ar laser, Kr laser, excimer laser, YAG laser, Y ₂ O ₃ laser, YVO ₄ laser, YLF laser, YAlO ₃ laser, glass laser, ruby laser, alexandrite laser, Ti: sapphire laser, copper vapor One or a plurality of lasers or gold vapor lasers can be used. By irradiating the fundamental wave of such a laser beam and the second to fourth harmonics of the fundamental wave, a crystal having a large grain size can be obtained. For example, a second harmonic (532 nm) or a third harmonic (355 nm) of an Nd: YVO ₄ laser (fundamental wave 1064 nm) can be used. Energy density of the laser is about 0.01 to 100 MW / cm ² (preferably 0.1 to 10 MW / cm ²⁾ is required. Then, irradiation is performed at a scanning speed of about 10 to 2000 cm / sec.

  The continuous wave fundamental laser beam and the continuous wave harmonic laser beam may be irradiated, or the continuous wave fundamental laser beam and the pulsed harmonic laser beam may be irradiated. You may do it. By irradiating a plurality of laser beams, energy can be supplemented.

  It is also possible to use a pulse oscillation type laser beam that oscillates the laser at an oscillation frequency that allows irradiation of the next pulse of laser light after the semiconductor film is melted by the laser light and solidifies. it can. By oscillating the laser beam at such a frequency, crystal grains continuously grown in the scanning direction can be obtained. A specific oscillation frequency of the laser beam is 10 MHz or more, and a frequency band that is significantly higher than a frequency band of several tens to several hundreds Hz that is normally used is used.

In the case of using a heating furnace as other heat treatment, the amorphous semiconductor film is heated at 400 to 550 ° C. for 2 to 20 hours. At this time, the temperature may be set in multiple stages in the range of 400 to 550 ° C. so that the temperature gradually increases. In the first low-temperature heating process at about 400 ° C., hydrogen and the like of the amorphous semiconductor film are generated, so that film roughness during crystallization can be reduced.
Furthermore, it is preferable to form a metal element that promotes crystallization, such as nickel (Ni), over the amorphous semiconductor film because the heating temperature can be reduced. Examples of metal elements include iron (Fe), rutinium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir), platinum (Pt), copper (Cu), gold (Au), A metal such as cobalt (Co) can also be used.

Furthermore, in addition to the heating furnace, polycrystalline silicon may be formed by performing laser irradiation as described above.

  The polycrystalline silicon formed in this way is subjected to heat treatment using a metal element, so that the crystal structure is almost the same as when a single crystal is used, and a metal element that can be used as a material for the structural layer is used. Thus, the first structural layer 103 having higher toughness than polycrystalline silicon produced by heat treatment that is not required can be obtained. This is because polycrystalline silicon with continuous grain boundaries can be produced by heat treatment using a metal element. Unlike amorphous silicon and polycrystalline silicon obtained by heat treatment without using a metal element, the polycrystalline silicon having continuous crystal grain boundaries does not break covalent bonds at the crystal grain boundaries. Therefore, stress concentration caused by a crystal grain boundary does not occur, and as a result, the fracture stress is higher than that of polycrystalline silicon formed without using a metal element. Furthermore, since the mobility of electrons is large due to continuous crystal grain boundaries, it is suitable as a material for controlling the structure body by electrostatic force.

  Further, when the first structural layer 103 includes a metal element that promotes crystallization, the first structural layer 103 can have conductivity and is suitable for the semiconductor device of the present invention in which the structure is controlled by electrostatic force.

  Further, since the metal element becomes a contamination source of the semiconductor device, it can be removed after crystallization. In this case, after the heat treatment using the metal element, a layer serving as a gettering sink is formed over the silicon film, and the metal element can be moved to the gettering sink by heating. As the gettering sink, a polycrystalline semiconductor film or a semiconductor film to which impurities are added can be used. For example, a polycrystalline semiconductor film to which an inert element such as argon is added can be formed over the semiconductor film, and this can be used as a gettering sink. By adding an inert element, the polycrystalline semiconductor film can be distorted, and the metal element can be efficiently captured by the distortion. A metal element can also be captured by forming a semiconductor film to which an element such as phosphorus is added.

The first structural layer 103 manufactured by such a process can be used. In addition, when the first structure layer 103 needs to have conductivity, an impurity element such as phosphorus, arsenic, or boron can be added to the first structure layer 103. The structure having conductivity is suitable for the semiconductor device of the present invention controlled by electrostatic force having a structure having conductivity.

An impurity region may be formed in the first structure layer 103 to increase conductivity. The impurity region can be formed by forming a resist mask by photolithography and adding an impurity element. The impurity element can be added by an ion doping method or an ion implantation method. Typically, phosphorus (P) or arsenic (As) is used as the impurity element imparting N-type, and boron (B) is used as the impurity element imparting p-type. In the n-type impurity region and the p-type impurity region, impurity regions to which an impurity element is added can be formed in a concentration range of 1 × 10 ²⁰ to 1 × 10 ²¹ / cm ³ .

  After the impurity region is formed, heat treatment may be performed to activate the impurity element. The heat treatment may be performed under the conditions described above.

Next, a sacrificial layer 104 is formed and patterned into an arbitrary shape (see FIG. 1A). The sacrificial layer 104 is made of a metal such as tungsten, a compound containing silicon (for example, silicon oxide or silicon nitride), or a metal compound that is a compound of an element such as metal and silicon, and is formed using a sputtering method, a CVD method, or the like. To form a film. For patterning, a resist mask is formed using a photolithography method, and anisotropic dry etching is performed. The sacrificial layer refers to a layer to be removed in a later step, and a space is provided by removing the sacrificial layer. Such a sacrificial layer can be formed from a material having a metal, metal compound, silicon, silicon oxide, or silicon nitride. The sacrificial layer may be a conductive layer or an insulating layer.

The thickness of the sacrificial layer 104 is determined in consideration of various factors such as the material of the sacrificial layer 104, the structure and operation method of the structure, and the etching method for removing the sacrificial layer. For example, if the sacrificial layer 104 is too thin, the etching agent does not diffuse and is not etched. In addition, a phenomenon occurs in which a structural layer formed on the sacrificial layer 104 buckles (also referred to as sticking or sticking) after etching. Furthermore, when the structure is operated with an electrostatic force, if the sacrificial layer is too thick, it may not be driven. Therefore, when driving by electrostatic force, the sacrificial layer 104 preferably has a thickness of 0.5 μm to 3 μm, for example, and preferably 1 μm to 2.5 μm.

Further, when a material having a large internal stress is used as a sacrificial layer, it is difficult to form a thick sacrificial layer at a time. In this case, the sacrificial layer can be formed thick by repeating film formation and patterning. That is, the sacrificial layer may have a single layer structure or a laminated structure.

  Next, a second structural layer 105 which forms the upper portion of the microstructure is formed. As the second structural layer 105, an amorphous silicon film or a polycrystalline silicon film is formed and patterned into an arbitrary shape (see FIG. 1B). At this time, part of the sacrificial layer 104 is exposed (see the top view in FIG. 1B). As the second structural layer 105, a material similar to that of the first structural layer 103 and a material having a similar crystal structure can be used. Then, similarly to the first structure layer 103, a polycrystalline silicon layer can be manufactured by heat treatment using a metal element.

  Polycrystalline silicon manufactured through such a process can be used for the second structural layer 105. By having the metal element used for the heat treatment as it is, the polycrystalline silicon can have conductivity. In addition, when the second structural layer 105 needs to have conductivity, an impurity element can be added in the same manner as the first structural layer 103.

After the impurity region is formed, the impurity element may be activated. The activation means is the same as in the case of the first structural layer 103.

The second structural layer 105 can be formed in a multilayer structure like the first structural layer 103 in order to obtain a necessary thickness.

  The material and film thickness of the second structural layer 105 are the same as the adhesion to the first structural layer 103, the thickness of the sacrificial layer 104, the material of the second structural layer 105, the structure structure, or the sacrificial layer etching. It can be determined in consideration of various factors such as the method. For example, when the second structural layer 105 is formed using the silicon film of this embodiment, the film thickness preferably has a thickness of 1 μm to 10 μm.

When a material having a large internal stress distribution difference is used as the material of the second structural layer 105, the second structural layer 105 may be warped. However, it is also possible to configure the structure using the warpage of the second structural layer 105.

Further, when the second structural layer 105 is formed thick, a distribution is generated in internal stress, which causes warping and buckling (also called sticking or sticking). On the other hand, if the thickness of the second structural layer 105 is thin, the structure may be buckled by the surface tension of the solution used during the sacrifice layer etching. Considering these, the thickness of the second structural layer 105 can be determined.

  Next, the sacrificial layer 104 is removed by etching (see FIG. 1C). Etching can be performed by an etching agent and an etching method suitable for the material of the sacrificial layer 104. As an etching method, there are a wet etching method and a dry etching method.

For example, when the sacrificial layer is tungsten (W), the sacrificial layer is immersed in a solution in which 28% ammonia and 31% hydrogen peroxide solution are mixed at a ratio of 1: 2 for about 20 minutes. When the sacrificial layer is silicon dioxide, buffered hydrofluoric acid in which ammonium fluoride is mixed in a ratio of 7 to 49% aqueous solution 1 of hydrofluoric acid is used.

When drying after wet etching, in order to prevent buckling of the structure due to capillarity, rinse with a low-viscosity organic solvent (for example, cyclohexane), or dry under low temperature and low pressure conditions, or a combination of both Can be done by.

The sacrificial layer can be dry-etched using F ₂ or XeF ₂ under high pressure conditions such as atmospheric pressure. In order to prevent buckling of the structure due to capillary action, plasma treatment for imparting water repellency to the surface of the structure can also be performed.

In this embodiment mode, part of the sacrificial layer 104 is exposed; therefore, the sacrificial layer 104 can be removed without forming a contact hole.

In the case where an insulating layer or the like is formed so as to cover the second structural layer 105 or the sacrificial layer 104, a contact hole is formed in the insulating layer, and an etchant is introduced through the contact hole, so that the sacrificial layer 104 is formed. Can be removed.

The structure body 106 can be manufactured by etching away the sacrificial layer 104 using such a process.

The structure body 106 has a portion where the second structural layer 105 is not fixed to or in contact with the first structural layer 103 bonded to the substrate or the substrate by etching away the sacrificial layer 104. It becomes a structure. An example of such a structure is a beam structure as shown in FIG. The beam structure is a structure having a column portion and a beam portion.

  In the case where the structure body 106 is moved by an electrostatic force, a conductive layer 107 that can be used as a common electrode, a control electrode, or the like may be formed under the base film 102 (see FIG. 2A). In the case where the base film 102 has a stacked structure, the conductive layer 107 can be formed between the base films 102 (see FIG. 2B). The conductive layer 107 can be formed by a CVD method or the like using a metal such as tungsten or a conductive substance as a material. Moreover, you may pattern into arbitrary shapes as needed.

When the layer forming the structure body 106 has a pattern having corners when viewed from above, it is preferable to pattern the corner parts in a rounded shape. The same applies to the sacrificial layer 104 that is removed later. 7A shows a top view of the conductive layer 107 and the sacrificial layer 104 formed and patterned, and FIG. 7B shows a cross-sectional view thereof. By patterning in such a rounded state, the generation of dust can be suppressed and the yield can be improved.

As described above, it is desirable that the layers constituting the structure body 106 be as smooth as possible. By making such a sharp shape, it is possible to suppress the generation of dust and to prevent cracks that cause destruction.

In the above process, the second structural layer 105 is formed on the sacrificial layer 104. However, an insulating layer is formed on the sacrificial layer 104, and then the second structural layer 105 is formed. It is also possible.
That is, the present invention is characterized by using polycrystalline silicon formed using a metal element in the structural layer, and is not limited to other structures.

In this manner, by forming the insulating layer between the sacrificial layer 104 and the second structural layer 105, the second structural layer 105 is protected by the insulating layer when the sacrificial layer 104 is removed, Damage to the second structural layer 105 can be reduced.

  In the method for manufacturing the structure body 106 described above, an appropriate combination of the material of the first structure layer 103, the material of the second structure layer 105, the material of the sacrificial layer 104, and the etchant for removing the sacrificial layer is determined. To do. For example, when a specific etching agent is determined, the sacrificial layer 104 may be formed using a material having a higher etching rate than the materials of the first structural layer 103 and the second structural layer 105.

  The polycrystalline silicon layers constituting the first structural layer 103 and the second structural layer 105 include a layer having polycrystalline silicon crystallized by the above-described steps, a layer having amorphous silicon, As described above, can be laminated. By using a structural layer having a laminated structure in this way, a structural layer having both flexibility and hardness can be obtained. Further, the balance between flexibility and hardness can be determined by the ratio of the thicknesses of the layers to be laminated.

  Further, it is known that a silicon alloy such as nickel silicide is generally high in strength. By leaving the metal element used in the heat treatment of the semiconductor film entirely or selectively in the semiconductor film and applying an appropriate heat treatment, a harder and more conductive structure can be manufactured.

  In addition, by laminating the layer including the metal element used for crystallization as described above and the layer including polycrystalline silicon, a flexible material with excellent conductivity can be obtained. In addition, by stacking a layer having amorphous silicon and a layer having silicide, a hard material having excellent conductivity can be obtained.

  When a metal element is added to the entire surface and laser irradiation or heat treatment is performed, the crystal growth direction of silicon advances in a direction perpendicular to the substrate, and metal is selectively added to perform laser irradiation or heat treatment. Alternatively, when crystallization is performed without using a metal element, the crystal growth direction proceeds in a direction parallel to the substrate. By laminating two or more layers having different crystal directions, a material having further excellent toughness can be obtained. Since films with different crystal directions are stacked, cracks are unlikely to propagate to layers with different crystal directions even if a single layer breaks down. As a result, the second structural layer 105 that is hard to break and has high strength can be manufactured.

  The layer having amorphous silicon, the layer having polycrystalline silicon, or the layer having nickel silicide can be stacked by repeated film formation in order to obtain a required thickness.

  As shown in FIG. 10A, silicon having various properties and silicon compounds can be stacked. FIG. 10A illustrates the case where a layer 150 including amorphous silicon, a layer 151 including polycrystalline silicon, and a layer 152 including nickel silicide are stacked over the substrate 101. In the present invention, the layers constituting the structure can be arbitrarily selected and laminated. In addition, the above steps can be easily stacked. Therefore, the second structural layer 105 having desired properties can be easily manufactured.

  Furthermore, the crystallization using a metal as in the above-described step can be partially performed by selectively applying a metal element. For example, the metal can be applied and crystallized only in the portion of the second structural layer 105 where the sacrificial layer 104 is located below.

  The crystallization as described above can be partially crystallized by selective laser irradiation. For example, only the portion 154 of the second structural layer 105 with the sacrificial layer 104 underneath can be crystallized. Further, by changing the laser conditions, it is possible to leave the amorphous silicon only in the column portion 155 of the beam structure shown in FIG. 10B and to crystallize the beam portion. In this manner, a microstructure can be formed using silicon having different crystal states.

When heat treatment is performed using a metal element as in the above-described process, crystallization can be performed at a lower temperature than heat treatment performed without using a metal element, so that a material that can be used for a substrate for forming a structure is used. The width expands. For example, when a semiconductor film is crystallized only by heating, it is necessary to perform heating for about 1 hour at a temperature of about 1000 ° C., and a glass substrate vulnerable to heat or a metal having a melting point of 1000 ° C. or less is used. Can not. However, by using the above process, a glass substrate or the like having a distortion point of 593 ° C. can be used.

As described above, the present invention can produce a microstructure on an insulating surface.
Then, an electric circuit can be formed using the semiconductor element, and the microstructure can be controlled. A semiconductor device having such a microstructure can reduce manufacturing costs. In addition, mass productivity can be improved by the method for manufacturing a semiconductor device of the present invention, as compared with a structure in which an electric circuit is separately formed and electrically connected to a microstructure as in the conventional case.

(Embodiment 2)
In this embodiment mode, unlike the above embodiment mode, a structure in which polycrystalline silicon is sandwiched between insulating layers will be described with reference to FIGS. In the drawings, a top view is shown on the upper side, and a sectional view in the top view OP is shown on the lower side.

As shown in FIG. 3A, a base film 202 and a sacrificial layer 203 are formed over an insulating substrate 201. Embodiment 1 can be referred to for these manufacturing methods. Then, a first insulating layer 204 constituting the structure is formed. An inorganic material or an organic material can be used for the first insulating layer. As the inorganic material, silicon oxide or silicon nitride can be used. As the organic material, polyimide, acrylic, polyamide, polyimide amide, benzocyclobutene, siloxane, or polysilazane can be used. Siloxane has a skeleton structure formed of a bond of silicon (Si) and oxygen (O). As a substituent, an organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent. Polysilazane is formed using a polymer material having a bond of silicon (Si) and nitrogen (N) as a starting material.

In particular, when an inorganic material is used for the first insulating layer 204, the first insulating layer 204 can be manufactured by oxidizing or nitriding the surface of the formation surface. As a means for such oxidation or nitridation, there is a high density plasma treatment. The high-density plasma treatment means that the plasma density is 1 × 10 ¹¹ cm ⁻³ or more, preferably 1 × 10 ¹¹ cm ⁻³ to 9 × 10 ¹⁵ cm ⁻³ , such as a microwave (for example, a frequency of 2.45 GHz). This is plasma processing using high frequency. When plasma is generated under such conditions, the low electron temperature is changed from 0.2 eV to 2 eV. As described above, high-density plasma characterized by a low electron temperature has low kinetic energy of active species, so that a film with less plasma damage and fewer defects can be formed.

  A substrate formed up to the first sacrificial layer 203 is placed in a film formation chamber that enables such plasma treatment, and the distance between the electrode for plasma generation, so-called antenna, and the object to be formed is preferably 20 mm to 80 mm, preferably The film forming process is performed at 20 mm to 60 mm. Such high-density plasma treatment can realize a low-temperature process (substrate temperature of 400 ° C. or lower). Therefore, glass or plastic with low heat resistance can be used as the insulating substrate 201.

  The film formation atmosphere of such an insulating layer can be a nitrogen atmosphere or an oxygen atmosphere. The nitrogen atmosphere is typically a mixed atmosphere of nitrogen and a rare gas, or a mixed atmosphere of nitrogen, hydrogen, and a rare gas. As the rare gas, at least one of helium, neon, argon, krypton, and xenon can be used. The oxygen atmosphere is typically a mixed atmosphere of oxygen and a rare gas, a mixed atmosphere of oxygen, hydrogen, and a rare gas, or a mixed atmosphere of dinitrogen monoxide and a rare gas. As the rare gas, at least one of helium, neon, argon, krypton, and xenon can be used.

  The insulating layer formed in this way has little damage to other coatings and becomes dense. An insulating layer formed by high-density plasma treatment can improve an interface state in contact with the insulating layer. For example, when the first insulating layer 204 is formed using high-density plasma treatment, the interface state with the formation surface can be improved. By forming such an insulating layer over the structure layer, damage to the structure can be reduced.

  Although the case where high-density plasma treatment is used for forming the gate insulating layer is described here, high-density plasma treatment may be performed on the semiconductor film. The semiconductor film surface can be modified by high-density plasma treatment. As a result, the interface state can be improved, and the electrical characteristics of the semiconductor element can be improved.

  Furthermore, not only the first insulating layer 204 but also the base film 202 can be formed using high-density plasma treatment.

Next, as illustrated in FIG. 3B, a layer (structural layer) 205 including polycrystalline silicon is formed over the first insulating layer 204, and a second insulating layer 206 is formed so as to cover the layer 205. To do. The above embodiment mode can be referred to for the layer (structure layer) 205 including polycrystalline silicon. For the second insulating layer 206, the first insulating layer 204 can be referred to.

After that, the first insulating layer 204 and the second insulating layer 206 are patterned into arbitrary shapes so that the sacrificial layer 203 is exposed (see the top view in FIG. 3B).

  Next, the sacrificial layer 203 is removed by etching (see FIG. 3C). For the etching of the sacrificial layer 203, the above embodiment mode can be referred to.

  In the case where the structure body 207 is moved by an electrostatic force, a conductive layer 208 that can be used as a common electrode, a control electrode, or the like may be formed under the base film 202 (see FIG. 4A). In the case where the base film 202 has a stacked structure, the conductive layer 208 can be formed between the base films 202 (see FIG. 4B). The conductive layer 208 can be formed by a CVD method or the like using a metal such as tungsten or a conductive substance as a material. Moreover, you may pattern into arbitrary shapes as needed.

In the case where the layer constituting the structure 207 has a pattern with corners when viewed from above, it is preferable to pattern the corners in a rounded shape. The same applies to the sacrificial layer 203 to be removed later. FIG. 9A shows a top view of the conductive layer 208 and the sacrificial layer 203 formed and patterned, and FIG. 9B shows a cross-sectional view thereof. By patterning in such a rounded state, the generation of dust can be suppressed and the yield can be improved.

  Note that this embodiment mode can be freely combined with the above embodiment modes.

(Embodiment 3)
In this embodiment, the microstructure manufactured in the above embodiment will be described with reference to drawings.

  FIG. 5 shows a cross-sectional view of a microstructure 301 manufactured by applying the method for manufacturing a microstructure described in the above embodiment mode. In the microstructure 301, a base film 305, a first conductive layer 303, and a first insulating layer 306 are formed over a substrate 300, and a semiconductor layer 302 and a second insulating layer 307 are formed over the first insulating layer. It has a structural layer formed by stacking. A third insulating layer 309 is formed in a partial region above the structural layer, and the second conductive layer 304 is connected to the first conductive layer and the semiconductor through a contact hole provided in the third insulating layer. Electrically connected to the layer.

  Here, if an impurity element or a metal element is added to the semiconductor layer 302 which forms the structural layer, the semiconductor layer 302 has conductivity, and thus a capacitor (capacitor) is formed by the structural layer and the first conductive layer. Can do. The structural layer thus manufactured can be moved by receiving an external force such as an electrostatic force, a pressure, and an acceleration, so that the capacitance becomes a variable capacitance (variable capacitor). Therefore, the microstructure body 301 can function as a sensor whose capacitance is changed by receiving an external force.

  Therefore, the microstructure shown in FIG. 5 can serve as the sensor 16 that detects an external force in the semiconductor device 11 described with reference to FIG.

  In the microstructure 301 illustrated in FIG. 5, the structural layer can be manufactured as a bimetallic structure in which two kinds of substances having different thermal expansion coefficients are stacked. In this case, since the structural layer is moved by a temperature change, the microstructure 301 can be used as a temperature detection element.

  FIG. 8 is a perspective view of a microstructure manufactured by applying the manufacturing method of the microstructure described in the above embodiment mode. The microstructure 310 includes a base film 317, a sacrificial layer 314, and a structural layer 315 formed using a semiconductor layer over a substrate 316. The microstructure 310 includes a cantilever 313 in which the structural layer 315 is movable, and a first electrode 311 and a second electrode 312 on both sides thereof, and is formed below at least the movable cantilever 313. The sacrificial layer 314 is removed by etching.

  The microstructure 310 manufactured in this manner can function as a switching element in which the movable cantilever 313 is movable and is in contact with the first electrode 311 or the second electrode 312. Further, it is also possible to apply a constant vibration to the movable cantilever 313 and use it as an angular momentum sensor for detecting when Coriolis force is applied to the microstructure 310.

  When a switch element is manufactured using such a microstructure, a signal transmission path through the switch is completely insulated when turned off, and a low-resistance signal transmission path can be formed when turned on. In addition, a control system that controls on / off of the switch and the signal transmission path can be insulated, and a switch with low insertion loss can be manufactured.

  In addition, the microstructure manufactured as described above may be used as an element or a sensor by changing a control method while having the same shape. Further, the structure can be made to function as an actuator by changing the control method, and the microstructure in the above example can form the structure portion 13 in the semiconductor device 11 shown in FIG.

  In this example, a semiconductor such as the second structural layer 105 described with reference to FIGS. 1 and 2 in the first embodiment and the structural layer 205 described with reference to FIGS. An example of a method for manufacturing a structural layer including layers will be described.

  For example, as illustrated in FIG. 10A, the structure layer included in the structure is formed by stacking a layer including polycrystalline silicon crystallized using the above steps and a layer including amorphous silicon. Can be formed.

  Like the layer having polycrystalline silicon and the layer having amorphous silicon shown in the above example, silicon layers having different crystal states have different mechanical characteristics. Therefore, by stacking as in the above example or forming the structure layer in a selective region, structures corresponding to various applications can be manufactured.

<Measurement of composite elastic modulus and indentation hardness>
In order to investigate the difference in the mechanical properties of silicon layers with different crystal states, the composite elastic modulus and indentation hardness of the layer having amorphous silicon and the layer having polycrystalline silicon formed by CVD are used. Measurements were made. Here, the layer having polycrystalline silicon is obtained by laser crystallization of a layer having amorphous silicon using a metal catalyst.

The layer having amorphous silicon used for the sample was formed by forming a silicon nitride layer with a thickness of 50 nm and a silicon oxide layer with a thickness of 100 nm as a base layer on a quartz substrate by a CVD method. An amorphous silicon layer was formed by a CVD method. In addition, the layer having polycrystalline silicon used for the sample was crystallized from a layer having amorphous silicon formed in the same manner as described above by using a continuous wave laser. Here, the energy density of the laser used for crystallization was 9 to 9.5 W / cm ² , and the scanning speed was 35 cm / sec. Here, the layer having amorphous silicon as a sample was formed to a thickness of 66 nm, and the thickness of the layer having polycrystalline silicon crystallized by laser irradiation was about 60 nm.

  The measurement was performed by nanoindentation measurement in which a triangular pyramid indenter was pushed into the sample. The measurement condition was a single indentation of the indenter, and the indenter used was a Berkovich indenter made of diamond. Therefore, the indenter has an elastic modulus of about 1000 GPa and a Poisson's ratio of about 0.1.

  The measured composite elastic modulus is an elastic modulus obtained by combining the elastic modulus of the sample and the indenter represented by the following formula (1). In the formula (1), Er is a composite elastic modulus, E is a Young's modulus, and ν is a Poisson's ratio. In addition, the first term (term indicated by sample) in the equation is a term contributed by the elastic modulus of the sample, and the second term (term indicated by indenter) is a term contributed by the elastic modulus of the indenter.

  As shown in the equation, the composite elastic modulus is obtained by the sum of the first term contributed by the elastic modulus of the sample and the second term contributed by the elastic modulus of the indenter. However, since the elastic modulus of the indenter is much larger than that of the sample, the second term can be ignored, and the composite elastic modulus approximately represents the elastic modulus of the sample.

  The indentation hardness is hardness measured by an indentation method, and is obtained by dividing the maximum press-fit weight of the indenter by the projected area at the time of maximum press-fit. Here, the projected area at the time of press-fitting is determined by the geometric shape of the indenter and the contact depth when the indenter pushes the sample. By multiplying this indentation hardness by 76, it can be handled equivalent to the Vickers hardness generally used as an index of hardness.

Table 1 shows the measurement results of the composite elastic modulus and indentation hardness of the layer having polycrystalline silicon and the layer having amorphous silicon.
The result has shown the average value of 3 times of measurement results.

  From the results shown in Table 1, the layer having polycrystalline silicon has a higher elastic modulus than the layer having amorphous silicon. That is, when a force that bends the structure is applied, the layer having polycrystalline silicon is more resistant to breakage due to bending than the layer having amorphous silicon.

Further, the results shown in Table 1 indicate that the layer having polycrystalline silicon is harder than the layer having amorphous silicon.

  By stacking semiconductor layers having different elastic moduli and hardness in this manner, a structure having both flexibility and strength that is strong against bending force can be manufactured. For example, by stacking the above-described layers, even if breakdown occurs from a crystal defect of a layer having polycrystalline silicon, the breakdown is not easily propagated to the layer having amorphous silicon. Breakage can be stopped between layers with crystalline silicon. Thus, the balance between flexibility and hardness can be determined by the ratio of the thicknesses of the layers to be laminated.

  Thus, a structure having a structural layer having desired properties such as flexibility, hardness, or conductivity by laminating or partially forming silicon layers or silicon compound layers having different properties. The body can be made. By using such a structure, a product having desired properties can be manufactured. For example, when used as a sensor, a sensor that detects a desired range can be manufactured. It is also possible to produce a sensor that can be detected over a wide range. In addition, since a structure having a supple structure layer is resistant to breakage due to bending, a structure and a product having a long life can be obtained.

4A and 4B illustrate a manufacturing process of a microstructure according to the invention. 4A and 4B illustrate a manufacturing process of a microstructure according to the invention. 4A and 4B illustrate a manufacturing process of a microstructure according to the invention. 4A and 4B illustrate a manufacturing process of a microstructure according to the invention. 3A and 3B illustrate a structure of a microstructure according to the invention. 6A and 6B illustrate a semiconductor device having a microstructure of the present invention. 4A and 4B illustrate a manufacturing process of a microstructure according to the invention. 3A and 3B illustrate a structure of a microstructure according to the invention. 4A and 4B illustrate a manufacturing process of a microstructure according to the invention. 3A and 3B illustrate a structure of a microstructure according to the invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Control apparatus 11 Semiconductor device 12 Electric circuit part 13 Structure part 14 Control circuit 15 Interface 16 Sensor 17 Actuator 101 Substrate 102 Base film 103 First structure layer 104 Sacrificial layer 105 Second structure layer 106 Structure 107 Conductive layer 150 Layer 151 having amorphous silicon layer 152 having polycrystalline silicon layer 154 layer having nickel silicide part 155 part having sacrificial layer 104 155 pillar part 201 having a beam structure insulating substrate 202 base film 203 sacrificing layer 204 first insulating layer 205 Layer with crystalline silicon (structural layer)
206 Second insulating layer 207 Structure 208 Conductive layer 300 Substrate 301 Microstructure 302 Semiconductor layer 303 First conductive layer 304 Second conductive layer 305 Base film 306 First insulating layer 307 Second insulating layer 309 First 3 Insulating Layer 310 Micro Structure 311 First Electrode 312 Second Electrode 313 Beam 314 Sacrificial Layer 315 Structural Layer 316 Substrate 317 Base Film

Claims (22)

A first layer provided on an insulating surface;
A second layer comprising polycrystalline silicon provided on the first layer,
The polycrystalline silicon is polycrystalline silicon crystallized using a metal element,
A microstructure having a space between the first layer and the second layer. A first layer provided on an insulating surface;
A second layer comprising polycrystalline silicon provided on the first layer,
The polycrystalline silicon is polycrystalline silicon crystallized using a metal element,
A layer having a metal, a metal compound, silicon, silicon oxide, or silicon nitride provided on the first layer is removed by an etching method, and a space is formed between the first layer and the second layer. A microstructure having the structure. A first layer provided on an insulating surface;
A second layer comprising polycrystalline silicon provided on the first layer,
The polycrystalline silicon is polycrystalline silicon crystallized using a metal element,
A layer having a metal, a metal compound, silicon, silicon oxide, or silicon nitride provided on the first layer is removed by an etching method, and the second layer is not in contact with the insulating surface and the first layer. A microstructure having a portion. A first layer provided on an insulating surface;
A second layer comprising polycrystalline silicon provided on the first layer,
The polycrystalline silicon is polycrystalline silicon crystallized using a metal element,
A layer having a metal, a metal compound, silicon, silicon oxide, or silicon nitride provided on the first layer is removed by an etching method, and the second layer is not in contact with the insulating surface and the first layer. A microstructure having a beam structure having a portion. In any one of Claims 1 thru | or 4,
The microstructure according to claim 1, wherein the first layer includes polycrystalline silicon obtained by heat treatment using a metal element. In any one of Claims 1 thru | or 5,
The microstructure is characterized in that the second layer has a structure in which the polycrystalline silicon and amorphous silicon are laminated. In any one of Claims 1 thru | or 6,
The second layer has a structure in which the polycrystalline silicon is laminated,
A microstructure having different crystalline states of the polycrystalline silicon. In any one of Claims 1 thru | or 7,
A microstructure having a common electrode below the first layer. In any one of Claims 1 thru | or 8,
The microstructure is characterized in that thermal crystallization or laser crystallization is used for the crystallization. In any one of Claims 1 thru | or 9,
The microstructure according to claim 1, wherein the metal element used for the crystallization is one or more of Ni, Fe, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au. Forming a layer having amorphous silicon on the insulating surface;
The amorphous silicon is crystallized using a metal to form polycrystalline silicon,
A method for manufacturing a microstructure, wherein a space is formed above or below the polycrystalline silicon layer. Forming a first layer on the insulating surface;
Forming a third layer on the first layer;
Forming a second layer comprising amorphous silicon on the third layer;
The amorphous silicon is crystallized using a metal element to form polycrystalline silicon,
A method for manufacturing a microstructure, wherein the third layer is removed by etching. Forming a first layer on the insulating surface;
Forming a third layer on the first layer;
Forming a second layer comprising amorphous silicon on the third layer;
The amorphous silicon is crystallized using a metal element to form polycrystalline silicon,
Forming an insulating layer covering the polycrystalline silicon;
A method for manufacturing a microstructure, wherein a contact hole is formed in the insulating layer, an etching agent is introduced through the contact hole, and the third layer is removed by etching. Forming a first layer on the insulating surface;
Forming a third layer on the first layer;
Forming a second layer comprising amorphous silicon on the third layer;
The amorphous silicon is crystallized using a metal element to form polycrystalline silicon,
Fabrication of the microstructure characterized in that the third layer is removed by etching to form a portion where the second layer and the insulating surface or the first layer bonded to the insulating surface are not in contact with each other. Method. Forming a first layer on the insulating surface;
Forming a third layer on the first layer;
Forming a second layer comprising amorphous silicon on the third layer;
The amorphous silicon is crystallized using a metal element to form polycrystalline silicon,
A method for manufacturing a microstructure, wherein the second layer is formed into a beam structure by removing the third layer by etching. Forming a first layer on the insulating surface;
Forming a third layer on the first layer;
Forming a second layer comprising amorphous silicon on the third layer;
The amorphous silicon is crystallized using a metal element to form polycrystalline silicon,
A method for manufacturing a microstructure, wherein the second layer is formed into a beam structure by removing the third layer by etching, and the second layer is moved by pressure, electrostatic force, or electromagnetic force. In any one of Claims 11 thru | or 16,
The method for manufacturing a microstructure, wherein the third layer includes a metal, a metal compound, silicon, silicon oxide, or silicon nitride. In any one of Claims 11 thru | or 17,
A method for manufacturing a microstructure, wherein thermal crystallization or laser crystallization is used for the crystallization. In any one of Claims 11 thru | or 18,
A method for manufacturing a microstructure, wherein the metal element is applied to part of the amorphous silicon to form selectively crystallized polycrystalline silicon. In any one of Claims 11 thru | or 18,
A method for manufacturing a microstructure, wherein selectively crystallized polycrystalline silicon is formed by irradiating a part of the amorphous silicon with a laser. In any one of claims 11 to 20,
A method for manufacturing a microstructure, comprising forming an alloy of the silicon and the metal element without removing the metal element. A device according to any one of claims 11 to 21.
The metal element used for the crystallization is any one or more of Ni, Fe, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au. .

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