JP2006504368A - デジタル周波数オフセット補正を備えたゼロ中間周波数ベースのｇｓｍ無線受信機のためのｄｃオフセットを除去する方法 - Google Patents

デジタル周波数オフセット補正を備えたゼロ中間周波数ベースのｇｓｍ無線受信機のためのｄｃオフセットを除去する方法 Download PDF

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Publication number
JP2006504368A
JP2006504368A JP2005501687A JP2005501687A JP2006504368A JP 2006504368 A JP2006504368 A JP 2006504368A JP 2005501687 A JP2005501687 A JP 2005501687A JP 2005501687 A JP2005501687 A JP 2005501687A JP 2006504368 A JP2006504368 A JP 2006504368A
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Prior art keywords
offset
digital
signal
intermediate frequency
zero intermediate
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Pending
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JP2005501687A
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Japanese (ja)
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JP2006504368A5 (https=
Inventor
シッピー、ジョフレイ
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Qualcomm Inc
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Qualcomm Inc
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Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of JP2006504368A publication Critical patent/JP2006504368A/ja
Publication of JP2006504368A5 publication Critical patent/JP2006504368A5/ja
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits
    • H04B1/30—Circuits for homodyne or synchrodyne receivers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
    • H03D3/007—Demodulation of angle-, frequency- or phase- modulated oscillations by converting the oscillations into two quadrature related signals
    • H03D3/008—Compensating DC offsets
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of DC offset
    • H04L25/062—Setting decision thresholds using feedforward techniques only
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Transceivers (AREA)
JP2005501687A 2002-10-25 2003-10-27 デジタル周波数オフセット補正を備えたゼロ中間周波数ベースのｇｓｍ無線受信機のためのｄｃオフセットを除去する方法 Pending JP2006504368A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US42122302P 2002-10-25 2002-10-25
US10/454,395 US6999537B2 (en) 2002-10-25 2003-06-03 Method of removing DC offset for a ZIF-based GSM radio solution with digital frequency correlation
PCT/US2003/033911 WO2004038939A1 (en) 2002-10-25 2003-10-27 Method of removing dc offset for a zif-based gsm radio receiver with digital frequency offset correction

Publications (2)

Publication Number Publication Date
JP2006504368A true JP2006504368A (ja) 2006-02-02
JP2006504368A5 JP2006504368A5 (https=) 2010-03-25

Family

ID=32110314

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005501687A Pending JP2006504368A (ja) 2002-10-25 2003-10-27 デジタル周波数オフセット補正を備えたゼロ中間周波数ベースのｇｓｍ無線受信機のためのｄｃオフセットを除去する方法

Country Status (7)

Country Link
US (1) US6999537B2 (https=)
EP (1) EP1554813A1 (https=)
JP (1) JP2006504368A (https=)
AU (1) AU2003284947A1 (https=)
CA (1) CA2502790A1 (https=)
RU (1) RU2359407C2 (https=)
WO (1) WO2004038939A1 (https=)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7068735B2 (en) * 2003-06-16 2006-06-27 Broadcom Corp. System and method to perform DC compensation on a radio frequency burst in a cellular wireless network
US7583765B2 (en) * 2005-04-26 2009-09-01 Skyworks Solutions, Inc. DC offset detection and cancellation in a receiver
US8036622B2 (en) * 2005-09-28 2011-10-11 Qualcomm, Incorporated DC offset cancellation circuit for a receiver
US7986929B2 (en) * 2006-12-08 2011-07-26 Silicon Laboratories Inc. Providing channel filtering in an automatic frequency control path
US7622987B1 (en) 2007-01-25 2009-11-24 Pmc-Sierra, Inc. Pattern-based DC offset correction
US11128501B2 (en) * 2007-07-30 2021-09-21 HuWoMobility, Inc. Method for fast convergence calibration of radio-frequency transceivers
US7929651B1 (en) * 2007-11-09 2011-04-19 Xilinx, Inc. Low phase noise recursive direct digital synthesis with automatic gain control gain stabilization
KR101462577B1 (ko) * 2007-11-21 2014-11-19 삼성전자주식회사 광대역 무선접속 통신시스템에서 디씨 오프셋 제거 장치 및방법
WO2013044513A1 (en) * 2011-09-30 2013-04-04 Motorola Solutions, Inc. Automatic frequency control methods and apparatus
WO2012167555A1 (zh) 2011-11-15 2012-12-13 华为技术有限公司 一种校正同相正交信号的方法和装置
US8938029B2 (en) * 2012-08-31 2015-01-20 Vixs Systems, Inc. DC removal from multicarrier signals
WO2016142424A1 (en) * 2015-03-09 2016-09-15 Sony Corporation Device and method for determining a dc component
CN105553545A (zh) * 2015-12-11 2016-05-04 中国航空工业集团公司西安航空计算技术研究所 一种fc数据采集记录仪记录条件控制策略
CN110879402B (zh) * 2019-11-28 2021-11-09 中国科学院国家空间科学中心 一种gnss干涉测高中消除直流分量的系统及方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11284677A (ja) * 1998-03-27 1999-10-15 Nec Corp 復調器とこれを用いたディジタル無線通信システム
WO2002056490A2 (en) * 2001-01-12 2002-07-18 Qualcomm Inc Direct conversion digital domain control
JP2003224614A (ja) * 2002-01-30 2003-08-08 Mitsubishi Electric Corp デジタル復調回路

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ZA9510509B (en) * 1994-12-23 1996-05-30 Qualcomm Inc Dual-mode digital FM communication system
KR970002572A (ko) * 1995-06-17 1997-01-28 김광호 데이타 저장기기의 데이타 검출방법 및 장치
JP3907703B2 (ja) * 1996-09-06 2007-04-18 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 零ｉｆ受信器
US6504884B1 (en) 1999-05-12 2003-01-07 Analog Devices, Inc. Method for correcting DC offsets in a receiver
DE19933266A1 (de) 1999-07-15 2000-11-02 Siemens Ag Vorrichtung zum Empfangen von Funksignalen
US6868128B1 (en) * 2000-07-05 2005-03-15 Rfmd Wpan, Inc. Method and apparatus for calibrating DC-offsets in a direct conversion receiver
ATE313166T1 (de) * 2000-10-30 2005-12-15 Texas Instruments Inc Vorrichtung zum ausgleichen des dc-offsets eines quadratur-demodulators , und verfahren dazu
US7076225B2 (en) 2001-02-16 2006-07-11 Qualcomm Incorporated Variable gain selection in direct conversion receiver
US7130359B2 (en) * 2002-03-12 2006-10-31 Motorola Inc. Self calibrating receive path correction system in a receiver

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11284677A (ja) * 1998-03-27 1999-10-15 Nec Corp 復調器とこれを用いたディジタル無線通信システム
WO2002056490A2 (en) * 2001-01-12 2002-07-18 Qualcomm Inc Direct conversion digital domain control
JP2003224614A (ja) * 2002-01-30 2003-08-08 Mitsubishi Electric Corp デジタル復調回路

Also Published As

Publication number Publication date
CA2502790A1 (en) 2004-05-06
US20040082302A1 (en) 2004-04-29
AU2003284947A1 (en) 2004-05-13
RU2359407C2 (ru) 2009-06-20
WO2004038939A1 (en) 2004-05-06
EP1554813A1 (en) 2005-07-20
US6999537B2 (en) 2006-02-14
RU2005115571A (ru) 2005-11-10

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