JP2006337442A - 基板の再生方法 - Google Patents
基板の再生方法 Download PDFInfo
- Publication number
- JP2006337442A JP2006337442A JP2005158692A JP2005158692A JP2006337442A JP 2006337442 A JP2006337442 A JP 2006337442A JP 2005158692 A JP2005158692 A JP 2005158692A JP 2005158692 A JP2005158692 A JP 2005158692A JP 2006337442 A JP2006337442 A JP 2006337442A
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- Prior art keywords
- substrate
- polishing
- organic material
- regenerating
- film
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
- H01L27/1266—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/1316—Methods for cleaning the liquid crystal cells, or components thereof, during manufacture: Materials therefor
Abstract
【解決手段】 CF基板10を再生するにあたり、無機材料膜であるITO透明電極4より上層に存する有機材料構造物、即ち配向膜7、柱状スペーサ5及び突起構造物6を、酸化セリウムを含有する研磨剤及び水を用いた湿式研磨によって研磨除去する。
【選択図】 図2
Description
このような複数回の研磨を行うことにより、有機材料構造物のうち研磨され難いものでも効率良く研磨し、種々の有機材料構造物に適合したきめ細かい確実な研磨除去が可能となるとともに、研磨後の基板表面の平坦性が向上する。
本実施形態では、本発明をMVA方式の液晶表示装置のカラーフィルタ(CF)基板の再生に適用した場合について例示する。
図1は、CF基板の構成を示す概略断面図であり、図2は、第1の実施形態によるCF基板の再生方法を順次示す概略断面図である。
ここで、第1の実施形態の変形例について説明する。この変形例では、第1の実施形態と同様に、図1に示すCF基板の再生に適用した場合について例示するが、湿式研磨の方法が第1の実施形態と若干異なる点で相違する。
図6は、第1の実施形態の変形例によるCF基板の再生方法を順次示す概略断面図である。
本実施形態では、本発明をMVA方式の液晶表示装置の薄膜トランジスタ(TFT)基板の再生に適用した場合について例示する。
図7は、TFT基板の構成を示す概略断面図であり、図8は、第2の実施形態によるTFT基板の再生方法を順次示す概略断面図である。
先ず、図8(a)に示すように、TFT基板20の裏面(下面)を基板ホルダ(基板ステージ)12に固定する。そして、TFT基板20を基板ホルダ12に固定した状態で、研磨ヘッド(研磨ステージ)11を用いて、基板ホルダ12を加圧しながら研磨ヘッド11にTFT基板20の表面(上面)を当接した状態で回転させ、ここではアルミナを含有する研磨剤及び水を用いた湿式研磨によって、TFT基板20の表面全体の研磨を開始する。図示の例では、TFT基板20を図7の状態から倒立させて研磨する様子を示す。
TFT基板20では、ITO画素電極28の部分よりも、TFT素子上や中間電極上の部分が約0.5nm〜0.6nm程度高いため、この部分から先に研磨され、ITO画素電極28上の配向膜29が研磨されている間に中間電極等も研磨されるが、電極や配線は無機膜で研磨レートが小さいため、特に問題は生じない。
本実施形態では、TFT基板20の最終形態に極めて近い状態、即ち、保護膜27上にITO画素電極28が形成された状態まで戻される。このように、本実施形態では、再びITO画素電極28やTFT素子の構成要素等を形成する必要がなく、従来方法に比べて工程数が大幅に削減される。
2 低反射Cr−BM
3 カラーフィルタ層
4 ITO透明電極
5 柱状スペーサ
6 配向規制用の突起構造物
7,29 配向膜
10 CF基板
20 TFT基板
22 ゲート電極
23 ゲート絶縁膜
24 a−Si膜
25 ソース電極
26 ドレイン電極
27 保護膜
28 ITO画素電極
Claims (8)
- 液晶表示装置に使用される基板の再生方法であって、
前記基板の上部に形成された無機材料膜を研磨ストッパ層として用い、前記無機材料膜上に形成された有機材料構造物のみを、研磨剤を用いた湿式の研磨のみにより選択的に除去することを特徴とする基板の再生方法。 - 前記無機材料膜がITOからなる透明電極であることを特徴とする請求項1に記載の基板の再生方法。
- 前記有機材料構造物が配向膜であることを特徴とする請求項1又は2に記載の基板の再生方法。
- 前記有機材料構造物が柱状スペーサであることを特徴とする請求項1〜3のいずれか1項に記載の基板の再生方法。
- 前記有機材料構造物が配向制御用の突起構造物であることを特徴とする請求項1〜4のいずれか1項に記載の基板の再生方法。
- 前記研磨剤が酸化セリウム又はアルミナを含有するものであることを特徴とする請求項1〜5のいずれか1項に記載の基板の再生方法。
- 前記研磨剤を変えた研磨レートの異なる複数回の前記研磨により、前記有機材料構造物のみを除去することを特徴とする請求項1〜5のいずれか1項に記載の基板の再生方法。
- 1回目の前記研磨に酸化セリウムを含有する第1の研磨剤を用い、2回目の前記研磨に、前記第1の研磨剤よりも研磨レートの小さいアルミナを含有する第2の研磨剤を用いることを特徴とする請求項7に記載の基板の再生方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005158692A JP4500734B2 (ja) | 2005-05-31 | 2005-05-31 | 基板の再生方法 |
US11/443,091 US20070004050A1 (en) | 2005-05-31 | 2006-05-31 | Method of regenerating substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005158692A JP4500734B2 (ja) | 2005-05-31 | 2005-05-31 | 基板の再生方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006337442A true JP2006337442A (ja) | 2006-12-14 |
JP4500734B2 JP4500734B2 (ja) | 2010-07-14 |
Family
ID=37558091
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005158692A Expired - Fee Related JP4500734B2 (ja) | 2005-05-31 | 2005-05-31 | 基板の再生方法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US20070004050A1 (ja) |
JP (1) | JP4500734B2 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009147104A (ja) * | 2007-12-14 | 2009-07-02 | K square micro solution 株式会社 | 使用済み半導体ウエハ又は基板の再生方法 |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8338267B2 (en) * | 2007-07-11 | 2012-12-25 | Sematech, Inc. | Systems and methods for vertically integrating semiconductor devices |
IT1401647B1 (it) * | 2010-07-09 | 2013-08-02 | Campatents B V | Metodo per monitorare cambi di configurazione di un dispostivo di controllo di una macchina automatica |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10301145A (ja) * | 1997-04-26 | 1998-11-13 | Semiconductor Energy Lab Co Ltd | 液晶表示装置および電子デバイス |
JP2000241819A (ja) * | 1998-12-25 | 2000-09-08 | Internatl Business Mach Corp <Ibm> | 紫外線による有機分子除去装置及び有機高分子膜の除去方法 |
JP2001337305A (ja) * | 2000-05-24 | 2001-12-07 | Sharp Corp | 廃液晶パネルの処理方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5626715A (en) * | 1993-02-05 | 1997-05-06 | Lsi Logic Corporation | Methods of polishing semiconductor substrates |
US5934980A (en) * | 1997-06-09 | 1999-08-10 | Micron Technology, Inc. | Method of chemical mechanical polishing |
JPH11181403A (ja) * | 1997-12-18 | 1999-07-06 | Hitachi Chem Co Ltd | 酸化セリウム研磨剤及び基板の研磨法 |
US6733553B2 (en) * | 2000-04-13 | 2004-05-11 | Showa Denko Kabushiki Kaisha | Abrasive composition for polishing semiconductor device and method for producing semiconductor device using the same |
GB2368971B (en) * | 2000-11-11 | 2005-01-05 | Pure Wafer Ltd | Process for Reclaimimg Wafer Substrates |
-
2005
- 2005-05-31 JP JP2005158692A patent/JP4500734B2/ja not_active Expired - Fee Related
-
2006
- 2006-05-31 US US11/443,091 patent/US20070004050A1/en not_active Abandoned
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10301145A (ja) * | 1997-04-26 | 1998-11-13 | Semiconductor Energy Lab Co Ltd | 液晶表示装置および電子デバイス |
JP2000241819A (ja) * | 1998-12-25 | 2000-09-08 | Internatl Business Mach Corp <Ibm> | 紫外線による有機分子除去装置及び有機高分子膜の除去方法 |
JP2001337305A (ja) * | 2000-05-24 | 2001-12-07 | Sharp Corp | 廃液晶パネルの処理方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009147104A (ja) * | 2007-12-14 | 2009-07-02 | K square micro solution 株式会社 | 使用済み半導体ウエハ又は基板の再生方法 |
Also Published As
Publication number | Publication date |
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US20070004050A1 (en) | 2007-01-04 |
JP4500734B2 (ja) | 2010-07-14 |
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