JP2006324725A - Power amplifier, and wireless communication apparatus employing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power amplifier with an excess input prevention means requiring less power consumption and to provide a wireless communication apparatus employing the same. <P>SOLUTION: The power amplifier includes: a power amplifier section 11 for amplifying the high frequency input signal Pin of a carrier f1; a signal selection section 14 for selecting a high frequency signal AC principally including second and third harmonics f2, f3 from an output signal Pout resulting from amplifying the input signal; a signal conversion section 15 for converting the selected high frequency signal AC into a DC signal DC; and a signal control section 16 for bypassing part of the input signal Pin given to the power amplifier section 11 in response to the DC signal DC. The power consumption is reduced by monitoring an excess input using the harmonics which are unnecessary. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a power amplifier and a wireless communication apparatus using the power amplifier, and more particularly to a power amplifier including means suitable for preventing excessive input and a wireless communication apparatus using the power amplifier.

  Conventionally, in power amplifiers, in order to prevent destruction of the output element due to overcurrent, the current flowing through the output element is monitored, and when this monitored value exceeds the reference value, an AGC (Automatic Gain Control) amplifier that is a driver amplifier The current flowing through the output element is limited by adjusting the gain and the like.

  However, in order to detect the current flowing in the output element, a current detection resistor of several ohms is inserted in the output path in series and the current is converted into a voltage, so that the power consumption of the current detection resistor increases. There is.

  On the other hand, there is known a method of limiting the current flowing in the electric circuit on the input side when an overcurrent flows (see, for example, Patent Document 1).

  The overcurrent protection device disclosed in Patent Document 1 uses a coil, operates as a non-inductive coil in a steady state, and generates a self-inductance and operates as a reactor when an overcurrent flows abnormally. The overcurrent is limited to protect the circuit from overcurrent.

  That is, the first coil 12a that is connected in series to the electric path L and generates a predetermined magnetomotive force, and the second coil that generates a magnetomotive force in the opposite direction to the same degree as the magnetomotive force generated by the first coil. 12b and an element (PTC element) 11 having a positive resistance temperature coefficient connected in series between the first coil 12a and the electric circuit L, and the PTC element 11 and the first coil 12a are connected in series. A second coil 12b is connected in parallel with the circuit.

  When overcurrent flows through the PTC element 11, the temperature of the PTC element 11 rises and the resistance value increases, the balance of magnetic flux generated in each coil 12a, 12b is lost, self-inductance occurs, and the reactor operates to overcurrent. To prevent.

  However, the overcurrent protection device disclosed in Patent Document 1 has a problem that the power consumption of the PCT element is large and the response speed is slow because the overcurrent is detected by heat generation of the PCT element.

In a wireless communication device using a power amplifier, for example, a mobile communication terminal represented by a mobile phone, it is necessary to suppress power consumption necessary for detecting an overcurrent as much as possible in order to extend the battery operation time.
Japanese Patent Laid-Open No. 9-233691 (2 pages, FIG. 1)

  The present invention provides a power amplifier having over-input prevention means with low power consumption, and a wireless communication apparatus using the power amplifier.

  A high-frequency power amplifier according to an aspect of the present invention includes a power amplification unit that amplifies a high-frequency signal, a signal selection unit that selects a high-frequency signal having a predetermined frequency from the amplified high-frequency signal, and the selected high-frequency signal as a direct current A signal conversion unit that converts the signal into a signal and a signal control unit that bypasses the high-frequency signal that is input to the power amplification unit according to the DC signal are provided.

  According to another aspect of the present invention, there is provided a wireless communication apparatus that includes a signal modulation unit that modulates a high-frequency signal based on an input signal input from the outside, a power amplification unit that amplifies the modulated signal, and the amplified signal. A signal selection unit that selects a signal having a predetermined frequency from the received signal, a signal conversion unit that converts the selected signal into a DC signal, and the modulated signal that is input to the power amplification unit according to the DC signal And a signal control unit that bypasses the signal and an antenna that transmits the amplified signal.

  According to the present invention, it is possible to obtain a power amplifier having over-input prevention means with low power consumption, and a wireless communication apparatus using the power amplifier.

  Embodiments of the present invention will be described below with reference to the drawings.

  A first embodiment of the present invention will be described with reference to FIGS. 1 is a circuit diagram showing a configuration of a power amplifier according to a first embodiment of the present invention, FIG. 2 is a diagram schematically showing characteristics of a signal selection unit thereof, and FIG. 2A is a diagram showing frequency characteristics. 2 (b) is a diagram showing the frequency spectrum of the input signal, FIG. 2 (c) is a diagram showing the frequency spectrum of the output signal, FIG. 3 is a circuit diagram showing the configuration of the signal converter, and FIG. It is a figure which shows typically the input-output characteristic of an output signal.

  As shown in FIG. 1, the power amplifier 10 of this embodiment includes a power amplifying unit 11 that amplifies an input signal Pin of a carrier wave f1, an overinput preventing unit 12 that prevents overinput, a power amplifying unit 11, and an overinput prevention. And a bias power supply unit 13 for determining an operating point of the means 12.

  The power amplifying unit 11 is a two-stage amplifier circuit in which, for example, bipolar transistors Q1 and Q2 (hereinafter referred to as transistors Q1 and Q2) are cascade-connected, and collectors c1 and c2 of the transistors Q1 and Q2 are connected to a power source Vcc, respectively. b1 and b2 are respectively connected to the bias power source 13, and the emitters e1 and e2 are grounded.

  Further, the base b1 of the transistor Q1 is connected to the input terminal IN via the DC cut capacitor c1, the collector c1 of the transistor Q1 is connected to the base b2 of the transistor Q2 via the DC cut capacitor c2, and the collector c2 of the transistor Q2 is It is connected to the output terminal OUT via a DC cut capacitor c3.

  The over-input prevention means 12 is connected to the collector c2 of the transistor Q2, and a signal selection unit 14 that selects a signal having a predetermined frequency from the output signal Pout, and a signal that converts the high-frequency signal selected by the signal selection unit 14 into a DC signal. A conversion unit 15 and an input control unit 16 connected to the input terminal IN and bypassing the input signal Pin from the power amplification unit 11 to the ground side according to the output signal of the signal conversion unit 15 are provided.

  Bias voltages Vb1 and Vb2 necessary for the transistors Q1 and Q2 to perform class AB operation are applied to the bases b1 and b2 of the transistors Q1 and Q2, respectively.

  When a high-frequency input signal Pin is input from the outside to the input terminal IN of the power amplifier 11, the input signal Pin and the input signal Pin1 input to the base b1 of the transistor Q1 via the DC cut capacitor C1 and over-input prevention means 12 is distributed to the input signal Pin 2 input to 12.

The input signal Pin1 input to the base b1 of the transistor Q1 is amplified by the transistor Q1.
The input signal Pin1 amplified by the transistor Q1 is input to the base b2 of the transistor Q2 via the DC cut capacitor C2, and further amplified by the transistor Q2.

  The output signal Pout from the transistor Q2 is distributed to the output signal Pout1 output to the output terminal OUT of the power amplifying unit 11 and the output signal Pout2 input to the over-input prevention means 12 via the DC cut capacitor C3. The signal Pout1 is output to the outside.

  In addition to the carrier wave f1, the output signal Pout subjected to class AB amplification by the transistors Q1 and Q2 includes many harmonic signals including the second harmonic wave f2 and the third harmonic wave f3 of the carrier wave f1.

  The signal selector 14 has a parallel resonance circuit of a coil L1 and a capacitor C4, and the parallel resonance frequency is set equal to the frequency of the carrier wave f1 of the high frequency signal.

  As shown in FIG. 2A, the frequency characteristic of the parallel resonance circuit of the signal selection unit 14 has a large attenuation characteristic with respect to the carrier wave f1, as is well known, and operates as a so-called band emission filter.

  As a result, as shown in FIG. 2B, when the output signal Pout2 including the second harmonic f2 and the third harmonic f3 in addition to the carrier wave f1 is input to the signal selection unit 14, FIG. As shown, the carrier wave f1 is cut from the output signal Pout2, and the harmonic signal AC mainly composed of the second harmonic f2 and the third harmonic f3 is output to the signal conversion circuit 15 via the DC cut capacitor C5. .

  As shown in FIG. 3, the signal conversion circuit 15 has a well-known double-wave rectifier circuit including, for example, coils L4 and L5, diodes D1 and D2, capacitors C7 and C8, and a resistor R1, and is inductively coupled to the coil L6. The harmonic signal AC mainly composed of the second harmonic wave f2 and the third harmonic wave f3 is subjected to both-wave rectification and converted into a DC signal DC.

  Since the converted DC signal DC corresponds to the output signal Pout, the output signal Pout can be monitored using the harmonic signal AC mainly composed of the second harmonic f2 and the third harmonic f3.

  The signal control unit 16 includes a bipolar transistor Q3 having a collector c3 connected to the input terminal IN of the power amplification unit 11 via a capacitance C6, a base b3 connected to the output terminal of the signal conversion unit 15, and an emitter e3 grounded. Have.

The collector c3 of the transistor Q3 is connected to the bias power supply unit 13 via the high frequency cut coil L2, and the collector voltage Vc3 is applied.
The base b3 of the transistor Q3 is connected to the bias power supply unit 13 via the high frequency cut coil L3, and a bias voltage Vb3 is applied to which the operating point of the transistor Q3 is smaller than the ON voltage of the transistor Q3 by a predetermined value.

  That is, the transistor Q3 is turned off in a steady state, but is turned on when a DC signal DC of a predetermined value or more is output from the signal converter 15, and the on-resistance of the transistor Q3 changes according to the DC signal DC. It operates as a so-called variable impedance element.

  When the transistor Q3 is turned on, the impedance of the signal control unit 16 is added in parallel to the input impedance of the power amplification unit 11, so that the input signal Pin is equal to the input impedance of the power amplification unit 11 and the impedance of the signal control unit 16. Is distributed to the input signals Pin1 and Pin2.

  As a result, since the input signal Pin2 distributed to the signal control unit 16 is bypassed to the ground side through the transistor Q3, the input signal Pin1 of the power amplification unit 11 is decreased by the input signal Pin2.

  Therefore, as shown in FIG. 4, the input / output characteristics of the input signal Pin and the output signal Pout1 of the power amplifier 10 are such that when the input signal Pin is in the normal input range, the output signal Pout1 is linearly corresponding to the input signal Pin. Shows increasing characteristics.

  On the other hand, when the input signal Pin exceeds the normal input range and is in the excessive input range, the output power Pout1 does not increase even when the input signal Pin increases, and exhibits a saturation characteristic.

  Thereby, it is possible to prevent the input signal Pin from being excessively input to the power amplifying unit 11, and an overcurrent due to excessive input is prevented.

  Next, a wireless communication apparatus using the power amplifier 10 of this embodiment will be described. In this embodiment, an external input signal, for example, a signal obtained by compressing and encoding an audio / image signal by a predetermined compression method, or a received signal is decoded to reproduce the original audio / image signal. This is the case of a wireless communication device.

  As shown in FIG. 5, the wireless communication device 30 of this embodiment includes an antenna 31 that transmits or receives a radio signal, a switch 32 that selects whether the antenna 31 transmits or receives a radio signal, The signal transmission means 33 which outputs the radio signal which processed the input signal input from the antenna 31 to the antenna 31, and the signal reception means 34 which processes the radio signal received by the antenna 31 and outputs it to the outside are provided.

  The signal transmission unit 33 includes an input signal processing circuit 35 that processes a signal input from the outside, a modulation circuit 37 that modulates the output signal of the first oscillation circuit 36 by an output signal of the input signal processing circuit 35, and a modulation circuit 37. And a power amplifier 10 having an over-input preventing means 12.

  The signal receiving means 34 is demodulated by a low noise amplifier 39 that amplifies the radio signal received by the antenna 31, a mixer 41 that demodulates the radio signal by mixing the output of the low noise amplifier 39 and the output signal of the second oscillation circuit 40. And an output signal processing circuit 42 for processing the output signal and outputting it to the outside.

  Thereby, in the wireless communication device 30, for example, excessive input to the power amplifying unit 11 due to failure of the amplifier circuit in the modulation circuit 37 is prevented, and wasteful power consumption for monitoring the excessive input can be reduced. Is possible.

  As described above, in the power amplifier 10 of this embodiment, overcurrent is monitored using the harmonic signal AC mainly composed of the second harmonic f2 and the third harmonic f3, which has not been conventionally used.

  As a result, it is possible to reduce power consumption compared to the case of monitoring excessive input using the carrier wave f1.

  Further, in the wireless communication device 30, unnecessary harmonics are reduced, so that electromagnetic shielding is facilitated and malfunction due to noise can be prevented.

  Although the case where the wireless communication device 30 includes the signal transmission unit 33 and the signal reception unit 34 has been described here, the wireless communication device 30 may include only the signal transmission unit 33.

  A second embodiment of the present invention will be described with reference to FIGS. 6 is a circuit diagram showing the configuration of the power amplifier according to the second embodiment of the present invention, FIG. 7 is a diagram schematically showing the characteristics of the signal selector, and FIG. 7A is a diagram showing the frequency characteristics. 7 (b) is a diagram showing the frequency spectrum of the input signal, and FIG. 7 (c) is a diagram showing the frequency spectrum of the output signal.

  In the present embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, description thereof will be omitted, and different portions will be described.

  This embodiment differs from the first embodiment in that the signal selection unit is a series resonance circuit having a resonance frequency substantially equal to twice the carrier wave f1.

  That is, as shown in FIG. 6, the over-input protection means 52 of the power amplifier 50 includes a signal selector 54 having a coil L7 and a capacitor C9 connected in series and having a resonance frequency substantially equal to twice the carrier wave f1. .

  As shown in FIG. 7A, the frequency characteristic of the series resonance circuit of the signal selection unit 54 has a large transmission characteristic with respect to the second harmonic f2, as is well known, and operates as a so-called bandpass filter.

  As a result, as shown in FIG. 7B, when the output signal Pout2 including the second harmonic f2 and the third harmonic f3 is input to the signal selection unit 54, as shown in FIG. The carrier wave f1 and the third harmonic f3 are cut from the output signal Pout2, and the high-frequency signal AC including only the second harmonic f2 is output to the signal conversion circuit 15.

  As described above, it is possible to monitor the excessive input using only the second harmonic wave f2, and the DC cut capacitor C5 becomes unnecessary.

  As described above, in the power amplifier 50 according to the present embodiment, since the signal selection unit 54 is a series resonance circuit, it is possible to monitor an excessive input by the second harmonic f2 and to reduce the DC cut capacitor C5. There is.

  FIG. 8 is a circuit diagram showing a configuration of a power amplifier according to Embodiment 3 of the present invention. In the present embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, description thereof will be omitted, and different portions will be described.

  This embodiment differs from the first embodiment in that the signal selection unit is a short stub having a length substantially equal to the quarter wavelength of the carrier wave f1.

  That is, as shown in FIG. 8, the over-input protection means 62 of the power amplifier 60 has a short stub composed of a transmission line SL having a length substantially equal to a quarter wavelength of the fundamental frequency f1 and a DC cut capacitor C10. A signal selector 64 is provided.

As is well known, the short stub acts as an inductance when the length is less than or equal to a quarter wavelength, and acts as a capacitance between a quarter wavelength and a half wavelength.
That is, the short stub having a length equal to the quarter wavelength of the carrier wave f1 has an infinite input impedance with respect to the carrier wave f1, operates as a so-called band emission filter, and is a point half the length of the short stub. The high frequency signal AC including only the second harmonic f2 is taken out from the signal, and is output to the signal conversion circuit 15 via the DC cut capacitor C5.

  In this way, it is possible to monitor overinput using a short stub having a length substantially equal to the quarter wavelength of the carrier wave f1, and the coil L1 and the capacitor C4 of the resonance circuit are not required.

  As described above, in the power amplifier 60 according to the present embodiment, the signal selection unit 64 is a short stub having a length equal to the quarter wavelength of the carrier wave f1, and thus over-input is monitored by the second harmonic f2. There is an advantage that power consumption and the coil L1 and the capacitor C4 of the resonance circuit can be reduced.

  Further, since the coil having a large occupied area can be reduced, there is an advantage suitable for reducing the size and the frequency of the power amplifier 60.

  FIG. 9 is a circuit diagram showing a configuration of a power amplifier according to Embodiment 4 of the present invention. In the present embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, description thereof will be omitted, and different portions will be described.

  The present embodiment is different from the first embodiment in that the signal control unit is configured by a field effect transistor.

  That is, as shown in FIG. 9, in the power amplifier 70, the signal control unit 76 of the over-input protection means 72 has the drain d1 connected to the input terminal IN of the power amplification unit 11 via the DC cut capacitor C6, and the gate g1. A field effect transistor connected to the output terminal of the signal converter 15 and having the source s1 grounded via a DC cut capacitor C11, for example, a MOS (Metal Oxide Semiconductor) type field effect transistor M1 (hereinafter referred to as MOS transistor M1); The MOS transistor M1 includes a drain d1 and a resistor R3 connected to the source s1.

  The MOS transistor M1 is always turned off in a DC manner by the DC cut capacitor C11, and the drain d1 and the source s1 of the MOS transistor M1 are set to the same potential in a DC manner by the resistor R3.

  As a result, when the DC signal DC is applied from the signal converter 15 to the gate g1 of the MOS transistor M1, the MOS transistor M1 is turned on for high frequency, and the input signal Pin2 distributed to the signal controller 76 is the MOS transistor. Bypassed to ground through M1.

  As described above, since the MOS transistor M1 is always turned off in a direct current manner, the current consumption of the signal control unit 76 is reduced as compared with the case where a bipolar transistor is used, and the bias power supply unit 13 is connected to the MOS transistor M1. Since the bias voltage to the gate g1 is unnecessary, the high frequency cut coil L3 is unnecessary.

  As described above, the power amplifier 70 of this embodiment has the advantages that the current consumption of the signal control unit 76 can be further reduced and the high-frequency cut coil L3 can be reduced.

  Further, since a coil having a large occupation area can be reduced, there is an advantage suitable for making the power amplifier 70 smaller and higher in frequency.

  Although the case where the field effect transistor is a MOS transistor has been described here, it may be a MIS (Metal Insulator Semiconductor) transistor or a MES (Metal Electrode Semiconductor) transistor.

  Further, since no direct current flows through the MOS transistor M1, only a direct current voltage needs to be supplied to the drain d1. Therefore, the high frequency cut coil L2 may be a resistor.

  FIG. 10 is a circuit diagram showing a configuration of a power amplifier according to Embodiment 5 of the present invention. In the present embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, description thereof will be omitted, and different portions will be described.

  This embodiment differs from the first embodiment in that the signal selection unit is a series resonance circuit having a resonance frequency substantially equal to twice the fundamental frequency f1, and the signal control unit is formed of a field effect transistor.

  That is, as shown in FIG. 10, in the power amplifier 80, the over-input protection means 82 is composed of a signal selection unit 54 having a series resonance circuit having a resonance frequency substantially equal to twice the fundamental frequency f1 and a field effect transistor. And a signal control unit 76.

  Thereby, the current consumption of the signal control unit 76 is reduced as compared with the case where a bipolar transistor is used, and the DC cut capacitor C5 becomes unnecessary.

  As described above, the power amplifier 80 of this embodiment has the advantages that the current consumption of the signal control unit 76 can be reduced and the DC cut capacitor C5 can be reduced.

  FIG. 11 is a circuit diagram showing a configuration of a power amplifier according to Embodiment 6 of the present invention. In the present embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, description thereof will be omitted, and different portions will be described.

  This embodiment differs from the first embodiment in that the signal selection unit is a short stub having a length substantially equal to a quarter wavelength of the fundamental frequency f1, and the signal control unit is configured by a field effect transistor.

  That is, as shown in FIG. 11, in the power amplifier 90, the over-input protection means 92 includes a signal selection unit 64 including a short stub having a length substantially equal to a quarter wavelength of the fundamental frequency f1 and the signal control unit as an electric field. And a signal control unit 76 composed of effect transistors.

  As a result, the current consumption of the signal control unit 76 can be reduced as compared with the case where a bipolar transistor is used, and the high frequency cut coil L2, the coil L1 constituting the resonance circuit, and the capacitor C4 become unnecessary.

  As described above, the power amplifier 90 of this embodiment has an advantage that the current consumption of the signal control unit 76 can be reduced and the high-frequency cut coil L2, the coil L1 constituting the resonance circuit, and the capacitor C4 can be reduced.

  In the above-described embodiments, the case where the power amplifier 11 is a two-stage amplifier circuit using the transistors Q1 and Q2 has been described. However, a single-stage amplifier circuit or a multistage amplifier circuit may be used.

  Moreover, although the case where the signal selection circuit 14, 54, 64 is connected to the collector c2 of the transistor Q2 has been described, it may be connected to the base b2 of the transistor Q2.

1 is a circuit diagram showing a configuration of a power amplifier according to Embodiment 1 of the present invention. 2A and 2B are diagrams schematically illustrating characteristics of a signal selection unit of the power amplifier according to the first embodiment of the present invention, in which FIG. 2A illustrates frequency characteristics, and FIG. 2B illustrates a frequency spectrum of an input signal. FIG. 2C shows a frequency spectrum of the output signal. 1 is a circuit diagram showing a configuration of a signal converter of a power amplifier according to Embodiment 1 of the present invention. The figure which shows typically the input-output characteristic of the input signal and output signal of the power amplifier which concerns on Example 1 of this invention. 1 is a block diagram showing a configuration of a wireless communication device using a power amplifier according to Embodiment 1 of the present invention. The circuit diagram which shows the structure of the power amplifier which concerns on Example 2 of this invention. 7A and 7B are diagrams schematically illustrating characteristics of a signal selection unit of a power amplifier according to a second embodiment of the present invention, in which FIG. 7A is a diagram illustrating frequency characteristics, and FIG. 7B is a diagram illustrating a frequency spectrum of an input signal. FIG. 7C shows the frequency spectrum of the output signal. The circuit diagram which shows the structure of the power amplifier which concerns on Example 3 of this invention. The circuit diagram which shows the structure of the power amplifier which concerns on Example 4 of this invention. FIG. 10 is a circuit diagram showing a configuration of a power amplifier according to a fifth embodiment of the present invention. FIG. 9 is a circuit diagram showing a configuration of a power amplifier according to Embodiment 6 of the present invention.

Explanation of symbols

10, 50, 60, 70, 80, 90 Power amplifier 11 Power amplification unit 12, 52, 62, 72, 82, 92 Over-input prevention means 13 Bias power supply units 14, 54, 64 Signal selection unit 15 Signal conversion unit 16, 76 signal control unit 30 wireless communication device 31 antenna 32 switch 33 signal transmission unit 34 signal reception unit 35 input signal processing unit 36 first oscillation circuit 37 modulation circuit 39 low noise amplifier 40 second transmission circuit 41 mixer 42 output signal processing circuit Q1 , Q2, Q3 Bipolar transistors L1, L2, L3, L4, L5, L6, L7 Coils C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11 Capacitors R1, R2, R3 Resistor D1, D2 Diode M1 MOS transistor SL Stub

Claims (5)

A power amplifier for amplifying a high-frequency signal;
A signal selection unit for selecting a high-frequency signal having a predetermined frequency from the amplified high-frequency signal;
A signal converter for converting the selected high-frequency signal into a DC signal;
A signal control unit that bypasses the high-frequency signal input to the power amplification unit according to the DC signal;
A power amplifier comprising:   The signal selection unit has a parallel resonance circuit having a resonance frequency substantially equal to a carrier wave of the high-frequency signal, a series resonance circuit having a resonance frequency substantially equal to twice the carrier wave, or a length substantially equal to a quarter wavelength of the carrier wave. The power amplifier according to claim 1, further comprising: a short stub having a thickness.   The signal control unit includes a bipolar transistor having a collector connected to an input terminal of the power amplifier through a capacitance, a base connected to an output terminal of the signal converter, and an emitter grounded. The power amplifier according to claim 1. An electric field in which the signal control unit has a drain connected to the input end of the power amplification unit via a first capacitance, a gate connected to the output end of the signal conversion unit, and a source grounded via the second capacitance. An effect transistor;
A resistor connected to a drain and a source of the field effect transistor;
The power amplifier according to claim 1, further comprising: Signal modulating means for modulating a high-frequency signal based on an input signal input from the outside;
A power amplifier for amplifying the modulated signal;
A signal selection unit that selects a signal having a predetermined frequency from the amplified signal;
A signal converter for converting the selected signal into a DC signal;
A signal controller that bypasses the modulated signal input to the power amplifier in response to the DC signal;
An antenna for transmitting the amplified signal;
A wireless communication apparatus comprising:

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