JP2006294832A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To install a metal plate in a package without damaging an advantage of a MAP system. <P>SOLUTION: A heat spreader frame 7 is supplied to a metallic mold 12 for collective molding in a state where the frame is stuck to a mold laminate film 30. Thus, the heat spreader frame 7 is fixed by vacuum-sucking the mold laminate film 30 to a side of a recess 12D2 for forming cavity in an upper mold 12D. A substrate 1 is sandwiched between a lower mold 12C and the upper mold 12D, and sealing resin is made to flow into a cavity CB. Thus, a plurality of semiconductor chips 10 and bonding wires 11 on the main face of the substrate 1 are collectively sealed. Thus, a collective sealing object comprising a plurality of the semiconductor chips 10 is formed on the main face side of the substrate 1, and the heat spreader frame 7 is bonded onto an upper face of the collective sealing object. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a manufacturing technique of a semiconductor device, and more particularly to a technique effective when applied to a manufacturing technique of a semiconductor device using a MAP (Mold Array Package) method.

  The MAP method is a method of manufacturing a semiconductor device by collectively sealing a plurality of semiconductor chips mounted on a wiring board with a resin and then cutting the molding resin and the wiring board into individual semiconductor device regions. . In the case of a general mold method, the mold must be changed every time the package size is different, whereas in the case of the MAP method, a single mold can be used to mold multiple types of products with different package sizes. Therefore, the molding process can be simplified and the time can be shortened, and the cost of the semiconductor device can be reduced.

A method for manufacturing a semiconductor device using the MAP method is described in, for example, Japanese Patent Application Laid-Open No. 2003-249512 (Patent Document 1) and Japanese Patent Application Laid-Open No. 2003-249607 (Patent Document 2). A MAP method of dropping and batch molding is disclosed. In any of Patent Documents 1 and 2, the mold resin comes into contact with the mold. Moreover, the said patent document 1 is also disclosing the structure which formed many through-holes in the heat sink.
JP 2003-249512 A JP 2003-249607 A

  However, the present inventor has found that the MAP molding technology for a semiconductor device having a configuration in which a metal plate is provided in a package has the following problems.

  First, there is a problem that the advantage of the MAP method that it can be applied to molds of a plurality of types of products having different package sizes is impaired. In Patent Document 1, sufficient consideration is not given to the fixing of the heat sink during the molding process, and a fixing suction port must be provided in the molding die in accordance with the heat sink portion for each package. As a result, every time the package size changes, a molding die provided with a suction port that can cope with it must be prepared, which impairs the advantage of the MAP method.

  Secondly, there is a problem in that the mold releasability of the package with respect to the mold and the adhesion of the package to the metal plate are in a contradictory relationship. In the above Patent Documents 1 and 2, since the mold resin is in contact with the molding die, the mold resin needs to be releasable from the molding die. If the releasability is not sufficient, when the mold is separated from the mold resin, a part of the mold resin may be left on the mold or the mold resin may be peeled off from the package. . However, considering only the releasability, the adhesion between the mold resin and the metal plate for the heat sink cannot be maintained, and there is a problem that the metal plate for the heat sink is easily peeled off from the mold resin. In other words, the mold resin is required to have the opposite properties of releasability from the mold and adhesion to the heat sink metal plate, so adjustment of the mold resin component, selection of materials, or setting of mold conditions The problem that becomes difficult.

  Therefore, an object of the present invention is to provide a technique capable of providing a metal plate in a package without impairing the advantages of the MAP method.

  Another object of the present invention is to improve the mold releasability of the package with respect to the mold and improve the adhesion of the package to the metal plate when the metal plate is provided on the package during the molding process using the MAP method. It is to provide a technology capable of meeting two conflicting requirements.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  That is, according to the present invention, a product part and a fixing part are provided on a metal plate that is bonded to the upper surface of a package (resin sealing body) that collectively seals a plurality of semiconductor chips in a MAP molding process. .

  Further, the present invention is to supply a metal plate, which is bonded to the upper surface of a package (resin sealing body) that collectively seals a plurality of semiconductor chips in a MAP molding process, to a molding die by a film.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  That is, the metal plate is fixed by providing the product portion and the fixing portion on the metal plate to be bonded to the upper surface of the package (resin sealing body) that collectively seals a plurality of semiconductor chips in the MAP type molding process. Can be performed exclusively by the fixing part, and it is not necessary to provide a fixing suction port in accordance with the product part, so that a metal plate can be provided in the package without impairing the advantages of the MAP method.

  In addition, a metal plate that is bonded to the upper surface of a package (resin sealing body) that collectively seals a plurality of semiconductor chips in a MAP molding process is supplied to the molding die by a film, thereby forming the molding die and the package. Since the film is interposed between the mold and the metal plate, there are two contradictory requirements for improving the mold releasability of the package from the metal mold and improving the adhesion of the package to the metal plate. Yes.

  In the following embodiments, when it is necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments. However, unless otherwise specified, they are not irrelevant to each other. There are some or all of the modifications, details, supplementary explanations, and the like. Further, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), especially when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and may be more or less than the specific number. Further, in the following embodiments, the constituent elements (including element steps and the like) are not necessarily indispensable unless otherwise specified and apparently essential in principle. Needless to say. Similarly, in the following embodiments, when referring to the shapes, positional relationships, etc. of the components, etc., the shapes are substantially the same unless otherwise specified, or otherwise apparent in principle. And the like are included. The same applies to the above numerical values and ranges. Also, components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments, and the repetitive description thereof is omitted as much as possible. Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Embodiment 1)
The manufacturing method of the semiconductor device according to the first embodiment is, for example, manufacturing a semiconductor device using a MAP (Mold Array Package) system that collectively seals a plurality of semiconductor chips (hereinafter simply referred to as chips) mounted on a substrate. Is the method. FIG. 1 shows a manufacturing flow diagram of a semiconductor device according to an embodiment of the present invention. Hereinafter, an example of the manufacturing method of the semiconductor device of the present embodiment will be described with reference to this manufacturing flowchart.

  First, a substrate and a heat spreader frame are prepared (steps 100A and 100B in FIG. 1). 2 is an overall plan view of the component mounting surface of the substrate 1, FIG. 3 is a side view of the substrate 1 of FIG. 1, and FIG. 4 is an enlarged sectional view taken along line X1-X1 of FIG.

  The substrate 1 is a base body of a wiring substrate of a semiconductor device described later, and the appearance thereof is, for example, a flat rectangular thin plate. The substrate 1 has a main surface (first surface) and a back surface (second surface) positioned on opposite sides along the thickness direction. The main surface of the substrate 1 is a component mounting surface on which chips are mounted as described later, and the back surface of the substrate 1 is a bump electrode forming surface on which bump electrodes are formed as described later. A product region DR is arranged at the center of the substrate 1. In the product region DR, a plurality of unit product regions DR1 having the same size and shape are arranged adjacent to each other in the vertical and horizontal directions in FIG. Each unit product region DR1 is a unit region having a wiring board configuration necessary to configure one semiconductor device.

  The substrate 1 has a multilayer wiring structure. FIG. 4 illustrates a four-layer wiring configuration. In FIG. 4, the upper surface of the substrate 1 represents the component mounting surface, and the lower surface of the substrate 1 represents the bump electrode formation surface. The substrate 1 includes a laminate formed by alternately stacking insulating layers 2 and wiring layers 3, and a solder resist 4 deposited on the upper and lower surfaces (component mounting surface and bump electrode formation surface) of the laminate. Have.

  The insulating layer 2 is made of glass / epoxy resin having high heat resistance, for example. The material of the insulating layer 2 is not limited to this, and can be variously changed. For example, a BT resin or an aramid nonwoven fabric material may be used. When BT resin is selected as the material of the insulating layer 2, the heat conductivity is high, so that the heat dissipation can be improved.

  Various wiring patterns 3 a to 3 e are formed on each wiring layer 3 of the substrate 1. The conductor patterns 3a to 3e are patterned, for example, by etching a copper (Cu) foil. The conductor pattern 3a of the wiring layer 3 on the component mounting surface is a pattern for chip mounting, the conductor pattern 3b is an electrode pattern to which bonding wires are connected, and the conductor pattern 3e facilitates the peeling of a sealing resin described later. It is a pattern to make. In the wiring layer 3 on the component mounting surface, conductor patterns for signal wiring and power supply wiring are formed. Part of the conductor patterns 3a, 3b, 3e and the like on the component mounting surface is exposed from the solder resist 4, and the exposed surface is subjected to, for example, nickel (Ni) and gold (Au) plating. The conductor pattern 3d of the wiring layer 3 on the bump electrode formation surface is an electrode pattern for bonding bump electrodes. A conductor pattern for signal wiring and power supply wiring is also formed on the wiring layer 3 on the bump electrode formation surface. Part of the conductor pattern 3d and the like on the bump electrode forming surface is also exposed from the solder resist 4, and the exposed surface is subjected to, for example, nickel and gold plating. The conductor pattern 3c of the wiring layer 3 in the laminate is a signal and power supply wiring pattern.

  Each wiring layer 3 is electrically connected through a conductor (copper foil or the like) in the through hole TH. The solder resist 4 is also called a solder mask or a stop-off, and prevents solder from coming into contact with a conductor pattern that does not require soldering during soldering. In addition to functioning as a protective film to protect the pattern from molten solder, prevention of solder bridges between conductors, protection from contamination and moisture, damage prevention, environmental resistance, migration prevention, maintenance of insulation between circuits and circuit It also has a function of preventing a short circuit with other components (chip, printed wiring board, etc.). The solder resist 4 is made of, for example, a polyimide resin, and is formed in specific regions on the main surface and the back surface of the substrate 1. Here, the substrate 1 having a four-layer wiring structure is illustrated, but the present invention is not limited to this. For the molding process of the semiconductor device, the substrate 1 having a two-layer wiring structure having fewer than four layers and the six layers having more than four layers are used. Substrates 1 having various wiring layer configurations (various varieties) such as the substrate 1 having a wiring structure flow in lot units.

  Next, FIG. 5 is an overall plan view of the heat spreader frame (metal plate: hereinafter simply referred to as a frame) 7, FIG. 6 is a side view of the frame 7 in FIG. 5, and FIG. 7 is a cross section taken along line X2-X2 in FIG. Each figure is shown. In FIG. 5, the frame 7 is hatched to make the frame 7 easier to see.

  The frame 7 is a member for the purpose of preventing package warpage and improving heat dissipation of a semiconductor device, which will be described later, and has an external appearance that is substantially the same as the substrate 1 (planar dimension (slightly smaller) and planar shape (rectangular shape)), for example. It has a thin plate shape. The material of the frame 7 is preferably a material whose thermal expansion coefficient is higher than the thermal expansion coefficient of a sealing resin described later and close to or the same as the thermal expansion coefficient of the substrate 1 (about 18 ppm / ° C. in the above case). Here, the main material of the frame 7 is made of a metal having a high thermal conductivity such as copper (Cu: a thermal expansion coefficient of about 17 to 18 ppm / ° C.) or the like, and the surface thereof has, for example, nickel (Ni). Plated.

  The frame 7 has a center product region and a wide frame-shaped fixing portion 7F surrounding the outer periphery thereof. In the product area at the center of the frame 7, a plurality of spreaders (product parts) 7S and suspension parts 7T are integrally formed with the fixing part 7F. The spreader 7S and the suspending portion 7T are formed in a pattern by forming an opening 7H penetrating between the main back surfaces of a part of the frame 7.

  Each spreader 7S is disposed so as to correspond to each of the unit product regions DR1 of the substrate 1, and is connected (supported) to each other through the suspension portion 7T and is connected (supported) to the fixing portion 7F. . Each spreader 7S is formed, for example, in a planar square shape. The planar dimension of each spreader 7S is slightly smaller than the planar dimension of the chip and varies depending on the package size and chip size, and cannot be generally stated, but is, for example, approximately 15 mm × 15 mm. The suspension portion 7T is integrally connected to portions corresponding to the four corners of each spreader 7S. By connecting the suspension portion 7T to the four corners of the spreader 7S, each spreader 7S can be supported in a stable state. In addition, since the suspending portion 7T is positioned at the four corners of the later-described chip, it does not interfere with the bonding wire. That is, it becomes easy to set the loop height of the bonding wire. Further, since corners are not formed at the four corners of the spreader 7S, it is possible to avoid a problem that the corners are caught by other members and bent, or the other members are damaged. Here, although the thickness of the spreader 7S, the fixing portion 7F, and the hanging portion 7T is the same, the thickness of the hanging portion 7T may be made thinner than the thickness of the spreader 7S and the fixing portion 7F. Thereby, it is possible to make it easier to cut the suspending portion 7T during the later-described collective sealing body cutting step.

  The fixing portion 7F is an area used for fixing the frame 7 to a molding die described later. That is, as will be described later, a frame suction port for sucking and fixing the frame 7 is disposed at a position facing the fixing portion 7F of the frame 7 in the molding die. By separating the fixing portion 7F of the frame 7 and the product area in this way, the frame 7 can be fixed to the molding die exclusively by the fixing portion 7F as will be described later, and the frame suction is performed in accordance with the spreader 7S. No need to place a mouth. For this reason, it is possible to cope with molding of a plurality of types of products having different package sizes with one molding die, so that the molding process can be simplified and the time can be shortened, and the cost of the semiconductor device can also be reduced. The spreader 7S can be provided in the package (resin sealing body, sealing body) without impairing the advantages of the system.

  Further, the surface of the spreader 7S, the fixing portion 7F, and the suspension portion 7T (particularly the surface in contact with the sealing resin (collective sealing body, sealing body) described later) is subjected to a roughening treatment to form fine irregularities. You may do it. Thereby, the adhesiveness and adhesiveness of the spreader 7S, the fixing part 7F and the hanging part 7T and the sealing resin can be improved.

  Subsequently, a chip is mounted on each unit product region DR1 on the main surface of the substrate 1 (die bonding step 101 in FIG. 1). FIG. 8 is an overall plan view of the main surface of the substrate 1 after the die bonding process, and FIG. 9 is a side view of the substrate 1 of FIG. A plurality of chips 10 are mounted on the main surface of the substrate 1. Each chip 10 is mounted for each unit product region DR1 of the substrate 1. A desired integrated circuit is formed on the main surface of each chip 10. The back surface of the chip 10 is bonded to the conductor pattern 3a of the substrate 1 via an adhesive such as a resin paste. Here, the case where one chip 10 is mounted in each unit product region DR1 is exemplified, but the present invention is not limited to this. For example, a plurality of chips 10 are mounted side by side in each unit product region DR1, or each unit product region DR1 is mounted. In some cases, a plurality of chips 10 are stacked in the product region DR1.

  Thereafter, the chips 10 and the substrate 1 are connected by bonding wires (wire bonding step 102 in FIG. 1). FIG. 10 is an overall plan view of the main surface of the substrate 1 after the wire bonding step, and FIG. 11 is a sectional view taken along line X3-X3 in FIG. The bonding pads of the chip 10 and the conductor pattern 3 b of the substrate 1 are electrically connected by bonding wires 11. The bonding wire 11 is made of, for example, gold (Au) or the like, and is bonded by, for example, a well-known wire bonding method using a combination of ultrasonic vibration and thermocompression bonding.

  Next, the plurality of chips 10 after the wire bonding step are collectively made with a sealing resin (molding step 103 in FIG. 1). This molding process will be described with reference to FIGS. 12 is a cross-sectional view of the molding process of the semiconductor device of the first embodiment, FIG. 13 is a plan view of the lower mold 12A of the molding die 12 during the molding process of FIG. 12, and FIG. 14 is a diagram of the semiconductor device following FIG. FIG. 15 is a cross-sectional view of a portion corresponding to line X4-X4 in FIG. 13 during the manufacturing process, FIG. 15 is a cross-sectional view of a portion corresponding to line X4-X4 in FIG. FIG. 15 shows a cross-sectional view of a portion corresponding to the X4-X4 line in FIG. 13 during the manufacturing process of the semiconductor device subsequent to FIG. 12 shows a cross-sectional view taken along line X4-X4 of FIG. Further, an arrow A in FIG. 12 indicates the suction direction of the substrate 1 and the frame 7. Further, in FIG. 13, the frame suction port 12 </ b> A <b> 1 of the lower mold 12 </ b> A is shown through to facilitate explanation. In FIG. 17, different hatching is added to the frame 7 and the collective sealing body so that the explanation can be easily understood.

  The lower mold 12A and the upper mold 12B of the molding die 12 are installed with their molding surfaces facing each other. A recess 12A2 for forming a lower mold cavity is formed in the center of the molding surface of the lower mold 12A. The recess 12A2 is a sealing resin molding region on the lower mold 12A side, and is formed in such a size that the plurality of chips 10 of the substrate 1 can be collectively sealed. In the vicinity of the outer periphery of the bottom of the recess 12A2, a plurality of frame suction ports 12A1 are arranged at positions facing the fixing portion 7F of the frame 7. Further, a cull and runner groove 12A3 is arranged in the cull block 12AC of the lower mold 12A so as to extend along the longitudinal direction of the frame 7. A plurality of gates 12A4 are formed between the groove 12A3 and the recess 12A2 so as to connect them. The gate 12A4 is an injection port when the sealing molten resin flowing from the groove 12A3 is poured into the recess 12A2. On the other hand, a plurality of air vents 12A5 extend from the other long side of the recess 12A2 in a direction away from the recess 12A2. The air vent 12A5 is a groove for sending out the air in the resin filling portion to the outside when the resin is injected into the recess 12A2. By arranging a plurality of air vents 12A5 in this way, the air in the resin filling portion can be sent out to the outside at the time of resin injection, so that the sealing resin can be satisfactorily filled in the recess 12A2. It is possible. On the other hand, the molding surface of the upper mold 12B is flat. A plurality of substrate suction ports 12B1 are arranged on the molding surface of the upper mold 12B.

  First, as shown in FIG. 12, the substrate 1 after the wire bonding step is fixed to the flat molding surface of the upper mold 12 </ b> B of the molding die 12. The substrate 1 is vacuum-sucked through a plurality of substrate suction ports 12B1 formed on the molding surface of the upper mold 12B with the mounting surface of the chip 10 facing the molding surface of the lower mold 12A.

  Further, as shown in FIGS. 12 and 13, the frame 7 is dropped and fixed in a recess (that is, a lower mold cavity) 12A2 on the molding surface of the lower mold 12A of the molding die 12. In the case of fixing the frame 7 to the upper mold of the molding die, a handler or the like is required to fix the frame 7 to the upper mold with good alignment. On the other hand, in the case of the method in which the frame 7 is dropped into the lower mold 12A, the positioning or the like is simple and the mechanism is not complicated even if the handler or the like is unnecessary or necessary. That is, the method of dropping the frame 7 into the lower mold 12A can simplify the loading mechanism and loading process of the frame 7.

  The frame 7 is vacuum-sucked through a plurality of frame suction ports 12A1 on the molding surface of the lower mold 12A. Here, when the frame 7 does not have the fixing portion 7F as described above, the frame suction port 12A1 of the lower mold 12A must be arranged in accordance with the spreader 7S. In that case, since the size and position of the spreader 7S change each time the package size changes, the position of the frame suction port 12A1 must be changed accordingly, and the lower mold 12A must also be changed according to the package size. For this reason, the advantage of the MAP method that one mold can cope with molding of a plurality of types of products having different package sizes is impaired. Therefore, there is a problem that the molding process becomes complicated and becomes a laborious and time-consuming process, and the cost of the semiconductor device increases. On the other hand, in the first embodiment, the fixing portion 7F of the frame 7 and the product area are separated, so that the fixing of the frame 7 to the molding die 12 may be performed exclusively by the fixing portion 7F. That is, even if the position and size of the spreader 7S change according to the package size, there is no need to change the arrangement of the frame suction port 12A1 and the lower die 12A itself. Therefore, batch molding can be performed without impairing the advantages of the MAP method.

  Next, after fixing the substrate 1 and the frame 7 to the molding die 12, the substrate 1 is subjected to a preheating treatment for about 20 seconds while the temperature of the upper die 12B is set at, for example, about 175 to 180 ° C. This process is performed to suppress deformation of the substrate 1 due to heat. Subsequently, after the temperatures of the lower mold 12A and the upper mold 12B are set to, for example, about 175 to 180 ° C., as shown in FIG. 14, the substrate 1 is held between the lower mold 12A and the upper mold 12B. . At this time, the outer peripheral portion of the substrate 1 is pressed against the outer peripheral portion on the outer side of the recess 12A2 of the lower mold 12A, and is brought into a state of being crushed by about several percent of the total thickness of the substrate 1. In this manner, a substantial cavity CB surrounded by the recess 12A2 of the lower mold 12A and the main surface of the substrate 1 is formed.

  Thereafter, while maintaining the above temperature, as shown in FIG. 15, a thermosetting sealing resin (mold resin) such as an epoxy resin is poured into the cavity CB, and a plurality of main surfaces of the substrate 1 are poured. The chip 10 and the bonding wire 11 are collectively sealed. As a result, a collective sealing body (resin sealing body) 14 including a plurality of chips 10 and bonding wires 11 is formed on the main surface side of the substrate 1, and the surface (upper surface) of the collective sealing body 14 is The frame 7 is joined.

  Thereafter, after the sealing resin is cured, as shown in FIG. 16, the substrate 1 on which the collective sealing body 14 is formed is separated from the lower mold 12A. Here, FIG. 17 is an overall plan view of the semiconductor device after the molding process, and FIG. 18 is a sectional view taken along line X5-X5 in FIG. As described above, the frame 7 is bonded to the upper surface of the collective sealing body 14. The frame 7 is joined in a state of being recessed into the upper portion of the collective sealing body 14 by the resin of the collective sealing body 14 entering the opening 7H. The upper surface of the collective sealing body 14 and the upper surface of the frame 7 are substantially coincident and flat. The upper surface of the frame 7 is exposed to the outside within the upper surface of the collective sealing body 14. The collective sealing body 14 is provided between the frame 7 and the substrate 1. Each spreader 7S of the frame 7 is disposed above each chip 10 for each unit product area. As described above, in the first embodiment, in the MAP molding process, the individual spreaders 7S of the frame 7 are aligned for each individual product area on the substrate 1 side without losing the advantages of the MAP method. In this state, the frame 7 can be easily joined to the upper surface of the collective sealing body 14.

  Next, solder balls are connected to the back surface of the substrate 1S after the molding step (solder ball attaching step 104 in FIG. 1). This solder ball attaching process will be described with reference to FIGS. 19 is a sectional view of the substrate 1 during the solder ball attaching process, FIG. 20 is an overall plan view of the back surface of the substrate 1 after the solder ball attaching process, and FIG. 21 is a sectional view taken along line X6-X6 in FIG. Yes.

  First, as shown in FIG. 19, a plurality of spherical solder bumps 17 held by the bump holding tool 16 are immersed in a flux bath, and a flux is applied to the surface of the solder bump 17, and then the plurality of solder bumps 17. Are temporarily attached to the conductor pattern 3d on the bump electrode forming surface of the substrate 1 by using the adhesive force of the flux. The solder bump 17 is made of, for example, lead (Pb) / tin (Sn) solder. As a material of the solder bump 17, for example, lead-free solder such as tin / silver (Ag) solder may be used. The solder bumps 17 may be collectively connected for each unit product region DR1, but from the viewpoint of improving the throughput of the solder bump connection process, the solder bumps 17 of a plurality of unit product regions DR1 are collectively displayed. It is preferable to connect. Subsequently, the solder bump 17 is heated and reflowed at a temperature of about 220 ° C., for example, to be fixed to the conductor pattern 3d, thereby forming a bump electrode 17A as shown in FIGS. Thereafter, the flux residue remaining on the surface of the substrate 1 is removed using a neutral detergent or the like.

  Next, the substrate 1S after the solder ball attaching step is cut for each unit product region DR1 (individual piece cutting step 105 in FIG. 1). This individual piece cutting process will be described with reference to FIGS. FIG. 22 is an overall plan view of the main surface of the substrate 1 showing a cutting line, and FIG. 23 is a partially broken sectional view showing a state in which the substrate 1 is being cut.

  Here, after turning the substrate 1 upside down and fixing the collective sealing body 14 on the main surface side of the substrate 1 with an adhesive tape or the like, the dicing blade 19 is applied from the back surface of the substrate 1 and the substrate 1 and the collective package in the same manner as dicing. The sealing body 14 is cut along the cutting line CL. Thereby, for example, a plurality of BGA (Ball Grid Array) type semiconductor devices are simultaneously obtained. 24 is a perspective view of the BGA type semiconductor device 20 manufactured as described above, FIG. 25 is a plan view of the top surface of the BGA type semiconductor device 20 of FIG. 24, and FIG. 26 is a line X7-X7 of FIG. Cross-sectional views are shown respectively.

  The wiring board 1A is a member obtained by cutting the board 1. The chip 10 is mounted on the conductor pattern 3a on the component mounting surface of the wiring board 1A with the adhesive 21 such as the silver-containing paste or the like with the main surface facing upward. The bonding pads on the main surface of the chip 10 are electrically connected to the conductor pattern 3b on the component mounting surface of the wiring board 1A through the bonding wires 11. A sealing body (package) 14A is molded on the component mounting surface of the wiring board 1A, and the chip 10 and the bonding wire 11 are sealed by the sealing body 14A. This sealing body 14 </ b> A is a member obtained by cutting the collective sealing body 14.

  The spreader 7S and the hanging part 7T are joined to the upper surface of the sealing body 14A in an exposed state. The spreader 7S is disposed immediately above the main surface of the chip 10. Heat generated during the operation of the integrated circuit on the main surface of the chip 10 can be dissipated to the outside through the spreader 7S and the suspending portion 7T. For this reason, the heat dissipation of the semiconductor device 20 can be improved. Accordingly, it is possible to cope with an improvement in the operation speed of the semiconductor device 20 and an improvement in function (an improvement in element integration and a corresponding increase in the number of pins).

  Further, in the case of the configuration without the spreader 7S, the thermal expansion coefficient (for example, about 18 ppm / ° C.) of the wiring board 1A and the heat of the sealing body 14A during heating (solder reflow heating) for mounting the semiconductor device on the wiring board. There is a problem that the semiconductor device warps due to a difference between the expansion coefficient (for example, about 10 ppm / ° C.) or the thermal expansion coefficient of the chip 10 (for example, 4 ppm / ° C.). This problem becomes more problematic as the plane area of the semiconductor device becomes larger, and becomes particularly prominent when the planar size of the semiconductor device 20 is 20 mm square or more. On the other hand, in the first embodiment, the rigidity of the sealing body 14A can be increased by sandwiching the sealing body 14A between the wiring board 1A, the spreader 7S, and the hanging portion 7T. Warpage during heating can be reduced. Particularly, the spreader 7S and the suspension portion 7T are made of copper (thermal expansion coefficient: about 17 to 18 ppm / ° C.) whose thermal expansion coefficient is close to the thermal expansion coefficient of the wiring board 1A. Since it can be configured to be sandwiched between members having the same or the same coefficient (the substrate 1, the spreader 7S, and the hanging portion 7T), the warp during heating of the semiconductor device 20 can be further reduced. Therefore, the mounting yield of the semiconductor device 20 can be improved. In addition, the semiconductor device 20 can be increased in area.

  On the other hand, a bump electrode 17A is connected to the conductor pattern 3d on the bump electrode forming surface of the wiring board 1A. The conductor pattern 3a and the like on the component mounting surface are electrically connected to the conductor pattern 3d and the bump electrode 17A on the bump electrode formation surface through the conductor pattern 3c and the through hole TH of the wiring board 1A.

(Embodiment 2)
In the second embodiment, a molding process when the configuration of the upper mold and the lower mold is reversed in the configuration of the molding die will be described with reference to FIGS. 27 to 31 are sectional views showing the molding step 103 of the semiconductor device of the second embodiment.

  In the second embodiment, the molding surface of the lower mold 12C is formed flat, and a plurality of substrate suction ports 12C1 are arranged in the molding surface. On the other hand, a plurality of frame suction ports 12D1 on the molding surface of the upper mold 12D are arranged at positions corresponding to the fixing portions 7F of the frame 7 along the outer periphery of the bottom surface of the cavity forming recess 12D2 formed at the center of the molding surface. Has been. The cull and runner grooves, gates, air vents, and the like are formed on the upper mold 12D side.

  First, as shown in FIG. 27, the substrate 1 after the wire bonding step is fixed to the flat molding surface of the lower mold 12C of the molding die 12. The substrate 1 is vacuum-sucked through a plurality of substrate suction ports 12C1 formed on the molding surface of the lower die 12C with the mounting surface of the chip 10 facing the molding surface of the upper die 12D. The substrate 1 has a large plane area and is likely to be warped, and is heavy due to the multilayered wiring layer and the mounting of the chip 10, and thus tends to be difficult to fix to the upper mold. Therefore, the substrate 1 can be easily fixed by fixing the substrate 1 to the flat molding surface of the lower mold 12C. For this reason, since possibility that the board | substrate 1 will fall and position shift will be made low, it can respond flexibly to the enlargement of the board | substrate 1 or multilayering.

  In the case of the second embodiment, the frame 7 is fixed by the handler 25 in the concave portion (that is, the upper mold cavity) 12D2 of the molding surface of the upper mold 12D of the molding die 12. The recess 12D2 of the upper mold 12D is a sealing resin molding region on the upper mold 12D side, and is formed in such a size that the plurality of chips 10 of the substrate 1 can be sealed together. As shown in FIG. 28, the frame 7 is vacuum-sucked through a plurality of frame suction ports 12D1 arranged at positions corresponding to the fixing portions 7F. As described above, in the second embodiment, as in the first embodiment, the frame 7 may be fixed to the molding die 12 exclusively by the fixing portion 7F. The position of the spreader 7S and the position of the spreader 7S are determined according to the package size. Even if the size changes, there is no need to change the arrangement of the frame suction port 12D1, and there is no need to change the upper mold 12D itself, so that batch molding is possible without impairing the advantages of the MAP method.

  Next, after fixing the substrate 1 and the frame 7 to the molding die 12, as in the first embodiment, the temperature of the lower die 12C is set to about 175 to 180.degree. Pre-heat treatment for about 2 seconds is performed. Subsequently, as shown in FIG. 29, as in the first embodiment, the substrate 1 is sandwiched and held between the lower die 12C and the upper die 12D, and the recesses 12D2 of the upper die 12D and the main substrate 1 are A substantial cavity CB surrounded by the surface is formed. Thereafter, with the temperature maintained, as shown in FIG. 30, as in the first embodiment, a sealing resin is poured into the cavity CB, and a plurality of chips 10 and bonding wires 11 on the main surface of the substrate 1 are attached. The collective sealing body 14 is formed by sealing all together, and the frame 7 is bonded to the surface (upper surface) of the collective sealing body 14. Thereafter, after the sealing resin is cured, as shown in FIG. 30, the substrate 1 on which the collective sealing body 14 is formed is separated from the upper mold 12D. The configuration of the collective sealing body 14 is the same as that of the first embodiment. The subsequent steps are the same as those described in the first embodiment, and a description thereof will be omitted.

(Embodiment 3)
In the third embodiment, a modified example of the frame 7 will be described. 32 is an overall plan view of the frame 7 used in the method of manufacturing a semiconductor device according to the third embodiment, FIG. 33 is a sectional view taken along line X8-X8 in FIG. 32, and FIG. 34 is a sectional view taken along line X9-X9 in FIG. Each is shown.

  In the third embodiment, each spreader 7S of the frame 7 is formed in a quadrangular shape as in the first and second embodiments, but the suspension portion 7T is integrally connected to substantially the center of the four sides of each spreader 7S. Has been. Thereby, each spreader 7S can be supported in a stable state. Further, in the case where the suspension portion 7T is connected to the four corners of the spreader 7S as in the first and second embodiments, the individual piece cutting step 105 is cut from two directions orthogonal to each suspension portion 7T. As a result, chips (burrs) of the suspension part 7T may be left at the corners of the semiconductor device. For this reason, it may be difficult to adjust the cutting conditions (rotational speed, moving speed, etc.) of the dicing blade. On the other hand, in the case of the third embodiment, since each suspending portion 7T can be cut from one direction at the time of the individual piece cutting step 105, the above-described chipping of the suspending portion 7T is generated. Can be avoided. Therefore, it is easy to adjust the cutting conditions of the dicing blade, and the cutting speed can be improved. Other than this, the same effects as those of the first and second embodiments can be obtained.

(Embodiment 4)
In the fourth embodiment, still another modification of the frame 7 will be described. FIG. 35 is an overall plan view of the frame 7 used in the method of manufacturing a semiconductor device according to the fourth embodiment, and FIG. 36 is an enlarged plan view of an essential part of the frame 7 in FIG. 35. The cross section taken along line X10-X10 in FIG. 35 is the same as that shown in FIG. 33, and the cross section taken along line X11-X11 in FIG.

  In the fourth embodiment, each spreader 7S of the frame 7 is formed in a square shape as in the first to third embodiments. However, the suspension portion 7T is integrally formed between the four corners and the center of the four sides of each spreader 7S. Connected. In particular, the suspension portion 7T is connected to positions closer to the four corners than the center of the four sides of the spreader 7S. Thereby, each spreader 7S can be supported in a more stable state than in the case of the third embodiment. Further, as in the third embodiment, since each suspending portion 7T can be cut from one direction at the time of the individual piece cutting step 105, generation of chips of the suspending portion 7T as described above can be avoided. . Therefore, it is easy to adjust the cutting conditions of the dicing blade, and the cutting speed can be improved. Furthermore, by providing two suspension parts 7T on one side of the spreader 7S, the width D1 of each suspension part 7T can be made narrower than the width of the suspension part 7T of the third embodiment. It is possible to facilitate the cutting of each hanging portion 7T during the single cutting step 105. Other than this, the same effects as those of the first and second embodiments can be obtained.

(Embodiment 5)
In the fifth embodiment, an example of the batch molding process using a mold laminate film (hereinafter simply referred to as a film) will be described with reference to FIGS.

  37 to 43 are sectional views showing the semiconductor device of the fifth embodiment during the molding process. The molding apparatus 28 according to the fifth embodiment is configured such that the film 30 supplied from the supply reel 29A can be taken up by the take-up reel 29B via the frame attaching part 31 and the molding die 12. Yes. The film 30 is made of a heat-resistant and flexible insulating film such as, for example, a fluorine-based resin, and the planar size of the film 30 is almost the entire inner wall surface of the recess 12D2 of the upper mold 12D of the molding die 12. It is formed in a size that can be covered. The film sticking portion 31 is a mechanism portion for sticking the frame 7 shown in FIGS. 5, 32, 35 and the like to the film 30 supplied from the supply reel 29A, and has sticking jigs 31A and 31B. ing. The film 30 is interposed between the sticking jigs 31A and 31B. The molding die 12 is the same as that described in the second embodiment. The film 30 is interposed between the lower mold 12C and the upper mold 12D of the molding die 12.

  First, as shown in FIG. 37, the frame 7 is placed on the lower sticking jig 31A. Further, the substrate 1 after the wire bonding step 102 is mounted on the flat molding surface of the lower mold 12C of the molding die 12 in the same manner as in the second embodiment, and is fixed by vacuum suction. Also in the case of the fifth embodiment, the substrate 1 can be easily fixed by fixing the substrate 1 to the flat molding surface of the lower mold 12C. Therefore, the substrate 1 can be flexibly adapted to increase the area or the number of layers of the substrate 1.

  Subsequently, as shown in FIG. 38, with the back surface of the film 30 held by the sticking jig 31B, the frame 7 of the sticking jig 31A is thermocompression bonded to the main surface of the film 30, as shown in FIG. The frame 7 is attached to the main surface of the film 30. Further, in the process of attaching the frame 7 as described above, in the same manner as in the second embodiment, the temperature of the lower mold 12C is set to about 175 to 180 ° C., for example, for about 20 seconds with respect to the substrate 1. After processing, the temperature of the lower mold 12C and the upper mold 12D is set to about 175 to 180 ° C., for example.

  Thereafter, as shown in FIG. 40, the supply reel 29A and the take-up reel 29B are rotated, and the place where the frame 7 of the film 30 is attached is the molding surface of the lower mold 12C and the upper mold 12D of the molding die 12. The film 30 is moved so as to be positioned (that is, directly above the main surface of the substrate 1). At this stage, the main surface to which the frame 7 of the film 30 is attached is in a state of facing the main surface of the substrate 1. As described above, in the fifth embodiment, the frame 7 is supplied to the molding die 12 by the film 30, so that the frame 7 can be carried into the molding die 12 relatively easily with good alignment. That is, both the substrate 1 and the frame 7 can be easily supplied to the molding die 12. At this stage, a new frame 7 may be placed on the sticking jig 31A.

  Subsequently, as shown in FIG. 41, after the film 30 is vacuum-sucked to the upper mold 12D side and brought into close contact with the recess 12D2 of the upper mold 12D, the substrate 1 is sandwiched between the lower mold 12C and the upper mold 12D. Hold. At this time, the outer peripheral portion of the substrate 1 is pressed against the outer peripheral portion of the concave portion 12D2 of the upper mold 12D through the film 30 and is crushed by about several percent of the total thickness of the substrate 1. In this way, a substantial cavity CB surrounded by the recess 12D2 of the upper mold 12D and the main surface of the substrate 1 is formed. As described above, in the case of the third embodiment, since the frame 7 can be held on the upper mold 12D side by vacuum suction of the film 30 as described above, it is necessary to provide a frame suction port according to the spreader 7S. Absent. For this reason, the spreader 7S can be provided in the package (resin sealing body, sealing body) without impairing the advantages of the MAP method. Further, in the case of the third embodiment, since the frame 7 can be held on the upper mold 12D side by vacuum suction of the film 30, it is not necessary to provide the frame 7 with the wide fixing portion 7F. For this reason, the usage area of the product region DR in the frame 7 can be increased. Therefore, the number of products acquired can be increased. In addition, the package size that can be handled can be increased.

  Subsequently, the same sealing resin as in the first and second embodiments is poured into the cavity CB while maintaining the above-described temperature and vacuum suction of the film 30, and as shown in FIG. A plurality of chips 10 and bonding wires 11 on the surface are sealed together. Thus, the collective sealing body 14 including the plurality of chips 10 is formed on the main surface side of the substrate 1, and the frame 7 is bonded to the upper surface of the collective sealing body 14.

  Thereafter, as shown in FIG. 43, with the temperature of the lower mold 12C kept as above, the vacuum suction to the film 30 is stopped, and the tension of the film 30 is used to mold the substrate 1 after the molding process. The mold 12 is separated from the upper mold 12D. At this time, the film 30 is interposed between the inner wall surface of the recess 12D2 of the upper mold 12D and the surface of the collective sealing body 14, and the upper mold 12D and the collective sealing body 14 are not in direct contact with each other. When the stop body 14 is separated from the recess 12D2, the collective sealing body 14 can be separated from the upper mold 12D with a relatively small force because a force is applied to the surface instead of a point on the surface of the collective sealing body 14. .

  Here, in the case of a system in which the film 30 is not interposed, since the sealing resin is in direct contact with the molding die 12, the sealing resin needs to be releasable from the molding die 12. If the releasability is not sufficient, a part of the sealing resin may be left on the molding die when the molding die 12 is separated from the sealing resin, or most of the sealing resin may be peeled off from the package. Problems arise. However, in the case of a product in which the frame 7 made of metal is bonded to the upper surface of the collective sealing body 14 as in the present embodiment, the sealing resin and the frame 7 The adhesiveness cannot be maintained, and there is a problem that the frame 7 is easily peeled off from the sealing resin. That is, in the case of a product in which the frame 7 made of metal is bonded to the upper surface of the collective sealing body 14, the sealing resin has a property that the releasability from the molding die 12 and the adhesion to the frame 7 are in conflict. Therefore, there arises a problem that adjustment of the sealing resin component, material selection, or setting of sealing conditions becomes difficult. On the other hand, in this Embodiment 5, since the film 30 is interposed between the sealing resin and the upper mold 12D as described above, the releasability can be improved. That is, it is possible to cope with two contradictory demands for improving the releasability of the collective sealing body 14 to the molding die 12 and improving the adhesion and adhesiveness of the collective sealing body 14 to the frame 7. In addition, since it is only necessary to consider improvement in adhesion and adhesion to the frame 7 with respect to the sealing resin, adjustment of the sealing resin component, material selection, or setting of sealing conditions can be facilitated.

  Further, in the case of the fifth embodiment, it is not necessary to provide the molding die 12 with an ejector pin for separating the substrate 1 after the molding process. The surplus area for the ejector pin provided on the stationary body 14 side can be effectively used. In addition, since the releasability between the upper mold 12D and the collective sealing body 14 can be improved, a larger-sized resin can be sealed. In addition, since the frequency of cleaning inside the molding die 14 can be reduced, the manufacturing cost of the semiconductor device can also be reduced. Other than these, the same effects as described in the first embodiment can be obtained.

  The molding process as described above is repeatedly performed on the plurality of substrates 1 after the wire bonding process 102. Note that a new frame 7 may be affixed to the film 30 in the frame affixing section 31 before the mold release step of FIG. Further, the solder ball attaching step and the individual piece cutting step after the molding step are the same as those described in the first embodiment and the like, and thus the description thereof is omitted.

(Embodiment 6)
In the sixth embodiment, another example of the batch molding process using the film 30 will be described.

  44 is a plan view of an essential part of the film 30 used in the sixth embodiment, and FIG. 45 is a sectional view taken along line X12-X12 in FIG. In the sixth embodiment, a plurality of small size spreaders 7SS are arranged in a matrix on the main surface of the film 30 so as to be equally spaced along the longitudinal direction of the film 30 and the width direction orthogonal thereto. It is pasted. Only a plurality of small-sized spreaders 7SS are arranged on the main surface of the film 30, and the fixing part and the hanging part are not arranged. That is, each spreader 7SS is disposed on the main surface of the film 30 in a state of being separated (isolated) from each other. Each spreader 7SS is already attached to the film 30 before being wound around the supply reel 29A. Each spreader 7SS is made of, for example, copper (Cu), and the surface thereof is subjected to nickel (Ni) plating. You may form a fine unevenness | corrugation by performing a roughening process on the surface (especially surface which sealing resin (collective sealing body, sealing body) contacts) of the spreader 7SS. Thereby, the adhesiveness and adhesiveness of spreader 7SS and sealing resin can be improved. The planar shape of each spreader 7SS is a rectangular shape (for example, a square shape) having the same planar dimension. However, the planar shape of the spreader 7SS is not limited to a rectangular shape and can be variously changed. For example, a circular shape, an elliptical shape, a triangular shape, a rectangular shape, a polygonal shape of pentagon or more, or a combination thereof may be used. The planar dimension of each spreader 7SS is smaller than the spreader 7S described in the first to fifth embodiments and can be variously changed, so it cannot be generally stated, but is, for example, about 1.0 mm × 1.0 mm. In the case of the film 30 having such a configuration, any size package can be supported. That is, in the case of the sixth embodiment, since it is not necessary to prepare the frame 7 for each package size, standardization in the mold assembly process is possible.

  46 to 49 are sectional views showing the semiconductor device of the sixth embodiment during a molding process. In the sixth embodiment, since the spreader 7SS is stuck to the film 30, the frame sticking portion 31 as described in the fifth embodiment is not necessary. For this reason, the configuration of the molding apparatus 28 can be simplified as compared with the case of the fifth embodiment.

  First, as shown in FIG. 46, the substrate 1 after the wire bonding step 102 is placed on the flat molding surface of the lower mold 12C of the molding die 12 in the same manner as in the second embodiment and fixed by vacuum suction. In the case of the sixth embodiment as well, the substrate 1 can be easily fixed by fixing the substrate 1 to the flat molding surface of the lower mold 12C. Therefore, there is a possibility that the substrate 1 is dropped or displaced. Therefore, the substrate 1 can be flexibly adapted to increase the area or the number of layers of the substrate 1.

  Subsequently, as in the second embodiment, the substrate 1 is preheated for about 20 seconds while the temperature of the lower mold 12C is set to, for example, about 175 to 180 ° C. The temperature of the mold 12D is set to about 175 to 180 ° C., for example. Thereafter, the supply reel 29A and the take-up reel 29B are rotated so that the plurality of small-sized spreaders 7SS of the film 30 are formed on the molding surfaces of the lower mold 12C and the upper mold 12D of the molding die 12 (that is, the main surface of the substrate 1). The film 30 is moved so as to be positioned directly above. At this stage, the main surface of the film 30 on which a plurality of small-size spreaders 7SS are attached is in a state of facing the main surface of the substrate 1. As described above, also in the sixth embodiment, since the plurality of small-sized spreaders 7SS are supplied to the molding die 12 by the film 30, the spreader 7SS can be easily carried into the molding die 12. In particular, in the case of the sixth embodiment, since the planar alignment accuracy of the spreader 7SS with respect to the substrate 1 can be relaxed compared to the case of the fifth embodiment, the spreader 7SS can be easily and better aligned than the case of the fifth embodiment. It can be carried into the molding die 12. Accordingly, also in the sixth embodiment, both the substrate 1 and the spreader 7SS can be easily supplied to the molding die 12.

  Subsequently, as shown in FIG. 47, similarly to the fifth embodiment, the back surface of the film 30 is vacuum-sucked to the upper mold 12D side and brought into close contact with the recess 12D2 of the upper mold 12D, so that a plurality of small spreaders are provided. 7SS is held on the upper mold 12D side. As described above, in the sixth embodiment, similarly to the third embodiment, the plurality of small-sized spreaders 7SS can be held on the upper mold 12D side by vacuum suction of the film 30. Therefore, the spreader 7SS It is not necessary to provide a frame suction port according to the situation. For this reason, the spreader 7SS can be provided in the package (resin sealing body, sealing body) without impairing the advantages of the MAP method. Further, similarly to the third embodiment, since it is not necessary to provide the fixing portion 7F, the use area of the product region DR can be increased. Therefore, the number of products acquired can be increased. In addition, the package size that can be handled can be increased.

  Thereafter, by holding the substrate 1 so as to be sandwiched between the lower die 12C and the upper die 12D, a substantial cavity CB surrounded by the recess 12D2 of the upper die 12D and the main surface of the substrate 1 is formed. While the temperature and the vacuum suction of the film 30 are maintained, the same sealing resin as in the first and second embodiments is poured into the cavity CB, so that as shown in FIG. The chip 10 and the bonding wire 11 are sealed together. As a result, a collective sealing body 14 including a plurality of chips 10 is formed on the main surface side of the substrate 1, and a plurality of small spreaders 7 SS are joined to the upper surface of the collective sealing body 14.

  Thereafter, as shown in FIG. 49, with the temperature of the lower mold 12C kept as described above, the vacuum suction to the film 30 is stopped, and the tension of the film 30 is used to mold the substrate 1 after the molding process. The mold 12 is separated from the upper mold 12D. Thereby, the lump sealing body 14 can be separated from the upper mold 12D with a relatively small force for the same reason as described in the fifth embodiment.

  Also in the sixth embodiment, for the same reason as described in the fifth embodiment, the releasability of the collective sealing body 14 with respect to the molding die 12 is improved, and the collective sealing body 14 has a small size. It is possible to cope with two contradictory demands for improvement in adhesion and adhesion to the spreader 7SS. Moreover, since it is only necessary to consider the improvement in adhesion and adhesiveness with the small size spreader 7SS for the sealing resin, it is easy to adjust the sealing resin component, select the material, or set the sealing conditions. Can do.

  Also in the sixth embodiment, the spreader 7SS is held on the upper mold 12D side by vacuum suction of the film 30 during the molding process as described above, so that the width as described in the first and second embodiments is wide. The fixing part 7F may not be provided. For this reason, since the use area of the product area | region DR can be enlarged, the number of product acquisition can be increased. In addition, the package size that can be handled can be increased. In addition, the same effects as described in the first to fifth embodiments can be obtained.

  The molding process as described above is repeatedly performed on the plurality of substrates 1 after the wire bonding process 102. Here, FIG. 50 is an overall plan view of the semiconductor device 20 after the molding process of the sixth embodiment, and FIG. 51 is a sectional view taken along line X13-X13 in FIG. As described above, a plurality of small-sized spreaders 7SS are joined to the upper surface of the collective sealing body 14 in a state of being exposed to the outside. Each spreader 7SS is firmly joined in a state where the four side surfaces are surrounded by the resin of the collective sealing body 14 and are embedded in the upper part of the collective sealing body 14. The upper surface of the collective sealing body 14 and the upper surface of each spreader 7SS substantially coincide with each other and are flat. The collective sealing body 14 is provided in a state of being sandwiched between a plurality of small-sized spreaders 7SS and the substrate 1. In each unit product area of the substrate 1, a plurality of spreaders 7SS are arranged. That is, a plurality of spreaders 7SS are arranged immediately above the main surface of each chip 10. As described above, in the sixth embodiment, in the MAP molding process, the plurality of small-size spreaders 7SS are aligned with each single product region without losing the advantages of the MAP method. 14 can be easily joined.

  Next, the process after the molding process will be described. First, a solder ball is connected to the back surface of the substrate 1S after the molding step in the same manner as in the first embodiment (solder ball attaching step 104 in FIG. 1). Subsequently, the substrate 1S after the solder ball attaching step is cut for each unit product region DR1 (individual piece cutting step 105 in FIG. 1). This individual piece cutting process will be described with reference to FIGS. FIG. 52 is an overall plan view of the main surface of the substrate 1 showing a cutting line, and FIG. 53 is a partially broken sectional view showing a state in which the substrate 1 is being cut. The cutting procedure is the same as that described in the first embodiment. That is, the substrate 1 is turned upside down and the collective sealing body 14 on the main surface side of the substrate 1 is fixed with an adhesive tape or the like, and then the dicing blade 19 is applied from the back surface of the substrate 1 in the same manner as dicing. The stop body 14 is cut along the cutting line CL. Thereby, for example, a plurality of BGA type semiconductor devices are acquired simultaneously.

  54 is a plan view of the top surface of the BGA type semiconductor device 20 manufactured as described above, and FIG. 55 is a cross-sectional view taken along line X14-X14 in FIG. The plurality of small-sized spreaders 7SS are bonded to the upper surface of the sealing body 14A so as to be exposed to the outside. As described above, each spreader 7SS is firmly bonded in a state where the four side surfaces are surrounded by the resin of the sealing body 14A and are embedded in the upper portion of the sealing body 14A. The upper surface of the sealing body 14A and the upper surface of each spreader 7SS substantially coincide with each other and are flat. The plurality of spreaders 7SS are arranged immediately above the main surface of the chip 10.

  Also in this sixth embodiment, heat generated during the operation of the integrated circuit on the main surface of the chip 10 can be dissipated to the outside through the plurality of spreaders 7SS. Can be improved. Accordingly, it is possible to cope with an improvement in the operation speed of the semiconductor device 20 and an improvement in function (an improvement in element integration and a corresponding increase in the number of pins).

  Also in the sixth embodiment, warping during heating of the semiconductor device 20 can be reduced by sandwiching the sealing body 14A between the wiring board 1A and the plurality of spreaders 7SS. In particular, by configuring the spreader 7SS with copper (Cu) having a thermal expansion coefficient close to that of the wiring board 1A, warping during heating of the semiconductor device 20 can be further reduced. Therefore, the mounting yield of the semiconductor device 20 can be improved. In addition, the semiconductor device 20 can be increased in area.

As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the above embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  For example, in the first to sixth embodiments, the case where the multilayer wiring structure is used as the substrate has been described. However, the present invention is not limited to this, and a lead frame may be used as the substrate.

  In the sixth embodiment, the case where a plurality of small-sized rectangular spreaders 7SS are arranged in the longitudinal direction and the width direction of the film 30 has been described. However, the present invention is not limited to this and can be variously changed. For example, a plurality of strip-like patterns extending continuously or intermittently along the longitudinal direction of the film 30 may be arranged side by side along the width direction of the film 30 with a desired distance therebetween.

  In the above description, the case where the invention made mainly by the present inventor is applied to the manufacturing method of the BGA type semiconductor device which is the field of use as the background has been described. However, the present invention is not limited to this and can be applied in various ways. For example, the present invention can also be applied to a method for manufacturing another package type semiconductor device such as an LGA (Land Grid Array) in which flat electrode pads are arranged in an array on the bottom surface of a package (sealing body).

  The present invention can be applied to the manufacturing industry of semiconductor devices using the MAP method.

It is a manufacturing flowchart of the semiconductor device which is one embodiment of this invention. It is a whole top view of the component mounting surface of the board | substrate used at the manufacturing process of the semiconductor device which is one embodiment of this invention. It is a side view of the board | substrate of FIG. It is an expanded sectional view of the X1-X1 line of FIG. It is a whole top view of the metal plate used at the manufacturing process of the semiconductor device which is one embodiment of this invention. It is a side view of the metal plate of FIG. It is sectional drawing of the X2-X2 line | wire of FIG. It is a whole top view of the component mounting surface of the board | substrate after a die-bonding process. It is a side view of the board | substrate of FIG. It is a whole top view of the component mounting surface of the board | substrate after a wire bonding process. It is sectional drawing of the X3-X3 line | wire of FIG. It is sectional drawing of the shaping | molding die used at the molding process following FIG. It is a top view of the lower mold | type of the shaping die of FIG. FIG. 13 is a cross-sectional view of a portion corresponding to the X4-X4 line in FIG. 13 during a manufacturing step of the semiconductor device following that of FIG. 12; FIG. 15 is a cross-sectional view of a portion corresponding to the X4-X4 line in FIG. 13 during a manufacturing step of the semiconductor device following that of FIG. 14; FIG. 16 is a cross-sectional view of a portion corresponding to the X4-X4 line in FIG. 13 during a manufacturing step of the semiconductor device following that of FIG. 15; It is a whole top view of a semiconductor device after a molding process. It is sectional drawing of the X5-X5 line | wire of FIG. It is sectional drawing of the board | substrate in a solder ball attachment process. It is a whole top view of the back surface of the board | substrate after a solder ball application process. It is sectional drawing of the X6-X6 line | wire of FIG. It is a whole top view of the main surface of a substrate which shows a cutting line. It is a partially broken sectional view which shows a mode during the cutting | disconnection of a board | substrate. It is a perspective view of the manufactured CSP type semiconductor device. FIG. 25 is a plan view of the upper surface of the CSP type semiconductor device of FIG. 24. It is sectional drawing of the X7-X7 line | wire of FIG. It is sectional drawing of the shaping die in the mold process of the semiconductor device which is other embodiment of this invention. FIG. 28 is a cross-sectional view of the semiconductor device during a molding step following FIG. 27; FIG. 29 is a cross-sectional view of the semiconductor device during a molding step following that of FIG. 28; FIG. 30 is a cross-sectional view of the semiconductor device during a molding step following FIG. 29; FIG. 31 is a cross-sectional view of the semiconductor device during a molding step following FIG. 30; It is a whole top view of the metal plate used with the manufacturing method of the semiconductor device which is other embodiment of this invention. It is sectional drawing of the X8-X8 line | wire of FIG. It is sectional drawing of the X9-X9 line | wire of FIG. It is a whole top view of the metal plate used with the manufacturing method of the semiconductor device which is further another embodiment of this invention. It is a principal part enlarged plan view of the metal plate of FIG. It is sectional drawing in the mold process of the semiconductor device which is other embodiment of this invention. FIG. 38 is a cross-sectional view of the semiconductor device during the molding process following FIG. 37; FIG. 39 is a cross-sectional view of the semiconductor device during the molding process following FIG. 38; FIG. 40 is a cross-sectional view of the semiconductor device during the molding process following FIG. 39; FIG. 41 is a cross-sectional view of the semiconductor device during the molding process following FIG. 40; FIG. 42 is a cross-sectional view of the semiconductor device during a molding step following FIG. 41; FIG. 43 is a cross-sectional view of the semiconductor device during a molding step following FIG. 42; It is a principal part top view of the film used with the manufacturing method of the semiconductor device of other embodiment of this invention. It is sectional drawing of the X12-X12 line | wire of FIG. It is sectional drawing in the mold process of the semiconductor device which is other embodiment of this invention. FIG. 47 is a cross-sectional view of the semiconductor device during the molding process following FIG. 46; FIG. 48 is a cross-sectional view of the semiconductor device during the molding process following FIG. 47; FIG. 49 is a cross-sectional view of the semiconductor device during a molding step following FIG. 48; FIG. 50 is an overall plan view of the semiconductor device after the molding step of FIGS. 46 to 49; It is sectional drawing of the X13-X13 line | wire of FIG. FIG. 52 is an overall plan view of the main surface of the substrate in the piece cutting step subsequent to FIG. 51. FIG. 52 is a partially broken cross-sectional view showing the state of the substrate during the piece cutting step following FIG. 51. FIG. 54 is a plan view of the upper surface of the semiconductor device manufactured through the steps of FIGS. 46 to 53. It is sectional drawing of the X14-X14 line | wire of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Board | substrate 2 Insulation layer 3 Wiring layers 3a-3e Conductor pattern 4 Solder resist 7 Frame for heat spreader (metal plate)
7F Fixed part 7S Spreader (Product part)
7T Hanging portion 7H Opening portion 10 Semiconductor chip 11 Bonding wire 12 Mold 12A Lower die 12A1 Frame suction port 12A2 Recess 12A3 Groove 12A4 Gate 12A5 Air vent 12AC Calblock 12B Upper die 12B1 Substrate suction port 12C Lower die 12C1 Substrate suction port 12D Upper Mold 12D1 Frame suction port 12D2 Concave 14 Collective sealing body 17 Solder bump 17A Bump electrode 19 Dicing blade 20 Semiconductor device 21 Adhesive 25 Handler 28 Molding device 29A Supply reel 29B Take-up reel 30 Mold laminate film 31 Frame spreader 31A for heat spreader , 31B Sticking jig DR Product area DR1 Unit product area TH Through hole CB Cavity

Claims (18)

(A) providing a substrate having a first surface and a second surface located on opposite sides along the thickness direction and having a plurality of unit product regions;
(B) mounting a semiconductor chip on each of the plurality of unit product regions on the first surface of the substrate;
(C) carrying the substrate after the step (b) into a molding die, and collectively sealing a plurality of semiconductor chips of the substrate with a resin sealing body;
(D) having the step of separating the substrate and the resin sealing body after the step (c) from the molding die,
The step (c)
(C1) fixing the substrate after the step (b) to the molding die;
(C2) fixing a metal plate to a molding surface facing the first surface of the substrate of the molding die;
(C3) holding the substrate so as to be sandwiched between a lower mold and an upper mold of the molding die;
(C4) The resin encapsulant that collectively encapsulates the plurality of semiconductor chips by filling a cavity formed between the molding die and the first surface of the substrate with a sealing resin. And bonding the metal plate to the resin sealing body,
The metal plate includes a fixing portion used to fix the metal plate to the molding die, a plurality of product portions provided to correspond to the plurality of unit product regions of the substrate, and the metal A method of manufacturing a semiconductor device, comprising: a plurality of product portions of a plate connected to each other and a suspension portion for connecting to the fixed portion.   2. The method of manufacturing a semiconductor device according to claim 1, wherein each of the plurality of product portions of the metal plate is formed in a square shape, and the suspension portion is provided at each of the four corners of the plurality of product portions of the metal plate. A method for manufacturing a semiconductor device, wherein the semiconductor devices are integrally connected.   2. The method of manufacturing a semiconductor device according to claim 1, wherein each of the plurality of product portions of the metal plate is formed in a quadrangular shape, and the suspension portion is formed on each of four sides of the plurality of product portions of the metal plate. A method for manufacturing a semiconductor device, wherein the semiconductor device is integrally connected to the center.   2. The method of manufacturing a semiconductor device according to claim 1, wherein each of the plurality of product portions of the metal plate is formed in a quadrangular shape, and the suspension portion includes four corners of each of the plurality of product portions of the metal plate. A method for manufacturing a semiconductor device, wherein the semiconductor device is integrally connected between the four sides.   2. The method of manufacturing a semiconductor device according to claim 1, further comprising a step of cutting the resin sealing body, the metal plate, and the substrate into the plurality of unit product regions after the step (d). A method for manufacturing a semiconductor device.   2. The method of manufacturing a semiconductor device according to claim 1, wherein after the step (d), bump electrodes are formed on the second surface of the substrate, and then the resin sealing body, the metal plate, and the substrate are connected to the plurality of units. A method of manufacturing a semiconductor device, comprising a step of cutting for each product region. (A) providing a substrate having a first surface and a second surface located on opposite sides along the thickness direction and having a plurality of unit product regions;
(B) mounting a semiconductor chip on each of the plurality of unit product regions on the first surface of the substrate;
(C) fixing the substrate to the molding surface of the lower mold of the molding die with the first surface of the substrate after the step (b) facing the upper mold of the molding die;
(D) After supplying a film having a metal plate attached so as to face the first surface of the substrate between the first surface of the substrate after the step (c) and the upper mold, Fixing the film to the upper mold;
(E) holding the substrate so as to be sandwiched between the lower mold and the upper mold while the film is fixed to the upper mold;
(F) filling each of the plurality of unit product regions with a sealing resin in a cavity formed between the metal plate sticking surface of the upper mold film and the first surface of the substrate; Forming a resin sealing body that collectively seals the semiconductor chips, and bonding the metal plate to the resin sealing body;
(G) A method for manufacturing a semiconductor device, comprising: a step of separating the substrate, the resin sealing body, and the film after the step (f) from the molding die.   8. The method of manufacturing a semiconductor device according to claim 7, further comprising a step of attaching the metal plate to the film after the step (c) and prior to the step (d). .   8. The method of manufacturing a semiconductor device according to claim 7, wherein the metal plate corresponds to a fixing portion used to fix the metal plate to the upper mold and the plurality of unit product regions of the substrate. A method for manufacturing a semiconductor device, comprising: a plurality of product portions provided; and a suspension portion for connecting the plurality of product portions of the metal plate to each other and to be connected to the fixed portion.   10. The method of manufacturing a semiconductor device according to claim 9, wherein each of the plurality of product parts of the metal plate is formed in a square shape, and the suspension part is provided at each of the four corners of the plurality of product parts of the metal plate. A method for manufacturing a semiconductor device, wherein the semiconductor devices are integrally connected.   10. The method of manufacturing a semiconductor device according to claim 9, wherein each of the plurality of product parts of the metal plate is formed in a quadrangular shape, and the suspension part has four sides of each of the plurality of product parts of the metal plate. A method for manufacturing a semiconductor device, wherein the semiconductor device is integrally connected to the center.   10. The method of manufacturing a semiconductor device according to claim 9, wherein each of the plurality of product parts of the metal plate is formed in a quadrangular shape, and the suspension part includes four corners of each of the plurality of product parts of the metal plate. A method for manufacturing a semiconductor device, wherein the semiconductor device is integrally connected between the four sides.   8. The method of manufacturing a semiconductor device according to claim 7, wherein the metal plate is affixed to the film before being wound around a supply reel that houses the film and supplies the film to the molding die. A method for manufacturing a semiconductor device.   8. The method of manufacturing a semiconductor device according to claim 7, wherein the metal plate is formed in a plurality of patterns separated from each other.   15. The method of manufacturing a semiconductor device according to claim 14, wherein the plurality of patterns are rectangular patterns.   15. The method of manufacturing a semiconductor device according to claim 14, wherein the plurality of patterns are patterns having the same dimension.   15. The method of manufacturing a semiconductor device according to claim 14, further comprising a step of cutting the resin sealing body and the substrate into the plurality of unit product regions after the step (g). Method.   15. The method of manufacturing a semiconductor device according to claim 14, wherein after the step (g), a bump electrode is formed on the second surface of the substrate, and then the resin sealing body and the substrate are separated for each of the plurality of unit product regions. A method for manufacturing a semiconductor device, comprising a step of cutting.

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