JP2006292972A - Drive unit of display device, and the display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent animation blurs or powdery finish, without deteriorating display quality in a display device, such as a liquid crystal display device. <P>SOLUTION: The display device divides one frame into a plurality of subframes and displays input video data by the total of the display of each subframe. The display device comprises a subframe data generating part 22 for generating subframe data that corresponds to each subframe, and a multi-gradation processing part 21 that is provided in a front stage or a rear stage of the subframe data generating part. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a drive device for a display device (for example, a liquid crystal display device) that displays one frame divided into a plurality of subframes (time division display).

  Liquid crystal display devices capable of power saving drive are widely used not only as portable devices but also as video display devices for stationary devices. In a liquid crystal display device, digital data corresponding to the gradation of each pixel of a display panel is input to a data signal line driving circuit, and the data signal line driving circuit converts an analog signal potential corresponding to the value of the digital data to a data signal. By applying to the line, the brightness of each pixel is controlled.

In a liquid crystal display device, writing is generally performed only once in one frame period (that is, all gate lines are turned on only once in one frame period), and hold display is generally used to maintain the state until the next frame. However, such a hold display has a problem that moving image blur tends to occur. As a solution to this problem, there is a method in which one frame is divided and a signal potential is written to each pixel a plurality of times in one frame period (time division display, for example, see Patent Documents 1 and 2 below).
Japanese Patent Laid-Open No. 5-68221 (issue date; March 19, 1993) JP 2001-296841 A (publication date: October 26, 2001)

  In such a time-division display in which each frame is represented by the sum of temporal luminances of a plurality of displays, in order to realize high display quality such as reduction of pseudo contours, display luminance (input floor) different from that in the case of hold display. Control) was required.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a drive device for a display device capable of realizing both high display quality and moving image blur suppression.

  In order to solve the above problems, the display device driving device of the present invention divides one frame into a plurality of subframes, and drives a display device that displays input video data according to the sum of the display of each subframe. A display device driving device, comprising: a sub-frame data generation unit that generates sub-frame data corresponding to each sub-frame; and a multi-gradation processing unit that is provided before or after the sub-frame data generation unit. It is characterized by having.

  Time-division display, in which input video data is displayed by the sum of the display of each sub-frame divided into one frame, is recognized to have many high image quality effects such as reduction of motion blur. On the other hand, this time-division display requires control of the display display gradation (display data generation method) different from the hold display. Therefore, in the above configuration, a time division drive multi-gradation processing unit (pseudo multi-gradation processing) that performs, for example, noise processing or gradation conversion (bit width expansion) processing before or after the subframe data generation unit. Part).

  As a result, display data (display gradation) optimal for time-division driving can be generated, and both high display quality and suppression of moving image blur are realized in the display device including the present driving device.

  The driving device of the display device includes a γ conversion unit that performs γ conversion processing on the input video data, and the multi-gradation processing unit performs noise processing on the data obtained by the γ conversion unit to generate subframe data. You may output to a production | generation part. According to this configuration, the generation of pseudo contour can be suppressed by noise processing, and high image quality can be realized. In addition, since the subframe data generation unit is added after the multi-grayscale processing unit that performs multi-grayscale processing after the γ-conversion processing, a conventional circuit or table for γ-conversion can be used as it is, Contributes to cost reduction. If the γ conversion process performs γ conversion by extending the bit width, higher image quality can be realized.

  In the display device driving apparatus, the subframe data generation unit generates each subframe data including a γ conversion process based on the input video data, and the multi-gradation processing unit Each subframe data obtained by the frame data generation unit may be subjected to noise processing. According to the above configuration, noise processing can be performed on each subframe data by placing the subframe data generation unit in front of the multi-gradation processing unit. As a result, the content of noise processing can be freely adjusted for each subframe data, and the occurrence of pseudo contours can be more effectively suppressed. Further, it is possible to further improve the image quality by performing the above-described γ conversion processing with the bit width extended or by performing the lower bit addition processing together with the γ conversion processing in the subframe data generation unit.

  Further, in the driving device of the display device, the noise processing is to add noise to each subframe data, and it is preferable that the noise level indicating the maximum value of the noise is different between the subframe data. . In time-division driving, the difference in average gradation between subframe data is large. Therefore, by making the noise level different for each subframe data, it is possible to perform noise processing (pseudo contour reduction) suitable for each subframe and eliminate the possibility that the noise itself is visually recognized.

  In the display device driving device, the display device divides one frame into two subframes, and the subframe data generation unit includes first and second subframes corresponding to the first and second subframes. When generating subframe data, the gradation of the second subframe data is changed while the gradation of the first subframe data is changed for low luminance display (when low gradation input video data is displayed). For the high luminance display (when displaying high gradation input video data), the gradation of the second subframe data is set to the vicinity of the maximum value while the gradation of the first subframe data is set to the vicinity of the maximum value. It is preferable to change it.

  According to the above configuration, the first sub-frame is a dark display frame, and the second sub-frame is a bright display frame. In each sub-frame, time division display is performed using the maximum gradation near the minimum and maximum gradations. be able to. As a result, it is possible to effectively reduce the motion blur and the white floating phenomenon in a predetermined gradation region.

  Further, in the driving device for the display device, the first and second noises added to the first and second subframe data are given with spatial randomness for each predetermined region including a plurality of pixels. The noise level of the area may be based on the average input gradation of all the pixels (sub-pixels) included therein. The first and second noises added to the first and second subframe data are given to each pixel with temporal randomness, and the noise level given to each pixel is based on the input gradation of the pixel. It may be a thing.

  Further, in the driving device of the display device, it is preferable that the noise level of the first noise is set lower than the noise level of the second noise. According to the above configuration, since the noise level can be reduced in the dark display frame and the noise level can be increased in the bright display frame, it is possible to perform appropriate noise processing according to the display luminance of each subframe.

Further, in the driving device of the display device, as the input gradation changes from the minimum gradation to a predetermined intermediate gradation, the first noise becomes a constant first level and the second noise becomes a constant higher than this. On the other hand, as the input gradation changes from the predetermined intermediate gradation to the maximum gradation, the first noise is increased from the first level, while the second noise is increased to the first level. It is preferable to keep. Further, as the input gradation changes from the minimum gradation to a predetermined intermediate gradation, the first noise is kept near 0 level and the second noise is increased from the third level of 0 or more, while the input noise is increased. As the gradation changes from a predetermined intermediate gradation to the maximum gradation, the first noise may be increased from the vicinity of the 0 level, while the second noise may be continuously increased. Further, as the input gradation changes from the minimum gradation to a predetermined intermediate gradation, the first noise is gradually increased after being kept close to the 0th level up to the predetermined gradation, and the second noise is increased to 0 or more. While increasing from the 4th level, the first noise may be continuously increased as the input gradation changes from the predetermined intermediate gradation to the maximum gradation, while the second noise may be rapidly decreased to near the 0th level. Absent.
.

  According to the above configuration, it is possible to effectively suppress an unnatural luminance (brightness) change and whitening phenomenon that are likely to occur in an input gradation near the intermediate gradation.

  In addition, the liquid crystal display device of the present invention is characterized by including the drive device for each display device described above.

  According to another aspect of the present invention, there is provided a display device including the display device driving device and a display unit including a pixel driven by the driving device.

  The display device of the present invention includes image receiving means for receiving a television broadcast and inputting a video signal indicating an image transmitted by the television broadcast to the driving device of the display device, and the display unit. Is a liquid crystal display panel, and is characterized by operating as a liquid crystal television receiver.

  In the display device of the present invention, the display unit is a liquid crystal display panel, and a video signal is input from the outside to the driving device of the display device, and a liquid crystal that displays an image indicating the video signal. It is characterized by operating as a monitor device.

  As described above, in the display device driving apparatus of the present invention, the multi-gradation processing unit for time-division driving (display) is provided before or after the subframe data generation unit that generates each subframe data. . As a result, display data (display gradation) that is optimal for time-division driving can be generated, and both high display quality and suppression of moving image blur can be realized in a display device including this driving device.

  An embodiment of the present invention will be described below with reference to FIGS.

  As shown in FIG. 13, the present liquid crystal display device 1 (display device) includes a panel 11, a signal processing unit 5 (display device drive device), a driver control circuit 7, and a power supply 13. The panel 11 includes a pixel array 2 having sub-pixels SPIX (1, 1) to SPIX (n, m) arranged in a matrix, a data signal line driving circuit 3, and a scanning signal line driving circuit 4.

  The signal processing unit 5 generates display data DAT1 and DAT2 of the first and second subframes based on the input video data from the video signal source VS, and outputs this to the driver control circuit 7. The display data DAT1 and DAT2 are composed of display data for each sub-pixel after processing, and the display data for each sub-pixel in a frame is a combination of display data for each sub-pixel in each sub-frame. Is given. In this embodiment, the video data constituting the display data DAT1 and 2 are also transmitted in a time division manner.

  More specifically, when transmitting the display data DAT1 and 2, the signal processing unit 5 transmits the display data DAT1 and 2 for the next frame after transmitting all the display data DAT1 and 2 for a certain frame. Thus, display data for each frame is time-division transmitted. Each frame includes two subframes (first and second subframes). For example, after the signal processing unit 5 transmits all the display data DAT1 for the first subframe, The video data for each subframe is transmitted in a time division manner, for example, by transmitting display data DAT for the second subframe to be transmitted next.

  Here, the video signal source VS may be any device as long as it can generate input video data. As shown in FIG. 18A, the television receiver 100a including the liquid crystal display device 1 includes the video signal source VS and the liquid crystal display device 1, and the video signal source VS receives, for example, a television broadcast signal. Entered. Further, the video signal source VS includes a tuner unit TS that selects a channel from the television broadcast signal and outputs the television video signal of the selected channel to the controller 2 as input video data.

  18B, the liquid crystal monitor device 100b including the liquid crystal display device 1 outputs, for example, a monitor signal processing unit 161 that outputs a video monitor signal from a personal computer or the like as a video signal to the panel 11. Is provided. The monitor signal processing unit 161 may include the signal processing unit 5, or may be a circuit provided in the preceding stage or the subsequent stage.

  The input video data supplied from the video signal source VS to the signal processing unit 5 may be an analog signal or a digital signal. Further, it may be transmitted in frame units (entire screen unit), or one frame may be divided into a plurality of fields and transmitted in the field units (interlaced transmission). Is assumed to be transmitted in frame units. That is, the video signal source VS according to the present embodiment transmits all the video data for a certain frame when transmitting the input video data to the signal processing unit 5 of the liquid crystal video display device 1 through the video signal line. The video data for each frame is transmitted in a time division manner, for example, by transmitting the video data for the next frame.

  The panel 11 is a panel capable of color display by configuring one pixel from sub-pixels capable of displaying R, G, B colors and controlling the luminance of each sub-pixel, for example. As shown in FIG. 13, the pixel array 2 is provided with scanning signal lines GL1 to GLm and data signal lines SL1 to SLn, and subpixels SPIX (1,1) to SPIX (n, m) are arranged in a matrix. Here, the data signal line driving circuit 3 drives the data signal lines SL1 to SLn. Further, the scanning signal line driving circuit 4 drives the scanning signal lines GL1 to GLm.

  The units and circuits are operated by supplying power from the power supply 13. In the present embodiment, one pixel PIX is composed of three subpixels SPIX adjacent in the direction along the scanning signal lines GL1 to GLm.

  First, the schematic configuration and operation of the entire liquid crystal display device 1 will be described. For convenience of explanation, for example, as in the i-th data signal line SLi, only when the position needs to be specified, reference is made with numerals or letters indicating the position, and there is no need to specify the position. When referring generically, the characters indicating the positions are omitted and referred to.

  The pixel array 2 includes a plurality (in this case, n) of data signal lines SL1 to SLn and a plurality (in this case, m) of scanning signal lines GL1 that intersect the data signal lines SL1 to SLn, respectively. GLm, where an arbitrary integer from 1 to n is i, and an arbitrary integer from 1 to m is j, a subpixel SPIX is provided for each combination of the data signal line SLi and the scanning signal line GLj. (i, j) is provided.

  In the case of the present embodiment, as shown in FIGS. 13 and 14, each subpixel SPIX (i, j) includes two adjacent data signal lines SL (i−1) · SLi and two adjacent data signal lines SL (i−1) · SLi. It is disposed in a portion surrounded by the scanning signal lines GL (j−1) · GLj. The subpixel SPIX (i, j) has, as switching elements, a field effect transistor SW (i, j) having a gate connected to the scanning signal line GLj and a drain connected to the data signal line SLi, and the field effect transistor SW (i , J) includes a pixel capacitor Cp (i, j) to which one electrode is connected. Further, the other end of the pixel capacitor Cp (i, j) is connected to a common electrode line common to all the sub-pixels SPIX. The pixel capacitor Cp (i, j) includes a liquid crystal capacitor CL (i, j) and an auxiliary capacitor Cs (i, j) that is added as necessary.

  In the subpixel SPIX (i, j), when the scanning signal line GLj is selected, the field effect transistor SW (i, j) is turned on, and the voltage applied to the data signal line SLi is changed to the pixel capacitance Cp (i, j). j). On the other hand, while the selection period of the scanning signal line GLj ends and the field effect transistor SW (i, j) is cut off, the pixel capacitor Cp (i, j) continues to hold the voltage at the cut-off. Here, the transmittance or reflectance of the liquid crystal varies depending on the voltage applied to the liquid crystal capacitance CL (i, j). Therefore, if the scanning signal line GLj is selected and a voltage corresponding to the display data DAT (i, j, k) to the subpixel SPIX (i, j) is applied to the data signal line SLi, the subpixel SPIX ( The display state of i, j) can be changed in accordance with the display data DAT (i, j, k).

  The liquid crystal display device according to this embodiment is a vertical alignment mode liquid crystal cell as a liquid crystal cell, that is, when no voltage is applied, the liquid crystal molecules are aligned substantially perpendicular to the substrate, and the subpixel SPIX (i, j) The liquid crystal cell in which the liquid crystal molecules are inclined from the vertical alignment state in accordance with the voltage applied to the liquid crystal capacitor CL (i, j) is normally black mode (black display when no voltage is applied). Mode).

  In the above configuration, the scanning signal line drive circuit 4 shown in FIG. 13 outputs a signal indicating whether or not the selected period, such as a voltage signal, to each of the scanning signal lines GL1 to GLm. Further, the scanning signal line driving circuit 4 changes the scanning signal line GLj that outputs a signal indicating the selection period based on a timing signal such as a clock signal GCK or a start pulse signal GSP supplied from the driver control circuit 7, for example. ing. Thus, the scanning signal lines GL1 to GLm are sequentially selected at a predetermined timing.

  Further, the data signal line drive circuit 3 sends the data signal lines SL1 to the subpixels SPIX (1, j) to SPIX (n, j) corresponding to the scan signal line GLj selected by the scan signal line drive circuit 4. Signals corresponding to the display data to each are output via .about.SLn. Here, the data signal line driving circuit 3 DA converts the display data output from the driver control circuit 7 and writes analog signal potentials to the data signal lines SL1 to SLn.

  The data signal line driving circuit 3 determines the sampling timing and the output timing of the output signal based on timing signals such as the clock signal SCK and the start pulse signal SSP input from the driver control circuit 7.

  On the other hand, each of the subpixels SPIX (1, j) to SPIX (n, j) is given to the data signal lines SL1 to SLn corresponding to itself while the scanning signal line GLj corresponding to the subpixel SPIIX (1, j) to SPIX (n, j) is selected. In accordance with the signal, the brightness and transmittance when emitting light are adjusted to determine its own brightness.

  Here, the scanning signal line driving circuit 4 sequentially selects the scanning signal lines GL1 to GLm. Therefore, the sub-pixels SPIX (1, 1) to SPIX (n, m) constituting all the pixels of the pixel array 2 can be set to the brightness (gradation) indicated by the data to be displayed on the pixel array 2. You can update the video.

[Embodiment 1]
Embodiment 1 of the present invention will be described below with reference to FIGS.

  As shown in FIG. 1 and FIG. 13 and FIG. 2, the signal processing unit 5 of the present liquid crystal image display device 1 includes a control unit 2 and a storage unit 6, and the control unit 2 includes a γ conversion unit 17, and noise addition A multi-gradation processing unit 21 including a unit 34, a rounding processing unit 36, and an address counter 35, a subframe data generation unit 22 provided in a subsequent stage of the multi-gradation processing unit 21, and a selector unit 24.

  The storage unit 6 stores a γ conversion table 12, noise data 13, a first subframe data LUT 18, a second subframe data LUT 19, and the like. Further, the data D2 is stored in the frame memory 20 of the storage unit 6 in units of frames and sequentially read out to the subframe data generation unit 22.

  As shown in FIG. 1, input video data (for example, 8-bit digital data) from an external video signal source VS is input to the γ conversion unit 17.

  The γ conversion unit 17 converts γ (for example, 2.2) of input video data into an appropriate γ (for example, 1.0), and includes 8-bit input video data and a γ conversion table of the storage unit 6. 12, 10-bit γ-converted data D1 is generated. In this way, γ conversion with high accuracy (high degree of freedom) can be performed by expanding the bit width (256 gradations → 1024 gradations) and performing γ conversion. However, the normal 8-bit → 8-bit γ conversion (without bit width expansion) may be performed.

  As shown in FIGS. 1 and 2, the multi-gradation processing unit 21 includes a noise adding unit 34, a rounding processing unit 36, and an address counter 35, and performs high-precision noise processing on 10-bit data. The generation of pseudo contours is greatly suppressed and bit reduction is performed by rounding.

  First, the noise adding unit 34 reads predetermined noise data 13 from the storage unit 6 while referring to the address counter 35, and adds this to the (γ-converted) data D1.

  This noise data 13 indicates a random numerical value given to each sub-pixel of the pixel array 2, and this random numerical value is a spatial average value (in the case of spatial noise) or a temporal average value (in the case of temporal noise). ) Is almost zero.

  As schematically shown in FIG. 8A, the spatial noise is a space given to each sub-pixel so that the average value becomes 0 in each divided display area (including all display areas) in an arbitrary frame. It is a random number. Further, as schematically shown in FIG. 8B, the temporal noise is a temporally random numerical value given to a subpixel so that an average value of a predetermined time (frame) becomes 0 in an arbitrary subpixel. It is.

  Here, as shown in FIGS. 8A and 8B, the maximum value of the absolute value (noise amount) of this random numerical value is set as the noise level. This noise level corresponds to the maximum bit width of the noise data. Here, if the noise level is too high, the noise may be recognized as a pattern by the user of the liquid crystal display device. Therefore, the noise level is set in a range where the noise pattern is not recognized by the user. In the present embodiment, this noise level is set to the lower 6 bits in 10-bit data (detailed later). That is, the noise adding unit 34 adjusts (increases / decreases) the −64 to +64 gradations (10-bit 1024 gradation expression) at random for each sub-pixel to thereby generate 10-bit (after noise addition) data D1. Generate '.

  In the case of spatial noise, noise data for a predetermined block (divided display area) such as 16 × 16 or 32 × 32 is recorded in the storage unit 6. When adding the spatial noise without changing in each frame, the noise adding unit 34 adds the same amount (value) of noise to the same subpixel SPIX (i, j) over each frame. The address counter 35 is reset. That is, the address counter 35 is reset in synchronization with at least one of a horizontal synchronizing signal and a vertical synchronizing signal transmitted together with input video data from the video signal source VS. In this way, flicker and noise are reduced when the liquid crystal display device 1 displays a still image on the pixel array 2. When the spatial noise is changed for each predetermined frame, the noise adding unit 34 changes the phase difference between the reset timing of the address counter 35 and the first data of each frame for each frame. For example, when the first data is read in a certain frame, the address counter is reset and the noise data stored at the first address of the noise memory is added to the first data. In the next frame, the address counter reset timing is set earlier by one data and the noise data stored at the second address of the noise memory is added to the first data.

  Here, when the spatial resolution and luminance resolution of the pixel array 2 are set to a range close to or higher than the limit of human vision, even if the same spatial noise is added to each subframe, the noise pattern However, there is no possibility that the user of the liquid crystal display device 1 can visually recognize. However, when the spatial resolution and luminance resolution of the pixel array 2 are significantly below the limits of human vision, and each subpixel SPIX (i, j) is visible (for example, a 20 inch VGA display or 40 inch). If such fixed noise is added, there is a high possibility that the user will recognize it as a noise pattern. Therefore, when the noise pattern is easily visible, including when applied to a 20-inch VGA display or a 40-inch XGA display, it is preferable to change the spatial noise for each predetermined frame or to apply time noise. Thereby, visual recognition of the noise pattern by the user can be avoided, and display quality can be improved.

  Furthermore, the noise level can be changed in order to make the noise pattern less visible. For example, as shown in FIG. 3, a noise level adjusting unit 30 is provided in the multi-gradation processing unit 21. The noise level adjustment unit 30 adjusts the noise level of the noise data 13 read from the storage unit 6 based on the data D1, and outputs this to the noise addition unit 34.

  For example, if the noise data 13 is spatial noise, the noise level adjustment unit 30 calculates an average input gradation from the data D1 to the sub-pixels SPIX included in a divided display area such as an MPEG (Moving Picture Expert Group) block. Then, the noise (amount) to each sub-pixel read from the storage unit 6 is adjusted so that the region where the average input gradation is high has a high noise level and the low region has a low noise level (for example, Constant times). In a block (divided display area) with a high average input gradation, the noise is relatively small, so that it is difficult for the user to recognize the noise pattern. Therefore, the noise level is set high. On the other hand, since noise is relatively large in a block (divided display area) with a low average input gradation, the user can easily recognize the noise pattern. Therefore, the noise level is set low. As a result, an appropriate noise level can be set according to the data D1 (input gradation to each sub-pixel), and the display quality can be improved as compared with the case where the noise level is fixed.

  Note that the block for calculating the average input tone may have any size as long as it is a divided display area having an arbitrary size. However, when displaying an image encoded in a predetermined block unit, such as an MPEG image, it is desirable to match the size of the divided display area with the encoding block size. In the above description, the case where the input gradations of all the subpixels SPIX included in the divided display area are averaged has been described as an example. However, the present invention is not limited to this. For example, a configuration that averages input gradations to a certain number of subpixels SPIX in a block, such as a subpixel SPIX (i, j) corresponding to a certain scanning signal line GL in the block, greatly increases the surroundings. By using subpixels with different gradations as a reference, it is possible to avoid the problem of setting the noise level to an inappropriate value.

  Further, if the noise data 13 is temporal noise, the noise level adjusting unit 30 applies to the low sub-pixel SPIX so that the noise to the sub-pixel SPIX having a high input gradation becomes a high noise level based on the data D1. The noise (amount) to each sub-pixel read from the storage unit 6 is adjusted (for example, a constant multiple) so that the noise becomes a low noise level.

  Here, a description will be added regarding specific numerical values of the noise level.

  To what extent the noise added by the noise adding unit 34 differs from the surrounding sub-pixels in the gradation observed by the user of the liquid crystal display device 1 (variation rate), and to what extent the target luminance is different ( Error). In general, in the field of making pictures on the basis of 100 ppi as in a liquid crystal display device, the allowable limit of the error is about 5% of the white luminance, and the allowable limit of the variation rate is 5% of the display gradation. It is known to be a degree.

  When the gradation of the sub-pixel SPIX is increased by x gradations, the percentage of the pixel transmittance calculated based on the surrounding luminance (transmittance before increasing the gradation) is calculated. When the γ characteristic of the pixel array is γ = 2.8 and the data D1 is represented by 10 bits, the variation rate is within the allowable limit for most gradations if x is within 32 to 48 gradations. It was confirmed that it fits in. As a result, in the case of noise of 32 to 48 gradations (10-bit 1024 gradation expression), it is possible to make the user feel that the display quality is not degraded apparently below the allowable limit in most gradations. .

Therefore, when it is assumed that one pixel is viewed at a distance where it cannot be seen independently, the above-described variation rate and error are set to be less than 5% between 2 to 3 pixels (6 to 9 subpixels). That's fine. Here, assuming that the noise data has a substantially normal distribution, 32 to 48 [gradation] × 6 ^{1/2 to} 9 ^1/2 = 80 to 144 [gradation]. Therefore, even if a fixed noise is added with a bit width of about 7 bits, that is, about 3 bits smaller than the data D1, it can be said that there is almost no possibility that the noise pattern is visually recognized by the user of the video display device. However, since the observation distance does not increase as much as the pixel size increases, the allowable level of noise data decreases as the pixel size increases. In view of this, within a numerical range of 144 gradations (lower 7 bits of 10-bit data), a numerical value suitable for many liquid crystal display devices as the noise level is within 80 gradations, more preferably 64. It is within the gradation (lower 6 bits of 10-bit data).

  As illustrated in FIG. 3, the rounding processing unit 36 generates 8-bit data (after lower-order bits are cut off) from the data D <b> 1 ′ (10 bits) output from the noise adding unit 34. That is, the lower 2 bits of the 10-bit data D1 'are discarded to obtain 8-bit data D2. Further, the rounding processing unit 36 writes the generated data D2 in the frame memory 20.

  By the processing of each part of the multi-gradation processing unit 21 as described above, the entire liquid crystal panel 11 performs the subsequent processing while maintaining the information amount of 10-bit data (data D1) after γ conversion almost as it is. Can be done. That is, in this embodiment, the bit width of the data D1 output from the γ conversion unit 17 is 10 bits, but the bit width of the data stored in the frame memory 20 is reduced to 8 bits. Thereby, the memory capacity required for the frame memory 20 can be reduced. In the circuits after the rounding processing unit 36, the data bit width is reduced from 10 bits to 8 bits, so that the number of wirings and the occupied area for connecting each can be reduced to 4/5. The amount of computation in the circuit can also be reduced.

  Since video data needs to be transmitted at high speed, in order to transmit video data by a circuit having a low transmission speed, it is necessary to provide a plurality of circuits in parallel and operate them alternately. That is, when the number of data bits increases, the area occupied by the circuit increases. In this respect, since the bit width is reduced to 4/5 in this embodiment, even if a circuit that operates in parallel is provided, the multi-gradation processing unit 21 is not provided and processing is performed with 10 bits. The increase in circuit area can be suppressed compared to the case.

  As shown in FIG. 1, the subframe data generation unit 22 reads the data D2 written in the frame memory 20 twice at a double speed (double clock), and acquires data D2a and D2b. Here, the subframe data generation unit 22 generates the first subframe data D3a based on the data D2a read for the first time and the first subframe data LUT 18, and then the second read for the second time. Based on the two data D2b and the second subframe data LUT 19, second subframe data D3b is generated.

  The first subframe data LUT 18 and the second subframe data LUT 19 are provided corresponding to the first and second subframes, respectively. As shown in FIG. 10A, data D2a (D2b) Is a correspondence table combining the gray scale (input gray scale, 8 bits) and the gray scale (output gray scale, 8 bits) of data D3a (D3b).

  Here, as shown in FIG. 10 (a), in the first subframe data LUT 18, the output gray scale for the input gray scale from the minimum brightness 0 to the second intermediate brightness L2 through the first intermediate brightness L1. Is set to Gmin (0 gradation or its vicinity), while the output gradation is Gmin to the input gradation from the second intermediate luminance L2 to the maximum luminance (255 gradation) through the third intermediate luminance L3. It is increased to Gmax.

  Further, in the second subframe data LUT 19, the output gradation is increased from Gmin to Gmax with respect to the input gradation from the minimum luminance 0 to the second intermediate luminance L2 through the first intermediate luminance L1, while the second subframe data LUT 19 The output gradation is set to Gmax (near the maximum) with respect to the input gradation from the second intermediate luminance L2 through the third intermediate luminance L3 to the maximum luminance (255 gradations).

  For example, if the data D2a and D2b (input gradation) relating to a certain subpixel are Gx, the display data D3a of the first subframe is Gp, the display data D3b of the second subframe is Gq, and the display brightness by Gp and Gq Is the display luminance corresponding to Gx. As a result, the first subframe is darkly displayed and the second subframe is brightly displayed.

  The operation and effect of the subframe data generation unit 22 according to the present embodiment will be described in detail as follows.

  The subframe data generation unit 22 reads the data D2a and D2b from the frame memory 20 by the number of subframes (in this case, twice) for each frame. Also, in the first subframe data LUT 18 (hereinafter referred to as LUT 18), a value indicating data D3a to be output when the read data D2a can be associated with each of the possible values is stored. Yes. Similarly, in the second subframe data LUT 19 (hereinafter referred to as LUT 19), a value indicating data D3b to be output when the value is obtained is stored in association with each of the possible values. Further, the subframe data generation unit 22 refers to the LUT 18 and outputs the data D3a corresponding to the read D2a, and refers to the LUT 19 to output the data D3b corresponding to the read D2b. it can. The values stored in the LUTs 18 and 19 may be, for example, a difference from the above-described values as long as the data D3a and D3b to be output can be specified, but in this embodiment, the values of the data D3a and D3b The values themselves are stored, and the subframe data generation unit 22 outputs the values read from the LUTs 18 and 19 as data D3a and D3b. The values stored in the LUTs 18 and 19 are set as follows when the possible values are g and the values stored in the LUTs 18 and 19 are P1 and P2, respectively. Yes. The first subframe data D3a may be set to have higher luminance. However, in the following, the second subframe data D3b is higher than the first subframe data D3a. The case where it is set to will be described. That is, when g indicates a gradation equal to or lower than a predetermined threshold value (luminance equal to or lower than the luminance indicated by the threshold value), the value P1 is set to a value within a range determined for dark display, The value P2 is set to a value corresponding to the value P1 and the value g. Note that the dark display range is a gradation equal to or lower than a gradation predetermined for dark display. When the predetermined gradation for dark display shows the minimum luminance, the minimum luminance is set. The gradation (black) shown. Further, it is desirable that the gradation predetermined for the dark display is set to a value that can suppress the amount of whitening described later to a desired amount or less. On the other hand, when g represents a gradation that is brighter than a predetermined threshold (brightness higher than the luminance indicated by the threshold), the value P2 is set to a value within a range determined for bright display. The value P1 is set to a value corresponding to the value P2 and the value g. Note that the bright display range is a gradation greater than or equal to a gradation predetermined for bright display, and when the predetermined gradation for the bright display shows the maximum luminance, the maximum luminance is set. The gradation (white) shown. Moreover, it is desirable to set the gradation predetermined for the bright display to a value that can suppress the amount of whitening described later to a desired amount or less. As a result, when the data D2 (input gradation) to the sub-pixel SPIX in a certain frame shows a gradation equal to or lower than the threshold value, that is, in the low-luminance region, the luminance of the sub-pixel SPIX in the frame is high or low. Is mainly controlled by the magnitude of the value P2. Therefore, the display state of the sub-pixel SPIX can be in a dark display state at least during the sub-frame period of the frame. Thereby, when the data D2 in a certain frame indicates the gradation of the low luminance region, the light emission state of the sub-pixel SPIX in the frame can be brought close to an impulse type light emission such as a CRT (Cathode-Ray Tube). In addition, the image quality when displaying a moving image on the pixel array 2 can be improved. Further, when the data D2 (input gradation) to the sub-pixel SPIX in a certain frame indicates a gradation higher than the threshold, that is, in the high-luminance region, the luminance of the sub-pixel SPIX in the frame is high or low. Is mainly controlled by the magnitude of the value P1. Therefore, the difference between the luminance in the first subframe and the luminance in the second subframe of the subpixel can be set larger than in the configuration in which the luminances of both subframes are allocated approximately equally. As a result, even when the data D2 in a certain frame indicates the gradation of the high luminance region, in most cases, the light emission state of the sub-pixel SPIX in the frame can be brought close to the impulse light emission, and the pixel array 2 Can improve the image quality when displaying video. Further, in the above configuration, when the data D2 indicates the gradation of the high luminance region, the second subframe data D3b has a value within the range determined for bright display, and the luminance indicated by the data D2 is high. Accordingly, the first subframe data D3a increases. Therefore, the luminance of the sub-pixel SPIX in the frame can be increased as compared with a configuration in which a period for dark display is always provided even when white display is instructed. As a result, by bringing the light emission state of the sub-pixel SPIX closer to the impulse type, the maximum value of the luminance of the sub-pixel SPIX can be greatly increased despite improving the image quality when displaying a moving image. A brighter liquid crystal image display device 1 can be realized. Here, even in the VA panel which is said to have a wide viewing angle, the change in the gradation characteristics due to the viewing angle cannot be completely eliminated. For example, when the viewing angle in the left-right direction increases, the gradation characteristics deteriorate. For example, when the viewing angle is 60 degrees, when the panel is desired from the front (viewing angle 0 degree), the gradation γ characteristic changes, and a whitening phenomenon occurs in which the halftone brightness becomes brighter. In addition, regarding the IPS mode liquid crystal display panel, although depending on the design of optical characteristics such as an optical film, the gradation characteristics change depending on the increase in the viewing angle. On the other hand, in the above configuration, one of the subframe data D3a and D3b is displayed brightly regardless of whether the data D2 indicates either the gradation of the high luminance area or the gradation of the low luminance area. Is set to a value within a range determined for use or a value within a range set for dark display, and the brightness level of the sub-pixel SPIX in the frame is controlled mainly by the other size. . Here, the amount of whitening (deviation from the assumed brightness) is the largest in the case of intermediate gradation, and is relatively low in the case of sufficiently low brightness and sufficiently high brightness. It is kept at a low value. Therefore, compared to a configuration in which both of the sub-frames are increased or decreased to the same extent to control the brightness level (a configuration in which both are halftone), or a configuration in which display is performed without dividing the frame, The total amount of floating can be significantly reduced, and the viewing angle characteristics of the liquid crystal image display device 1 can be greatly improved.

  Returning to FIGS. 1 and 2, the selector unit 24 sequentially switches the first subframe data D3a and the second subframe data D3b generated as described above (in the subframe data generation unit 22), and switches them to the first subframe data D3b. The display data DAT1 of the frame and the display data DAT2 of the second subframe are output to the dedriver control circuit 7.

[Embodiment 2]
The following will describe another embodiment of the present invention with reference to FIGS.

  As shown in FIG. 4, the signal processing unit 105 according to the present embodiment includes a control unit 102 and a storage unit 106. The control unit 102 includes a subframe data generation unit 122, complementary bit addition units 47a and 47b, and A multi-gradation processing unit 121 including noise addition units 44a and 44b and rounding processing units 46a and 46b, and a selector unit 24, and the first and second subframes based on the input video data from the video signal source VS. Display data DAT1 and DAT2 are generated and output to the driver control circuit 7. In the present embodiment, the subframe data generation unit 122 is provided in front of the multi-gradation processing unit 121.

  The storage unit 106 stores first noise data 113, second noise data 114, a first subframe data LUT 28, a second subframe data LUT 29, and the like. Further, the input video data is stored in the frame memory 20 of the storage unit 106 and is sequentially read out to the subframe data generation unit 122.

  As shown in FIG. 4, the subframe data generation unit 122 reads the input video data written in the frame memory 20 twice at a double speed (double clock), and acquires D4a and D4b. Next, the subframe data generation unit 22 generates the first subframe data D5a based on the data D4a read out for the first time and the LUT 28 for the first subframe data, and then the D4b read out for the second time. Based on the second subframe data LUT 29, second subframe data D5b is generated.

  The first subframe data LUT 28 and the second subframe data LUT 29 are provided corresponding to the first and second subframes, respectively. As shown in FIG. 10B, the D4a (D4b) It is a correspondence table combining gradation (input gradation, 8 bits) and gradation of D5a (D5b) (output gradation, 8 bits).

  Here, as shown in FIG. 10B, in the first subframe data LUT 28, input gradations from the minimum luminance 0 to the second intermediate luminance L′ 2 having passed through the first intermediate luminance L′ 1 are detected. The output gradation is set to G′min (0 gradation or the vicinity thereof), while the maximum luminance (near 255 gradations) of the maximum luminance from the second intermediate luminance L′ 2 to the third intermediate luminance L′ 3 is input. With respect to the tone, the output gradation increases from G′min (0 gradation or its vicinity) to the maximum luminance (near 255 gradation).

  In addition, in the second subframe data LUT 29, the luminance gradation is G′min to G′max with respect to the input gradation from the minimum luminance 0 to the second intermediate luminance L′ 2 that has passed through the first intermediate luminance L′ 1. While the output gradation is G′max (near the maximum value) with respect to the input gradation from the second intermediate luminance L′ 2 to the maximum luminance (255 gradations) via the third intermediate luminance L′ 3. ).

  For example, if the data D4a and D4b (input gradation) relating to a certain subpixel is G′x, the display data D5a of the first subframe is G′p, and the display data D5b of the second subframe is G′q. The temporal total (temporal integral value) of the display luminance by G′p and G′q is the display luminance corresponding to G′x. The first subframe is dark display and the second subframe is bright display.

  The operations and effects of the subframe data generation unit 122 according to the present embodiment are the same as those of the subframe data generation unit 22 described above (however, the LUT 18 is the LUT 28, the LUT 19 is the LUT 29, the data D2 is the data D4, Data D3 is replaced with data D5).

  In the present embodiment, as shown in FIG. 5, γ conversion (8 bits → 8 bits) may be reflected in advance on the design values of the first subframe data LUT 28 and the second subframe data LUT 29. it can. Thereby, it is not necessary to provide a γ conversion table or a γ conversion unit, and the cost of the signal processing unit 105 can be reduced.

  As shown in FIGS. 4 and 5, the multi-gradation processing unit 21 includes complementary bit adding units 47a and 47b, noise adding units 44a and 44b, rounding processing units 46a and 46b, and an address counter 45. By performing a bit width expansion process on the 8-bit data D5a and D5b and then performing a noise process, the pseudo contour is significantly suppressed, and the bit width is reduced by a rounding process to output 8-bit data D7a and D7b.

  First, the complementary bit adding unit 47a adds the lower 2 bits as the complementary bits to the data D5a to generate 10-bit data D6a. Similarly, the complementary bit adding unit 47b adds the lower 2 bits as the complementary bits to the data D5b to generate 10-bit data D6b. By the bit width expansion (gradation conversion) processing by the complementary bit adding units 47a and 47b, the accuracy or degree of freedom of the γ conversion can be increased.

  In FIG. 5, the complementary bit adding units 47a and 47b are not provided (bit width extension is not performed), and the 8-bit data D5a and D5b from the subframe data generating unit 122 are directly used as the multi-gradation processing unit 121 (noise adding unit 44a). -You may output to 44b).

  In the configuration of FIG. 5 described above, the 8 → 10-bit γ conversion is performed by the subframe data generation unit 122 and the complementary bit addition units 47a and 47b. However, as shown in FIG. It is also possible to prepare first and second subframe data LUTs 38 and 39 reflecting 8 bits → 10 bits). That is, the subframe data generation unit 222 generates the first subframe data D6a (10 bits) based on the data D4a read from the frame memory 20 and the first subframe data LUT 38 (10 bits). Output to the gradation processing unit 121. Similarly, first subframe data D6b (10 bits) is generated based on the subframe dedata D4b and the first subframe data LUT 39 (10 bits), and is output to the multi-gradation processing unit 121. By doing so, it is not necessary to provide the complementary bit adding units 47a and 47b, and the signal processing unit 105 can be reduced in size and cost. However, whether these bit width expansion processing circuits are integrated with the subframe data generation circuit or a separate circuit configuration is appropriately selected depending on the convenience of the user. When the display device of the present invention is supplied as a component such as a television, the user often obtains a smooth gamma to be displayed as instructed, and the bit expansion processing is used in terms of device characteristic correction. Therefore, an integrated circuit is more convenient. On the other hand, when this display device is supplied in a state close to the final product, the user often desires to be able to freely specify the gradation characteristics, and therefore a separate circuit configuration is more convenient.

  Referring back to FIGS. 4 and 5, the noise adding unit 44a adds the first noise data 113 to the data D6a while referring to the address counter 45a (gamma converted) to generate 10-bit data D6a '. Similarly, the noise addition unit 44b adds the second noise data 114 to the data D6ba (γ-converted) while referring to the address counter 45b to generate 10-bit data D6b ′.

  The first noise data 113 and the second noise data 114 may be spatial noise (see FIG. 8A) or temporal noise (see FIG. 8B). However, if the noise level is too high, the noise may be recognized by the user of the liquid crystal display device 101 as a pattern. Therefore, the noise level is set in a range where the noise pattern is not recognized by the user.

  In the present embodiment, the noise is relatively large in the dark-displayed first subframe, so that the user can easily recognize the noise pattern. Therefore, the noise level of the first noise data 113 is set low. On the other hand, since the noise is relatively small in the brightly displayed second subframe, it is difficult for the user to recognize the noise pattern. Therefore, the noise level of the second noise data 114 is set higher (than the first noise data 113).

  For example, the noise level of the first subframe on the dark display side is set to about ½ of the second subframe on the bright display side. Specifically, the noise level of the first noise data 113 given to the first subframe is within 3 bits (8 gradations in 1024 gradation display), and the noise level of the second noise data 114 given to the second subframe is 4 Within bits (16 gradations in 1024 gradation display).

  By doing in this way, compared with the first embodiment, there is a sudden change in luminance that occurs in the portion surrounded by the broken line in FIG. 10B (region where the input gradation is L′ 1 to L′ 3). White float can be suppressed. This point will be described in detail as follows.

  Graphs a1 and a2 in FIG. 15 show specific examples of LUTs for first (dark display) and second (bright display) subframe data. However, the input gradation is expressed by 512 gradations, and the output gradation is obtained by performing 8-bit gamma conversion on the fume integrated luminance, and the original display gamma is 2.2. Graphs b to d in FIG. 15 show the display gradation of each subframe when the LUTs for the first and second subframe data are set as shown in the graphs a1 and a2 in FIG. However, the graph b shows the display gradation assuming that the response speed ratio (td / tr) of rise and decay is a constant value 4, and the graph c is the display level when (td / tr) is assumed to be a constant value 2. A graph d shows a display gradation when (td / tr) is assumed to be a constant value 1. As the response speed of the rise to the decay becomes slower, the gradation transition (rise response) in the first to second subframes shifts. In graph d, when the input gradation is 256 gradations (/ 512 gradations) (the first subframe is 0 gradations), the second subframe increases only to about 190 gradations (/ 256 gradations). .

  By the way, in the actual display, the response speed ratio (td / tr) between the rise and decay does not become the assumption (constant) of the graphs b to d, but changes depending on the input gradation. That is, since the response speed of the liquid crystal is finite, in the normally black vertical alignment (VA mode), when the dark display period rises from near 0, the rise response time is rapidly increased, and the response time due to gradation is increased. Together with the decay response with relatively little change, the integrated luminance between frames increases rapidly. Considering this change in response speed ratio in FIG. 15, the rise of the response speed of the rise suddenly near the intermediate gradation, for example, the graph d passes the intermediate 256 gradations (512 gradation representation). In the vicinity, the graph b is transferred via the curve r. As described above, the addition of noise to the darkly displayed sub-frame has a large influence on the response speed in addition to the darkness of the peripheral gradation, and as a result, there is a possibility that the frame integrated luminance is greatly fluctuated. Therefore, it is preferable that the subframe data is selected so that the luminance variation during the dark display period does not significantly affect the overall luminance, and the noise level is preferably made different between the dark display subframe and the bright display subframe accordingly. .

  Now, it is possible to adjust the noise level on the multi-gradation processing unit side. For example, as shown in FIG. 6, noise level adjustment units 150 a and 150 b are provided in the multi-gradation processing unit 221. The noise level adjustment unit 150a adjusts the noise level of the read noise data 115 according to the gradation (input gradation) of the data D4a, and outputs this to the noise addition unit 44a. Similarly, the noise level adjustment unit 150b adjusts the noise level of the read noise data 115 according to the gradation of the data D4b, and outputs this to the noise addition unit 44b. It is also possible to adopt a configuration in which the noise level adjusting units 150a and 150b adjust the noise level of the noise data 115 based on the gradations of D6a and D6b and output this to the noise adding units 44a and 44b.

  By doing in this way, compared with the first embodiment, there is a sudden change in luminance that occurs in the portion surrounded by the broken line in FIG. 10B (region where the input gradation is L′ 1 to L′ 3). White float can be suppressed.

  Here, if the noise data 115 is spatial noise, the noise level adjustment unit 150a calculates the average input gradation from the data D4a to the sub-pixels SPIX included in the divided display area such as an MPEG (Moving Picture Expert Group) block. Calculate and adjust the noise (amount) to each read sub-pixel so that the area where the average input gradation is high has a high noise level and the low area has a low noise level (for example, a constant multiple) To do. Similarly, the noise level adjusting unit 150b calculates an average input gradation from the data D4b to the sub-pixels SPIX included in the divided display area such as an MPEG (Moving Picture Expert Group) block, and the average input gradation is high. The noise (amount) to each sub-pixel read from the storage unit 106 is adjusted (for example, a constant multiple) so that the region has a high noise level and the low region has a low noise level.

  Further, if the noise data 115 is temporal noise, the noise level adjusting unit 150 uses the low subpixel SPIX so that the subpixel SPIX having a high input gradation has a high noise level based on the data D4a and D4b. The noise (amount) to each sub-pixel is adjusted (for example, a constant multiple) so that the noise level is low (see FIG. 9).

  Further, as shown in FIGS. 11A to 11C, the noise level adjusting unit 150 changes the noise levels of the first and second noise data according to the data D4a and D4b (input gradation). You can also.

  That is, as shown in FIG. 11A, as the gradation of the data D4a changes from the minimum luminance to the third intermediate luminance L′ 3 (see FIG. 10B), the noise level adjusting unit 150a performs dark display. The noise level (NL1) of the first subframe is kept at a constant level n (first level: about ± 1 bit), and the noise level adjustment unit 150b sets the noise level (NL2) of the brightly displayed second subframe higher than this. It is kept at a constant level N (second level: about ± 3 bits). On the other hand, as the gradation changes from the third intermediate luminance L′ 3 to the maximum luminance, the noise level adjustment unit 150a increases NL1 from level n, and the noise level adjustment unit 150b maintains NL2 at level N. keep.

  Further, as shown in FIG. 11B, as the gradation of the data D6a changes from the minimum luminance to the third intermediate luminance L′ 3, the noise level adjustment unit 150a performs the noise level ( NL1) is maintained at a level near 0, and the noise level adjustment unit 150b increases the noise level (NL2) of the brightly displayed second subframe from a level Np (third level) higher than 0. On the other hand, as the gradation changes from the third intermediate luminance L′ 3 to the maximum luminance, the noise level adjusting unit 150a increases NL1 from 0 to the level Nq (> Np), and the noise level adjusting unit 150b is NL2. Is continuously increased to level Nq.

  Further, as shown in FIG. 11C, as the gradation of the data D6a changes from the minimum luminance to the third intermediate luminance L′ 3, the noise level adjustment unit 150a performs the noise level (first subframe for dark display) NL1) is gradually increased after maintaining the predetermined gradation 0, and the noise level adjustment unit 150b changes the noise level (NL2) of the brightly displayed second subframe from the level Nx (fourth level) higher than 0 to the level Ny. Increase to. On the other hand, as the gradation changes from the third intermediate luminance L′ 3 to the maximum luminance, the noise level adjusting unit 150a continuously increases NL1 to Nc, and the noise level adjusting unit 150b changes NL2 from level Ny to 0. Suddenly decrease.

  For example, in FIG. 10B, when the input gradation of D4a and D4b is G′x, if FIG. 11B is applied to this noise adjustment, the noise level (NL1) of the first subframe is As shown in FIG. 12A, the noise level (NL2) of the second subframe is as shown in FIG. When the input gradation of D4a and D4b is G'y, if FIG. 11C is applied to this noise adjustment, the noise level (NL1) of the first subframe is as shown in FIG. In addition, the noise level (NL2) of the second subframe is as shown in FIG.

  A specific example relating to the setting of each noise level will be described below. Graphs a and b in FIG. 16 show examples of LUTs 28 and 29 (see FIG. 5) for the first (dark display) and second (bright display) subframes in consideration of the response speed described in FIG. It is a graph. FIG. 17 shows the input gradation-noise level combined with the LUT shown in the graphs a and b of FIG. 16 (however, the input gradation is represented by 8 bits 256 gradations and the noise level is represented by 10 bits 1024 gradations). This is an example of setting. The setting is performed by, for example, the noise level adjusting units 150a and 150b in FIG. The graphs c and d are reference graphs showing a basic LUT (LUT for the first and second subframes) that does not consider the response speed.

  As shown in graph a of FIG. 17, the noise level of the first (dark display) subframe is almost 0 until the input gradation (D4a) is near 0 to 70 gradations (8-bit 256 gradation expression). And the noise level is increased from about 0 to 45 gradations (10-bit 1024 gradation expression) while the input gradation (D4a) is between 90 and 256 gradations. Further, as shown in the graph b, for the second (bright display) subframe, the noise gradation is 20 while the input gradation (D4b) is 0 to 256 gradations (8-bit 256 gradation expression). It is increased from (10-bit 1024 gradation expression) to 64 gradations (10-bit 1024 gradation expression). Here, the noise level of the noise given to the second subframe (bright display) corresponding to the inflection point of graph b in FIG. It is preferable to provide an inflection point (the second derivative is-to +) near the input gradation 160 (see graph b in FIG. 17).

  In this way, based on the data D4a and D4b (see FIG. 6), the (appropriate) noise level corresponding to each of the dark display subframe and the bright display subframe can be set, and the broken line in FIG. An abrupt change in brightness and whitening in the enclosed area (area where the input gradation is L′ 1 to L′ 3), more specifically in the vicinity of the curve r in FIG. 15, can be greatly reduced.

  Returning to FIG. 5, the rounding processing unit 46a generates 8-bit data D7a (after truncating the lower bits) from the data D6a '(10 bits) output from the noise adding unit 44a. That is, the lower 2 bits of the 10-bit data D6a 'are discarded to obtain 8-bit data D7a. Similarly, as shown in FIG. 5, the rounding processing unit 46b generates 8-bit data D7b (after lower-order bit truncation) from the data D6b ′ (10 bits) output from the noise adding unit 44b. That is, the lower 2 bits of the 10-bit data D6b 'are discarded to obtain 8-bit data D7b.

  Note that the selector unit 24 sequentially switches D7a and D7b output from the rounding processing units 46a and 46b, and outputs them to the driver control circuit 7 as display data DAT1 for the first subframe and display data DAT2 for the second subframe.

  In each of the above embodiments, each unit or part of the control unit 2 (102) may be realized by a combination of a program for realizing the above-described function and hardware (computer) that executes the program. Good. As an example, the computer connected to the liquid crystal display device 101 may implement the control unit 2 (102) as a device driver used when driving the computer. In addition, each unit of the control unit 2 (102) is realized as a conversion board built in or externally attached to the liquid crystal display device 101, and a circuit that realizes each unit of the control unit 2 (102) by rewriting a program such as firmware. If the operation of the software can be changed, the software is distributed by distributing a recording medium on which the software is recorded or transmitting the software through a communication path. By executing this, the hardware may be operated as the control unit 2 (102) of each of the above embodiments.

  In these cases, if hardware capable of executing the functions described above is prepared, the control unit 2 (102) according to each of the above embodiments can be realized only by causing the hardware to execute the program.

  More specifically, when implemented using software, a calculation means comprising a CPU or hardware capable of executing the above-described functions executes program code stored in a storage device such as a ROM or RAM. The control unit 2 (102) according to each of the above embodiments can be realized by controlling peripheral circuits such as an input / output circuit (not shown).

  In this case, it can also be realized by combining hardware that performs a part of the processing and the arithmetic means that executes the program code for controlling the hardware and the remaining processing. Further, even among the members described above as hardware, the hardware for performing a part of the processing and the arithmetic means for executing the program code for performing the control of the hardware and the remaining processing It can also be realized by combining them. The arithmetic means may be a single unit, or a plurality of arithmetic means connected via a bus inside the apparatus or various communication paths may execute the program code jointly.

  The program code itself that can be directly executed by the computing means, or a program as data that can be generated by a process such as decompression described later, stores the program (program code or the data) in a recording medium, A recording medium is distributed, or the program is distributed by being transmitted by a communication means for transmitting via a wired or wireless communication path, and is executed by the arithmetic means.

  In addition, when transmitting via a communication path, each transmission medium which comprises a communication path propagates the signal sequence which shows a program, and the said program is transmitted via the said communication path. Further, when transmitting the signal sequence, the transmission device may superimpose the signal sequence on the carrier by modulating the carrier with the signal sequence indicating the program. In this case, the signal sequence is restored by the receiving apparatus demodulating the carrier wave. On the other hand, when transmitting the signal sequence, the transmission device may divide and transmit the signal sequence as a digital data sequence. In this case, the receiving apparatus concatenates the received packet groups and restores the signal sequence. Further, when the transmission apparatus transmits a signal sequence, the signal sequence may be multiplexed with another signal sequence and transmitted by a method such as time division / frequency division / code division. In this case, the receiving apparatus extracts and restores individual signal sequences from the multiplexed signal sequence. In any case, the same effect can be obtained if the program can be transmitted via the communication path.

  Here, it is preferable that the recording medium for distributing the program is removable, but it does not matter whether the recording medium after distributing the program is removable. In addition, the recording medium can be rewritten (written), volatile, or the recording method and shape as long as a program is stored. Examples of recording media include tapes such as magnetic tapes and cassette tapes, magnetic disks such as floppy (registered trademark) disks and hard disks, CD-ROMs, magneto-optical disks (MO), mini-discs (MD) and digital A disk such as a video disk (DVD) may be mentioned. The recording medium may be a card such as an IC card or an optical card, or a semiconductor memory such as a mask ROM, EPROM, EEPROM, or flash ROM. Or the memory formed in calculating means, such as CPU, may be sufficient.

  The program code may be a code for instructing the arithmetic means of all the procedures of the processes, or a basic program capable of executing a part or all of the processes by calling according to a predetermined procedure. If (for example, an operating system or a library) already exists, a part or all of the entire procedure may be replaced with a code or a pointer that instructs the arithmetic means to call the basic program.

  The format for storing the program in the recording medium may be a storage format that can be accessed and executed by the arithmetic means, for example, as in a state where the program is stored in the real memory, or is stored in the real memory. Installed in the local recording medium from the storage format after being installed in a local recording medium (for example, real memory or hard disk) that is always accessible by the computing means, or from a network or a transportable recording medium The previous storage format may be used. Further, the program is not limited to the compiled object code, but may be stored as source code or intermediate code generated during interpretation or compilation. In any case, the above calculation is performed by a process such as decompression of compressed information, decoding of encoded information, interpretation, compilation, linking, allocation to real memory, or a combination of processes. If the means can be converted into an executable format, the same effect can be obtained regardless of the format in which the program is stored in the recording medium.

  According to the present invention, it is possible to generate display data (display gradation) that is optimal for time-division driving. Therefore, the present invention can be applied to various display devices such as a television receiver and a monitor.

It is a block diagram which shows Embodiment 1 of this invention. It is a block diagram which shows Embodiment 1 of this invention. It is a block diagram which shows the modification of Embodiment 1 of this invention. It is a block diagram which shows Embodiment 2 of this invention. It is a block diagram which shows Embodiment 2 of this invention. It is a block diagram which shows the modification of Embodiment 2 of this invention. It is a block diagram which shows the modification of Embodiment 2 of this invention. (A) (b) is a figure explaining the noise of Embodiment 1 * 2 of this invention. It is a figure explaining the noise to each sub-frame of Embodiment 2 of this invention. (A) (b) is a figure explaining LUT for sub-frame data concerning Embodiment 1 * 2 of this invention. (A)-(c) is a figure explaining the noise level concerning Embodiment 1 * 2 of this invention. (A)-(d) is a figure explaining the example of control of the noise level concerning Embodiment 2 of this invention. It is a figure which shows schematic structure of the liquid crystal display device of this invention. It is a figure which shows the partial structure of the liquid crystal display device of this invention. It is a graph explaining the relationship between LUT for 1st and 2nd sub-frames, and an actual display gradation. It is a graph explaining LUT for 1st and 2nd sub-frames. It is a graph which shows the noise level combined with LUT of graph a * b of FIG. (A) is a block diagram which shows the principal part structure of the television receiver provided with this liquid crystal display device, (b) is a block diagram which shows the principal part structure of the liquid crystal monitor device provided with this liquid crystal display device. It is.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 101 Liquid crystal display device 2 102 Control part 3 Data signal line drive circuit 4 Scan signal line drive circuit 5 105 Signal processing part 6 106 Memory | storage part 7 Driver control circuit 17 γ conversion part 18 28 38 LUT for 1st sub-frame data
19 29 39 Second subframe data LUT
21 221 Multi-gradation processing unit 22 122 Subframe data generation unit 34 44a / 44b Noise addition unit 36 36a / 36b Rounding processing unit

Claims (15)

A drive device for a display device that drives a display device that divides one frame into a plurality of subframes and displays input video data by the sum of the display of each subframe,
A subframe data generation unit that generates subframe data corresponding to each subframe;
And a multi-gradation processing unit provided at a preceding stage or a subsequent stage of the sub-frame data generation unit.   A γ conversion unit that performs γ conversion processing on input video data is provided, and the multi-gradation processing unit performs noise processing on the data obtained by the γ conversion unit and outputs the data to the subframe data generation unit. The display device driving device according to claim 1, wherein:   The subframe data generation unit performs γ conversion processing when generating each subframe data based on the input video data, and the multi-gradation processing unit applies each subframe data obtained by the subframe data generation unit. The display device driving device according to claim 1, wherein a noise process is performed.   4. The display device driving apparatus according to claim 3, wherein the noise processing is to add noise to each subframe data, and a noise level indicating a maximum value of the noise is individually set for each subframe data. . The display device driving device according to claim 4, wherein one frame is divided into two subframes.
When generating the first and second subframe data corresponding to the first and second subframes, the subframe data generation unit sets the gradation of the first subframe data to a minimum value for low luminance display. While changing the gradation of the second subframe data while changing the gradation of the second subframe data while changing the gradation of the second subframe data while changing the gradation of the first subframe data for high luminance display. A driving device for a display device.   The first and second noises to be added to the first and second subframe data are given with spatial randomness for each predetermined region including a plurality of pixels, and the noise level of each region is included in all the noise levels included therein. 5. The driving device for a display device according to claim 4, wherein the driving device is based on an average input gradation of pixels.   The first and second noises added to the first and second subframe data are given to each pixel with temporal randomness, and the noise level given to each pixel is based on the input gradation of the pixel. 5. The display device driving device according to claim 4, wherein the driving device is a display device.   8. The display device driving device according to claim 6, wherein the noise level of the first noise is set lower than the noise level of the second noise. As the input gradation changes from the minimum gradation to a predetermined intermediate gradation, the first noise is set to a constant first level and the second noise is set to a constant second level higher than this,
7. The first noise is increased from the first level as the gradation changes from a predetermined intermediate gradation to a maximum gradation, and the second noise is maintained at the first level. 8. A drive device for a display device according to item 7. As the input gradation changes from the minimum gradation to a predetermined intermediate gradation, the first noise is kept near 0 level and the second noise is increased from the third level of 0 or more,
8. The first noise is increased from the vicinity of the 0 level while the second noise is continuously increased as the input gradation changes from a predetermined intermediate gradation to a maximum gradation. Display device drive device. As the gradation changes from the minimum gradation to a predetermined intermediate gradation, the first noise is gradually increased after being kept close to the 0th level until the predetermined gradation, and the second noise is increased from the fourth level of 0 or more. While increasing
8. The first noise is continuously increased as the gradation changes from a predetermined intermediate gradation to a maximum gradation, while the second noise is rapidly decreased to near the 0 level. Drive device for display device.   A liquid crystal display device comprising the display device driving device according to claim 1. A drive device for a display device according to any one of claims 1 to 12,
And a display portion including a pixel driven by the driving device. The apparatus includes an image receiving unit that receives a television broadcast and inputs a video signal indicating an image transmitted by the television broadcast to the driving device of the display device.
The display unit is a liquid crystal display panel,
14. The display device according to claim 13, wherein the display device operates as a liquid crystal television receiver. The display unit is a liquid crystal display panel,
The driving device of the display device receives a video signal from the outside,
14. The display device according to claim 13, wherein the display device operates as a liquid crystal monitor device that displays an image indicating the image signal.

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