JP2006278520A5 - - Google Patents
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- JP2006278520A5 JP2006278520A5 JP2005092596A JP2005092596A JP2006278520A5 JP 2006278520 A5 JP2006278520 A5 JP 2006278520A5 JP 2005092596 A JP2005092596 A JP 2005092596A JP 2005092596 A JP2005092596 A JP 2005092596A JP 2006278520 A5 JP2006278520 A5 JP 2006278520A5
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- electronic component
- manufacturing
- adhesive layer
- multilayer
- kpa
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Claims (6)
前記基板の電極部と前記第1の電子部品の電極パッドとを第1のボンディングワイヤを介して接続する工程と、
前記基板上に接着された前記第1の電子部品を、加熱機構を有するステージ上に載置して加熱する工程と、
裏面側に接着剤層が形成された第2の電子部品を、常温の吸着ツールで保持して前記第1の電子部品の上方に配置する工程と、
前記第2の電子部品を徐々に下降させ、加熱された前記第1の電子部品からの輻射熱および前記第1のボンディングワイヤとの伝熱により前記接着剤層を軟化または溶融させ、前記第1のボンディングワイヤを前記接着剤層に取り込みつつ、前記接着剤層を前記第1の電子部品と接触させる工程と、
前記加熱機構による加熱を継続しつつ前記第2の電子部品を加圧し、前記接着剤層を熱硬化させて前記第1の電子部品と前記第2の電子部品とを接着する工程と、
前記基板の電極部と前記第2の電子部品の電極パッドとを第2のボンディングワイヤを介して接続する工程と
を具備することを特徴とする積層型電子部品の製造方法。 A step of adhering equipped with a first electronic component on a substrate,
Connecting the electrode portion of the substrate and the electrode pad of the first electronic component via a first bonding wire;
The first electronic component bonded to the substrate, and heating is placed on a stage having a heating mechanism,
A step of holding the second electronic component having the adhesive layer formed on the back surface side with a suction tool at room temperature and placing it above the first electronic component;
The second gradually lowers the electronic component, the heat transfer between the radiant heat and the first bonding wire from the heated first electronic component to soften or melt the adhesive layer, the first Bringing the adhesive layer into contact with the first electronic component while incorporating a bonding wire into the adhesive layer ;
Pressurizing the second electronic component while continuing heating by the heating mechanism, thermally curing the adhesive layer, and bonding the first electronic component and the second electronic component;
Connecting the electrode portion of the substrate and the electrode pad of the second electronic component via a second bonding wire.
前記第1の電子部品から少なくとも0.5mm上方の位置から、前記第2の電子部品を0.1mm/s以上20mm/s以下の範囲の速度で下降させることを特徴とする積層型電子部品の製造方法。 In the manufacturing method of the multilayer electronic component according to claim 1,
A method of manufacturing a multilayer electronic component, wherein the second electronic component is lowered at a speed in the range of 0.1 mm / s to 20 mm / s from a position at least 0.5 mm above the first electronic component .
前記接着剤層は30μm以上の厚さを有することを特徴とする積層型電子部品の製造方法。The method for manufacturing a multilayer electronic component, wherein the adhesive layer has a thickness of 30 μm or more.
前記接着剤層は前記加熱時の粘度が1kPa・s以上100kPa・s未満の範囲の熱硬化型樹脂層を有することを特徴とする積層型電子部品の製造方法。 The method of manufacturing a multilayer electronic component according to any one of claims 1 to claim 3,
The method for producing a multilayer electronic component, wherein the adhesive layer has a thermosetting resin layer having a viscosity during heating of 1 kPa · s to less than 100 kPa · s.
前記接着剤層は、前記第1の電子部品側に配置され、前記加熱時の粘度が1kPa・s以上100kPa・s未満の範囲の第1の熱硬化型樹脂層と、前記第2の電子部品側に配置され、前記加熱時の粘度が100kPa・s以上の第2の熱硬化型樹脂層とを有することを特徴とする積層型電子部品の製造方法。 The method of manufacturing a multilayer electronic component according to any one of claims 1 to claim 3,
The adhesive layer is disposed on the first electronic component side, the first thermosetting resin layer having a viscosity during heating of 1 kPa · s to less than 100 kPa · s, and the second electronic component And a second thermosetting resin layer having a viscosity at the time of heating of 100 kPa · s or more.
前記第1および第2の電子部品は半導体素子および半導体素子を含むパッケージ部品から選ばれる少なくとも1種からなることを特徴とする積層型電子部品の製造方法。 In the manufacturing method of the multilayer electronic component according to any one of claims 1 to 5 ,
The method of manufacturing a multilayer electronic component, wherein the first and second electronic components comprise at least one selected from a semiconductor device and a package component including the semiconductor device.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005092596A JP4594777B2 (en) | 2005-03-28 | 2005-03-28 | Manufacturing method of multilayer electronic component |
TW095107613A TW200727446A (en) | 2005-03-28 | 2006-03-07 | Stack type semiconductor device manufacturing method and stack type electronic component manufacturing method |
KR1020060027518A KR100796884B1 (en) | 2005-03-28 | 2006-03-27 | Stack type semiconductor device manufacturing method and stack type electronic component manufacturing method |
US11/390,285 US7615413B2 (en) | 2005-03-28 | 2006-03-28 | Method of manufacturing stack-type semiconductor device and method of manufacturing stack-type electronic component |
US12/585,547 US7785926B2 (en) | 2005-03-28 | 2009-09-17 | Method of manufacturing stack-type semiconductor device and method of manufacturing stack-type electronic component |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005092596A JP4594777B2 (en) | 2005-03-28 | 2005-03-28 | Manufacturing method of multilayer electronic component |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2006278520A JP2006278520A (en) | 2006-10-12 |
JP2006278520A5 true JP2006278520A5 (en) | 2007-06-14 |
JP4594777B2 JP4594777B2 (en) | 2010-12-08 |
Family
ID=37212996
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005092596A Expired - Fee Related JP4594777B2 (en) | 2005-03-28 | 2005-03-28 | Manufacturing method of multilayer electronic component |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4594777B2 (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4879073B2 (en) | 2007-04-16 | 2012-02-15 | 新日鐵化学株式会社 | Manufacturing method of semiconductor device |
JP5044299B2 (en) * | 2007-06-19 | 2012-10-10 | 積水化学工業株式会社 | Semiconductor chip laminate manufacturing method, adhesive tape, and dicing die bonding tape |
JP5532575B2 (en) * | 2007-10-22 | 2014-06-25 | 日立化成株式会社 | Adhesive sheet |
JP4970388B2 (en) * | 2008-09-03 | 2012-07-04 | 株式会社東芝 | Semiconductor device and manufacturing method of semiconductor device |
JP5089560B2 (en) * | 2008-11-28 | 2012-12-05 | リンテック株式会社 | Semiconductor chip laminate and adhesive composition for semiconductor chip lamination |
JP5921297B2 (en) | 2012-04-09 | 2016-05-24 | キヤノン株式会社 | Multilayer semiconductor device, printed circuit board, and method of manufacturing multilayer semiconductor device |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3913481B2 (en) * | 2001-01-24 | 2007-05-09 | シャープ株式会社 | Semiconductor device and manufacturing method of semiconductor device |
JP4800524B2 (en) * | 2001-09-10 | 2011-10-26 | ルネサスエレクトロニクス株式会社 | Semiconductor device manufacturing method and manufacturing apparatus |
JP3912223B2 (en) * | 2002-08-09 | 2007-05-09 | 富士通株式会社 | Semiconductor device and manufacturing method thereof |
JP4076841B2 (en) * | 2002-11-07 | 2008-04-16 | シャープ株式会社 | Manufacturing method of semiconductor device |
JP4620366B2 (en) * | 2003-02-27 | 2011-01-26 | 住友ベークライト株式会社 | Semiconductor device, semiconductor element manufacturing method, and semiconductor device manufacturing method |
JP2005327789A (en) * | 2004-05-12 | 2005-11-24 | Sharp Corp | Pressure-sensitive adhesive sheet for both dicing and die-bonding, and method of manufacturing semiconductor device using the same |
JP2006128169A (en) * | 2004-10-26 | 2006-05-18 | Fujitsu Ltd | Semiconductor device and its manufacturing method |
-
2005
- 2005-03-28 JP JP2005092596A patent/JP4594777B2/en not_active Expired - Fee Related
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