JP2006267025A - Voltage measuring system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve a problem wherein a circuit scale gets large not to be matched to size reduction for the whole system, since a low-path filter such as an FIR filter and an IIR filter used for removing a higher harmonic noise when removing a noise is a product sum circuit, in a conventional voltage measuring system. <P>SOLUTION: A comparator 24 is one example of a change rate comparing means for comparing a change rate of an AC voltage in each sampling clock period S converted into an absolute value by an absolute value converter 23, with a predetermined reference change rate, and a D flip-flop circuit 25 is one example of a voltage holding means for holding an up-to-date AC voltage, when the change rate of the up-to-date AC voltage is determined to be lower than the reference change rate, by the comparator 24 that is the one example of the change rate comparing means. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a voltage measurement system that measures a voltage by sampling an input voltage or the like of an RF power supply device used as a power supply for a semiconductor manufacturing apparatus or the like.

In general, an RF power supply device used as a power supply for a semiconductor manufacturing apparatus or the like requires high-accuracy voltage control. Therefore, a voltage measurement system that measures input / output voltages of the RF power supply device by sampling is used.
One of the most important objects to be measured by this voltage measurement system is the maximum value of the voltage amplitude.
For example, consider a voltage waveform as shown in FIG.
The voltage waveform shown in FIG. 1 is an example of full-wave rectification of an AC voltage, and shows a period T corresponding to a half wavelength of an actual AC voltage waveform as one cycle, and the maximum voltage is different in each cycle. Show.
In this case, for example, it can be seen that the maximum value of the voltage in the period from time R1 to time R2, which is one of the periods T, is the maximum voltage F1 that becomes the intermediate point R1a of the period T as far as the waveform is seen.
However, there are cases where noise as shown in FIG. 2 is generated in the vicinity of the intermediate point R1a. In FIG. 2, the noise is enlarged and exaggerated for easy understanding.
As shown in FIG. 2, for example, when noise F1n larger than the maximum voltage F1 suddenly appears before the intermediate point R1a, the noise F1n is erroneously detected as the maximum voltage.
That is, there is a problem that the impulse noise F1n is erroneously detected as the maximum voltage in one cycle.
Such noise F1n is mainly generated by switching of the power converter, and therefore includes a lot of harmonic components.
Therefore, conventionally, such a noise F1n has been removed by providing a low-pass filter (or a so-called high cut filter) in the voltage measurement system.
JP 2002-218760 A

By the way, for example, harmonic noise can be removed by a low-pass filter such as an FIR filter or an IIR filter. However, since these are product-sum circuits, the circuit scale becomes large, which is suitable for downsizing the entire system. There is no problem.
In addition, it is possible to suppress the influence of the impulse noise F1n and the like by performing an averaging process on the measured voltage. However, since the influence of the averaging process affects the entire voltage waveform, it is calculated by the averaging process. There is a problem that the maximum voltage to be generated is lower than the actual maximum voltage.
Therefore, the present invention has been made in view of the above circumstances, and an object of the present invention is to provide a voltage measurement system capable of measuring the maximum voltage with higher accuracy than in the past by suppressing the influence of noise. is there.

  The problems to be solved by the present invention are as described above. Next, means for solving the problems will be described.

  The voltage measurement system for measuring a voltage by sampling according to claim 1, wherein the rate of change is a rate-of-change comparison means for comparing a rate of change of the sampled voltage and a predetermined reference rate of change, and the rate of change Voltage holding means for holding the value of the sampled voltage when the voltage change rate is judged to be smaller than the reference change rate by the comparison means.

  According to a second aspect of the present invention, the maximum voltage comparing means for comparing the holding voltage held by the voltage holding means and the current maximum voltage, and the maximum voltage comparing means determines that the holding voltage is larger than the current maximum voltage. And a maximum voltage update means for updating the current maximum voltage to the holding voltage.

  As effects of the present invention, the following effects can be obtained.

  The configuration of claim 1 makes it possible to determine the presence or absence of noise for each sampling clock period, unlike a conventional filter circuit such as a low-pass filter that always removes harmonic components. Noise can be removed appropriately in terms of points, and the circuit can be configured simply.

  According to the configuration of the second aspect, it is possible to calculate the maximum voltage for each cycle of the AC voltage waveform based on the voltage from which noise has been appropriately removed. It is possible to prevent erroneous detection such that noise is detected as the maximum voltage.

Hereinafter, the best mode for carrying out the present invention will be described with reference to the accompanying drawings for understanding of the present invention. The following best mode for carrying out the present invention is an example embodying the present invention, and is not intended to limit the technical scope of the present invention.
FIG. 1 is a voltage waveform diagram showing an example of full-wave rectification of an AC voltage, FIG. 2 is a voltage waveform diagram showing an example of a noise generation state, and FIG. 3 is a schematic configuration of a voltage measurement system 1 of the present invention. FIG. 4 is a circuit diagram showing an example of the filter circuit 20 and the comparison circuit 30, and FIG. 5 is a voltage waveform diagram including noise shown in an example of slope calculation for each sampling clock period S. .

<Outline configuration>
First, an example of a schematic configuration of the voltage measurement system of the present invention will be described with reference to a block diagram shown in FIG.
The voltage measurement system 1 includes, for example, an AD converter 10, a filter circuit 20, a comparison circuit 30, and the like.
The AD converter 10 converts, for example, the result of analog measurement of an AC voltage input / output in an RF power supply device by a voltmeter or the like so that it can be digitally processed.
The AD converter 10 acquires, for example, an analog-measured AC voltage in synchronization with a sampling clock having a period of about 100 [μs] and converts it into 12-bit digital data.
The filter circuit 20 is a circuit that removes noise from a digitally converted AC voltage output from the AD converter 11, for example.
For example, the comparison circuit 30 compares the latest AC voltage after noise removal with the maximum voltage until the latest AC voltage is obtained, and outputs the larger value as the maximum voltage.
Hereinafter, the filter circuit 20 and the comparison circuit 30 will be described in detail with reference to FIG.

<Filter circuit 20>
The filter circuit 20 includes two D flip-flop circuits 21 and 25, a slope calculator 22, an absolute value converter 23, and a comparator 24.
The D flip-flop circuit 21 acquires the AC voltage digitally converted by the AD converter 10 from the input terminal D in synchronization with the sampling clock, holds the acquired AC voltage for one pulse with the sampling clock, and outputs the output voltage. Q is output.
That is, from the output terminal Q of the D flip-flop circuit 21, an AC voltage (hereinafter referred to as “the latest AC voltage” already acquired and held one pulse before the latest acquired AC voltage (hereinafter referred to as “latest AC voltage”). Output as “holding AC voltage”).
The slope calculator 22 subtracts the held AC voltage from the latest AC voltage to calculate the slope of the AC voltage for each sampling clock period.
In this case, for example, the latest AC voltage is input to the input terminal A of the slope calculator 22 and the holding AC voltage is input to the input terminal B.
Here, an example of the gradient of the AC voltage for each sampling clock cycle will be described with reference to FIG.
FIG. 5 is an example showing the waveform of the AC voltage from time U1 to time U6, for example. The voltage waveform is shown by a solid line and shows a state in which noise G occurs before and after time U4. ing.
The interval from time U1 to time U6 is the sampling clock period S.
For example, when the voltage P4 is input as the latest AC voltage to the slope calculator 22 at time U4, the held AC voltage becomes the voltage P3.
At this time, the slope calculator 22 calculates the slope of the AC voltage in the sampling clock period S from time U3 to time U4 by performing the calculation of (P4-P3). This inclination can be shown as a straight line J1 (one-dot chain line) as shown in FIG. 5, for example.
In other words, the slope of the AC voltage can be said to be the rate of change of the AC voltage in the sampling clock period S.
The slope calculator 22 can calculate the slope of the AC voltage in the sampling clock period S from time U4 to time U5 by the same arithmetic processing (P5-P4) as described above. This slope is, for example, a straight line J2 (one point). It can be shown as a chain line.

The absolute value converter 23 calculates the absolute value of the subtraction result of the slope calculator 22.
That is, all the slopes calculated by the slope calculator 22 are replaced with positive numbers.
Therefore, for example, the straight line J2 from time U4 to time U5 has a negative slope, but is replaced with a positive slope.
The comparator 24 is an example of a change rate comparison unit that compares the change rate of the AC voltage in each sampling clock period S that has been subjected to absolute value conversion by the absolute value converter 23 with a predetermined reference change rate.
In this case, for example, the reference change rate is input to the input terminal A of the comparator 24 and the AC voltage change rate is input to the input terminal B.
At this time, the comparator 24 outputs a Hi signal from the output terminal O if (reference change rate)> (AC voltage change rate), and if (reference change rate) <(AC voltage change rate). The Lo signal is output from the output terminal O.
Therefore, as the reference change rate, for example, by setting a maximum change rate in a normal state that does not include noise, a straight line having a large change rate such as the straight line J1 or the straight line J2 is calculated. It can be determined that noise such as noise G is generated in the AC voltage.
In other words, according to the above-described example, when the latest AC voltage includes noise, the Lo signal is output from the output terminal O of the comparator 24.

In the D flip-flop circuit 25, the latest AC voltage is input to the input terminal D, and either the Hi signal or the Lo signal output from the comparator 24 is input to the ENA terminal.
In this case, for example, the D flip-flop circuit 25 permits and holds the latest AC voltage from the input terminal D when the Hi signal is input to the ENA terminal.
That is, the D flip-flop circuit 25 is a voltage holding unit that holds the latest AC voltage when the comparator 24 as an example of the change rate comparison unit determines that the change rate of the latest AC voltage is smaller than the reference change rate. It is an example.
Conversely, when the Lo signal is input to the ENA terminal of the D flip-flop circuit 25, noise is included in the latest AC voltage, so that the latest AC voltage is rejected from the input terminal D. Is possible.
Accordingly, the D flip-flop circuit 25 functions as a noise canceller because it holds the latest AC voltage when the latest AC voltage does not contain noise and rejects the input of the latest AC voltage when noise is contained. ing.
In addition, since the filter circuit 20 is configured as described above, the presence or absence of noise is determined for each sampling clock period S, unlike a conventional filter circuit such as a low-pass filter that always removes harmonic components. Therefore, noise can be appropriately removed in a pinpoint manner, and the circuit can be configured simply.

<Comparative circuit 30>
Next, the comparison circuit 30 will be described.
The comparison circuit 30 includes two D flip-flop circuits 32 and 34, a comparator 31, and a counter 33.
The AC voltage from which the noise output from the output terminal Q of the D flip-flop circuit 25 is removed (hereinafter referred to as “noiseless AC voltage”) is input to the input terminal A of the comparator 31.
At this time, an AC voltage that is currently held (hereinafter referred to as “noiseless holding AC voltage”) is output from the output terminal Q of the D flip-flop circuit 32, and is input to the input terminal B of the comparator 31.
That is, the comparator 31 compares the magnitudes of the noiseless AC voltage and the noiseless holding AC voltage.
By the way, since the noiseless holding AC voltage is an old one measured before the noiseless AC voltage, the comparator 31 is, for example, an old voltage value (noiseless holding AC voltage) and a new voltage value (noiseless AC voltage). It can be said that they are comparing the magnitude relations.
The comparator 31 outputs a Hi signal from the output terminal O if (noiseless AC voltage)> (noiseless holding AC voltage), and the output terminal O if (noiseless AC voltage) <(noiseless holding AC voltage). To output a Lo signal.

The Hi signal or Lo signal output from the comparator 31 is input to the ENA terminal of the D flip-flop circuit 32.
When a Hi signal is input to the ENA terminal of the D flip-flop circuit 32, a noiseless AC voltage (new voltage) is input to the input terminal D and held.
In this case, the value held in the D flip-flop circuit 32 is updated to a noiseless AC voltage (new voltage) that is larger than the noiseless holding AC voltage (old voltage).
On the other hand, when the Lo signal is input to the ENA terminal of the D flip-flop circuit 32, the input of the noiseless AC voltage (new voltage) to the input terminal D is rejected, and the D flip-flop circuit 32 is connected to the noiseless holding AC voltage ( Hold the old voltage) and continue to output from the output Q.
Since such processing is performed, when the new voltage (noiseless AC voltage) just output from the filter circuit 20 is larger than the old voltage (noiseless holding AC voltage) already held in the D flip-flop circuit 32, The value held in the D flip-flop circuit 32 can be updated to a new voltage (noiseless AC voltage).
Conversely, if the new voltage (noiseless AC voltage) is smaller than the old voltage (noiseless holding AC voltage) already held in the D flip-flop circuit 32, the value held in the D flip-flop circuit 32 is old. The voltage (noiseless holding AC voltage) can remain.
Therefore, the value held in the D flip-flop circuit 32 is the maximum voltage.
That is, the combination of the comparator 31 and the D flip-flop circuit 32 is, for example, a new voltage (noiseless AC voltage) that is an example of a holding voltage held by the D flip-flop circuit 25 that is an example of a voltage holding unit, and a D flip-flop. When the new voltage (noiseless AC voltage) is large and D is an example of the maximum voltage comparing means for comparing the old voltage (noiseless holding AC voltage) which is an example of the current maximum voltage held in the circuit 32, D It can be said that this is an example of maximum voltage updating means for updating the maximum voltage held in the flip-flop circuit 32.

The D flip-flop circuit 32 outputs the voltage value (that is, the maximum voltage) held by the D flip-flop circuit 32 from the output terminal Q.
The output terminal Q of the D flip-flop circuit 32 is connected to the input terminal D of the D flip-flop circuit 34, and the maximum voltage output from the D flip-flop circuit 32 is D in synchronization with the output pulse of the counter 33. The signal is input to the input terminal D of the flip-flop circuit 34.
For example, when the measurement target of the voltage measurement system 1 is an AC voltage waveform as shown in FIG. 1, the counter 33 counts a period T corresponding to a half wavelength of the AC voltage waveform as one period and outputs an output pulse. It is something that is emitted.
Since such processing is performed, the maximum voltage output from the output terminal Q of the D flip-flop circuit 32 is input to the input terminal D of the D flip-flop circuit 34 every period T. The maximum voltage for each cycle T is output from the output terminal Q of the flip-flop circuit 34.
Therefore, the comparison circuit 30 can calculate the maximum voltage for each cycle of the AC voltage waveform based on the voltage from which the noise has been appropriately removed by the filter circuit 20, so that the voltage waveform is different from the conventional one. Thus, it is possible to prevent erroneous detection such that the impulse noise is detected as the maximum voltage.
In the above description, the configuration of the block diagram as shown in FIG. 3 is described for the configuration in which the noise in the voltage waveform is removed by the digital circuit as shown in FIG. 4 and the maximum voltage is output. Any computer that operates according to an analog circuit or a program can be used as long as it exhibits the same effect as a digital circuit.

The voltage waveform figure which showed the example which carried out the full wave rectification of the alternating voltage. The voltage waveform figure which showed an example of the generation condition of noise. The block diagram which showed schematic structure of the voltage measurement system 1 of this invention. FIG. 3 is a circuit diagram showing an example of a filter circuit 20 and a comparison circuit 30. The voltage waveform diagram containing the noise shown in the example of the inclination calculation for every sampling clock period S. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Voltage measurement system 10 AD converter 20 Filter circuit 21 D flip-flop circuit 22 Inclination calculator 23 Absolute value converter 24 Comparator 25 D flip-flop circuit 30 Comparison circuit 31 Comparator 32 D flip-flop circuit 33 Counter 34 D flip-flop circuit

Claims (2)

A voltage measurement system that measures voltage by sampling,
A rate-of-change comparing means for comparing a voltage rate of change that is the rate of change of the sampled voltage with a predetermined reference rate of change;
Voltage holding means for holding the value of the sampled voltage when it is determined by the change rate comparison means that the voltage change rate is smaller than the reference change rate;
A voltage measurement system comprising: Maximum voltage comparison means for comparing the holding voltage held by the voltage holding means with the current maximum voltage;
Maximum voltage update means for updating the current maximum voltage to the hold voltage when the maximum voltage comparison means determines that the hold voltage is greater than the current maximum voltage;
The voltage measurement system according to claim 1, comprising:

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