JP2006237311A - Nonvolatile semiconductor memory and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress the charging up in the process of a nonvolatile semiconductor memory for discretely storing charges in a laminated insulating film (non-conductive charge trap layer) to reduce the variation of the threshold voltage thereof. <P>SOLUTION: This nonvolatile semiconductor memory for discretely storing the charges in the laminated insulating film 2 is formed on an island-shaped active region surrounded by an embedded insulating film 1a embedded as a middle layer in the substrate and a device isolating and insulating film 3 formed in a predetermined region within the substrate. Further, it comprises a gate insulating film consisting of the laminated insulating film 2 formed on the silicon substrate 1 for discretely storing the charges, a gate electrode 4, and a pair of diffusion regions 5 for functioning as a source or a drain formed in the surface layer of the substrate 1 such that they seem to hold the gate electrode 4 between them. Here, the laminated insulating film 2 consists of a lower oxide film 2a, a silicon nitride film 2b, an upper thermal oxide film 2c, and a CVD oxide film 2d. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a nonvolatile semiconductor memory device that accumulates charges discretely in a laminated insulating film (non-conductive charge trap layer).

  In recent years, a nonvolatile semiconductor memory device that accumulates charges discretely in a laminated insulating film has attracted attention as a technique for realizing high integration and high reliability.

Conventionally, in a nonvolatile semiconductor memory device in which electric charges are stored discretely in a laminated insulating film, the laminated insulating film is usually composed of a stack of a silicon oxide film, a silicon nitride film, and a silicon oxide film. The film is generally formed only by oxidation of a silicon nitride film.
However, in the laminated insulating film having the above structure, there is a problem that when the silicon nitride film is oxidized to form the upper silicon oxide film, the oxidized species penetrates the silicon nitride film and the silicon substrate is oxidized. To do.

  Therefore, the first technology is to make up the silicon oxide film on the silicon nitride film by thinning it and forming a CVD oxide film (deposited silicon oxide film) on the silicon oxide film. 1 (for example, Patent Document 1).

  FIG. 2 is a cross-sectional view showing the structure of a nonvolatile semiconductor memory device in which the silicon oxide film on the silicon nitride film is thinned as described above and the CVD oxide film is formed on the silicon oxide film for the insufficient film thickness. Show.

As shown in FIG. 2, a laminated insulating film 2 is formed as a gate insulating film on a silicon substrate 1 by sequentially laminating a lower oxide film 2a, a silicon nitride film 2b, an upper oxide film 2c, and a CVD oxide film 2d. Has been. The laminated insulating film 2 is used for accumulating electric charges. The technique for forming the upper oxide film 2c and the CVD oxide film 2d on the silicon nitride film 2b is an important technique particularly when the ONO film is thinned as the miniaturization proceeds.
JP 2001-77220 A

  Now, in the nonvolatile semiconductor memory device that accumulates charges discretely in the laminated insulating film, there is a problem that the threshold voltage tends to fluctuate due to charging during the process.

  For example, in a process using various plasmas after forming the gate electrode (for example, a dry etching process, a CVD process, etc.), charges may pass through the gate insulating film (this is called plasma damage). . At this time, in a normal transistor, the charge only passes through the gate insulating film. However, in the case of a nonvolatile semiconductor memory device that accumulates charge in the laminated insulating film, the laminated insulating film that accumulates the charge becomes the gate insulating film. Therefore, a part of the passed charge is trapped in the laminated insulating film, and threshold voltage variation is likely to occur.

  However, recently, we have found that when the film on the silicon nitride film is formed with a two-layer structure of thermal oxidation and CVD as in the prior art, the variation in threshold voltage increases.

  FIG. 3 shows a comparison of memory cell threshold voltage variations when the oxide film on the silicon nitride film is formed only by oxidation of the silicon nitride film and when the silicon nitride film is formed by stacking thermal oxidation and deposition by CVD. It is. When the silicon nitride film is formed by thermal oxidation and deposition by CVD, the total film thickness is made the same as that of the sample formed only by oxidation by reducing the amount of oxidation of the nitride film.

As shown in FIG. 3, when the CVD method is used, the variation is clearly large. The cause of this is either a large number of charge trapping sites in the CVD film itself or an increase in the number of trapping sites due to a reduction in the amount of oxidation, but this is not clear at present.
In any case, when miniaturization progresses and the oxide film on the silicon nitride film is laminated with thermal oxidation and a CVD film, it is obvious that charging during the process becomes a big problem.

  Therefore, in view of the above problems, an object of the present invention is to store charges in a discrete manner in a laminated insulating film, and in particular, a nonvolatile semiconductor in which an oxide film on a silicon nitride film is composed of a laminated layer of a thermal oxide film and a CVD film It is an object of the present invention to provide a nonvolatile semiconductor memory device that suppresses charge-up during the process and reduces threshold voltage variations in the memory device.

  In order to solve the above-described problem, in the nonvolatile semiconductor memory device according to claim 1 of the present invention, an active region is formed between element isolation insulating films formed in a predetermined region in the substrate, and is formed on the active region. A non-volatile semiconductor storage device for storing charges discretely in a non-conductive charge trap layer formed on the substrate, wherein the non-conductive charge trap layer comprises a laminated film including at least a deposited silicon oxide film, By embedding a buried insulating film, the active region is surrounded by the buried insulating film and the element isolation insulating film.

  The non-volatile semiconductor memory device according to claim 2 is the non-volatile semiconductor memory device according to claim 1, wherein the non-conductive load trapping layer includes a lower silicon oxide film, an intermediate silicon nitride film, and an upper silicon oxide film. The upper silicon oxide film includes a thermal silicon oxide film and the deposited silicon oxide film.

  The nonvolatile semiconductor memory device according to claim 3 is the nonvolatile semiconductor memory device according to claim 1 or 2, wherein one memory cell is formed in the active region.

  A nonvolatile semiconductor memory device according to a fourth aspect is the nonvolatile semiconductor memory device according to the first or second aspect, wherein a plurality of memory cells are formed in the active region.

  A nonvolatile semiconductor memory device according to a fifth aspect is the nonvolatile semiconductor memory device according to the first, second, third or fourth aspect, wherein the potential of the well region formed in the active region can be controlled.

  7. The method of manufacturing a nonvolatile semiconductor memory device according to claim 6, wherein the nonvolatile semiconductor memory device is configured to discretely store charges in a non-conductive charge trap layer formed on the substrate, An SOI forming step of forming a buried insulating film in an intermediate layer; and a buried type element isolation insulating film in a predetermined region in the substrate so that a bottom portion of the element isolation insulating film is connected to the buried insulating film, Forming an active region surrounded by the buried insulating film and the element isolation insulating film; and thermally oxidizing the lower silicon oxide film, the middle silicon nitride film, and the silicon nitride film on the active region; A non-conductive charge trapping layer composed of an upper silicon oxide film including a thermal silicon oxide film formed by CVD and a deposited silicon oxide film formed by CVD. And forming a gate insulating film, forming a gate electrode on the gate insulating layer, and forming a diffusion layer in said active region which sandwich the gate electrode.

  According to the nonvolatile semiconductor memory device of the first aspect of the present invention, the active region is surrounded by the buried insulating film and the element isolation insulating film by embedding the buried insulating film in the middle layer of the substrate. Is completely surrounded by an insulating film. For this reason, even if the wafer is irradiated with plasma, the path from the gate to the substrate is blocked, so that no current passes. Accordingly, accumulation of electric charges in the trap layer during the process can be suppressed, and variations in threshold voltage can be reduced. In addition, the non-conductive charge trapping layer is formed of a laminated film including at least a deposited silicon oxide film, so that when the non-conductive charge trapping layer is formed as in the prior art, the oxidizing species penetrates and oxidizes the substrate. There is no end.

  3. The nonvolatile semiconductor memory device according to claim 1, wherein the non-conductive charge trap layer includes a lower silicon oxide film, a middle silicon nitride film, and an upper silicon oxide film, and the upper silicon oxide film. Preferably includes a thermal silicon oxide film and a deposited silicon oxide film. By adopting such a configuration, the silicon nitride film is particularly effective because it is a film that easily traps charges.

  According to a third aspect of the present invention, in the nonvolatile semiconductor memory device according to the first or second aspect, it is preferable that one memory cell is formed in the active region. With such a configuration, the area of each active region is reduced, so that the minimum transient current is obtained.

  According to a fourth aspect of the present invention, in the nonvolatile semiconductor memory device according to the first or second aspect, a plurality of memory cells are preferably formed in the active region. With such a configuration, the chip area can be reduced.

  According to a fifth aspect of the present invention, in the nonvolatile semiconductor memory device according to the first, second, third, or fourth aspect, it is preferable that the potential of the well region formed in the active region can be controlled. With such a configuration, a write / erase operation can be performed stably.

  According to the nonvolatile semiconductor memory device of the present invention, the SOI forming step of forming the buried insulating film in the middle layer of the substrate and the element isolation insulating film of the buried type in the predetermined region in the substrate are separated. Forming the active region so that the bottom of the film is connected to the buried insulating film and surrounded by the buried insulating film and the element isolation insulating film, so that the active region is completely surrounded by the insulating film It becomes the composition. For this reason, even if the wafer is irradiated with plasma, the path from the gate to the substrate is blocked, so that no current passes. Therefore, no charge is accumulated in the trap layer during the process, so that variations in threshold voltage can be suppressed.

  Hereinafter, a nonvolatile semiconductor memory device and a manufacturing method thereof according to an embodiment of the present invention will be described with reference to FIG.

  1A to 1F are process cross-sectional views illustrating a method for manufacturing a nonvolatile semiconductor memory device according to an embodiment of the present invention.

  This non-volatile semiconductor memory device stores charges discretely in a non-conductive charge trap layer 2 formed on a substrate 1, and a buried insulating film 1 a embedded in the middle layer of the substrate 1 and the substrate 1 It is formed on an active region formed in an island shape surrounded by the element isolation insulating film 3 formed in a predetermined region. The non-conductive charge trap layer 2 is composed of a laminated film including at least a deposited silicon oxide film 2d. Hereinafter, a method for manufacturing a nonvolatile semiconductor memory device will be described.

  1A, an insulating layer (SOI (silicon on insulator) substrate in which a buried oxide film 1a is formed) is prepared as a middle layer of a semiconductor substrate, and then to the depth of the buried oxide film 1a. A trench is formed in the SOI substrate 1 so as to reach, and the trench is filled with an insulating film, thereby forming an isolation insulating film 3.

  Next, as shown in FIG. 1B, a lower oxide film 2a having a thickness of 7 nm is formed over the entire SOI substrate 1 by heat treatment at 900 ° C. in an oxidizing atmosphere. Next, a silicon nitride film 2b having a thickness of 15 nm is formed on the lower oxide film 2a by LPCVD at 700 ° C. Next, an upper oxide film 2c having a thickness of 2 nm is formed on the silicon nitride film 2b by heat treatment at 1000 ° C. in an oxidizing atmosphere. Next, a CVD oxide film (deposited silicon oxide film) 2d having a thickness of 7 nm is formed on the upper oxide film 2c by LPCVD at 800 ° C. Thus, the laminated insulating film 2 forms a laminated insulating film 2 (ONO film) composed of the lower oxide film 2a, the silicon nitride film 2b, the upper oxide film 2c, and the CVD oxide film 2d. The laminated insulating film 2 forms a nonconductive charge trap layer.

  Next, as shown in FIG. 1C, a polycrystalline silicon film having a thickness of 200 nm is formed on the laminated insulating film 2 by LPCVD at 600 ° C., and this polycrystalline silicon film is selectively formed. The gate electrode 4 is formed by etching.

  At this time, as shown in FIG. 1C, the laminated insulating film 2 may be continuously etched in the same step as the step of forming the gate electrode 4.

Next, as shown in FIG. 1D, using the gate electrode 4 as a mask, for example, along the normal direction of the main surface of the silicon substrate 1 (at a tilt of 0 degree with respect to the normal direction), 30 KeV A source / drain diffusion region that functions as a source or drain in the surface layer of the silicon substrate 1 by implanting arsenic ions into the silicon substrate 1 at an implantation energy and an implantation dose of 3 × 10 ¹⁵ atoms / cm ^−2. 5 is completed, and a memory transistor, that is, a nonvolatile semiconductor memory device is completed.

  With such a configuration, since the active region in which the nonvolatile semiconductor memory device is formed is formed in an island shape, there is no path for current to flow to the substrate even if the wafer is exposed to plasma in a process such as dry etching, No current flows. Accordingly, since charging into the laminated insulating film during the process is suppressed, variation in threshold voltage can be suppressed.

  Note that one memory cell or a plurality of memory cells may be formed in the active region. The potential of the well region formed in the active region may be controllable.

  The nonvolatile semiconductor memory device according to the present invention is capable of effectively suppressing charging during the process, and particularly in the stacked insulating film in which the upper oxide film is formed by stacking the thermal oxide film and the CVD film. It is useful in a nonvolatile semiconductor memory device that accumulates charges in a discrete manner.

(A)-(d) is process sectional drawing which shows the manufacturing method of the non-volatile semiconductor memory device which concerns on embodiment of this invention. It is sectional drawing which shows the non-volatile semiconductor memory device structure concerning a 1st prior art example. It is a graph which shows the dependence of memory cell threshold voltage variation on a laminated insulating film configuration.

Explanation of symbols

1a buried insulating film 1 silicon substrate 2a lower oxide film 2b silicon nitride film 2c upper oxide film 2d CVD oxide film 2 laminated insulating film 3 isolation insulating film 4 gate electrode 5 source drain diffusion layer

Claims (6)

A non-volatile semiconductor memory device in which an active region is formed between element isolation insulating films formed in a predetermined region in a substrate, and charges are discretely stored in a non-conductive charge trap layer formed on the active region. And
The non-conductive charge trap layer is formed of a laminated film including at least a deposited silicon oxide film, and an embedded insulating film is embedded in the middle layer of the substrate so that the active region is formed by the embedded insulating film and the element isolation insulating film. A non-volatile semiconductor memory device characterized by being surrounded.   The non-conductive charge trap layer includes a lower silicon oxide film, a middle silicon nitride film, and an upper silicon oxide film, and the upper silicon oxide film includes a thermal silicon oxide film and the deposited silicon oxide film. Item 12. A nonvolatile semiconductor memory device according to Item 1.   The nonvolatile semiconductor memory device according to claim 1, wherein one memory cell is formed in the active region.   The nonvolatile semiconductor memory device according to claim 1, wherein a plurality of memory cells are formed in the active region.   5. The nonvolatile semiconductor memory device according to claim 1, wherein the potential of the well region formed in the active region can be controlled. A method for manufacturing a non-volatile semiconductor memory device, wherein charges are discretely stored in a non-conductive charge trap layer formed on a substrate,
An SOI formation step of forming a buried insulating film in the middle layer of the substrate;
A buried element isolation insulating film is formed in a predetermined region of the substrate so that a bottom portion of the element isolation insulating film is connected to the buried insulating film, and is surrounded by the buried insulating film and the element isolation insulating film. Forming an active region as follows:
On the active region, a lower silicon oxide film, a middle silicon nitride film, a thermal silicon oxide film formed by thermally oxidizing the silicon nitride film, and a deposited silicon oxide film formed using a CVD method Forming a gate insulating film made of a non-conductive charge trapping layer composed of an upper silicon oxide film containing,
Forming a gate electrode on the gate insulating film;
And a step of forming a diffusion layer in the active region sandwiching the gate electrode.

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