JP2006135140A - Laminated electronic component - Google Patents

Laminated electronic component Download PDF

Info

Publication number
JP2006135140A
JP2006135140A JP2004323383A JP2004323383A JP2006135140A JP 2006135140 A JP2006135140 A JP 2006135140A JP 2004323383 A JP2004323383 A JP 2004323383A JP 2004323383 A JP2004323383 A JP 2004323383A JP 2006135140 A JP2006135140 A JP 2006135140A
Authority
JP
Japan
Prior art keywords
electronic component
electrode
shield electrode
laminate
multilayer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2004323383A
Other languages
Japanese (ja)
Other versions
JP4507836B2 (en
Inventor
Ichiro Kameyama
一郎 亀山
Kenji Nozoe
研治 野添
Akio Hirasawa
明雄 平澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2004323383A priority Critical patent/JP4507836B2/en
Publication of JP2006135140A publication Critical patent/JP2006135140A/en
Application granted granted Critical
Publication of JP4507836B2 publication Critical patent/JP4507836B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

<P>PROBLEM TO BE SOLVED: To improve shielding properties in a laminated electronic component for the laminated electronic component used for various kinds of electronic equipment. <P>SOLUTION: A shield electrode 11 provided in the laminated electronic component is provided on the lower surface of a laminate 6, the surface of the shield electrode 11 except the prescribed portion is covered with an insulating coating film layer 13, and the exposed portion of the shield electrode 11 is set to be a terminal electrode 12, thus substantially achieving a structure in which the shield electrode is grounded directly, and hence increasing the shielding properties in the laminated electronic component. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、各種電子機器に用いられる積層型電子部品に関するものである。   The present invention relates to a multilayer electronic component used in various electronic devices.

一般に積層体の内層部分において内部電極により高周波回路などの電子回路を形成する積層型電子部品は、図5に示されるように積層体1の内部において内部電極2によって所定の電子回路を形成し、この積層体1の内部で形成された電子回路を積層体1の外側面に設けられた端子電極3によって外部に導出する構造となっている。   In general, a multilayer electronic component that forms an electronic circuit such as a high-frequency circuit with an internal electrode in an inner layer portion of a multilayer body forms a predetermined electronic circuit with the internal electrode 2 inside the multilayer body 1, as shown in FIG. The electronic circuit formed inside the laminate 1 is led out to the outside by a terminal electrode 3 provided on the outer surface of the laminate 1.

そして、このような積層型電子部品においては内部電極2によって形成される電子回路に対して外部からの影響を防止するため、積層体1の下層領域すなわち電子回路を形成する内部電極領域より下層側にシールド電極4を配置し、このシールド電極4をビアホール5を介して積層体1の下面に設けられた外部接続用の端子電極3に接続していた。   In such a multilayer electronic component, in order to prevent external influence on the electronic circuit formed by the internal electrode 2, the lower layer region of the multilayer body 1, that is, the lower layer side than the internal electrode region forming the electronic circuit The shield electrode 4 is disposed on the shield electrode 4, and the shield electrode 4 is connected to the terminal electrode 3 for external connection provided on the lower surface of the multilayer body 1 through the via hole 5.

なお、この出願の発明に関する先行技術文献情報としては、例えば、特許文献1が知られている。
特開2003−273275号公報
As prior art document information relating to the invention of this application, for example, Patent Document 1 is known.
JP 2003-273275 A

しかしながら、シールド電極4は端子電極3を介して接地することでそのシールド性を確保するのであるが、柱状導体における部分的な接続手法であるビアホール5は必然的にインピーダンスが高くなってしまうため、シールド電極4から端子電極3に至る電荷の流れが阻害されてしまうため、結果的に積層型電子部品において高いシールド性を確保することが困難なものとなっていた。   However, although the shield electrode 4 is grounded via the terminal electrode 3 to ensure its shielding property, the via hole 5 which is a partial connection method in the columnar conductor inevitably increases the impedance. Since the flow of charge from the shield electrode 4 to the terminal electrode 3 is hindered, it is difficult to ensure high shielding performance in the multilayer electronic component as a result.

そこで、本発明はこのような問題を解決し、積層型電子部品におけるシールド性向上を目的とする。   Therefore, the present invention aims to solve such problems and improve the shielding performance in multilayer electronic components.

この目的を達成するために本発明は、積層型電子部品に設けられるシールド電極が積層体の下面に設けられるとともに、その所定部分を除くシールド電極の表面を絶縁被膜層で覆い、このシールド電極の露出部分を端子電極とした構造としたのである。   In order to achieve this object, according to the present invention, a shield electrode provided in a multilayer electronic component is provided on the lower surface of the multilayer body, and the surface of the shield electrode except for a predetermined portion thereof is covered with an insulating coating layer. The exposed portion is a terminal electrode.

このような構成とすることで、シールド電極内に端子電極が形成されるので、実質的にシールド電極が直接接地される構造となるので、積層型電子部品のシールド性を向上させることができるのである。   With such a configuration, since the terminal electrode is formed in the shield electrode, the shield electrode is substantially directly grounded, so that the shielding property of the multilayer electronic component can be improved. is there.

以下、本発明の一実施形態について図を用いて説明する。   Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

図1は本発明の積層型電子部品を模式的に示した断面図であり、複数の誘電体層で形成された積層体6の内層部分において図2に示されるようなコンデンサ7やストリップライン8を用いた高周波フィルタ回路などの電子回路が内部電極9によって形成されるとともに、破線で囲まれた電子回路を形成する回路形成領域10の下方に積層型電子部品のシールド性を確保するシールド電極11が配置された構造となっている。   FIG. 1 is a cross-sectional view schematically showing a multilayer electronic component according to the present invention. In the inner layer portion of a multilayer body 6 formed of a plurality of dielectric layers, capacitors 7 and strip lines 8 as shown in FIG. An electronic circuit, such as a high-frequency filter circuit using, is formed by the internal electrode 9, and a shield electrode 11 that secures the shielding property of the multilayer electronic component below the circuit forming region 10 that forms the electronic circuit surrounded by a broken line The structure is arranged.

また、積層体6を構成する誘電体層は、フィラーとなる誘電体セラミックスにガラスを添加した低温焼成材料により形成され、内部電極9を形成する銀系電極ペーストと同時焼成できるものとなっており、後に詳述するが、未焼結の誘電体層を形成するグリーンシート上に適宜内部電極9を形成し、それらを積み重ね同時焼成することにより形成されるものである。   The dielectric layer constituting the laminate 6 is formed of a low-temperature fired material in which glass is added to dielectric ceramic as a filler, and can be fired simultaneously with the silver-based electrode paste forming the internal electrode 9. As will be described in detail later, the internal electrode 9 is appropriately formed on a green sheet for forming an unsintered dielectric layer, and these are stacked and fired simultaneously.

そして、この積層型電子部品はその実装面となる下面側の構成が、積層体6の下面の略全面にシールド電極11が設けられ、このシールド電極11における外部接続領域、つまり端子電極12となる領域を除いて絶縁被膜層13が形成された構成となっている。   In this multilayer electronic component, the configuration on the lower surface side which is the mounting surface is provided with a shield electrode 11 on substantially the entire lower surface of the multilayer body 6, and becomes an external connection region in this shield electrode 11, that is, a terminal electrode 12. The insulating coating layer 13 is formed except for the region.

すなわち、この構成によればシールド電極11に対して直接的に端子電極12が形成された構成となるので、図5に示される従来の積層型電子部品のように端子電極3とシールド電極4を接続するためのビアホール5を必要とせず、このビアホール5のインピーダンスが高いことに起因したシールド性の低下を防止できるので、結果的に積層型電子部品のシールド性を向上させることができるのである。   That is, according to this configuration, since the terminal electrode 12 is formed directly on the shield electrode 11, the terminal electrode 3 and the shield electrode 4 are connected as in the conventional multilayer electronic component shown in FIG. A via hole 5 for connection is not required, and a reduction in shielding property due to the high impedance of the via hole 5 can be prevented, and as a result, the shielding property of the multilayer electronic component can be improved.

また、この積層型電子部品を形成する場合、図3に示されるように支持フィルム14上に形成されたグリーンシート15に電極形成し、この電極形成されたグリーンシート15を積み重ねて支持フィルム14を剥離させ、これを繰り返すことにより積層体6を形成し、この積層体6をプレス機16を用いて所定の厚みに加圧成形し、その後焼成炉にて焼成するという一般的な積層工程をもって形成される。   Further, when forming this multilayer electronic component, as shown in FIG. 3, electrodes are formed on the green sheet 15 formed on the support film 14, and the green sheets 15 formed with the electrodes are stacked to form the support film 14. The laminate 6 is formed by peeling and repeating, and the laminate 6 is formed by a general lamination process in which the laminate 6 is pressure-molded to a predetermined thickness using a press 16 and then fired in a firing furnace. Is done.

なお、シールド電極11は全てのグリーンシート15を積層した後に、この積層体6上にシールド電極11を印刷し、さらにこのシールド電極11の表面に積層体6を形成するグリーンシート15と同様の材料を主成分とする絶縁被膜層13となる誘電体ペースト17を印刷し、その後、先に述べたように加圧成形及び焼成を施すことにより形成している。なお絶縁被膜層は絶縁ペースト17を用いるのではなく、グリーンシート状のものを用いることもできる。   The shield electrode 11 is made of the same material as that of the green sheet 15 in which all the green sheets 15 are laminated and then the shield electrode 11 is printed on the laminate 6 and the laminate 6 is formed on the surface of the shield electrode 11. It is formed by printing the dielectric paste 17 which becomes the insulating coating layer 13 containing as a main component, and then performing pressure molding and baking as described above. Note that the insulating coating layer may be a green sheet instead of the insulating paste 17.

そして、このような積層型電子部品においては、シールド電極11が先にも述べたように積層型電子部品のシールド性を確保するためのものであることから、グリーンシート15の略全面にわたって設けられるものであるため、図5に示されるような従来の構造であれば、積層体1を形成するグリーンシート間の接合がシールド電極4の外方領域つまり積層体1の外周端領域となってしまう。   In such a multilayer electronic component, since the shield electrode 11 is for ensuring the shielding property of the multilayer electronic component as described above, it is provided over substantially the entire surface of the green sheet 15. Therefore, in the conventional structure as shown in FIG. 5, the bonding between the green sheets forming the laminate 1 becomes the outer region of the shield electrode 4, that is, the outer peripheral end region of the laminate 1. .

そして、このような状態でシールド電極4の厚みを大きくしてしまうとグリーンシートを積み重ねた際シールド電極4の端部周辺において接合されるグリーンシート間に空隙が生じてしまうためグリーンシート間の接合強度が確保し難く、このためこのグリーンシートにおける支持フィルムの剥離が難しくなるので、この空隙を小さくすることが重要となることからシールド電極4の厚みを薄く設定しなければならなくなる。   If the thickness of the shield electrode 4 is increased in such a state, when the green sheets are stacked, a gap is generated between the green sheets joined around the end of the shield electrode 4. Since it is difficult to ensure the strength and, therefore, it is difficult to peel off the support film on the green sheet, it is important to reduce the gap, and thus the thickness of the shield electrode 4 must be set thin.

しかしながら、シールド電極4の厚みを薄く設定した場合、シールド電極4の端部が非常に鋭角に形成されてしまうためその部分に電荷集中してしまい、この場合においてもシールド電極4の内部における電荷の流れが悪くなりシールド性の低下を招く要因となるのであるが、図1に示される積層型電子部品のように積層体6の下面にシールド電極11を形成しその表面に、別途、絶縁被膜層13を形成するといった構成とすることにより、シールド電極11はグリーンシート15間に挟まれる構成とはならないのでシールド電極11の厚みを大きく設定することが可能となりシールド電極11内部における電荷集中を防止でき、積層型電子部品のシールド性をより向上できるものとなっている。   However, when the thickness of the shield electrode 4 is set to be thin, the end portion of the shield electrode 4 is formed at a very acute angle, so that the charge is concentrated on that portion. In this case as well, the charge inside the shield electrode 4 is reduced. Although the flow becomes worse and causes a reduction in shielding performance, a shield electrode 11 is formed on the lower surface of the multilayer body 6 as in the multilayer electronic component shown in FIG. By forming the shield 13, the shield electrode 11 is not sandwiched between the green sheets 15, so that the thickness of the shield electrode 11 can be set large, and charge concentration inside the shield electrode 11 can be prevented. Thus, the shielding property of the multilayer electronic component can be further improved.

なお、先にも述べたように積層体6を形成するグリーンシート15を積み重ねその表面に絶縁被膜層13を形成し加圧成形することにより、シールド電極11における端子電極12の領域を除く部分が積層体6に埋設され、積層体6の下面において積層体6の表面と端子電極12の表面と絶縁被膜層13の表面が同一平面内となるように形成されるので、積層型電子部品の実装面の平坦度が向上し、結果として積層型電子部品の実装性を高めることができるのである。   As described above, the green sheet 15 forming the laminate 6 is stacked, and the insulating coating layer 13 is formed on the surface of the green sheet 15 and pressure-molded, so that the portion of the shield electrode 11 excluding the region of the terminal electrode 12 is removed. Since the surface of the multilayer body 6, the surface of the terminal electrode 12, and the surface of the insulating coating layer 13 are formed in the same plane on the lower surface of the multilayer body 6, the multilayer electronic component is mounted. The flatness of the surface is improved, and as a result, the mountability of the multilayer electronic component can be improved.

また、図4に示されるように、焼成後の端子電極12の表面にその周辺領域を含むように表層電極18を後焼き付けにより形成することで、表層電極18は同系材料により形成される端子電極12との接合強度が大きく、その周辺領域となる絶縁被膜層13との接合強度が低い状態が形成されることになり、この結果、積層型電子部品を実装基板(特に図示せず)に実装した際、この実装基板の曲げや落下により生じる応力は先ず端子電極12の外周部分に集中的に加わるのであるが、この外部応力が集中する端子電極12の外周領域の密着強度は予め低く設定されているため、この部分における積層体6に加わる応力が低減でき、この端子電極12を介して積層型電子部品に加わる応力を低減できるので、これによりこの応力による積層型電子部品のクラック発生を抑制できるのである。   Further, as shown in FIG. 4, the surface electrode 18 is formed by post-baking so as to include the peripheral region on the surface of the fired terminal electrode 12, so that the surface electrode 18 is formed of a similar material. As a result, the laminated electronic component is mounted on a mounting substrate (not shown). In this case, the stress generated by bending or dropping of the mounting substrate is first concentrated on the outer peripheral portion of the terminal electrode 12, but the adhesion strength of the outer peripheral region of the terminal electrode 12 where the external stress is concentrated is set to be low in advance. Therefore, the stress applied to the multilayer body 6 in this portion can be reduced, and the stress applied to the multilayer electronic component via the terminal electrode 12 can be reduced. You can suppress the cracking of the child component.

なお、この実施形態においては積層型電子部品で形成する電子回路を高周波フィルタ回路を挙げて説明したのであるが、本発明はこの構成に限定されるものではなく、積層体6の内層部分において所定の電子回路の全て或いは部分的に形成したもので、そのシールド性を確保するシールド電極11を要する形態であれば同様の効果を奏するものである。   In this embodiment, the electronic circuit formed by the multilayer electronic component has been described by taking a high frequency filter circuit as an example. However, the present invention is not limited to this configuration, and a predetermined amount is provided in the inner layer portion of the multilayer body 6. The electronic circuit is entirely or partially formed, and the same effect can be obtained as long as the shield electrode 11 that secures the shielding property is required.

また、積層体6を形成する材料として誘電体にガラスを添加し低温焼成を実現した、いわゆる低温焼成誘電体を挙げて説明したが、他の材料として酸化ビスマスなどの低融点酸化物を主成分とする低温焼成材料を用いた誘電体を使用しても同様の効果を奏するものである。   In addition, as a material for forming the laminated body 6, a so-called low-temperature fired dielectric material in which glass is added to the dielectric material to achieve low-temperature firing has been described. Even if a dielectric using a low-temperature fired material is used, the same effect can be obtained.

本発明の積層型電子部品によれば、積層型電子部品のシールド性を向上できるという効果を有し、特に電子回路として高周波回路を形成する積層型電子部品に有用である。   The multilayer electronic component of the present invention has an effect that the shielding property of the multilayer electronic component can be improved, and is particularly useful for a multilayer electronic component that forms a high-frequency circuit as an electronic circuit.

本発明の一実施形態における積層型電子部品を模式的に示す断面図Sectional drawing which shows typically the multilayer electronic component in one Embodiment of this invention 同積層型電子部品によって形成される電子回路の一例を示す回路図Circuit diagram showing an example of an electronic circuit formed by the multilayer electronic component 同積層型電子部品の製造方法を示す模式図Schematic diagram showing the method for manufacturing the same multilayer electronic component 同積層型電子部品における他の端子電極形態を示す断面図Sectional drawing which shows the other terminal electrode form in the same multilayer electronic component 従来の積層型電子部品を模式的に示す断面図Sectional view schematically showing a conventional multilayer electronic component

符号の説明Explanation of symbols

6 積層体
9 内部電極
11 シールド電極
12 端子電極
13 絶縁被膜層
6 Laminate 9 Internal electrode 11 Shield electrode 12 Terminal electrode 13 Insulating coating layer

Claims (3)

複数の誘電体層からなる積層体と、この積層体内に設けられ所定の電子回路を形成する内部電極と、前記積層体において前記内部電極より電子回路を形成する領域より下側に設けられるシールド電極と、このシールド電極を外部接続する端子電極を備え、前記シールド電極は前記積層体の下面に設けられるとともに、その所定部分を除く前記シールド電極の表面を絶縁被膜層で覆い、前記シールド電極の露出部分を前記端子電極としたことを特徴とする積層型電子部品。 A laminate comprising a plurality of dielectric layers, an internal electrode provided in the laminate and forming a predetermined electronic circuit, and a shield electrode provided below a region of the laminate that forms an electronic circuit from the internal electrode And a terminal electrode for externally connecting the shield electrode, the shield electrode is provided on the lower surface of the laminate, and the surface of the shield electrode except for a predetermined portion thereof is covered with an insulating coating layer, and the shield electrode is exposed. A laminated electronic component characterized in that the portion is the terminal electrode. 積層体の下面において端子電極の表面と絶縁被膜層の表面及び積層体の表面を略同一平面内に形成したことを特徴とする請求項1に記載の積層型電子部品。 2. The multilayer electronic component according to claim 1, wherein the surface of the terminal electrode, the surface of the insulating coating layer, and the surface of the multilayer body are formed in substantially the same plane on the lower surface of the multilayer body. 端子電極の露出面及び前記露出面の周辺領域に表層電極を形成したことを特徴とする請求項1に記載の積層型電子部品。 2. The multilayer electronic component according to claim 1, wherein a surface layer electrode is formed on an exposed surface of the terminal electrode and a peripheral region of the exposed surface.
JP2004323383A 2004-11-08 2004-11-08 Multilayer electronic components Expired - Fee Related JP4507836B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004323383A JP4507836B2 (en) 2004-11-08 2004-11-08 Multilayer electronic components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004323383A JP4507836B2 (en) 2004-11-08 2004-11-08 Multilayer electronic components

Publications (2)

Publication Number Publication Date
JP2006135140A true JP2006135140A (en) 2006-05-25
JP4507836B2 JP4507836B2 (en) 2010-07-21

Family

ID=36728403

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004323383A Expired - Fee Related JP4507836B2 (en) 2004-11-08 2004-11-08 Multilayer electronic components

Country Status (1)

Country Link
JP (1) JP4507836B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019053953A1 (en) * 2017-09-12 2019-03-21 株式会社村田製作所 Laminated capacitor and circuit module

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003273275A (en) * 2002-03-19 2003-09-26 Matsushita Electric Ind Co Ltd High-frequency composite component

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003273275A (en) * 2002-03-19 2003-09-26 Matsushita Electric Ind Co Ltd High-frequency composite component

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019053953A1 (en) * 2017-09-12 2019-03-21 株式会社村田製作所 Laminated capacitor and circuit module

Also Published As

Publication number Publication date
JP4507836B2 (en) 2010-07-21

Similar Documents

Publication Publication Date Title
JP4270395B2 (en) Multilayer ceramic electronic components
KR101397835B1 (en) Multi-layered ceramic electronic parts and method of manufacturing the same
JP2012227198A (en) Multilayer ceramic capacitor
JP2014179578A (en) Multilayer ceramic electronic component for incorporating board and printed circuit board incorporating multilayer ceramic electronic component
TW201909209A (en) Electronic component and method of manufacturing electronic component
JP4788544B2 (en) Multilayer ceramic substrate and manufacturing method thereof
WO2012132726A1 (en) Electronic component
JP2012227197A (en) Multilayer ceramic capacitor
JP2000012377A (en) Laminated ceramic electronic component and manufacture of the same
JP2007067239A (en) Chip-type capacitor
JP2002015939A (en) Multilayered electronic component and its manufacturing method
JP2005159056A (en) Laminated ceramic electronic component
JP4507837B2 (en) Manufacturing method of multilayer electronic component
JP4507836B2 (en) Multilayer electronic components
JP2000106322A (en) Laminated ceramic capacitor
WO2011152085A1 (en) Method for producing integrated substrate
JP4797362B2 (en) Multilayer electronic components
JP2002270989A (en) Ceramic electronic part and manufacturing method therefor
JP5838978B2 (en) Ceramic laminated parts
JP2006041345A (en) Laminated substrate and its manufacturing method
WO2024090008A1 (en) Multilayer ceramic capacitor
JPH1065341A (en) Manufacturing method of multilayer ceramic board
JP2006041319A (en) Surface-mounted multiple capacitor and mounting structure thereof
JP2011243896A (en) Ceramic multilayer substrate and electronic module
JP2005136173A (en) Capacitor

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20071005

RD01 Notification of change of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7421

Effective date: 20071113

RD01 Notification of change of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7421

Effective date: 20091120

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20091221

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100105

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100209

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20100413

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20100426

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130514

Year of fee payment: 3

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130514

Year of fee payment: 3

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130514

Year of fee payment: 3

LAPS Cancellation because of no payment of annual fees