JP2006128646A - Electronic device and heterojunction fet - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic device which can achieve a high withstand voltage by uniformly distributing an electric field between electrodes, using a simple configuration. <P>SOLUTION: A gate Schottky electrode 106 is formed on an active layer made up of a GaN layer 102 and an AlGaN layer 103, and a source ohmic electrode 105 and a drain ohmic electrode 107 are formed on the active layer and on both sides of the gate Schottky electrode 106. A dielectic layer (TiO<SB>2</SB>layers 108, 109, and 110), having a step-like laminated structure, is formed on the AlGaN layer 103 so that the electric field is almost uniformly distributed between the gate Schottky electrode 106 and the drain ohmic electrode 107. The permittivity of TiO<SB>2</SB>of the dielectric layer is set higher than those of GaN or of AlGaN of the active layer. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an electronic device and a heterojunction FET (Field Effect Transistor), and is particularly suitable for a GaN heterojunction FET.

Conventionally, as an electronic device, there is a GaN heterojunction FET shown in FIG. 11 (see, for example, (Non-Patent Document 1)). FIG. 11 shows a cross-sectional view of the GaN heterojunction FET. As shown in FIG. 11, this GaN heterojunction FET consists of a GaN layer 1102 made of undoped GaN with a thickness of about 3 μm and an undoped Al _0.5 Ga _0.5 N with a thickness of 20 nm on a sapphire substrate 1101. An Al _0.5 Ga _0.5 N layer 1103 is formed in sequence, and a source ohmic electrode 1105 made of Ti / Al / Ni / Au is formed on the Al _0.5 Ga _0.5 N layer 1103, and Ni / Au. A gate Schottky electrode 1106 made of and a drain ohmic electrode 1107 made of Ti / Al / Ni / Au are sequentially formed. 2DEG (2 Dimensional Electron Gas) 1104 is generated in the boundary region between the GaN layer 1102 and the Al _0.5 Ga _0.5 N layer 1103. The concentration of 2DEG is 8 × 10 ¹² cm ⁻² . Further, an isolation mesa 1112 for element isolation is formed.

  In the conventional GaN heterojunction FET, when the electric field between the gate Schottky electrode 1106 and the drain ohmic electrode 1107 exceeds the breakdown electric field of the semiconductor, breakdown of the device occurs. When the semiconductor is GaN, the breakdown electric field Emax is about 5 MV / cm. Here, if the distance between the drain ohmic electrode 1107 and the gate Schottky electrode 1106 is Ldg and the drain-gate applied voltage is Vdg, the average electric field is represented by Vdg / Ldg. However, the electric field distribution is generally non-uniform, and the electric field is maximized around the gate Schottky electrode 1106. Since this maximum electric field is usually higher than the average electric field, the breakdown voltage of a normal device is lower than (Ldg · Emax).

  The device structure of the GaN heterojunction FET shown in FIG. 12 is the same as that of the conventional GaN heterojunction FET shown in FIG. FIG. 12 shows the potential along with the device structure. This potential is calculated by simulation. The problem to be solved by the present invention will be described in detail below using the cross-sectional view of the heterojunction FET shown in FIG.

On the sapphire substrate 1201, a GaN layer 1202 made of undoped GaN having a thickness of 3 μm and an Al _0.5 Ga _0.5 N layer 1203 made of undoped Al _0.5 Ga _0.5 N having a thickness of 20 nm are formed. On the Al _0.5 Ga _0.5 N layer 1203, a source ohmic electrode 1205, a gate Schottky electrode 1206, and a drain ohmic electrode 1207 are formed. 2DEG 1204 is generated at the boundary between the GaN layer 1202 and the Al _0.5 GaN _0.5 N layer 1203. At this time, the concentration of 2DEG is 8 × 10 ¹² cm ⁻² . Here, the distance Ldg between the drain ohmic electrode 1107 and the gate Schottky electrode 1106 is 3 μm, the drain-source applied voltage Vds is 400 V, and the gate-source applied voltage Vgs is −10 V. In this bias condition, the device is in an off state (a state where the channel is depleted and no current flows).

  A place where the gap between the potentials shown in FIG. 12 is narrow indicates that the electric field is high. As can be seen from FIG. 12, the electric field increases in the vicinity of the gate Schottky electrode 1206. From the simulation results, it can be seen that the maximum electric field is 9.48 MV / cm under this bias condition, which greatly exceeds the breakdown electric field Emax (about 5 MV / cm). When a voltage with the same bias condition is applied to a real GaN heterojunction FET, dielectric breakdown occurs.

  The degree to which the potential concentrates in the region near the gate electrode depends on the fixed charge concentration around the channel of the device. In a practical GaN heterojunction FET, the fixed charge concentration can be controlled to some extent by the composition of AlGaN layer or impurity doping. When the fixed charge concentration is high, the 2DEG concentration ns when the device is in the on state is high and the on resistance is low. However, it is desirable that the on-resistance is low and the off-breakdown voltage is high.

The gate electrode and the drain electrode of the GaN heterojunction FET are on the same surface of the semiconductor layer, and the voltage applied between the gate electrode and the drain electrode is high. Unlike a GaAs or Si FET, a GaN heterojunction FET does not have a field plate structure. When a field plate is used for such a GaN heterojunction FET, the maximum electric field of the semiconductor layer is low, but there is a problem that dielectric breakdown occurs in the insulating film because the electric field of the insulating film below the field plate is high ( The breakdown field of a normal insulating film is higher than the breakdown field of GaAs or Si, but is about the same as the breakdown field of GaN).
Zhang, n.-Q. and five others, “High Breakdown GaN HEMT with Overlapping Gate Structure (GaN HEMT)”, Volume 21, Electron Device Letters (Electron) Device Letters), i Triple E (IEEE), September 2000, p.373-375, p.421-423.

  SUMMARY OF THE INVENTION An object of the present invention is to provide an electronic device capable of increasing the breakdown voltage by making the electric field distribution between electrodes uniform with a simple configuration.

  In order to achieve the above object, an electronic device of the present invention is an electronic device including an active layer, and includes a plurality of electrodes formed on the active layer and at least two of the plurality of electrodes. And a dielectric layer formed on the active layer so that the electric field distribution is substantially uniform. Here, the “active layer” is a layer that is generally formed of a semiconductor or an insulator and that transmits, switches, or amplifies signals.

According to the electronic device having the above-described configuration, a plurality of electrodes formed on the active layer by using a dielectric such as TiO ₂ or HfO ₂ having a high dielectric constant for the dielectric layer formed on the active layer. The electric field distribution between at least two of the electrodes can be made substantially uniform (Maxwell equation “div. (ΕE) = ρ” indicates that there is a charge density ρ and a dielectric constant ε The higher the value, the smaller the gradient of the electric field E). Therefore, a high breakdown voltage can be achieved by making the electric field distribution between the electrodes uniform with a simple configuration without using a field plate structure for shielding the electric field.

  The electronic device according to an embodiment is characterized in that the dielectric layer has a dielectric constant ε2 higher than that of the active layer.

  According to the electronic device of the embodiment, the electric field distribution between the electrodes can be easily uniformed by making the dielectric constant ε2 of the dielectric layer higher than the dielectric constant ε1 of the active layer.

The electronic device according to an embodiment has a maximum thickness t2max of the dielectric layer and a dielectric of the dielectric layer, where the thickness of the active layer is t1 and the maximum thickness of the dielectric layer is t2max. The relationship between the product t2max · ε2 with the factor ε2 and the product t1 · ε1 with the thickness t1 of the active layer and the dielectric constant ε1 of the active layer is
t2max ・ ε2> t1 ・ ε1
It satisfies the following conditions.

  According to the electronic device of the above embodiment, the product t2max · ε2 of the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer is the product of the thickness t1 of the active layer and the dielectric constant ε1 of the active layer. By making it larger than t1 · ε1, the electric field distribution between the electrodes can be made uniform more easily.

The electronic device according to an embodiment has a maximum thickness of the dielectric layer, where L is an interval between the electrodes so that the electric field distribution is substantially uniform, and t2max is the maximum thickness of the dielectric layer. The relationship between the product t2max · ε2 of the thickness t2max and the dielectric constant ε2 of the dielectric layer and the product L · ε1 of the gap L between the electrodes and the dielectric constant ε1 of the active layer is
t2max ・ ε2> L ・ ε1
It satisfies the following conditions.

  According to the electronic device of the above embodiment, the product t2max · ε2 of the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer is represented by the product L of the gap L between the electrodes and the dielectric constant ε1 of the active layer. -By making it larger than ε1, the electric field distribution between the electrodes can be made uniform more easily.

The electronic device according to an embodiment has a maximum thickness t2max of the dielectric layer and a dielectric of the dielectric layer, where the thickness of the active layer is t1 and the maximum thickness of the dielectric layer is t2max. The relationship between the product t2max · ε2 with the factor ε2 and the product t1 · ε1 with the thickness t1 of the active layer and the dielectric constant ε1 of the active layer is
t2max ・ ε2> t1 ・ ε1
While satisfying the conditions of
When the distance between the electrodes in which the electric field distribution is substantially uniform is L and the maximum thickness of the dielectric layer is t2max, the maximum thickness t2max of the dielectric layer and the dielectric constant of the dielectric layer The relationship between the product t2max · ε2 with ε2 and the product L · ε1 of the gap L between the electrodes and the dielectric constant ε1 of the active layer is
t2max ・ ε2> L ・ ε1
It satisfies the following conditions.

  According to the electronic device of the above embodiment, the product t2max · ε2 of the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer is the product of the thickness t1 of the active layer and the dielectric constant ε1 of the active layer. The product t2max · ε2 of the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer is made larger than t1 · ε1, and the product L of the electrode gap L and the dielectric constant ε1 of the active layer -By making it larger than ε1, the electric field distribution between the electrodes can be made more uniform.

  In the electronic device according to an embodiment, the dielectric layer has a step-like stacked structure in which the number of layers is different for each step, and the product of the thickness of the layer and the dielectric constant in each step of the dielectric layer. The sum is characterized in that the electric field distribution decreases from one side of the electrode to the other side so as to be substantially uniform.

  According to the electronic device of the embodiment, the sum of the product of the thickness and the dielectric constant of each layer constituting each step of the dielectric layer is made smaller from one electrode to the other for each step, and the electric field distribution Is made substantially uniform, it is possible to easily form a step-like dielectric layer that makes the electric field distribution between the electrodes more uniform.

  In one embodiment of the electronic device, the thickness of the dielectric layer decreases from one electrode to the other where the electric field distribution is substantially uniform, or the dielectric constant of the dielectric layer decreases. It is characterized by becoming.

  According to the electronic device of the above-described embodiment, the electric field distribution between the electrodes is more surely uniformed by reducing the thickness of the dielectric layer from one electrode to the other electrode in which the electric field distribution is substantially uniform. The dielectric layer to be converted can be easily formed. Alternatively, a step-like dielectric layer that more reliably equalizes the electric field distribution between the electrodes by decreasing the dielectric constant of the dielectric layer from one electrode to the other so that the electric field distribution is substantially uniform. Can be easily formed.

  In one embodiment, the active layer is a group III nitride compound semiconductor.

  According to the electronic device of the embodiment, in the device in which the group III nitride compound semiconductor is used for the active layer, the effect of uniforming the electric field distribution by the dielectric layer is particularly remarkable.

  The electronic device according to an embodiment is characterized in that the dielectric layer includes a metal oxide.

  According to the electronic device of the embodiment, the dielectric layer containing a metal oxide can easily form a dielectric layer having a high dielectric constant.

  The electronic device according to an embodiment is characterized in that the dielectric layer is formed so as not to apply stress to the active layer.

  According to the electronic device of the above embodiment, for example, when a group III nitride compound semiconductor that exhibits a strong piezoelectric effect is used for the active layer, stress may be generated on the surface of the active layer to cause a 2DEG concentration change. There is sex. Such a 2DEG concentration change is undesirable in terms of the characteristics of the electronic device. Therefore, it is desirable to form the dielectric layer so that the semiconductor is not stressed. In particular, the dielectric layer is preferably formed by sputtering or spin coating.

  The heterojunction FET of the present invention includes a gate electrode formed on an active layer made of a semiconductor, a source electrode and a drain electrode formed on the active layer and on both sides of the gate electrode, and the source electrode or And a dielectric layer formed on the active layer so that an electric field distribution between at least one of the drain electrodes and the gate electrode is substantially uniform. Here, the “active layer” is a layer that transmits, switches, or amplifies signals.

  According to the heterojunction FET having the above configuration, by using, for example, a dielectric having a high dielectric constant for the dielectric layer formed on the active layer, and at least one of the source electrode and the drain electrode formed on the active layer. It is easy to make the electric field distribution with the gate electrode substantially uniform. Therefore, a high breakdown voltage can be achieved by making the electric field distribution between the electrodes uniform with a simple configuration without using a field plate structure for shielding the electric field.

  In one embodiment, the dielectric junction ε2 of the dielectric layer is higher than the dielectric constant ε1 of the active layer.

  According to the heterojunction FET of the embodiment, the electric field distribution between the electrodes can be easily uniformed by making the dielectric constant ε2 of the dielectric layer higher than the dielectric constant ε1 of the active layer.

The heterojunction FET of one embodiment has a maximum thickness t2max of the dielectric layer and a thickness of the dielectric layer, where t1 is the thickness of the active layer and t2max is the maximum thickness of the dielectric layer. The relationship between the product t2max · ε2 of the dielectric constant ε2 and the product t1 · ε1 of the thickness t1 of the active layer and the dielectric constant ε1 of the active layer is
t2max ・ ε2> t1 ・ ε1
It satisfies the following conditions.

  According to the heterojunction FET of the above embodiment, the product t2max · ε2 of the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer is the product of the thickness t1 of the active layer and the dielectric constant ε1 of the active layer. By making it larger than t1 · ε1, the electric field distribution between the electrodes can be made uniform more easily.

The heterojunction FET of one embodiment has a maximum of the dielectric layer when the distance between the electrodes so that the electric field distribution is substantially uniform is L and the maximum thickness of the dielectric layer is t2max. The relationship between the product t2max · ε2 of the thickness t2max and the dielectric constant ε2 of the dielectric layer, and the product L · ε1 of the gap L between the electrodes and the dielectric constant ε1 of the active layer is:
t2max ・ ε2> L ・ ε1
It satisfies the following conditions.

  According to the heterojunction FET of the above embodiment, the product t2max · ε2 of the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer is represented by the product L of the electrode spacing L and the dielectric constant ε1 of the active layer. -By making it larger than ε1, the electric field distribution between the electrodes can be made uniform more easily.

The heterojunction FET of one embodiment has a maximum thickness t2max of the dielectric layer and a thickness of the dielectric layer, where t1 is the thickness of the active layer and t2max is the maximum thickness of the dielectric layer. The relationship between the product t2max · ε2 of the dielectric constant ε2 and the product t1 · ε1 of the thickness t1 of the active layer and the dielectric constant ε1 of the active layer is
t2max ・ ε2> t1 ・ ε1
While satisfying the conditions of
When the distance between the electrodes in which the electric field distribution is substantially uniform is L and the maximum thickness of the dielectric layer is t2max, the maximum thickness t2max of the dielectric layer and the dielectric constant of the dielectric layer The relationship between the product t2max · ε2 with ε2 and the product L · ε1 of the gap L between the electrodes and the dielectric constant ε1 of the active layer is
t2max ・ ε2> L ・ ε1
It satisfies the following conditions.

  According to the heterojunction FET of the above embodiment, the product t2max · ε2 of the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer is the product of the thickness t1 of the active layer and the dielectric constant ε1 of the active layer. The product t2max · ε2 of the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer is made larger than t1 · ε1, and the product L of the electrode spacing L and the dielectric constant ε1 of the active layer -By making it larger than ε1, the electric field distribution between the electrodes can be made more uniform.

  Also, in one embodiment of the heterojunction FET, the dielectric layer has a step-like laminated structure composed of a plurality of dielectric layers having a different number of layers for each stage, and each stage of the dielectric layer is configured. The sum of the product of the thickness and the dielectric constant for each dielectric layer is reduced for each stage of the dielectric layer from one electrode to the other of the electrodes in which the electric field distribution is substantially uniform. And

  According to the heterojunction FET of the above-described embodiment, the sum of the product of the thickness and the dielectric constant of each layer constituting each step of the dielectric layer is reduced step by step from one of the electrodes to the other, and the electric field distribution Is made substantially uniform, it is possible to easily form a step-like dielectric layer that makes the electric field distribution between the electrodes more uniform. In this case, when the semiconductor of the active layer is N-type, the product of the thickness and dielectric constant of each dielectric layer gradually decreases from the negative electrode side, and from the positive electrode side when it is P-type. The product of the thickness and the dielectric constant of each stage dielectric layer gradually decreases.

  In one embodiment, the heterojunction FET has a thickness of the dielectric layer that decreases from one of the electrodes in which the electric field distribution is substantially uniform toward the other, or a dielectric constant of the dielectric layer. It is characterized by being smaller.

  According to the heterojunction FET of the above embodiment, the electric field distribution between the electrodes is more surely uniformed by reducing the thickness of the dielectric layer from one of the electrodes in which the electric field distribution is substantially uniform toward the other. The dielectric layer to be converted can be easily formed. Alternatively, a step-like dielectric layer that more reliably equalizes the electric field distribution between the electrodes by reducing the dielectric constant of the dielectric layer from one of the electrodes whose electric field distribution is substantially uniform toward the other. Can be easily formed.

  The heterojunction FET of one embodiment is characterized in that the active layer is a group III nitride compound semiconductor.

  According to the heterojunction FET of the embodiment, in the device in which the group III nitride compound semiconductor is used for the active layer, the effect of uniforming the electric field distribution by the dielectric layer is particularly remarkable.

  In one embodiment, the heterojunction FET is characterized in that the dielectric layer includes at least one of metallic oxide.

  According to the heterojunction FET of the embodiment, the dielectric layer containing a metal oxide can easily form a dielectric layer having a high dielectric constant.

  In one embodiment, the heterojunction FET is characterized in that the dielectric layer is formed so as not to apply stress to the active layer.

  According to the heterojunction FET of the above embodiment, for example, when a group III nitride compound semiconductor that exhibits a strong piezoelectric effect is used for the active layer, stress may be generated on the surface of the active layer, resulting in a change in the concentration of 2DEG. There is sex. Such a 2DEG concentration change is undesirable in terms of the characteristics of the electronic device. Therefore, it is desirable to form the dielectric layer so that no stress is applied to the semiconductor of the active layer. In particular, the dielectric layer is preferably formed by sputtering or spin coating.

The electronic device of the present invention is
An electronic device with an active layer,
A plurality of electrodes formed on the active layer, and a dielectric layer;
A dielectric constant ε2 of the dielectric layer is higher than a dielectric constant ε1 of the active layer.

  According to the electronic device having the above configuration, the electric field distribution between the electrodes can be easily uniformed by making the dielectric constant ε2 of the dielectric layer higher than the dielectric constant ε1 of the active layer.

The electronic device according to an embodiment has a maximum thickness t2max of the dielectric layer and a dielectric of the dielectric layer, where the thickness of the active layer is t1 and the maximum thickness of the dielectric layer is t2max. The relationship between the product t2max · ε2 with the factor ε2 and the product t1 · ε1 with the thickness t1 of the active layer and the dielectric constant ε1 of the active layer is
t2max ・ ε2> t1 ・ ε1
It satisfies the following conditions.

  According to the electronic device of the above embodiment, the product t2max · ε2 of the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer is the product t1 of the thickness t1 of the active layer and the dielectric constant ε1 of the active layer. -By making it larger than ε1, the electric field distribution between the electrodes can be made uniform more easily.

The heterojunction FET of the present invention is
A gate electrode formed on an active layer made of a semiconductor layer, a dielectric layer, and a source electrode and a drain electrode formed on the active layer and on both sides of the gate electrode,
A dielectric constant ε2 of the dielectric layer is higher than a dielectric constant ε1 of the active layer.

  According to the heterojunction FET of the embodiment, the electric field distribution between the electrodes can be easily uniformed by making the dielectric constant ε2 of the dielectric layer higher than the dielectric constant ε1 of the active layer.

The heterojunction FET of one embodiment has a maximum thickness t2max of the dielectric layer and a thickness of the dielectric layer, where t1 is the thickness of the active layer and t2max is the maximum thickness of the dielectric layer. The relationship between the product t2max · ε2 of the dielectric constant ε2 and the product t1 · ε1 of the thickness t1 of the active layer and the dielectric constant ε1 of the active layer is
t2max ・ ε2> t1 ・ ε1
It satisfies the following conditions.

  According to the heterojunction FET of the above embodiment, the product t2max · ε2 of the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer is the product of the thickness t1 of the active layer and the dielectric constant ε1 of the active layer. By making it larger than t1 · ε1, the electric field distribution between the electrodes can be made uniform more easily.

The electronic device of the present invention is
An electronic device with an active layer,
A plurality of electrodes formed on the active layer, and a dielectric layer;
The dielectric layer is preferably formed on the active layer so that a difference between a maximum value and a minimum value of an electric field distribution between at least two electrodes of the plurality of electrodes is reduced.

  According to the electronic device, the electric field distribution between at least two of the plurality of electrodes can be made substantially uniform. As a result, a high breakdown voltage can be achieved without using a field plate structure for shielding an electric field.

The heterojunction FET of the present invention is
A gate electrode formed on an active layer made of a semiconductor layer, a dielectric layer, and a source electrode and a drain electrode formed on the active layer and on both sides of the gate electrode,
The dielectric layer may be formed on the active layer so as to reduce a difference between a maximum value and a minimum value of an electric field distribution between at least two of the gate electrode, the source electrode, and the drain electrode. desirable.

  According to the heterojunction FET, the electric field distribution between at least two of the gate electrode, the source electrode, and the drain electrode can be made substantially uniform. As a result, a high breakdown voltage can be achieved without using a field plate structure for shielding an electric field.

  As is clear from the above, according to the electronic device and the heterojunction FET of the present invention, the maximum electric field between the electrodes can be reduced and the breakdown voltage can be increased. In addition, since electric field concentration does not occur even when the carrier concentration of the electronic device is high, the breakdown voltage can be increased despite the low channel resistance.

  The present invention is effective for various electronic devices (SAW (Surface Acoustic Wave) devices, MEMS (Micro electro mechanical systems), etc.), and two or more on the same surface of the active layer. The present invention is effective for the case where there is an electrode and a voltage is applied to the electrode.

  In addition, the present invention is particularly effective in a semiconductor device (FET, diode, etc.) because the electric field becomes very high. Further, the most effective device of the present invention is a GaN-based heterojunction FET.

  The electronic device and the heterojunction FET of the present invention will be described in detail below with reference to the illustrated embodiments.

  First, before describing the embodiment, an ideal grading of the dielectric layer will be described.

When the change in potential is one-dimensional, the Maxwell equation is expressed as the following equation (1).
E dε / dx + εdE / dx = ρ (1)

In the ideal case, there is no change in the electric field, and the differential dE / dx of the electric field is zero. Therefore, in the one-dimensional case, the dielectric constant of the dielectric layer ideally changes as in the following equation (2). And good.
dε / dx = ρ / E = ρL / V (2)

  In the formula (2), L is an electrode interval, and V is an applied voltage.

  If the electronic device is a GaN heterojunction FET, equation (2) can be expressed in more detail. That is, in the GaN heterojunction FET, the region where the electric field is highest is between the gate electrode and the drain electrode, and therefore grading that changes the film thickness of the dielectric layer is effective in the region between the gate electrode and the drain electrode. It is.

In the GaN heterojunction FET, the above equation (2) becomes the following equation (3).

  In equation (3), y is the vertical direction of the surface, Ns is the sheet charge concentration of the semiconductor layer, Ldg is the distance between the drain electrode and the gate electrode, and Vdg is the drain-gate applied voltage.

Therefore, when the dielectric constant of the dielectric layer is constant, a grading structure is formed in which the thickness t (x) of the dielectric layer is ideally changed as in the following equation (4).
dt (x) / dx = -q · Ns · Ldg / (ε · Vdg) (4)

On the other hand, when the thickness t of the dielectric is constant, a grading structure is formed in which the dielectric constant ε (x) is ideally changed as in the following equation (5).
dε (x) / dx = -q · Ns · Ldg / (Vdg · t) (5)

この式(６)のＣは積分定数である。高誘電膜の厚さと比誘電率がプラスなので、下記の式となる。

従って、比誘電率が一定の場合は、

となる。以上より、理想的なグレーディングを実現するための高誘電膜の厚さと誘電率との積の値は、q・Ｎs・Ｌdg²／Ｖｄg以上となる。Ｖdgは、一般的なデバイスの場合、仕様書に記載されている最大のドレイン・ゲート印加電圧がＶdgとなる。 Equations (4) and (5) assume that a dielectric having a high dielectric constant has the strongest influence on the electric field. In order for this assumption to be met, the following two conditions must be satisfied.
(a) The dielectric constant ε2 of the dielectric layer is higher than the dielectric constant ε1 of the lower semiconductor layer.
(b) The product (ε2 · t2) is higher than the product (ε1 · t1) or the product (ε2 · t2) is higher than the product (ε1 · Ldg) (t1 = dielectric layer thickness, t2 = semiconductor layer Thickness).
Further, when the equation (3) is integrated, the following equation is obtained.

C in this equation (6) is an integral constant. Since the thickness of the high dielectric film and the relative dielectric constant are positive, the following equation is obtained.

Therefore, when the relative dielectric constant is constant,

It becomes. From the above, the product of the thickness of the high dielectric film and the dielectric constant for realizing ideal grading is q · Ns · Ldg ² / Vdg or more. As for Vdg, in the case of a general device, the maximum drain-gate applied voltage described in the specification is Vdg.

  Practically, it is difficult to perform grading that changes the thickness of the dielectric layer ideally or the grading that changes the dielectric constant, such as Expression (4) or Expression (5). However, it is effective if the grading is approximate to Equation (4) or Equation (5).

  Next, a first embodiment of a grading structure in which the thickness of the dielectric layer is changed, which is an effective and optimal grading structure for making the electric field distribution between the electrodes uniform, and the dielectric of the dielectric layer A second embodiment of the grading structure in which the rate is changed will be described.

(First embodiment)
FIG. 4 is a diagram showing a potential along with a cross-sectional view of an AlGaN / GaN heterojunction FET as an example of the electronic device according to the first embodiment of the present invention. The effect of the grading structure with the thickness of the dielectric layer varied is shown. Show. Although the structure of this heterojunction FET is the same as that of FIG. 12, a grading structure in which the thickness of the dielectric layer is changed is formed on the surface of the semiconductor layer.

As shown in FIG. 4, on the sapphire substrate 401, Al _0.5 Ga _0.5 made of undoped Al _0.5 Ga _0.5 N of the GaN layer 402 and the thickness of 20nm made of undoped GaN having a thickness of 3μm An N layer 403 is formed, and a source ohmic electrode 405, a gate Schottky electrode 406, and a drain ohmic electrode 407 are formed on the Al _0.5 Ga _0.5 N layer 403. The GaN layer 402 and the AlGaN layer 403 constitute an active layer.

A dielectric layer 408 made of a dielectric having a dielectric constant εr = 80 is formed on the Al _0.5 Ga _0.5 N layer 403. The grading structure is formed by changing the thickness of the dielectric layer 408 from t (0) = 600 nm to t (3 μm) = 193 nm. The degree of grading between the gate Schottky electrode 406 and the drain ohmic electrode 407 is as shown in Equation (4).

A 2DEG 404 is generated at a boundary region between the GaN layer 402 and the Al _0.5 Ga _0.5 N layer 403. At this time, the concentration of 2DEG is 8 × 10 ¹² cm ⁻² . Here, the distance Ldg between the drain ohmic electrode 407 and the gate Schottky electrode 406 is 3 μm, the drain-source applied voltage Vds is 400 V, and the gate-source applied voltage Vgs is −10 V. In the case of this bias condition, the heterojunction FET is in the off state (the channel is depleted and no current flows).

  The heterojunction FET according to the first embodiment has a uniform electric field distribution and a maximum electric field of 3.34 MV / cm when a grading structure in which the thickness of the dielectric layer 408 is changed is formed.

  The heterojunction FET of the first embodiment has the same effect as the heterojunction FET of the fifth embodiment.

  According to the heterojunction FET of the first embodiment, the electric field distribution between the electrodes is further ensured by reducing the thickness of the dielectric layer from one of the electrodes whose electric field distribution is substantially uniform toward the other. It is possible to easily form a uniform dielectric layer.

(Second Embodiment)
FIG. 5 is a diagram showing a potential along with a cross-sectional view of an AlGaN / GaN heterojunction FET as an example of an electronic device according to the second embodiment of the present invention. The effect of the grading structure in which the dielectric constant of the dielectric layer is changed is shown. Show. The upper side of FIG. 5 shows a change in the dielectric constant εr.

  The structure of the heterojunction FET of the second embodiment is the same as that shown in FIG. 12, but a dielectric layer having a changed dielectric constant is formed on the surface of the semiconductor layer.

As shown in FIG. 5, on the sapphire substrate 501, Al _0.5 Ga _0.5 made of undoped Al _0.5 Ga _0.5 N of the GaN layer 502 and the thickness of 20nm made of undoped GaN having a thickness of 3μm An N layer 503 is formed, and a source ohmic electrode 505, a gate Schottky electrode 506, and a drain ohmic electrode 507 are formed on the Al _0.5 Ga _0.5 N layer 503. The GaN layer 502 and the AlGaN layer 503 constitute an active layer.

A dielectric layer 508 made of a dielectric having a thickness of 600 nm and a dielectric constant εr = 80 to 26 is formed on the Al _0.5 Ga _0.5 N layer 503. A grading structure in which the dielectric constant of the dielectric layer 508 is changed from εr (0) = 80 to εr (3 μm) = 26 is formed. The degree of grading of the dielectric layer 508 between the gate Schottky electrode 506 and the drain ohmic electrode 507 is expressed by Equation (5).

A 2DEG 504 is generated at a boundary region between the GaN layer 502 and the Al _0.5 Ga _0.5 N layer 503. The concentration of 2DEG is 8 × 10 ¹² cm ⁻² . Here, the distance Ldg between the drain ohmic electrode 507 and the gate Schottky electrode 506 is 3 μm, the drain-source applied voltage Vds is 400 V, and the gate-source applied voltage Vgs is −10 V. In the case of this bias condition, the heterojunction FET is in the off state (the channel is depleted and no current flows).

  In the heterojunction FET of the second embodiment, when a grading structure in which the thickness of the dielectric layer 508 is changed is formed, the electric field distribution is uniform and the maximum electric field is 3.29 MV / cm.

  The heterojunction FET of the second embodiment has the same effect as the heterojunction FET of the fifth embodiment.

  According to the heterojunction FET of the second embodiment, the electric field distribution between the electrodes is further ensured by decreasing the dielectric constant of the dielectric layer from one of the electrodes whose electric field distribution is made substantially uniform toward the other. It is possible to easily form a stepped dielectric layer that is uniform.

(Third embodiment)
Next, a third embodiment in which a dielectric having a constant thickness and dielectric constant and a high dielectric constant is formed in an electronic device will be described. Although this third embodiment is not optimal for making the electric field distribution between the electrodes uniform, it is effective.

  FIG. 6 is a diagram showing a potential together with a cross-sectional view of an AlGaN / GaN heterojunction FET as an example of an electronic device according to a third embodiment of the present invention. Although the structure of this heterojunction FET is the same as that of FIG. 12, a dielectric layer having a high dielectric constant is formed on the surface of the semiconductor layer.

As shown in FIG. 6, on the sapphire substrate 601, Al _0.5 Ga _0.5 made of undoped Al _0.5 Ga _0.5 N of the GaN layer 602 and the thickness of 20nm made of undoped GaN having a thickness of 3μm An N layer 603 is formed, and a source ohmic electrode 605, a gate Schottky electrode 606, and a drain ohmic electrode 607 are formed on the Al _0.5 Ga _0.5 N layer 602. The GaN layer 602 and the AlGaN layer 603 constitute an active layer.

A dielectric layer 608 made of a dielectric having a thickness of 600 nm and a dielectric constant εr = 80 is formed on the Al _0.5 Ga _0.5 N layer 603. A 2DEG 604 is generated at the boundary region between the GaN layer 602 and the Al _0.5 GaN _0.5 N layer 603. At this time, the concentration of 2DEG is 8 × 10 ¹² cm ⁻² . Here, the distance Ldg between the drain ohmic electrode 607 and the gate Schottky electrode 606 is 3 μm, the drain-source applied voltage Vds is 400 V, and the gate-source applied voltage Vgs is −10 V. In the case of this bias condition, the heterojunction FET is in the off state (the channel is depleted and no current flows).

  It can be seen that the uniformity of the electric field distribution is good when the dielectric layer 608 having a high dielectric constant is formed in the heterojunction FET of the third embodiment. In the case of FIG. 6, the maximum electric field is 3.73 MV / cm.

  According to the heterojunction FET having the above configuration, the dielectric layer 608 formed on the active layer composed of the GaN layer 602 and the AlGaN layer 603 is formed on the active layer by using a dielectric having a high dielectric constant. The electric field distribution between the gate Schottky electrode 606 and the drain ohmic electrode 607 can be easily made substantially uniform. Therefore, a high breakdown voltage can be realized by making the electric field distribution between the electrodes uniform with a simple configuration without using a field plate structure for shielding the electric field.

  Further, by making the dielectric constant ε2 of the dielectric layer higher than the dielectric constant ε1 of the active layer, the electric field distribution between the gate Schottky electrode 606 and the drain ohmic electrode 607 can be easily made uniform. .

(First comparative example)
FIG. 7 is a diagram showing a potential along with a cross-sectional view of an AlGaN / GaN heterojunction FET of the first comparative example. Although the structure of the heterojunction FET is the same as that of FIG. 12, a dielectric layer having a high dielectric constant is formed on the surface of the semiconductor layer only in a region close to the drain electrode.

As shown in FIG. 7, on a sapphire substrate 701, Al _0.5 Ga _0.5 made of undoped Al _0.5 Ga _0.5 N of the GaN layer 702 and the thickness of 20nm made of undoped GaN having a thickness of 3μm An N layer 703 is formed, and a source ohmic electrode 705, a gate Schottky electrode 706, and a drain ohmic electrode 707 are formed on the Al _0.5 Ga _0.5 N layer 703. The GaN layer 702 and the AlGaN layer 703 constitute an active layer.

A dielectric layer 708 made of a dielectric having a thickness of 600 nm, a width of 1 μm, and a dielectric constant εr = 80 is formed on the Al _0.5 Ga _0.5 N layer 703. A 2DEG 704 is generated at the boundary between the GaN layer 702 and the Al _0.5 GaN _0.5 N layer 703. At this time, the concentration of 2DEG is 8 × 10 ¹² cm ⁻² . Here, the distance Ldg between the drain ohmic electrode 707 and the gate Schottky electrode 706 is 3 μm, the drain-source applied voltage Vds is 400 V, and the gate-source applied voltage Vgs is −10 V. In the case of this bias condition, the heterojunction FET is in the off state (the channel is depleted and no current flows).

  When FIG. 7 is compared with FIG. 12, it can be seen that when the dielectric layer 708 having a high dielectric constant is formed on the surface of the semiconductor layer only in the region close to the drain electrode, the uniformity of the electric field is slightly deteriorated. In the case of FIG. 7, the maximum electric field is 9.50 MV / cm.

(Second comparative example)
FIG. 8 is a diagram showing a potential along with a cross-sectional view of an AlGaN / GaN heterojunction FET of the second comparative example. Although the structure of this heterojunction FET is the same as that of FIG. 12, a dielectric layer 808 having a high dielectric constant is attached to the surface of the semiconductor layer only in the region near the gate electrode. There is a gap of 0.3 μm between the dielectric layer and the gate electrode.

As shown in FIG. 8, on the sapphire substrate 801, Al _0.5 Ga _0.5 made of undoped Al _0.5 Ga _0.5 N of the GaN layer 802 and the thickness of 20nm made of undoped GaN having a thickness of 3μm An N layer 803 is formed, and a source ohmic electrode 805, a gate Schottky electrode 806, and a drain ohmic electrode 807 are formed on the Al _0.5 Ga _0.5 N layer 803. The GaN layer 802 and the AlGaN layer 803 constitute an active layer.

A dielectric layer 808 made of a dielectric having a thickness of 600 nm, a width of 1 μm, and a dielectric constant εr = 80 is formed on the Al _0.5 Ga _0.5 N layer 803. A 2DEG 804 is generated in the boundary area between the GaN layer 802 and the Al _0.5 GaN _0.5 N layer 803. At this time, the concentration of 2DEG is 8 × 10 ¹² cm ⁻² . Here, the distance Ldg between the drain ohmic electrode 807 and the gate Schottky electrode 806 is 3 μm, the drain-source applied voltage Vds is 400 V, and the gate-source applied voltage Vgs is −10 V. In this bias condition, the device is in an off state (a state where the channel is depleted and no current flows).

  Comparing FIG. 8 and FIG. 12, a dielectric layer 808 having a high dielectric constant is formed on the semiconductor surface of the active layer only in a region close to the gate Schottky electrode 806, and the high dielectric layer 808 and the gate Schottky electrode 806 are formed. It can be seen that the uniformity of the electric field distribution deteriorates when there is a gap between them. In the case of FIG. 8, the maximum electric field is 13.47 MV / cm.

(Fourth embodiment)
A dielectric layer having a high dielectric constant may exert a strong influence on the electric field distribution even if the semiconductor layer surface between the electrodes is partially formed. FIG. 9 is a diagram showing the effect that the dielectric layer is formed only on a part of the surface of the semiconductor layer.

  FIG. 9 is a diagram showing a potential along with a cross-sectional view of an AlGaN / GaN heterojunction heterojunction FET as an example of the electronic device according to the fourth embodiment of the present invention. Although the structure of this heterojunction FET is the same as that of FIG. 12, a dielectric layer having a high dielectric constant is formed on the surface of the semiconductor layer only in the region around the gate electrode.

As shown in FIG. 9, on the sapphire substrate 901, Al _0.5 Ga _0.5 made of undoped Al _0.5 Ga _0.5 N of the GaN layer 902 and the thickness of 20nm made of undoped GaN having a thickness of 3μm An N layer 903 is formed, and a source ohmic electrode 905, a gate Schottky electrode 906, and a drain ohmic electrode 907 are formed on the Al _0.5 Ga _0.5 N layer 903. The GaN layer 902 and the AlGaN layer 903 constitute an active layer.

A dielectric layer 908 made of a dielectric having a thickness of 600 nm, a width of 2 μm, and a dielectric constant εr = 80 is formed on the Al _0.5 Ga _0.5 N layer 903. A 2DEG 904 is generated at the boundary between the GaN layer 902 and the Al _0.5 GaN _0.5 N layer 903. At this time, the concentration of 2DEG is 8 × 10 ¹² cm ⁻² . Here, the distance Ldg between the drain ohmic electrode 907 and the gate Schottky electrode 906 is 3 μm, the drain-source applied voltage Vds is 400 V, and the gate-source applied voltage Vgs is −10 V. In the case of this bias condition, the heterojunction FET is in the off state (the channel is depleted and no current flows).

  Comparing FIG. 9 with the first and second comparative examples of FIGS. 7 and 8, when the dielectric layer 908 having a high dielectric constant is formed on the semiconductor surface of the active layer only in the region around the gate Schottky electrode 906, The uniformity of the electric field distribution is improved, and the maximum electric field is 6.45 MV / cm.

(Fifth embodiment)
FIG. 1 is a cross-sectional view of an AlGaN / GaN heterojunction FET as an example of an electronic device according to a fifth embodiment of the present invention.

In the heterojunction FET according to the fifth embodiment, _two TiO ₂ layers are stacked three times to form a dielectric layer having a stepped stacked structure in which the number of stacked layers is different for each step. The change in the thickness of the dielectric layer in the step-like stacked structure is approximated to a grading structure in which the thickness of the dielectric layer is changed as shown in Equation (4). The heterojunction FET shown in FIG. 1 has a structure that can withstand the maximum drain-gate applied voltage Vdg = 410V. The distance Ldg between the drain ohmic electrode 107 and the gate Schottky electrode 106 is 3 μm.

  The manufacturing method of this heterojunction FET is roughly as follows.

  First, a GaN layer 102 and an AlGaN layer 103 are grown on a sapphire substrate 101 in order. As a crystal growth method at this time, MBE (Molecular Beam Epitaxy) method or MOCVD (Metal Organic Chemical Vapor Deposition) method is effective. The GaN layer 102 and the AlGaN layer 103 constitute an active layer.

  Next, the isolation mesa 112 is formed by dry etching.

  Next, the source ohmic electrode 105 and the drain ohmic electrode 107 are formed on the AlGaN layer 103, and heat treatment is performed so as to reduce the contact resistance.

  Next, a gate Schottky electrode 106 is formed on the AlGaN layer 103.

Next, the TiO ₂ layer is deposited on the entire surface and patterned by wet etching to form the TiO ₂ layer 108. As the deposition method, sputtering or spin-on process is effective. In the case of a spin-on process, heat treatment is performed after deposition.

Then depots TiO ₂ layer on the entire surface, by patterning by wet etching to form the TiO ₂ layer 109, and depots TiO ₂ layer on the entire surface, the TiO ₂ layer by patterning by wet etching 110 Form.

In the fifth embodiment, the total thickness of the TiO ₂ layers 108, 109, and 110 changes in three steps (the width of each step is 1 μm) between the gate Schottky electrode 106 and the drain ohmic electrode 107. _{The two} layers 108, 109, and 110 are approximate to the grading structure of Equation (4).

The TiO ₂ layer 108, the TiO ₂ layer 109, and the TiO ₂ layer 110 constitute a dielectric layer having a stepped laminated structure. Since the dielectric constant of TiO ₂ is as high as εr = 80 and the breakdown electric field is as high as 7 MV / cm, it is a suitable dielectric for use in the present invention.

  The withstand voltage of the conventional heterojunction FET shown in FIG. 12 is 111V by simulation, whereas the withstand voltage of the heterojunction FET shown in FIG. 1 of the fifth embodiment is 743V. In either case, since the 2DEG concentration and the electron mobility are the same, the channel resistance is the same.

According to the heterojunction FET of the structure, GaN layer 102 and AlGaN layer dielectric layer formed on the active layer composed of 103 (TiO ₂ layers 108, 109, 110), TiO ₂ dielectric constant as high dielectric By using, it is easy to make the electric field distribution between the gate Schottky electrode 106 and the drain ohmic electrode 107 formed on the active layer substantially uniform. Therefore, a high breakdown voltage can be realized by making the electric field distribution between the electrodes uniform with a simple configuration without using a field plate structure for shielding the electric field.

In addition, the electric field distribution between the gate Schottky electrode 106 and the drain ohmic electrode 107 is facilitated by making the dielectric constant of TiO ₂ of the dielectric layer higher than the dielectric constant of GaN and AlGaN of the active layer. It can be made uniform.

Further, the sum of the product of the thickness and the dielectric constant of each TiO ₂ layer constituting each step of the dielectric layer (TiO ₂ layer 108, 109, 110) having a stepped laminated structure is drain ohmic from the gate Schottky electrode 106. By reducing the size stepwise toward the electrode 107 so that the electric field distribution becomes substantially uniform, it is possible to easily form a step-like dielectric layer that can make the electric field distribution between the electrodes more uniform. it can.

  Further, in a heterojunction FET in which a group III nitride compound semiconductor is used for the active layer, the field plate structure is not effective, and the effect of uniforming the electric field distribution by the dielectric layer is particularly remarkable.

Further, when the dielectric layer contains TiO ₂ which is a metal oxide, a dielectric layer having a high dielectric constant can be easily formed.

  In addition, since the heterojunction FET of the fifth embodiment uses a group III nitride compound semiconductor that exhibits a strong piezoelectric effect for the active layer, stress is generated on the surface of the active layer, and the concentration change of 2DEG is changed. Can happen. Such a 2DEG concentration change is undesirable in terms of the characteristics of the electronic device. Therefore, the dielectric layer is preferably formed so that no stress is applied to the semiconductor of the active layer.

(Sixth embodiment)
FIG. 2 is a cross-sectional view of an AlGaN / GaN heterojunction FET as an example of an electronic device according to a sixth embodiment of the present invention.

  In the heterojunction FET of the sixth embodiment, a dielectric layer is formed by combining three types of dielectric layers, and the change in the thickness of the combined dielectric layers changes as shown in the equation (3). It approximates the graded structure. The upper side of FIG. 2 shows a change in the product of dielectric constant and thickness (εr · t). The heterojunction FET shown in FIG. 2 has a structure that can withstand the maximum drain-gate applied voltage Vdg = 410V. The distance Ldg between the drain electrode 207 and the gate electrode 205 is 3 μm.

  The manufacturing method of this heterojunction FET is roughly as follows.

  As shown in FIG. 2, a GaN layer 202 and an AlGaN layer 203 are grown in order on the sapphire substrate 201. As a crystal growth method at this time, the MBE method or the MOCVD method is effective. The GaN layer 202 and the AlGaN layer 203 constitute an active layer.

  Next, an isolation mesa 212 is formed by dry etching.

  Next, a source electrode 205 and a drain electrode 207 are formed on the AlGaN layer 203, and heat treatment is performed so as to reduce the contact resistance.

  Next, a gate Schottky electrode 206 is formed on the AlGaN layer 203.

Next, the TiO ₂ layer is deposited on the entire surface and patterned by wet etching to form the TiO ₂ layer 208. As the deposition method, sputtering or spin-on process is effective. In the case of a spin-on process, heat treatment is performed after deposition.

Next, the HfO ₂ layer is deposited on the entire surface by sputtering, and patterned by wet etching to form the HfO ₂ layer 209. The SiN ₂ layer is deposited on the entire surface by CVD, and patterned by wet etching to form SiN. _Two layers 210 are formed.

The TiO ₂ layer 208, the HfO ₂ layer 209 and the SiN ₂ layer 210 constitute a dielectric layer. The TiO ₂ layer 208 has a width of 1 μm, the HfO ₂ layer 209 has a width of 1.5 μm, and the SiN ₂ layer 210 has a width of 0.5 μm.

In the heterojunction FET of the sixth embodiment, since the entire dielectric constant and thickness of the dielectric layer change in three steps between the gate Schottky electrode 206 and the drain electrode 207, the grading structure of the formula (3) Approximate. The dielectric constant εr, thickness t, and product (εr · t) of the dielectric used for the dielectric layer of the sixth embodiment are as follows.
TiO ₂ : εr = 80, t = 345 nm, (εr · t) = 2.76 × 10 ⁻³ cm
HfO ₂ : εr = 25, t = 561 nm, (εr · t) = 1.40 × 10 ⁻³ cm
SiN ₂ : εr = 7.5, t = 425 nm, (εr · t) = 0.32 × 10 ⁻³ cm

Here, the slope d / dx (εr · t) of the approximate line in the upper graph of FIG.
d / dx (εr · t) = − q · Ns · Ldg / (Vdg · ε0) = − 10.6
Where ε0 is the dielectric constant of the vacuum.

  The heterojunction FET of the sixth embodiment has the same effect as the heterojunction FET of the fifth embodiment.

(Seventh embodiment)
FIG. 3 is a cross-sectional view of an AlGaN / GaN heterojunction FET as an example of an electronic device according to a seventh embodiment of the present invention. In the heterojunction FET of the seventh embodiment, a thin SiN ₂ passivation layer 308 is sandwiched between a dielectric layer having a high dielectric constant and a semiconductor layer. This SiN ₂ passivation layer 308 is for the stability of the AlGaN layer 303. Since the SiN ₂ passivation layer 308 is thin, the effect of the dielectric layer thereon is hardly reduced.

In the seventh embodiment, a MIS (metal-insulator-semiconductor) gate electrode is used instead of the gate Schottky electrode. The gate insulating film is an SiN ₂ passivation layer 308.

  The heterojunction FET shown in FIG. 3 has a structure that can withstand the maximum drain-gate applied voltage Vdg = 410V. The distance Ldg between the drain electrode 307 and the gate Schottky electrode 306 is 3 μm.

  The manufacturing method of this heterojunction FET is roughly as follows.

  First, a GaN layer 302 and an AlGaN layer 303 are sequentially grown on the sapphire substrate 301. As a crystal growth method at this time, the MBE method or the MOCVD method is effective. The GaN layer 302 and the AlGaN layer 303 constitute an active layer.

  Next, an isolation mesa 312 is formed by dry etching.

  Next, a source electrode 305 and a drain electrode 307 are formed on the AlGaN layer 303, and heat treatment is performed so as to reduce the contact resistance.

Next, the SiN ₂ layer 308 is deposited on the entire surface by CVD and patterned by wet etching.

Next, the gate electrode 306 is formed on the SiN ₂ layer 308.

Then depots TiO ₂ layer on the entire surface, repeated 3 times a process of wet etching to form the TiO ₂ layer 309, the dielectric layer of the grading structure with varying thickness of the TiO ₂ layer 309 in three stages Is forming.

Specifically, a part of the TiO ₂ layer is etched by about 135 nm by the first wet etching. Next, another portion of the TiO ₂ layer is further etched by about 135 nm by the _second wet etching. Finally, another portion of the TiO ₂ layer is further etched by about 135 nm by the third wet etching to form the TiO ₂ layer 309.

  The heterojunction FET of the seventh embodiment has the same effect as the heterojunction FET of the fifth embodiment.

(Eighth embodiment)
FIG. 10 is a sectional view of a Schottky diode as an example of an electronic device according to an eighth embodiment of the present invention.

As shown in FIG. 10, a 50 nm thick AlN buffer layer 1002 and a 3 μm thick GaN layer 1003 (impurity concentration 1 × 10 ¹⁷ cm ⁻³ ) are sequentially formed on a sapphire substrate 1001. . Next, a cathode ohmic electrode 1005 made of Ti / Al / Au, an anode Schottky electrode 1006 made of WN / Au, and a cathode ohmic electrode 1007 made of Ti / Al / Au are formed on the GaN layer 1003. Further, dielectric layers 1008 and 1009 made of TiO ₂ are formed on the GaN layer 1003 and on both sides of the anode Schottky electrode 1006 so as to sandwich the anode Schottky electrode 1006.

According to the Schottky diode having the above configuration, the dielectric layers 1008 and 1009 formed on the active layer made of the GaN layer 1003 are formed on the active layer by using TiO ₂ as a dielectric having a high dielectric constant. The electric field distribution between the anode Schottky electrode 1006 and the cathode ohmic electrode 1005 and between the anode Schottky electrode 1006 and the cathode ohmic electrode 1007 can be easily made substantially uniform. Therefore, a high breakdown voltage can be realized by making the electric field distribution between the electrodes uniform with a simple configuration without using a field plate structure for shielding the electric field.

  Further, by making the dielectric constant ε2 of the dielectric layers 1008, 1009 higher than the dielectric constant ε1 of the active GaN layer 1003, the anode Schottky electrode 1006 and the anode ohmic electrode 1005 are connected. The electric field distribution between 1006 and the cathode ohmic electrode 1007 can be easily made uniform.

  In the first to seventh embodiments, the heterojunction FET has been described as the electronic device. In the eighth embodiment, the GaN Schottky diode has been described as the electronic device. However, the electronic device is not limited to this, and a Gunn diode or SAW is used. The present invention may also be applied to electronic devices such as MEMS.

In the heterojunction FETs of the first to seventh embodiments, when the thickness of the active layer is t1 and the maximum thickness of the dielectric layer is t2max, the maximum thickness t2max of the dielectric layer and the dielectric layer The relationship between the product t2max · ε2 of the dielectric constant ε2 and the product t1 · ε1 of the active layer thickness t1 and the dielectric constant ε1 of the active layer is
t2max ・ ε2> t1 ・ ε1
It is preferable that the first condition is satisfied. In this case, the product t2max · ε2 of the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer is made larger than the product t1 · ε1 of the thickness t1 of the active layer and the dielectric constant ε1 of the active layer. Thus, the electric field distribution between the electrodes can be more easily uniformized.

Further, when the distance between the electrodes in which the electric field distribution is made substantially uniform is L and the maximum thickness of the dielectric layer is t2max, the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer are The relationship between the product t2max · ε2 and the product L · ε1 of the electrode spacing L and the dielectric constant ε1 of the active layer is
t2max ・ ε2> L ・ ε1
It is preferable that the second condition is satisfied. In this case, the product t2max · ε2 of the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer is made larger than the product L · ε1 of the electrode gap L and the dielectric constant ε1 of the active layer. Thus, the electric field distribution between the electrodes can be more easily uniformized.

  More preferably, both the first condition and the second condition are satisfied.

FIG. 1 is a cross-sectional view of a heterojunction FET as an example of an electronic device according to a fifth embodiment of the present invention. FIG. 2 is a cross-sectional view of a heterojunction FET as an example of an electronic device according to a sixth embodiment of the present invention. FIG. 3 is a cross-sectional view of a heterojunction FET as an example of an electronic device according to a seventh embodiment of the present invention. FIG. 4 is a cross-sectional view showing the device structure and potential of a heterojunction FET as an example of the electronic device according to the first embodiment of the present invention. FIG. 5 is a cross-sectional view showing the device structure and potential of a heterojunction FET as an example of an electronic device according to the second embodiment of the present invention. FIG. 6 is a cross-sectional view showing the device structure and potential of a heterojunction FET as an example of an electronic device according to the third embodiment of the present invention. FIG. 7 is a cross-sectional view showing an example of the device structure of a heterojunction FET as an electronic device of a first comparative example of the present invention and potential. FIG. 8 is a cross-sectional view showing an example of the device structure of a heterojunction FET as an electronic device of a second comparative example of the present invention and potential. FIG. 9 is a sectional view showing an example of the device structure and potential of a heterojunction FET as an electronic device according to the fourth embodiment of the present invention. FIG. 10 is a sectional view of a Schottky diode as an example of an electronic device according to an eighth embodiment of the present invention. FIG. 11 is a cross-sectional view of a heterojunction FET as a conventional electronic device. FIG. 12 is a cross-sectional view showing the device structure and potential of a conventional heterojunction FET.

Explanation of symbols

101, 201, 301, 401, 501, 601, 1001, 1201 ... Sapphire substrate 102, 202, 302, 402, 502, 602, 1202 ... GaN layer
103, 203, 303, 403, 503, 603, 1203 ... Al _0.5 Ga _0.5 N layer
104,201,301,401,501,601,1201 ... 2DEG
105, 205, 305, 405, 505, 605, 1205 ... Source ohmic electrode
106, 206, 406, 506, 606, 1206 ... gate Schottky electrode
107,207,307,407,507,607,1207 ... drain ohmic electrode
108 ... TiO ₂ layer 109 ... TiO ₂ layer 110 ... TiO ₂ layer 112 ... isolation mesa 208 ... TiO ₂ layer 209 ... HfO ₂ layer 210 ... SiN ₂ layer 306 ... Gate electrode
308 ... SiN ₂ layer 309 ... HfO ₂ layer 312 ... Isolation mesa 408, 508, 608, 708, 808, 908, 1008, 1009 ... Dielectric layer 1002 ... Buffer layer 1003 ... GaN layer 1005, 1007 ... Cathode ohmic electrode 1006 ... Anode Schottky electrode

Claims (24)

An electronic device with an active layer,
A plurality of electrodes formed on the active layer;
An electronic device comprising: a dielectric layer formed on the active layer so that an electric field distribution between at least two of the plurality of electrodes is substantially uniform. The electronic device according to claim 1.
The electronic device according to claim 1, wherein a dielectric constant ε2 of the dielectric layer is higher than a dielectric constant ε1 of the active layer. The electronic device according to claim 2.
When the thickness of the active layer is t1, and the maximum thickness of the dielectric layer is t2max, the product t2max · ε2 of the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer; The relationship between the thickness t1 of the active layer and the product t1 · ε1 of the dielectric constant ε1 of the active layer is:
t2max ・ ε2> t1 ・ ε1
An electronic device characterized by satisfying the following conditions. The electronic device according to claim 2.
When the distance between the electrodes in which the electric field distribution is substantially uniform is L and the maximum thickness of the dielectric layer is t2max, the maximum thickness t2max of the dielectric layer and the dielectric constant of the dielectric layer The relationship between the product t2max · ε2 with ε2 and the product L · ε1 of the gap L between the electrodes and the dielectric constant ε1 of the active layer is
t2max ・ ε2> L ・ ε1
An electronic device characterized by satisfying the following conditions. The electronic device according to claim 2.
When the thickness of the active layer is t1, and the maximum thickness of the dielectric layer is t2max, the product t2max · ε2 of the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer; The relationship between the thickness t1 of the active layer and the product t1 · ε1 of the dielectric constant ε1 of the active layer is:
t2max ・ ε2> t1 ・ ε1
While satisfying the conditions of
When the distance between the electrodes in which the electric field distribution is substantially uniform is L and the maximum thickness of the dielectric layer is t2max, the maximum thickness t2max of the dielectric layer and the dielectric constant of the dielectric layer The relationship between the product t2max · ε2 with ε2 and the product L · ε1 of the gap L between the electrodes and the dielectric constant ε1 of the active layer is
t2max ・ ε2> L ・ ε1
An electronic device characterized by satisfying the following conditions. The electronic device according to any one of claims 1 to 5,
The dielectric layer has a step-like stacked structure in which the number of layers is different for each step,
The sum of the product of the layer thickness and the dielectric constant at each stage of the dielectric layer is reduced from one of the electrodes in which the electric field distribution is substantially uniform toward the other. . The electronic device according to any one of claims 1 to 5,
An electronic device characterized in that the thickness of the dielectric layer decreases from one electrode to the other of the electrodes in which the electric field distribution is substantially uniform, or the dielectric constant of the dielectric layer decreases. . The electronic device according to any one of claims 1 to 7,
An electronic device, wherein the active layer is a group III nitride compound semiconductor. The electronic device according to any one of claims 1 to 8,
The electronic device, wherein the dielectric layer includes a metal oxide. The electronic device according to any one of claims 1 to 9,
The electronic device, wherein the dielectric layer is formed so as not to apply stress to the active layer. A gate electrode formed on an active layer made of a semiconductor;
A source electrode and a drain electrode formed on the active layer and on both sides of the gate electrode;
A heterojunction comprising a dielectric layer formed on the active layer such that an electric field distribution between at least one of the source electrode or the drain electrode and the gate electrode is substantially uniform. FET. The heterojunction FET according to claim 11,
The heterojunction FET, wherein the dielectric layer has a dielectric constant ε2 higher than a dielectric constant ε1 of the active layer. The heterojunction FET according to claim 12,
When the thickness of the active layer is t1, and the maximum thickness of the dielectric layer is t2max, the product t2max · ε2 of the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer; The relationship between the thickness t1 of the active layer and the product t1 · ε1 of the dielectric constant ε1 of the active layer is:
t2max ・ ε2> t1 ・ ε1
A heterojunction FET characterized by satisfying the following conditions. The heterojunction FET according to claim 12,
When the distance between the electrodes in which the electric field distribution is substantially uniform is L and the maximum thickness of the dielectric layer is t2max, the maximum thickness t2max of the dielectric layer and the dielectric constant of the dielectric layer The relationship between the product t2max · ε2 with ε2 and the product L · ε1 of the gap L between the electrodes and the dielectric constant ε1 of the active layer is
t2max ・ ε2> L ・ ε1
A heterojunction FET characterized by satisfying the following conditions. The heterojunction FET according to claim 12,
When the thickness of the active layer is t1, and the maximum thickness of the dielectric layer is t2max, the product t2max · ε2 of the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer; The relationship between the thickness t1 of the active layer and the product t1 · ε1 of the dielectric constant ε1 of the active layer is:
t2max ・ ε2> t1 ・ ε1
While satisfying the conditions of
When the distance between the electrodes in which the electric field distribution is substantially uniform is L and the maximum thickness of the dielectric layer is t2max, the maximum thickness t2max of the dielectric layer and the dielectric constant of the dielectric layer The relationship between the product t2max · ε2 with ε2 and the product L · ε1 of the gap L between the electrodes and the dielectric constant ε1 of the active layer is
t2max ・ ε2> L ・ ε1
A heterojunction FET characterized by satisfying the following conditions. The heterojunction FET according to any one of claims 11 to 15,
The dielectric layer has a step-like stacked structure in which the number of layers is different for each step,
The sum of the product of the layer thickness and the dielectric constant at each stage of the dielectric layer is reduced from one of the electrodes in which the electric field distribution is substantially uniform toward the other. FET. The heterojunction FET according to any one of claims 11 to 16,
A heterojunction characterized in that the thickness of the dielectric layer decreases from one electrode to the other of the electrodes in which the electric field distribution is substantially uniform, or the dielectric constant of the dielectric layer decreases. FET. The heterojunction FET according to any one of claims 11 to 17,
The heterojunction FET, wherein the active layer is a group III nitride compound semiconductor. The heterojunction FET according to any one of claims 11 to 18,
The heterojunction FET, wherein the dielectric layer includes at least one of metal oxides. The heterojunction FET according to any one of claims 11 to 19,
The heterojunction FET, wherein the dielectric layer is formed so as not to apply stress to the active layer. An electronic device with an active layer,
A plurality of electrodes formed on the active layer, and a dielectric layer;
The electronic device according to claim 1, wherein a dielectric constant ε2 of the dielectric layer is higher than a dielectric constant ε1 of the active layer. The electronic device according to claim 21, wherein
When the thickness of the active layer is t1, and the maximum thickness of the dielectric layer is t2max, the product t2max · ε2 of the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer; The relationship between the thickness t1 of the active layer and the product t1 · ε1 of the dielectric constant ε1 of the active layer is:
t2max ・ ε2> t1 ・ ε1
An electronic device characterized by satisfying the following conditions. A gate electrode formed on an active layer made of a semiconductor layer, a dielectric layer, and a source electrode and a drain electrode formed on the active layer and on both sides of the gate electrode,
The heterojunction FET, wherein the dielectric layer has a dielectric constant ε2 higher than a dielectric constant ε1 of the active layer. The heterojunction FET according to claim 23,
When the thickness of the active layer is t1, and the maximum thickness of the dielectric layer is t2max, the product t2max · ε2 of the maximum thickness t2max of the dielectric layer and the dielectric constant ε2 of the dielectric layer; The relationship between the thickness t1 of the active layer and the product t1 · ε1 of the dielectric constant ε1 of the active layer is:
t2max ・ ε2> t1 ・ ε1
A heterojunction FET characterized by satisfying the following conditions.

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