JP2006128327A - Electronic part and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic part having high reliability and a manufacturing method for the electronic part. <P>SOLUTION: The electronic part has a package substrate 20 formed of ceramic, a device chip 10 loaded on the package substrate 20 and a solder-plating film 30 for hermetic sealing formed between the package substrate 20 and the device chip 10. The solder-plating film has a base 36 formed of a resin and a solder layer 38 coating the whole base. The solder-plating film 30 is brought into contact with the outer-peripheral surface of the device chip 10 and the outer-peripheral surface of the package substrate 20. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a packaged electronic component and a method for manufacturing the same, and more particularly to a packaging technique suitable for application to a surface acoustic wave device.

  A surface acoustic wave device (SAW device) is known as one of electronic components. Surface acoustic wave devices are widely used in filter elements and oscillators of televisions, video tape recorders, DVD (digital Versatile Disk) recorders, mobile phones, and the like. Currently, SAW devices include various circuits that process radio signals in a frequency band of 45 MHz to 2 GHz, for example, a transmission band pass filter, a reception band pass filter, a local transmission filter, an antenna duplexer, an intermediate frequency filter, and an FM modulator. Widely used.

  In recent years, these signal processing devices have been reduced in size, and electronic components such as SAW devices used have been increasingly required to be downsized. In particular, surface-mounted and low-profile SAW devices have been required for portable electronic devices such as cellular phones. At the same time, it is required to ensure sufficient airtight reliability of the SAW device.

  In order to satisfy these requirements, a structure in which a package substrate, a SAW device chip, and a peripheral portion are brazed and sealed with a metal material such as solder as proposed in Patent Document 1 has been proposed (for example, Patent Reference 1).

  The structure described in Patent Document 1 will be described in detail with reference to FIG. In FIG. 7, reference numeral 10 denotes a SAW device chip in which an electrode for exciting and receiving SAW is formed on one main surface on a piezoelectric substrate. On the same main surface of the SAW device chip, there are electrode pads for inputting and outputting electric signals, and a metal layer that can be brazed with a metal material such as solder is formed on the electrode pads. Further, the outer peripheral surface of the SAW device chip has a sealing portion for performing brazing and sealing with solder, and includes a metal layer that can be brazed with a metal material such as solder similarly to the electrode pad portion.

Reference numeral 20 denotes a package substrate, which has a pad portion for electrically connecting the external terminal 22 and the SAW device chip formed on the opposite surface, and a sealing portion facing the outer peripheral sealing portion of the SAW device chip. Both include a metal layer that can be brazed with a metal material such as solder. The external terminal 22 and the pad portion are connected by a through wiring 21 penetrating the package substrate. The SAW device chip 10 and the package substrate 20 are so-called flip chip bonded via metal bumps 40. Further, each peripheral portion is hermetically sealed with a sealing solder 3.
JP 2004-129193 A

The structure proposed in Patent Document 1 is excellent in terms of ensuring airtightness for protecting the electrode portion of the SAW device chip 10 as a package. However, a 42 ° Y-cut X-propagation LiTaO ₃ substrate is generally used as a piezoelectric substrate for a SAW device used in a high-frequency stage of a mobile phone, and alumina ceramics is used as a package substrate. The respective thermal expansion coefficients differ greatly from 16 ppm / deg in the X direction of the LiTaO ₃ substrate and 7 ppm / deg in alumina. When sealing the periphery of the SAW device chip 10 and the package substrate 20 with solder, when the solder is fused and solidified and cooled to room temperature, a temperature difference of about 200 ° C. is caused. The SAW device chip 10 and the package substrate 20 are greatly warped, and a large stress is generated inside thereof.

  FIG. 8 shows the result of obtaining the displacement and stress generated between the SAW device chip 10 and the package substrate 20 by the finite element method. FIG. 8 shows the calculation results for the left half of the structure of FIG. The parameters used for the analysis are as follows. FIG. 8 (a) shows the case where zero stress is assumed, and FIG. 8 (b) shows the result of calculation of the actually acting stress.

温度変化： -200°C
はんだ層厚み：60μm
チップ・パッケージ幅：1.0mm (図は半分の0.5mm)
チップ・パッケージ厚み： 0.2mm
ＳＡＷデバイスチップ１０の主表面の中心部では１０７ＭＰａ、はんだ封止部内側端部には２４３ＭＰａもの大きな引っ張り応力がかかっている。セラミックのパッケージ基板２０側には中心部で１１５ＭＰａ、はんだ封止部内側端部には２１４ＭＰａの圧縮応力がかかっている。それぞれの材料における破壊応力値は必ずしも明確ではないが、追加の熱応力などちょっとしたきっかけで特にＬｉＴａＯ₃基板が割れてしまう現象が起こっている。このように、はんだ封止することによってＳＡＷデバイスチップ１０に発生する応力は、ＳＡＷデバイスの信頼性を低下する一つの要因になる。

Temperature change: -200 ° C
Solder layer thickness: 60μm
Chip package width: 1.0mm (The figure shows half 0.5mm)
Chip package thickness: 0.2mm
A large tensile stress of 107 MPa is applied to the central portion of the main surface of the SAW device chip 10 and 243 MPa is applied to the inner end portion of the solder sealing portion. A compressive stress of 115 MPa is applied to the ceramic package substrate 20 side, and a compressive stress of 214 MPa is applied to the inner end portion of the solder sealing portion. Although the fracture stress value of each material is not necessarily clear, a phenomenon that the LiTaO ₃ substrate is cracked in particular due to a slight trigger such as additional thermal stress is occurring. As described above, the stress generated in the SAW device chip 10 by soldering is one factor that decreases the reliability of the SAW device.

  Accordingly, an object of the present invention is to solve the above-described problems of the prior art and provide a highly reliable electronic component and a manufacturing method thereof.

  The present invention has a package substrate formed of ceramics, a device chip mounted thereon, and a solder plating film for hermetic sealing provided between the package substrate and the device chip, The solder plating film is an electronic component having a base formed of a resin and a solder layer covering the entire base. The resin of the solder plating film can relieve the stress generated in the portion sealed with the solder layer of the solder plating film, and the stress generated in the device chip 10 can be reduced.

  It is preferable that the solder plating film is in contact with the outer peripheral surface portion of the device chip and the outer peripheral surface portion of the package substrate. The Young's modulus of the solder plating film is preferably 5 MPa or less. Moreover, it is preferable that the thickness of a solder plating film is 20 micrometers or more. The base can be formed of a thermosetting resin or a thermoplastic resin. The solder layer is preferably formed on a base metal film formed on the base.

  The present invention also provides a step of providing a solder plating film on a ceramic package substrate capable of multi-sided chamfering, and the device chip is placed in contact with the peripheral portion of the device chip and the peripheral portion of the package substrate. A step of mounting on, a step of closely bonding the device chip and the package substrate by heating and melting the solder of the solder plating film, and a step of simultaneously cutting the package substrate and the solder plating film. The manufacturing method of the electronic component which has.

  ADVANTAGE OF THE INVENTION According to this invention, a reliable electronic component and its manufacturing method can be provided.

  FIG. 1 is a cross-sectional view of a SAW device 1 according to an embodiment of the present invention. In the figure, the same components as those shown in FIG. 7 are denoted by the same reference numerals. The SAW device 1 includes a package substrate 20 made of ceramics, an acoustic wave device chip 10 mounted thereon, and a hermetic sealing solder provided between the package substrate 20 and the acoustic wave device chip 10. And a plating film 30. The solder plating film 30 has a base 36 formed of a resin and a solder layer 38 that covers the entire base 36.

In the SAW device chip 10, an electrode (IDT: interdigital transducer) 11 for exciting and receiving SAW is formed on one main surface on a piezoelectric substrate such as LiTaO ₃ . On the same main surface of the SAW device chip 10, there are electrode pads 12 for inputting and outputting electrical signals. The electrode pad 12 is electrically connected to the IDT. The electrode pad 12 has a metal layer (for example, a gold layer) that can be brazed with a metal material such as solder. Further, the outer peripheral surface of the SAW device chip 10 has a sealing portion 13 for performing brazing and sealing with solder. Similarly to the electrode pad 12, a metal layer (for example, a gold layer) that can be brazed with a metal material such as solder is provided. Have. The sealing portion 13 is formed on the outer peripheral surface portion along each side of the SAW device chip 10, and is provided so as to surround the electrode 11 and the electrode pad 12.

  The package substrate 20 includes a pad 23 for electrically connecting to the external terminal 22 and the SAW device chip 10 formed on the surface opposite to the external terminal 22, and a sealing portion facing the outer peripheral sealing portion 13 of the SAW device chip 10. 24, both having a metal layer (for example, a gold layer) that can be brazed with a metal material such as solder. The sealing portion 24 is provided on the outer peripheral surface portion along each side of the package substrate 20 and is formed so as to surround the pad 23. The external terminal 22 and the pad 23 are connected by a through wiring 21 penetrating through the package substrate.

  The SAW device chip 10 and the package substrate 20 are so-called flip chip bonded via metal bumps 40. A solder plating film 30 is sandwiched between the sealing portion 13 formed at the peripheral portion of the SAW device chip 10 and the sealing portion 24 formed at the peripheral portion of the package substrate 20, and the solder layer 38 of the film 30 together. It is fused. This fused part becomes a solder sealing part. The space formed by the SAW device chip 10 and the package substrate 20 is hermetically sealed by the solder sealing portion. The entire outer periphery of the SAW device chip 10 is sealed with a sealing resin 50. The sealing resin 50 is in contact with the solder plating film 30.

  FIG. 2 shows the result of analyzing the stress portion in the SAW device chip 10 and the package substrate 20 generated when the SAW device 1 shown in FIG. Show. FIG. 2 shows the calculation results for the left half of the structure of FIG. FIG. 2 (a) shows a case where stress is assumed to be zero, and FIG. 2 (b) shows a result obtained by calculating a stress that actually acts.

温度変化： -200°C
ポリイミド厚み： 20μm
はんだ厚み：表裏各20μm
チップ・パッケージ幅：1.0mm (図は半分の0.5mm)
チップ・パッケージ厚み： 0.2mm
はんだめっきフィルム３０のベース３６を形成する樹脂材料には、耐熱性に優れたポリイミド樹脂を用いた。ＳＡＷデバイスチップ１０の主表面の中心部では５６ＭＰａ、はんだ封止部内側端部には１４４ＭＰａの引っ張り応力がかかっている。パッケージ基板２０側には中心部で５８ＭＰａ、はんだ封止部内側端部には１６９ＭＰａの圧縮応力がかかっている。これらの値は従来構造において解析した図８における値のおおよそ半分の値である。

Temperature change: -200 ° C
Polyimide thickness: 20μm
Solder thickness: 20μm on each side
Chip package width: 1.0mm (The figure shows half 0.5mm)
Chip package thickness: 0.2mm
As a resin material for forming the base 36 of the solder plating film 30, a polyimide resin having excellent heat resistance was used. A tensile stress of 56 MPa is applied to the central portion of the main surface of the SAW device chip 10 and 144 MPa is applied to the inner end portion of the solder sealing portion. A compressive stress of 58 MPa is applied to the package substrate 20 side at the center and 169 MPa is applied to the inner end of the solder sealing portion. These values are approximately half the values in FIG. 8 analyzed in the conventional structure.

  In the SAW device 1 of the present invention, the resin base 36 is sandwiched in the solder sealing portion, so that the stress generated in the solder sealing portion by the soft resin can be relieved, and the stress generated in the SAW device chip 10. Can be reduced. Thereby, the fall of the reliability of the SAW device 1 can be prevented.

  In the above embodiment, polyimide is used for the resin material used for the base 36 of the solder plating film. However, if there is no degradation such as decomposition due to the heating temperature of the solder sealing, heat of other resin materials such as epoxy resin is used. A thermoplastic resin such as a curable resin or a liquid crystal polymer can be used. A thermoplastic resin having plasticity in the high temperature part is more preferable because stress can be more relaxed.

  The conditions necessary for the base 36 of the film will be described with reference to FIGS. The graph of FIG. 3 shows the stress value generated inside the piezoelectric substrate of the SAW device chip 10 by changing the Young's modulus of the base 36 used for the solder plating film 30 by simulation. The stress values were shown at two locations at the center surface of the piezoelectric substrate and the solder joint end where the stress is maximum within the piezoelectric substrate. If the Young's modulus of the base 36 is approximately one tenth of that of the solder (E = 5 MPa) or less, the generated stress in the piezoelectric substrate is 2/3 or less of the case where only the solder is sealed. The internal stress can be lowered sufficiently. In FIG. 3, the value at which the Young's modulus of the base 36 used for the solder plating film 30 is 0 is a state in which the base 36 is not present, that is, in a state in which only a metal such as solder is sealed through a gap. is there. This state can be realized by removing the resin of the base 36 with an organic solvent or the like in the surface acoustic wave device of the embodiment shown in FIG.

  The graph of FIG. 4 shows the stress value generated inside the piezoelectric substrate of the SAW device chip 10 by changing the thickness of the base 36 used for the solder plating film 30 by simulation. Similar to FIG. 3, the stress values are two values at the center surface of the piezoelectric substrate and the solder joint end where the stress is maximum in the piezoelectric substrate. It can be seen that the greater the thickness of the base 36 used for the solder plating film 30, the smaller the stress generated in the piezoelectric substrate. If the thickness of the base 36 is 20 μm or more, the generated stress in the piezoelectric substrate is 2/3 or less of that in the case where the solder is sealed only with solder, and the stress in the piezoelectric substrate can be sufficiently reduced.

  Next, a method for manufacturing the SAW device 1 of the present invention will be described with reference to FIGS. In FIG. 5A, reference numeral 200 denotes a package substrate in which a plurality of SAW device chips 10 are arranged in a multi-chamfer shape. Reference numeral 300 denotes a sheet-like solder plating film in which a plurality of SAW device chips 10 as shown in FIG. FIG. 6B is an enlarged view of the mesh portion at the center of the solder plating film 300. The mesh portion is formed of a beam having a shape in which the electrode portion of the SAW device chip 10 is cut out and the sealing portions 13 (FIG. 1) of the adjacent SAW device chips 10 are connected. FIG. 6C shows a cross-sectional structure of the AA portion (beam portion) of FIG. The base 36 is formed of a resin film such as polyimide processed by punching or the like. On the base 36 formed of this resin film, a base metal 37 is formed by sputtering or the like, and a solder layer 38 is laminated by plating or the like.

  In FIG. 5A, the SAW device chip 10 is flip-mounted on the package substrate 200 with a solder plating film 300 interposed therebetween. After the solder plating film 300 is heated and fused, the space between the SAW device chips 10 and the upper surface are coated with the sealing resin 50. By separating the SAW devices 1 (gap between broken lines) by a cutting method such as dicing, individual SAW devices as shown in FIG. 5B are finally completed.

  The thus obtained package of the SAW device 1 of FIG. 1 is formed of the package substrate 20, the solder plating film 30 and the sealing resin 50. And the external field part of this package and the space in which the electrode 11 and the pads 12 and 23 in the package are formed are isolated by a metal material such as solder, and compared with the case where it is sealed only with a resin material. Reliability performance such as moisture resistance equivalent to the solder sealing of the example can be maintained.

  In the above description, the separated SAW device chips 10 are individually mounted on the package substrate 200. However, a plurality of SAW device chips 10 may be mounted on the package substrate 200 in a connected state. In this case, the SAW device chip 10, the package substrate 200, and the solder plating film 300 can be separated into individual SAW devices 1 by cutting them simultaneously. Furthermore, the SAW device chip 10 can be mounted on the package substrate 200 in units of wafers.

  The structure of the device of the present invention is not limited to the surface acoustic wave filter, and the thermal expansion between the device chip and the package substrate is performed when the periphery of the device chip and the package substrate is sealed in a hollow state using solder. It can also be applied when the coefficients are different. The present invention includes other acoustic wave devices (for example, FBAR) and various other device chips in which a circuit is formed on a substrate.

It is sectional drawing of the SAW device which concerns on one Example of this invention. It is a figure which shows the result of having analyzed the part of the stress in a SAW device chip and a package board | substrate which generate | occur | produces when the SAW device shown in FIG. It is the figure which showed the stress value which generate | occur | produces inside the piezoelectric substrate of a SAW device chip | tip, changing the Young's modulus of the base used for the solder plating film of the SAW device shown in FIG. 1 by simulation. It is a figure which shows the stress value which generate | occur | produces in the piezoelectric substrate of a SAW device chip | tip, changing the thickness of the base used for the solder plating film of the SAW device shown in FIG. 1 by simulation. It is a figure which shows the manufacturing method of the surface acoustic wave device which concerns on one Example of this invention. It is a figure which shows the manufacturing method of the surface acoustic wave device which concerns on one Example of this invention. It is sectional drawing of the conventional surface acoustic wave device. It is a figure which shows the result of having calculated | required the displacement and stress which generate | occur | produce between the SAW device chip | tip shown in FIG. 7, and a package board | substrate by the finite element method.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 SAW device 10 SAW device chip 11 Electrode 12 Electrode pad 13 Sealing part 20 Package substrate 22 Terminal 23 Pad 24 Sealing part 30 Solder plating film 36 Base 38 Solder layer 40 Metal bump

Claims (8)

A package substrate formed of ceramics, a device chip mounted thereon, and a solder plating film for hermetic sealing provided between the package substrate and the device chip, the solder plating film Has a base formed of a resin and a solder layer covering the whole base. The electronic component according to claim 1, wherein the solder plating film is in contact with an outer peripheral surface portion of the device chip and an outer peripheral surface portion of the package substrate. The electronic component according to claim 1, wherein the solder plating film has a Young's modulus of 5 MPa or less. The electronic component according to any one of claims 1 to 3, wherein a thickness of the pre-solder plating film is 20 µm or more. The electronic component according to claim 1, wherein the base is made of a thermosetting resin. The electronic component according to claim 1, wherein the base is made of a thermoplastic resin. The electronic component according to claim 1, wherein the solder layer is formed on a base metal film formed on the base. A process of providing a solder plating film on a ceramic package substrate capable of multiple chamfering;
Mounting the device chip on the package substrate so as to contact the peripheral portion of the device chip and the peripheral portion of the package substrate;
A step of closely bonding the device chip and the package substrate by heating and melting the solder of the solder plating film;
And a step of cutting the package substrate and the solder plating film simultaneously.

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