JP2006120893A - Semiconductor device and its manufacturing method - Google Patents

Semiconductor device and its manufacturing method Download PDF

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Publication number
JP2006120893A
JP2006120893A JP2004307845A JP2004307845A JP2006120893A JP 2006120893 A JP2006120893 A JP 2006120893A JP 2004307845 A JP2004307845 A JP 2004307845A JP 2004307845 A JP2004307845 A JP 2004307845A JP 2006120893 A JP2006120893 A JP 2006120893A
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Japan
Prior art keywords
copper pad
copper
pad
thin film
insulating film
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JP2004307845A
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Japanese (ja)
Inventor
Takeshi Hamaya
毅 濱谷
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2004307845A priority Critical patent/JP2006120893A/en
Publication of JP2006120893A publication Critical patent/JP2006120893A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049—Nitrides composed of metals from groups of the periodic table
    • H01L2924/0494—4th Group
    • H01L2924/04941—TiN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049—Nitrides composed of metals from groups of the periodic table
    • H01L2924/0495—5th Group
    • H01L2924/04953—TaN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Abstract

<P>PROBLEM TO BE SOLVED: To provide a joint of a gold ball and a copper pad, the joint being made stable with less influence of a surface state of the copper pad. <P>SOLUTION: A shielding thin film 4 comprised of either member of Ti, TiN, TaN is formed on the copper pad 3 formed of an uppermost layer copper wiring 2. At the time of wire bonding of the copper pad 3 and the gold ball 6 that form the shielding thin film 4, the copper pad 3 and the gold ball 6 are joined with each other by exposing a new surface of copper of the copper pad 3 by breaking the shielding thin film 4 formed on the copper pad 3 by load from the gold ball 6 and by ultrasonic vibration. It is possible to obtain the stable joint of the copper pad 3 and the gold ball 6, in which mutual diffusion of copper and gold sufficiently proceeds without being influenced by a surface state of copper oxide etc. produced owing to oxidation of the surface of the copper pad 3. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、絶縁膜で覆った銅パッドの拡散工程における、銅配線の形成で反射防止膜あるいはバリア膜等として用いるシールド薄膜を用いて、銅パッドに直接、金属細線を接合できる構造に特徴を有する半導体装置及びその製造方法に関するものである。   The present invention is characterized in that a metal thin wire can be directly bonded to a copper pad using a shield thin film used as an antireflection film or a barrier film in the formation of copper wiring in the diffusion process of the copper pad covered with an insulating film. The present invention relates to a semiconductor device having the same and a manufacturing method thereof.

近年、半導体素子への微細化，高速化の要求に伴い、半導体素子の配線材料として線幅０．１３μｍを用いるプロセス当たりからアルミニウムと比較して比較的低抵抗であり配線遅延も少なく、さらに、エレクトロマイグレーション耐性が向上できる銅を採用することが多くなっている。しかしながら、銅は容易に酸化し、その表面に非常に硬い酸化銅を生成する。その結果、ワイヤーボンディングの工程において、銅パッドに金ボールを押しつぶしても酸化銅を破壊することはできず銅パッドと金ボールは接合できない。   In recent years, with the demand for miniaturization and high speed of semiconductor elements, the resistance is relatively low compared to aluminum and the wiring delay is small since the process using a line width of 0.13 μm as a wiring material of semiconductor elements. Copper that can improve electromigration resistance is increasingly used. However, copper oxidizes easily and produces very hard copper oxide on its surface. As a result, in the wire bonding process, even if the gold ball is crushed on the copper pad, the copper oxide cannot be destroyed and the copper pad and the gold ball cannot be joined.

そこで従来の拡散工程において、銅配線と銅パッドの形成後に絶縁膜を成膜し、その後、銅パッド上の絶縁膜を除去して清浄化する。さらにその上に、金との接合性に優れた金属膜層のアルミニウムパッドを形成した構造とすることによって、安定した接合を行っている。   Therefore, in the conventional diffusion process, an insulating film is formed after the copper wiring and the copper pad are formed, and then the insulating film on the copper pad is removed and cleaned. Furthermore, stable bonding is performed by forming a structure in which an aluminum pad of a metal film layer excellent in bondability with gold is formed thereon.

また別の方法として、半導体素子の銅パッド（電極）に拡散工程の終了後、組立工程として金スタッドバンプを形成するが、この場合の基板において、銅パッドの表面をプラズマ処理して清浄化かつ活性化し、この銅パッドの表面に金スタッドバンプの接合を行っている。
特開２００１−６０６０２号公報 特開昭６１−２９６７５２号公報 As another method, a gold stud bump is formed on the copper pad (electrode) of the semiconductor element as an assembly process after completion of the diffusion process. In this case, the surface of the copper pad is cleaned and cleaned in the substrate in this case. Activated, the gold stud bump is bonded to the surface of the copper pad.
Japanese Patent Laid-Open No. 2001-60602 JP-A-61-296752

しかしながら、このような従来の技術では、以下のような課題を有していた。まず、銅パッド上にアルミニウムパッドを形成して接合する手法では、銅パッドの形成後に絶縁膜を全面に形成し、その後、銅パッド上の絶縁膜を除去してアルミニウムパッドを形成後、さらに絶縁膜を形成しなければならず、銅配線形成後の工程数が非常に多い。このため近年の半導体素子微細化に伴って、拡散工程が複雑かつ増大している中で、拡散工程のリードタイムが長くなり、拡散工程のコストも増大することになって、大きな課題となっている。   However, such conventional techniques have the following problems. First, in the technique of forming and bonding an aluminum pad on a copper pad, an insulating film is formed on the entire surface after the formation of the copper pad, and then the insulating film on the copper pad is removed to form an aluminum pad, and further insulation is performed. A film must be formed, and the number of steps after forming the copper wiring is very large. For this reason, with the recent miniaturization of semiconductor elements, the diffusion process has become complicated and increased, so the lead time of the diffusion process has become longer and the cost of the diffusion process has increased, which has become a major issue. Yes.

また、半導体素子の銅パッドに金スタッドバンプを形成する手法では、銅パッド表面をプラズマ処理する工程が必要であり、この処理を行うためのプラズマ装置も必要となる。この手法においても、前述と同様に、組立工程のリードタイムが長くなり、組立コストも増大するという課題がある。   Further, in the method of forming gold stud bumps on the copper pad of the semiconductor element, a step of plasma processing the surface of the copper pad is required, and a plasma apparatus for performing this processing is also required. Also in this method, as described above, there is a problem that the lead time of the assembly process becomes long and the assembly cost increases.

本発明は、前記従来技術の問題を解決することに指向するものであり、拡散工程における、最上層の銅配線で形成した銅パッド上に、銅配線形成において反射防止膜あるいはバリア膜等として用いるチタン（以下、Ｔｉという）、窒化チタン（以下、ＴｉＮという）または窒化タンタル（以下、ＴａＮという）のいずれかからなるシールド薄膜を形成することにより、コスト削減及び拡散工程のリードタイムを短縮化し、さらに接合時に金ボールが銅パッド上のシールド薄膜を破って、銅の新生面を露出させて接合して、銅パッドの表面状態による影響が小さく安定した接合ができる半導体装置及びその製造方法を提供することを目的とする。   The present invention is directed to solving the above-described problems of the prior art, and is used as an antireflection film or a barrier film in forming a copper wiring on a copper pad formed by the uppermost copper wiring in a diffusion process. By forming a shield thin film made of either titanium (hereinafter referred to as Ti), titanium nitride (hereinafter referred to as TiN) or tantalum nitride (hereinafter referred to as TaN), cost reduction and lead time of the diffusion process are shortened. Furthermore, a semiconductor device and a method for manufacturing the same are provided, in which a gold ball breaks a shield thin film on a copper pad at the time of bonding, and a new copper surface is exposed and bonded so that the influence of the surface state of the copper pad is small and stable bonding is possible. For the purpose.

前記の目的を達成するために、本発明に係る半導体装置は、基板上に形成した平坦な銅パッドと、基板上の全面に形成した絶縁膜と、銅パッド上で絶縁膜を除去した露出部分のみに形成したチタン（Ｔｉ）、窒化チタン（ＴｉＮ）または窒化タンタル（ＴａＮ）のいずれかからなるシールド薄膜とを備えたことを特徴とする。   In order to achieve the above object, a semiconductor device according to the present invention includes a flat copper pad formed on a substrate, an insulating film formed on the entire surface of the substrate, and an exposed portion obtained by removing the insulating film on the copper pad. And a shielding thin film made of any one of titanium (Ti), titanium nitride (TiN), and tantalum nitride (TaN).

また、前記半導体装置の製造方法は、基板上に平坦な銅パッドを形成後、基板上の全面に絶縁膜を形成する工程と、銅パッド上の絶縁膜を除去した露出部分のみにＴｉ、ＴｉＮまたはＴａＮのいずれかからなるシールド薄膜を形成する工程と、ワイヤーボンディングにより銅パッドと金属細線を接合する工程とを有することを特徴とする。   The method for manufacturing a semiconductor device includes a step of forming a flat copper pad on a substrate and then forming an insulating film on the entire surface of the substrate, and Ti and TiN only on an exposed portion where the insulating film on the copper pad is removed. Or a step of forming a shield thin film made of either TaN, and a step of bonding a copper pad and a fine metal wire by wire bonding.

さらに、ワイヤーボンディングにより銅パッドと金属細線を接合する工程において、銅パッドに荷重及び超音波振動を印加することによって、銅パッド上に形成したシールド薄膜を破り、銅パッド表面に銅の新生面を露出して金属細線と接合することを特徴とする。   Furthermore, in the process of bonding the copper pad and the fine metal wire by wire bonding, the shield thin film formed on the copper pad is broken by applying a load and ultrasonic vibration to the copper pad, and the new copper surface is exposed on the surface of the copper pad. Then, it is characterized in that it is bonded to a fine metal wire.

前記構成によれば、従来の絶縁膜削除後の銅パッド上にアルミニウムパッドを形成し、さらに全面に絶縁膜を形成した後でアルミニウムパッド上の絶縁膜を削除する工程を削減し、また銅パッドの表面をプラズマ処理して清浄化かつ活性化する工程を行うことなく、コスト削減及び拡散工程のリードタイムを短縮化して、また、従来のワイヤーボンディングの装置を用いた接合処理ができることから装置に新たな構成変更や追加を一切不要として、さらに銅パッド上のシールド薄膜を破って銅の新生面を露出させ接合するため、銅パッドの表面状態の影響が少なく安定した接合ができる。   According to the above configuration, it is possible to reduce the process of forming the aluminum pad on the copper pad after the conventional insulating film is removed, and further removing the insulating film on the aluminum pad after forming the insulating film on the entire surface. Without the need to clean and activate the surface of plasma by plasma treatment, the cost can be reduced, the lead time of the diffusion process can be shortened, and the bonding process using a conventional wire bonding apparatus can be performed. Since no new configuration change or addition is required and the shield thin film on the copper pad is further broken to expose and expose the new copper surface, the surface condition of the copper pad is not affected and stable bonding can be achieved.

本発明によれば、拡散工程における、最上層の銅配線で形成した銅パッド上に、通常、銅配線形成において反射防止膜あるいはバリア膜等として用いるＴｉ、ＴｉＮまたはＴａＮのいずれかからなるシールド薄膜を形成することにより、従来のアルミニウムパッド等を形成する工程と絶縁膜を形成する工程を削減することができ、これによってコスト削減及び拡散リードタイム短縮を実現できる。更には銅パッド表面を清浄化かつ活性化するプラズマ処理を行うことなく、ワイヤーボンディングの接合時に金ボールが銅パッド上のシールド薄膜を破り銅の新生面を露出させて接合することで、銅パッド表面状態の影響が小さく、相互拡散が十分に進行し安定した接合ができるという効果を奏する。   According to the present invention, a shield thin film made of any one of Ti, TiN or TaN which is usually used as an antireflection film or a barrier film in forming a copper wiring on a copper pad formed by the uppermost copper wiring in the diffusion process. By forming the film, it is possible to reduce a conventional process of forming an aluminum pad and the like and a process of forming an insulating film, thereby realizing cost reduction and diffusion lead time reduction. Furthermore, without performing a plasma treatment that cleans and activates the copper pad surface, the gold ball breaks the shield thin film on the copper pad and bonds the new copper surface exposed during wire bonding. The effect of the state is small, and the interdiffusion is sufficiently advanced and stable bonding can be achieved.

以下、図面を参照して本発明における実施の形態を詳細に説明する。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

図１は本発明の実施の形態１における半導体装置を示したもので、（ａ）は半導体装置のワイヤーボンディング前の半導体素子における銅パッド部分の断面図及び平面図、（ｂ）はワイヤーボンディング後の半導体素子における銅パッド部分の断面図を示す。図１において、１は各配線層の層間絶縁膜、２は最上層の銅配線、３は銅配線層に形成した銅パッド、４は露出している銅パッド３上に形成したシールド薄膜、５はチップ（半導体素子）を保護する絶縁膜、６は圧着させる金ボール、７はキャピラリー、８は金ワイヤーを示す。   1A and 1B show a semiconductor device according to a first embodiment of the present invention, in which FIG. 1A is a cross-sectional view and a plan view of a copper pad portion of a semiconductor element before wire bonding of the semiconductor device, and FIG. Sectional drawing of the copper pad part in the semiconductor element of is shown. In FIG. 1, 1 is an interlayer insulating film of each wiring layer, 2 is an uppermost copper wiring, 3 is a copper pad formed on the copper wiring layer, 4 is a shield thin film formed on the exposed copper pad 3, 5 Denotes an insulating film for protecting the chip (semiconductor element), 6 denotes a gold ball to be pressed, 7 denotes a capillary, and 8 denotes a gold wire.

図１に示すように、本実施の形態は、最上層の銅配線２で形成した銅パッド３の上に、通常、拡散工程の銅配線２の形成において用いる反射防止膜あるいはバリア膜等のＴｉ，ＴｉＮ，ＴａＮのいずれかの部材からなるシールド薄膜４を形成する。このＴｉ，ＴｉＮ，ＴａＮのシールド薄膜４を形成した銅パッド３上に金ボール６のワイヤーボンディングを行う時、金ボール６からの荷重と超音波振動によって銅パッド３上に形成したＴｉ，ＴｉＮ，ＴａＮのシールド薄膜４を破ることで、銅パッド３における銅の新生面を露出させて、銅パッド３と金ボール６の接合を行う。このことから、銅パッド３表面の酸化により生じる酸化銅等の表面状態が影響することなく、銅と金の相互拡散が十分に進行し安定した接合の半導体装置を得る。   As shown in FIG. 1, in this embodiment, a Ti layer such as an antireflection film or a barrier film, which is usually used in the formation of the copper wiring 2 in the diffusion process, is formed on the copper pad 3 formed by the uppermost copper wiring 2. The shield thin film 4 made of any one of TiN, TaN and the like is formed. When wire bonding of the gold ball 6 is performed on the copper pad 3 on which the shield thin film 4 of Ti, TiN, and TaN is formed, Ti, TiN, and the like formed on the copper pad 3 by the load from the gold ball 6 and ultrasonic vibration are used. By breaking the TaN shield thin film 4, the new copper surface of the copper pad 3 is exposed, and the copper pad 3 and the gold ball 6 are joined. Thus, a stable semiconductor device is obtained in which the mutual diffusion of copper and gold sufficiently proceeds without affecting the surface state of copper oxide or the like generated by the oxidation of the copper pad 3 surface.

また、図２（ａ），（ｂ），（ｃ）は本発明の実施の形態２における半導体装置の製造方法を示す。図２（ａ）に示すとおり各層の銅配線２及び層間絶縁膜１を化学気相堆積法（以下、ＣＶＤという）を用いて形成する。この工程により各層に銅配線２及び銅パッド３を形成し、最上層の形成後、化学的機械研磨（以下、ＣＭＰという）を用いて銅配線２及び銅パッド３を平坦化する。   2A, 2B, and 2C show a method for manufacturing a semiconductor device according to the second embodiment of the present invention. As shown in FIG. 2A, the copper wiring 2 and the interlayer insulating film 1 of each layer are formed by chemical vapor deposition (hereinafter referred to as CVD). By this process, the copper wiring 2 and the copper pad 3 are formed in each layer, and after the formation of the uppermost layer, the copper wiring 2 and the copper pad 3 are planarized using chemical mechanical polishing (hereinafter referred to as CMP).

次に、図２（ｂ）に示すように、銅パッド３を含む半導体素子上の全面にＣＶＤを用いてチップ保護用の絶縁膜５を形成し、銅パッド３上の絶縁膜５を除去する。その後、図２（ｃ）に示すように、露出している銅パッド３上のみにシールド薄膜４としてＴｉ，ＴｉＮ，ＴａＮからなる薄膜を形成する。   Next, as shown in FIG. 2B, the insulating film 5 for chip protection is formed on the entire surface of the semiconductor element including the copper pad 3 by using CVD, and the insulating film 5 on the copper pad 3 is removed. . Thereafter, as shown in FIG. 2C, a thin film made of Ti, TiN, TaN is formed as the shield thin film 4 only on the exposed copper pad 3.

そして、従来のワイヤーボンディングと同様に、キャピラリー７の金ボール６による荷重と超音波振動によって、銅パッド３上に形成したシールド薄膜４をキャピラリー７の先端部の金ボール６によって破り、銅パッド３表面に銅の新生面を露出させて接合することで、銅パッド表面状態の影響が小さい安定した接合ができる。   Similarly to the conventional wire bonding, the shield thin film 4 formed on the copper pad 3 is broken by the gold ball 6 at the tip end of the capillary 7 by the load and ultrasonic vibration caused by the gold ball 6 of the capillary 7, and the copper pad 3. By bonding the exposed new copper surface to the surface, it is possible to perform stable bonding with little influence of the surface state of the copper pad.

本発明に係る半導体装置及びその製造方法は、従来の工程を削減してコスト削減及び拡散工程のリードタイムを短縮化し、また従来のワイヤーボンディングの装置によって接合処理ができるため構成変更や追加を必要とせず、接合時に金ボールが銅パッド上のシールド薄膜を破り銅の新生面を露出させて接合するため、銅パッド表面状態の影響が小さく安定した接合ができ、銅パッドに金属細線を直接接合する構造の半導体装置及びその製造方法として有用である。   The semiconductor device and the manufacturing method thereof according to the present invention reduce the cost of the conventional process, shorten the lead time of the diffusion process, and can perform a bonding process by a conventional wire bonding apparatus, so that a configuration change or addition is necessary. Instead, the gold ball breaks the shield thin film on the copper pad at the time of bonding and exposes the new surface of the copper, so that the effect of the surface state of the copper pad is small and stable bonding is possible, and the fine metal wire is directly bonded to the copper pad. It is useful as a semiconductor device having a structure and a manufacturing method thereof.

本発明の実施の形態１における半導体装置の（ａ）はワイヤーボンディング前の半導体素子における銅パッド部分の断面図及び平面図、（ｂ）はワイヤーボンディング後の半導体素子における銅パッド部分の断面図(A) of the semiconductor device in Embodiment 1 of this invention is sectional drawing and a top view of the copper pad part in the semiconductor element before wire bonding, (b) is sectional drawing of the copper pad part in the semiconductor element after wire bonding 本発明の実施の形態２における半導体装置の製造方法の工程（ａ），（ｂ），（ｃ）を示す図The figure which shows process (a), (b), (c) of the manufacturing method of the semiconductor device in Embodiment 2 of this invention.

符号の説明Explanation of symbols

１ 層間絶縁膜
２ 銅配線
３ 銅パッド
４ シールド薄膜
５ 絶縁膜
６ 金ボール
７ キャピラリー
８ 金ワイヤー DESCRIPTION OF SYMBOLS 1 Interlayer insulating film 2 Copper wiring 3 Copper pad 4 Shielding thin film 5 Insulating film 6 Gold ball 7 Capillary 8 Gold wire

Claims (3)

基板上に形成した平坦な銅パッドと、前記基板上の全面に形成した絶縁膜と、前記銅パッド上で前記絶縁膜を除去した露出部分のみに形成したチタン、窒化チタンまたは窒化タンタルのいずれかからなるシールド薄膜とを備えたことを特徴とする半導体装置。   A flat copper pad formed on the substrate, an insulating film formed on the entire surface of the substrate, and any one of titanium, titanium nitride or tantalum nitride formed only on the exposed portion of the copper pad from which the insulating film has been removed. A semiconductor device comprising a shielding thin film made of 基板上に平坦な銅パッドを形成後、前記基板上の全面に絶縁膜を形成する工程と、前記銅パッド上で前記絶縁膜を除去した露出部分のみにチタン、窒化チタンまたは窒化タンタルのいずれかからなるシールド薄膜を形成する工程と、ワイヤーボンディングにより前記銅パッドと金属細線を接合する工程とを有することを特徴とする半導体装置の製造方法。   After forming a flat copper pad on the substrate, an insulating film is formed on the entire surface of the substrate, and only one of titanium, titanium nitride, and tantalum nitride is formed on the exposed portion where the insulating film is removed on the copper pad. A method of manufacturing a semiconductor device comprising: forming a shield thin film comprising: and bonding the copper pad and the fine metal wire by wire bonding. 前記ワイヤーボンディングにより銅パッドと金属細線を接合する工程において、前記銅パッドに荷重及び超音波振動を印加することによって、前記銅パッド上に形成したシールド薄膜を破り、前記銅パッド表面に銅の新生面を露出して前記金属細線と接合することを特徴とする請求項２記載の半導体装置の製造方法。   In the step of bonding the copper pad and the fine metal wire by the wire bonding, by applying a load and ultrasonic vibration to the copper pad, the shield thin film formed on the copper pad is broken, and a new copper surface is formed on the copper pad surface. 3. The method of manufacturing a semiconductor device according to claim 2, wherein the semiconductor device is exposed and bonded to the thin metal wire.
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Cited By (4)

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DE102006044691A1 (en) * 2006-09-22 2008-03-27 Infineon Technologies Ag Electronic component and method for manufacturing
JP2013089630A (en) * 2011-10-13 2013-05-13 Hitachi Chemical Co Ltd Semiconductor package and manufacturing method of the same
CN103151280A (en) * 2013-03-04 2013-06-12 哈尔滨工业大学（威海） Connection method of gold wire and copper foil
JP2013118310A (en) * 2011-12-05 2013-06-13 Jjtech Co Ltd Semiconductor device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102006044691A1 (en) * 2006-09-22 2008-03-27 Infineon Technologies Ag Electronic component and method for manufacturing
US8076238B2 (en) 2006-09-22 2011-12-13 Infineon Technologies Ag Electronic device and method for production
DE102006044691B4 (en) * 2006-09-22 2012-06-21 Infineon Technologies Ag Method for producing a terminal conductive structure of a component
US8552571B2 (en) 2006-09-22 2013-10-08 Infineon Technologies Ag Electronic device and method for production
US9368447B2 (en) 2006-09-22 2016-06-14 Infineon Technologies Ag Electronic device and method for production
US9754912B2 (en) 2006-09-22 2017-09-05 Infineon Technologies Ag Electronic device and method for production
JP2013089630A (en) * 2011-10-13 2013-05-13 Hitachi Chemical Co Ltd Semiconductor package and manufacturing method of the same
JP2013118310A (en) * 2011-12-05 2013-06-13 Jjtech Co Ltd Semiconductor device
CN103151280A (en) * 2013-03-04 2013-06-12 哈尔滨工业大学（威海） Connection method of gold wire and copper foil

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