JP2006108023A - Plasma display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize a plasma display panel displaying an image of good quality by stabilizing writing operation even in a case of realizing high definition by generating a stable priming discharge, or increasing partial pressure of xenon (Xe). <P>SOLUTION: The plasma display panel comprises main discharge cells 40 performing discharge between scanning electrodes 22 and sustaining electrodes 23 formed on a front face substrate 21, and data electrodes 32 formed on a back face substrate 31; and priming discharge cells 41a performing discharge between priming electrodes 29 formed on the front face substrate 21 and the data electrodes 32. An insulation layer 33 covering the data electrodes 32 is formed thereon. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a plasma display panel used for a wall-mounted television or a large monitor.

  A typical AC surface discharge type plasma display panel (hereinafter referred to as “PDP”) as an AC type includes a front plate made of a glass substrate formed by arranging scan electrodes and sustain electrodes for performing surface discharge, and a data electrode. A back plate made of a glass substrate formed in an array is arranged oppositely in parallel so that both electrodes form a matrix and form a discharge space in the gap, and the outer periphery thereof is sealed with a sealing material such as glass frit. It is configured by sealing. Discharge cells partitioned by barrier ribs are provided between the substrates, and a phosphor layer is formed in the cell space between the barrier ribs. In the PDP having such a configuration, color display is performed by generating ultraviolet rays by gas discharge and exciting the phosphors of R, G, and B colors with the ultraviolet rays to emit light.

  In this PDP, one field period is divided into a plurality of subfields, and is driven by a combination of subfields that emit light to perform gradation display. Each subfield includes an initialization period, an address period, and a sustain period. In order to display image data, different signal waveforms are applied to each electrode in the initialization period, the writing period, and the sustain period.

  In the initialization period, for example, a positive pulse voltage is applied to all the scan electrodes, and necessary wall charges are accumulated on the protective layer and the phosphor layer on the dielectric layer covering the scan electrodes and the sustain electrodes. In addition, it has a function of generating priming (priming for discharge = excited particles) for reducing the discharge delay and generating the address discharge stably.

  In the address period, scanning is performed by sequentially applying a negative scanning pulse to all the scanning electrodes, and when there is display data, if a positive data pulse is applied to the data electrodes while scanning the scanning electrodes, Discharge occurs between the scan electrode and the data electrode, and wall charges are formed on the surface of the protective layer on the scan electrode.

  In the subsequent sustain period, a voltage sufficient to maintain the discharge is applied between the scan electrode and the sustain electrode for a certain period. Thereby, discharge plasma is generated between the scan electrode and the sustain electrode, and the phosphor layer is excited to emit light for a certain period. In the discharge space where no data pulse is applied in the address period, no discharge occurs and excitation light emission of the phosphor layer does not occur.

  In such a PDP, a large discharge delay occurs in the discharge in the address period, and the address operation becomes unstable, or the address time is set long to completely perform the address operation, and the time spent in the address period becomes too long. There was a problem.

In order to solve these problems, a PDP has been proposed in which a priming electrode is provided to generate priming and reduce a discharge delay (see, for example, Patent Document 1).
JP-A-9-245627

  However, in these PDPs, when the number of lines is increased due to higher definition, the time spent for the address time becomes longer, and the time spent for the maintenance period must be reduced, and it is difficult to ensure the luminance when the definition is increased. The problem arises. Furthermore, in order to achieve high brightness and high efficiency, even when the xenon (Xe) partial pressure is increased, the discharge start voltage rises and the initializing discharge becomes unstable, which may result in writing failure. Therefore, there is a problem that the drive voltage margin for the write operation is narrowed.

  The present invention has been made in view of these problems, and a PDP having a stable addressing operation even when priming discharge is stably generated and high definition or xenon (Xe) partial pressure is increased is provided. The purpose is to provide.

  In order to solve the above-described problem, the PDP of the present invention is opposed to the first substrate across the discharge space and the scan electrode and the sustain electrode which are arranged in parallel on the first substrate and constitute the display electrode pair. A data electrode that is arranged on the second substrate arranged in a direction intersecting with the scanning electrode and forms a main discharge cell with the display electrode pair, an insulating layer covering the data electrode, a main discharge arranged on the insulating layer A plurality of main discharge cells connected to each other along a pair of display electrodes, and a partition wall provided with a gap between adjacent main discharge cell rows; The priming electrode is arranged in parallel with the scanning electrode at a position corresponding to a gap where the two scanning electrodes are adjacent to each other.

  With this configuration, it is possible to realize stable priming discharge by suppressing dielectric breakdown between the data electrode and the priming discharge space. Therefore, by stably forming the priming discharge, it is possible to realize a PDP suitable for high definition with excellent address characteristics.

  Further, instead of the insulating layer covering the data electrode, an insulating layer may be provided at least on the second substrate side of the gap portion where the priming electrode is disposed. Even with such a configuration, it is possible to realize stable priming discharge by suppressing dielectric breakdown between the data electrode and the priming discharge space.

  As described above, according to the present invention, by stably generating priming discharge, even when the definition is increased or the xenon (Xe) partial pressure is increased, the writing operation is stabilized and the quality is improved. A PDP for displaying an image can be realized.

  Hereinafter, a PDP according to an embodiment of the present invention will be described with reference to the drawings.

(Embodiment)
FIG. 1 is a cross-sectional perspective view showing a structure of a PDP according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view of the PDP. A front substrate 21 made of glass as a first substrate and a rear substrate 31 as a second substrate are arranged opposite to each other with a discharge space interposed therebetween, and neon (Ne) and xenon (X A mixed gas with Xe) is enclosed.

  On the front substrate 21, a plurality of display electrode pairs composed of the scan electrodes 22 and the sustain electrodes 23 are formed in parallel to each other. At this time, for example, the display electrode pair adjacent to the display electrode pair configured in the order of scan electrode 22 -sustain electrode 23 is configured in the order of sustain electrode 23 -scan electrode 22. A priming electrode 29 is formed in parallel with the display electrode pair on the side facing the scanning electrode 22 between adjacent display electrode pairs. Therefore, on front substrate 21, sustain electrode 23-scan electrode 22-priming electrode 29-scan electrode 22-sustain electrode 23-sustain electrode 23-scan electrode 22-priming electrode 29-scan electrode 22-sustain electrode 23-.・ It is arranged so that Scan electrode 22 and sustain electrode 23 are each composed of transparent electrodes 22a and 23a and metal bus bars 22b and 23b formed on transparent electrodes 22a and 23a, respectively. A light absorption layer 28 made of a black material is provided between scan electrode 22 and scan electrode 22 and between sustain electrode 23 and sustain electrode 23, and priming electrode 29 is provided between scan electrode 22 and scan electrode 22. A metal bus is used on the light absorption layer 28. A dielectric layer 24 and a protective layer 25 are formed so as to cover the scan electrode 22, the sustain electrode 23, the priming electrode 29, and the light absorption layer 28.

  On the rear substrate 31, a plurality of data electrodes 32 are formed in parallel to each other in a direction intersecting with the scanning electrodes 22, and an insulating layer 33 is formed so as to cover the data electrodes 32. A reflective layer 50 is formed so as to cover the insulating layer 33, and a partition wall 34 for partitioning the main discharge cell 40 is formed on the reflective layer 50.

  The partition wall 34 includes a vertical wall portion 34 a extending in a direction parallel to the data electrode 32, and a horizontal wall portion 34 b that forms the main discharge cell 40 and forms a gap portion 41 between the main discharge cells 40. As a result, the barrier ribs 34 form a main discharge cell row in which a plurality of main discharge cells 40 are connected along a pair of display electrodes including the scan electrode 22 and the sustain electrode 23, and a gap is formed between adjacent main discharge cell rows. A portion 41 is formed. A priming electrode 29 is formed on the front substrate 21 of the gap 41 on the side where the two scanning electrodes 22 are adjacent to each other in the gap 41, and this gap acts as a priming discharge cell 41a. In other words, every other gap portion 41 is a priming discharge cell 41 a having the priming electrodes 29. The gap 41b is a gap 41 located on the side where the two sustain electrodes 23 are adjacent to each other.

  The tops of the partition walls 34 are formed flat so as to contact the front substrate 21. This is to prevent mutual interference between the adjacent main discharge cells 40, and in particular prevents malfunction such as erroneous writing due to the influence of priming that occurs due to the address discharge of the adjacent main discharge cells 40 in the address period. Because. Furthermore, this is to prevent malfunction such as a write failure due to a decrease in wall charges of the main discharge cell 40 adjacent to the priming discharge cell 41a accompanying the priming discharge.

As shown in FIGS. 1 and 2, an insulating layer 33 made of a highly insulating material covers the data electrode 32 on the back substrate 31 and has a substantially uniform thickness. As a material having a large insulating property, a glass material such as a ZnO—B ₂ O ₃ —SiO ₂ -based mixture, a PbO—B ₂ O ₃ —SiO ₂ -based mixture, or PbO—ZnO—B ₂ O ₃ —SiO _{2 is used.} A system mixture, a Bi ₂ O ₃ —B ₂ O ₃ —SiO ₂ system mixture, or the like is used. Further, the reflective layer 50 having an increased reflectance is formed to have a substantially uniform film thickness so as to cover the insulating layer 33. The reflective layer 50 increases the reflectance by mixing a filler such as TiO ₂ , and reflects light emitted from the main discharge cell 40 toward the front substrate 21, thereby increasing the light emission efficiency of the PDP.

  A phosphor layer 35 is provided on the surface of the reflective layer 50 corresponding to the main discharge cells 40 partitioned by the barrier ribs 34 and on the side surfaces of the barrier ribs 34. In FIG. 1, the phosphor layer 35 is not formed on the gap 41 side, but the phosphor layer 35 may be formed.

FIG. 3 is an electrode array diagram of the PDP in the embodiment of the present invention. M columns of data electrodes D _{1 to} D _m (data electrodes 32 in FIG. 1) are arranged in the column direction, and n rows of scan electrodes SC _{1 to} SC _n (scan electrodes 22 in FIG. 1) and n rows of data electrodes are arranged in the row direction. Sustain electrodes SU _{1 to} SU _n (sustain electrode 23 in FIG. 1) and n / 2 rows of priming electrodes PR _{1 to} PR _n-1 (priming electrode 29 in FIG. 1) are sustain electrodes SU ₁ -scan electrode SC _1-. priming electrodes PR ₁ - scan electrode SC ₂ - sustain electrode SU ₂ - sustain electrode SU ₃ - scan electrode SC ₃ - priming electrode PR ₃ - scan electrode SC ₄ - sustain electrode _SU 4 - are arranged so as to ... Yes. A main discharge cell C _{i, j} (main discharge in FIG. 1) including a pair of scan electrodes SC _i , sustain electrodes SU _i (i = 1 to n) and one data electrode D _j (j = 1 to _m ). M × n cells 40) are formed in the discharge space. In addition, n / 2 priming discharge cells PS _p (priming discharge cells 41a in FIG. 1) including priming electrodes PR _p (p is an odd number) and data electrodes D _{1 to} D _m are formed in the discharge space. The details will be described later, the priming generated in the write period in the priming discharge cell PS _p, the main discharge cell _C p adjacent to priming discharge cell _{PS p, 1 ~C p, m} , C p + 1,1 ~C p + 1 _{, M.}

  Next, driving waveforms and timing for driving the PDP will be described together with the operation of the PDP. FIG. 4 is a drive waveform diagram of the PDP in the embodiment of the present invention. In the embodiment of the present invention, one field period is composed of a plurality of subfields having an initializing period, an address period, and a sustaining period, and the initializing period of the first subfield is all the main discharges related to image display. Perform all-cell initializing operation for generating initializing discharge in the cell, and the second and subsequent subfields selectively perform initializing discharge with respect to the main discharge cells that have undergone sustain discharge in the sustain period of the immediately preceding subfield. A description will be given assuming that the selective initialization operation to be generated is performed. The all-cell initialization period is divided into two for convenience and will be referred to as the first half and the second half.

In half of the initializing period of the first subfield, data electrodes _D 1 to D _m, holds the sustain electrodes _SU 1 to SU _n in each 0 (V), the scan electrodes _SC 1 to SC _n from the voltage _{V i1} , applying a ramp waveform voltage gradually rises toward the voltage _{V i2} that exceeds the discharge start voltage with respect to sustain electrodes _SU 1 to SU _n and the data electrodes _D 1 to D _m. Further, the same ramp waveform voltage as that of the scan electrodes SC _{1 to} SC _n is applied to the priming electrodes PR _{1 to} PR _n−1 . Then, in the main discharge cell, weak initializing discharge is generated between scan electrodes SC _{1 to} SC _n and sustain electrodes SU _{1 to} SU _n , scan electrodes SC _{1 to} SC _n and data electrodes D _{1 to} D _m , respectively. In the priming discharge cell, a weak initializing discharge occurs between the priming electrodes PR _{1 to} PR _n-1 and the data electrodes D _{1 to} D _m . Negative wall voltage is accumulated on scan electrodes _SC 1 to SC _n upper and priming electrode _{PR 1 ~PR n-1} upper, data electrodes _D 1 to to D _m and sustain electrodes _SU 1 to SU _n upper Accumulates positive wall voltage. Here, the wall voltage at the top of the electrode represents a voltage generated by wall charges accumulated on the dielectric layer or the phosphor layer covering the electrode.

In the second half of the initializing period, maintaining the sustain electrodes _SU 1 to SU _n to a positive voltage Ve, the scan electrodes _SC 1 to SC _n, the discharge with respect to sustain electrodes _SU 1 to SU _n and the data electrodes _D 1 to D _m A ramp waveform voltage that gently falls from a voltage V _{i3 that} is equal to or lower than the start voltage to a voltage V _i4 that exceeds the discharge start voltage is applied. Further, the same ramp waveform voltage as that of the scan electrodes SC _{1 to} SC _n is applied to the priming electrodes PR _{1 to} PR _n−1 . Then, scan electrodes SC _{1 to} SC _n and sustain electrodes SU _{1 to} SU _n , scan electrodes SC _{1 to} SC _n and data electrodes D _{1 to} D _m , priming electrodes PR _{1 to} PR _n-1 and data electrodes D _{1 to} D _A weak initializing discharge occurs between each and _m . Then, negative wall voltage and sustain electrodes _SU 1 to SU _n positive wall voltage on scan electrodes _SC 1 to SC _n upper are weakened, positive wall voltage on data electrodes _D 1 to D _m upper address operation The wall voltage above the priming electrodes PR _{1 to} PR _n−1 is also adjusted to a value suitable for the priming operation. Thus, the all-cell initialization operation for initializing all the discharge cells involved in image display is completed.

In the address period, scan electrodes SC _{1 to} SC _n and priming electrodes PR _{1 to} PR _n−1 are temporarily held at voltage Vc. This is because unnecessary discharge is not generated with application of an address pulse voltage Vd described later. Then, applying a negative priming pulse voltage Vp to priming electrode PR ₁ of the first row. Priming pulse at this time is large pulse amplitude, regardless of the presence of the write pulses applied to the data electrodes D ₁ to D _m, priming discharge between the priming electrode PR ₁ and the data electrodes D ₁ to D _m Occurs. Then, priming is supplied to the main discharge cells C _{1,1 to} C _{1, m in the} first row and the main discharge cells C _{2,1 to} C _{2, m in the} second row. Positive wall voltage is accumulated in the priming electrodes PR ₁ upper This discharge.

Then, to apply a negative scan pulse voltage Va to scan electrodes SC ₁ of the first row. At the same time, a positive write pulse voltage Vd is applied to the data electrode D _k (k represents an integer of 1 to _m ) corresponding to the image signal to be displayed in the first row among the data electrodes D _{1 to} D _m. . Then, during the discharge occurs at the intersection of the data electrode D _k of applying a write pulse voltage Vd and scan electrodes SC _1, and the sustain electrodes SU ₁ corresponding main discharge cells C _{1, k} and the scan electrodes SC ₁ Progresses to discharge. The main discharge cell C _{1, k} positive wall voltage on scan electrodes SC ₁ top of are accumulated negative wall voltage on sustain electrodes SU ₁ upper is accumulated, the first line of the write operation is terminated. Here, the address discharge in the main discharge cells C _{1 and k} occurs after the priming is supplied from the priming discharge generated between the priming electrode PR ₁ and the data electrodes D _{1 to} D _m , so that the discharge delay is small and stable. Discharge.

Next, scan pulse voltage Va is applied to the second line scan electrode SC _2. At the same time, applying a positive write pulse voltage Vd to data electrode D _k corresponding to the image signal to be displayed on the second line of the data electrodes D ₁ to D _m. Then, discharge occurs at the intersection of the data electrode D _k and scan electrode SC _2, develop into a discharge between the corresponding sustain electrode SU ₂ main discharge cell C _{2, k} and scan electrode SC _2. The main discharge cell C _{2, k} a positive wall voltage to the scan electrodes SC ₂ top of the accumulated negative wall voltage on sustain electrode SU ₂ top is stored, the second line of the write operation is terminated. Here, the main discharge cell C _{2, k} of the writing discharge is also small discharge delay because occurs after priming is supplied from the generated priming discharge between the priming electrode PR ₁ and the data electrodes D ₁ to D _m Stable discharge.

At the same time when applying a scan pulse voltage Va in the second row to the scan electrodes SC _2, applies a priming pulse voltage Vp to priming electrode PR _3. Then regardless of the presence of the write pulses applied to the data electrodes _D 1 to D _m, priming discharge occurs between priming electrode PR ₃ and the data electrodes _D 1 to D _m. Then, priming is supplied to the main discharge cells C _{3,1 to} C _{3, m in the third} row and the main discharge cells C _{4,1 to} C _{4, m in the} fourth row. Positive wall voltage is accumulated priming electrode PR ₃ top by the discharge.

Thereafter, the same address operation is performed until reaching the main discharge cells C _{n, k} in the _n- th row, and the address operation is completed. The address discharge of each main discharge cell C _{i, j} is generated after the priming is supplied from the adjacent priming discharge cell, so that it becomes a stable discharge with a small discharge delay.

In the sustain period, scan electrodes SC _{1 to} SC _n , priming electrodes PR _{1 to} PR _n−1 and sustain electrodes SU _{1 to} SU _n are temporarily returned to 0 (V). Then, applying a positive sustain pulse voltage Vs to scan electrodes _SC 1 to SC _n. At this time, the voltage between the upper portion of scan electrode SC _{i and} upper portion of sustain electrode SU _i in main discharge cell C _{i, j where} address discharge has occurred is in addition to sustain pulse voltage Vs, and the upper portion of scan electrode SC _i in the address period. Since the wall voltage accumulated on the sustain electrode SU _i is added, the discharge start voltage is exceeded and a sustain discharge occurs. Similarly, the sustain pulse voltage is alternately applied to scan electrodes SC _{1 to} SC _n and sustain electrodes SU _{1 to} SU _n to thereby generate sustain pulses for main discharge cells C _{i, j} that have caused an address discharge. The sustain discharge is continuously performed by the number of times.

As shown in FIG. 4, sustain pulse voltage Vs similar to that of scan electrodes SC _{1 to} SC _n is applied to priming electrodes PR _{1 to} PR _n−1 . Since a positive wall voltage is accumulated on the top of the priming electrodes PR _{1 to} PR _n−1 in the address period, a discharge occurs inside the priming discharge cell when the first sustain pulse voltage is applied, but after that a discharge occurs. do not do.

In subsequent initializing period of the subfield, the sustain electrodes _SU 1 to SU _n held at the positive voltage Ve, is slowly toward voltage Vi ₄ to the scan electrodes _SC 1 to SC _n and the priming electrode _{PR 1 ~PR n-1} Apply a falling ramp waveform voltage. Then, between the scan electrodes SC _{1 to} SC _n and the sustain electrodes SU _{1 to} SU _n and the data electrodes D _{1 to} D _m of the main discharge cells C _{i, k} that have undergone the sustain discharge, and the priming electrodes PR _{1 to} PR _{n −1} and a weak initializing discharge occur between the data electrodes D _{1 to} D _m , respectively. Then, scan electrodes _SC 1 to SC _n and sustain electrodes _SU 1 to SU _n top of the wall voltage is weakened, positive wall voltage on data electrodes _D 1 to D _m upper is adjusted to a value suitable for the write operation, The positive wall voltage above the priming electrodes PR _{1 to} PR _n−1 is also adjusted to a value suitable for the priming operation.

  The subsequent writing period, sustain period, and subsequent subfield drive waveforms and panel operation are the same as described above.

As described above, during the initialization period and the sustain period, substantially the same drive waveform voltage as that of the scan electrodes SC _{1 to} SC _n is applied to the priming electrodes PR _{1 to} PR _n−1 . This is because the distance between the scan electrodes SC _p and SC _{p + 1} and the priming electrode PR _p is short, so that unnecessary discharge is not generated between the electrodes. In addition, a discharge not related to image display is generated inside the priming discharge cell when the first sustain pulse voltage is applied in the address period and the sustain period. However, since the light absorption layer 28 is provided in the priming discharge cell, it occurs at this time. The emitted light does not leak outside the panel. In the address period, the address discharge of each main discharge cell C _{i, j} is generated after the priming is supplied from the adjacent priming discharge cell, so that the discharge becomes a stable discharge with a small discharge delay.

Further, since there is an overlap between the time during which the scan pulse voltage is applied to the scan electrode SC _p-1 and the time during which the priming pulse voltage is applied to the priming electrode PR _p , the priming discharge in the first row is excluded. It is not necessary to newly provide time for priming discharge. In the present embodiment, an address discharge is generated between scan electrode SC _p-1 and data electrode D _k , and at the same time, a priming discharge is generated between priming electrode PR _p and data electrodes D _{1 to} D _m . Thus, it is possible to generate priming discharge without extending the panel driving time.

  In the above description of the operation, the initializing period of the first subfield performs all-cell initializing operation in which initializing discharge is performed in all main discharge cells, and the sustaining discharge is performed in the initializing period after the next subfield. Although it has been described that the selective initializing operation for selectively initializing the main discharge cells is performed, these initializing operations may be arbitrarily combined.

  Thus, in the present embodiment, the priming discharge is generated in the vertical direction between the priming electrode 29 provided on the front substrate 21 and the data electrode 32 provided on the rear substrate 31.

  On the other hand, when stabilizing the address operation characteristics using such priming discharge, it is important to stably form the priming discharge itself. For example, when the insulation breakdown voltage of the insulating layer 33 that insulates the data electrode 32 from the discharge space of the priming discharge cell 41a is insufficient or causes dielectric breakdown, the image display is seriously affected. That is, when dielectric breakdown or the like occurs in the insulating layer 33 on the data electrode 32, an abnormally strong priming discharge is generated in the dielectric breakdown portion, which becomes abnormal discharge in the priming discharge cell 41a and induces erroneous discharge in the main discharge cell 40. To do. Since this erroneous discharge covers a range of a plurality of cells, it is observed as a huge bright spot on the display screen, and the display quality of the PDP is remarkably lowered.

  However, in the embodiment of the present invention, the insulating layer 33 having sufficiently improved insulation properties is formed on the data electrode 32 of the back substrate 31 by using the above glass material. Therefore, the insulation between the data electrode 32 and the discharge space of the priming discharge cell 41a can be secured and the dielectric breakdown of the insulating layer 33 can be suppressed, so that an abnormally strong priming discharge or the like is prevented and generated on the display screen. Giant bright spots can be prevented. Therefore, variation in the priming discharge in the priming discharge cell 41a having an elongated shape can be suppressed, and uniform priming discharge can be generated for each main discharge cell 40, thereby realizing an image display with high display quality. It becomes.

  As described above, according to the embodiment of the present invention, the dielectric breakdown in the priming discharge cell is prevented to prevent abnormal discharge, abnormal luminescent spots, etc., and the priming discharge is stably formed, thereby improving the address characteristics. An excellent PDP suitable for high definition capable of high quality display can be realized.

  FIG. 5 is a view showing a cross section of another example of the PDP in the embodiment of the present invention. In the embodiment of the present invention, as shown in FIG. 5, the data electrode 32 is covered with a reflective layer 50, a partition wall 34 is formed on the reflective layer 50, and an insulating layer is formed on the back substrate 31 side of the priming discharge cell 41a. 33 may be formed.

  As described above, in the embodiment of the present invention, the priming discharge is generated in the vertical direction between the priming electrode 29 provided on the front substrate 21 and the data electrode 32 provided on the rear substrate 31. Therefore, the same effect as described above can be obtained even when the insulating layer 33 is formed on the back substrate 31 side of the priming discharge cell 41a and the withstand voltage performance against priming discharge is improved in the priming discharge cell 41a. In this case, as compared with the case where the insulating layer 33 is formed on the entire surface of the back substrate 31, an effect that the number of steps in the manufacturing process of the PDP can be reduced is also obtained. Note that the insulating layer 33 may be formed also in the gap 41b corresponding to the position where the sustain electrode 23 is disposed.

  Since the present invention can stably generate an address discharge without narrowing the drive voltage margin for the address operation, it is useful as a PDP used for a wall-mounted television, a large monitor or the like.

Sectional perspective view which shows the structure of PDP in embodiment of this invention Cross-sectional view of the PDP Electrode arrangement of the PDP Drive waveform diagram of the PDP The figure which shows the cross section of the other example of the PDP

Explanation of symbols

DESCRIPTION OF SYMBOLS 21 Front substrate 22 Scan electrode 22a, 23a Transparent electrode 22b, 23b Metal bus line 23 Sustain electrode 24 Dielectric layer 25 Protective layer 28 Light absorption layer 29 Priming electrode 31 Back substrate 32 Data electrode 33 Insulating layer 34 Partition 34a Vertical wall part 34b Horizontal wall Part 35 Phosphor layer 40 Main discharge cell 41, 41b Gap part 41a Priming discharge cell 50 Reflective layer

Claims (2)

A scan electrode and a sustain electrode arranged in parallel on the first substrate and constituting a display electrode pair, and a scan electrode on the second substrate arranged opposite to the first substrate across a discharge space The display electrode pair and a display electrode pair constituting a main discharge cell, a data electrode, an insulating layer covering the data electrode, and a main discharge cell arranged on the insulating layer to divide the main discharge cell, A plurality of main discharge cell rows connected along the display electrode pairs and a partition wall provided with a gap between adjacent main discharge cell rows;
A plasma display panel, wherein a priming electrode is arranged in parallel with the scanning electrode at a position corresponding to a gap portion where two scanning electrodes are adjacent to each other on the first substrate. 2. The plasma display panel according to claim 1, wherein an insulating layer is provided on at least the second substrate side of the gap portion in which the priming electrode is disposed instead of the insulating layer covering the data electrode.

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