JP2006065308A - Light emitting device and driving method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve a problem wherein, in a driving method of applying a reverse bias voltage, capacitance occurs due to a stacked structure of a conductor, an insulator and a conductor or due to a structure of a TFT, and this capacitance prevents normal operation. <P>SOLUTION: The invention provides a pixel configuration including at least a driving transistor for driving a light emitting element and a switching transistor for controlling the driving transistor, wherein the switching transistor is turned on in the case of applying a forward bias voltage after applying a reverse bias voltage. As a result, the potential of the gate electrode of the driving transistor is prevented from changing. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

The present invention relates to a light emitting device having a light emitting element and a driving method thereof.

It is known that when a reverse voltage not involved in light emission is applied to a light emitting element, the lifetime of the element is extended. Using this phenomenon, an active matrix driving type light emitting device has been proposed in which a reverse voltage is applied during a non-lighting period in accordance with the synchronization timing of input video data (see Patent Document 1).

In addition, a defect voltage can be repaired by applying a reverse voltage. For example, there has been proposed a method of completely repairing a defective portion by applying a reverse voltage to a light emitting element without using a TFT (see Patent Document 2).
JP 2001-109432 A JP 2004-31335 A

However, in a driving method in which a reverse voltage is applied, a capacitor formed by stacking a conductor, an insulator, and a conductor or a capacitor due to the structure of the TFT is generated. This capacity hinders accurate driving of the light emitting device. A phenomenon that the light emitting element is slightly lit (hereinafter referred to as “black floating”) appears in a period that should be unlit.

Accordingly, an object of the present invention is to provide a driving method for accurately applying a reverse voltage and a light emitting device having a configuration for achieving the driving method.

In view of the above problems, the present invention provides at least a first transistor (also referred to as a driving transistor) for driving a light-emitting element, and a second transistor (also referred to as a switching transistor) for controlling the first transistor. The switching transistor is turned on when a reverse voltage is applied to the pixel configuration having the above. As a result, the gate electrode of the driving transistor can be brought into an electrically non-floating state. That is, the means for bringing the gate electrode of the first transistor into an electrically non-floating state includes a switching transistor that is turned on and a control circuit that is turned on. Further, when a reverse voltage is further applied, in order to apply the reverse voltage to the light emitting element, the driving transistor is also controlled to be turned on. When a forward voltage is applied, a signal for turning off the light emitting element, that is, a signal for turning off the driving transistor (non-lighting signal) is input to the switching transistor that is turned on. As a result, it is possible to prevent black floating in which the light emitting element is unnecessarily lit.

A specific configuration of the present invention will be described.

According to one embodiment of the present invention, a light-emitting element, a first transistor for driving the light-emitting element, a second transistor for controlling the first transistor, and applying a forward voltage after applying a reverse voltage In some cases, there is provided means for electrically bringing the gate electrode of the first transistor into a non-floating state and means for bringing the gate electrode of the first transistor into a potential at which the light emitting element does not emit light. It is a light-emitting device.

The means for electrically non-floating the gate electrode of the first transistor when applying the forward voltage after applying the reverse voltage corresponds to the second transistor in the on state. The drive circuit has a control circuit for turning on.

In addition, the means for setting the gate electrode of the first transistor to a potential at which the light emitting element does not emit light can be applied to a signal line to which a signal indicating that the light emitting element is not turned on when the second transistor is on. Correspondingly, the drive circuit has a circuit for generating the signal.

A specific driving method of the present invention will be described.

One embodiment of the present invention includes a light-emitting element, a first transistor for driving the light-emitting element, and a second transistor for controlling the first transistor, and after applying a reverse voltage to the light-emitting element. When applying a forward voltage, the gate electrode of the first transistor is electrically non-floating, and the gate electrode of the first transistor is set to a potential at which the light-emitting element is not lit. It is a drive method of a light-emitting device. The forward voltage is a voltage in a state where the anode potential of the light emitting element is higher than the cathode potential, and the reverse voltage is a voltage in a state where the anode potential of the light emitting element is lower than the cathode potential.

According to the present invention, since the gate electrode of the driving transistor can be electrically non-floating, accurate driving can be performed. As a result, a reverse voltage can be applied to the light emitting element, and the lifetime of the light emitting element can be extended.

Embodiments of the present invention will be described below with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention is not construed as being limited to the description of this embodiment mode. Note that in all the drawings for describing the embodiments, the same portions or portions having similar functions are denoted by the same reference numerals, and repetitive description thereof is omitted.

(Embodiment 1)
In this embodiment, a pixel structure and a driving method are described.

FIG. 1 shows a pixel configuration including a signal line 10, a switching transistor 11, a driving transistor 12, a scanning line 13, a power supply line 14, a capacitor element 15, and a light emitting element 16. A plurality of these pixels form a pixel region.

A connection relationship in the pixel will be described. The switching transistor 11 is provided at the intersection of the signal line 10 and the scanning line 13. One electrode of the switching transistor is connected to the signal line 10, and the gate electrode of the switching transistor is connected to the scanning line 13. The driving transistor 12 has one electrode connected to the power supply line 14 and a gate electrode connected to the other electrode of the switching transistor. The capacitive element 15 is provided so as to hold the gate-source voltage of the driving transistor. In this embodiment, one electrode of the capacitor 15 is connected to the power supply line 14 and the other electrode is connected to the gate electrode of the driving transistor. Note that it is not necessary to provide the capacitor 15 when the gate capacitance of the driving transistor is large and the leakage current is small. The light emitting element 16 is connected to the other electrode of the driving transistor 12.

A method for driving such a pixel will be described.

First, when the switching transistor 11 is turned on, a video signal is input from the signal line 10. Based on the video signal, charges are accumulated in the capacitor element 15. When the charge accumulated in the capacitor 15 exceeds the gate-source voltage (Vgs) of the driving transistor 12, the driving transistor 12 is turned on. Then, a current is supplied to the light emitting element 16 to light it. At this time, the driving transistor 12 can be operated in a linear region or a saturation region. When operating in the saturation region, a constant current can be supplied. Further, when operating in a linear region, it can be operated at a low voltage, and power consumption can be reduced.

Hereinafter, a pixel driving method will be described with reference to a timing chart.

4 (A) and 4 (B) are timing charts of one frame period in which rewriting of an image of 60 frames per second is performed, and the vertical axis indicates a scanning line G (from the first line to the last line), The horizontal axis indicates time.

One frame period has m (m is a natural number of 2 or more) subframe periods SF1, SF2,..., SFm, and the m subframe periods SF1, SF2,. .., Tam, and one frame period includes a display period (lighting period) Ts1, Ts2,..., Tsm and a reverse voltage application period. In this embodiment mode, as shown in FIG. 4B, one frame period is provided with subframe periods SF1, SF2, and SF3 and a reverse voltage application period (FRB). In each subframe period, the writing operation periods Ta1 to Ta3 are sequentially performed, and become display periods Ts1 to Ts3, respectively.

4C shows a writing operation period, a display period, and a reverse voltage application period when attention is paid to a certain row (i-th row). After the writing operation period and the display period appear alternately, a reverse voltage application period appears. A period having a writing operation period and a display period is a forward voltage application period.

In the forward voltage application period, as shown in FIG. 5A, the switching transistor is turned on, and a signal for turning on the light emitting element (lighting signal) is input from the signal line 10. Based on this, the driving transistor is turned on, current is supplied from the power supply line 14, and the light emitting element is turned on.

The reverse voltage application period includes a period in which the switching transistors of all the pixels are simultaneously turned on, that is, a period in which all the scanning lines are turned on (on period), and a period in which the reverse voltage is applied (application period). ing. Note that the reverse voltage application period is a period in which the WE signal is input and the light emitting element is not lit.

After the reverse voltage application period, a period in which the switching transistors of all the pixels are simultaneously turned off, that is, a period in which all the scanning lines are turned off (off period). In the present embodiment, the forward voltage application period has an off period.

The present invention is characterized in that the switching transistor is controlled to be turned on in the on period of the reverse voltage application period. Therefore, as shown in FIG. 5B, the gate electrode of the driving transistor can be electrically non-floating. Specifically, when the switching transistor is turned on, the point A becomes electrically non-floating, so that when the reverse voltage period is changed to the forward voltage period, mainly due to unnecessary capacitive coupling between AB. The potential at point A is prevented from changing. As a result, lighting of the light-emitting element due to unnecessary capacitive coupling in the off period can be prevented.

In the prior art, since the switching transistor is turned off before and after the reverse voltage is applied, the point A is in a floating state, and due to the potential fluctuation at the point A due to unnecessary capacitive coupling between the point A and the point B. The light emitting element sometimes turned on.

Note that as illustrated in FIG. 5B, the light-emitting element needs to be in a non-lighting state before and after the application period in which the reverse voltage is applied. Therefore, a signal for indicating that the light emitting element is not lit (indicated as a non-lighting signal) is input from the signal line 10 to the signal line 10 to which the switching transistor is connected. For example, when the polarity of the driving transistor 12 is a p-channel type, a high signal is input. On the other hand, when the polarity of the driving transistor is an n-channel type, a low signal may be input. These signals are supplied from a signal line driver circuit. Then, before and after the reverse voltage is applied, it is possible to prevent a potential change mainly due to unnecessary capacitive coupling between AB. Therefore, black floating can be prevented in the forward voltage application period, more specifically, when the reverse voltage application period is changed to the forward voltage application period.

Next, in the off period, the switching transistor is turned off. Thereafter, the next frame period starts.

With such a driving method, the reverse voltage can be applied without lighting the light emitting element. As a result, accurate video display can be performed. Furthermore, the lifetime of the light emitting element can be extended.

An erasing period (SE) is provided immediately before the reverse voltage application period. In the erasing period, the subframe period immediately before the erasing period, in this embodiment, the data written in SF3 is sequentially erased. This is because, in the on period, the switching transistors are turned on all at once after the display period of the pixels in the last row ends, so the pixels in the first row and the like have unnecessary display periods. It is. In order to perform accurate video display, an erasing period is provided.

FIG. 4D shows a signal waveform input to the scanning line 13. The period T1 is when the WE signal is at L (Low) level, and the period T2 is when the WE signal is at H (High) level. Note that the H level or the L level refers to a potential having a relative height difference. The periods T1 and T2 correspond to half of one gate selection period (one horizontal period), and the period T1 is also referred to as a first sub-gate period and the period T2 is also referred to as a second sub-gate period.

In the first sub-gate period, a signal (GDb) is input from the second scanning line driver circuit to the i-th scanning line in synchronization with the WE signal. In the second sub-gate period, a signal (GDa) is input from the first scan line driver circuit to the i-th scan line in synchronization with the WE signal. Thus, by providing a plurality of sub-gate periods in one gate selection period, a display video signal and an erasing video signal can be written from the signal line in each writing operation period. Therefore, there is no need to provide an erasing transistor, and a high aperture ratio can be achieved.

FIG. 4E shows the WE signal, the reverse voltage application control signal (GL), the anode (ANODE) potential, and the cathode (CATHODE) potential in the reverse voltage application period (FRB). In the reverse application period, first, the WE signal and GL are at the H level. This is the ON period (ON). Thereafter, an application period (RB) is started, and the potential of the anode is reversed first. That is, when the potential of the anode is H level, it becomes L level. The cathode potential is then reversed. That is, when the potential of the anode is L level, it becomes H level. Thereafter, the anode potential returns, and then the cathode potential returns. In this way, an accurate reverse voltage can be applied by sequentially inverting the potentials of the anode and the cathode. In such an application period, a reverse voltage is applied to the light emitting element. Thereafter, GL becomes L level, and this time is an off period (OFF).

Such control is performed by a driving circuit such as a scanning line driving circuit or a signal line driving circuit. Specifically, this is performed by a switch circuit provided in the scanning line driving circuit or the signal line driving circuit.

Note that the timing of applying the reverse voltage to the light emitting element 16, that is, the reverse voltage application period is not limited to that shown in FIG. That is, it is not necessary to provide a reverse voltage application period for each frame. Further, it is not necessary to provide a reverse voltage application period in the second half of one frame. The on period may be at least immediately before the application period (RB), and the off period may be at least immediately after the application period (RB). Further, the order in which the anode potential and the cathode potential of the light emitting element are reversed is not limited to that shown in FIG. That is, the anode potential may be lowered after the cathode potential is raised.

As a result of applying the reverse voltage to the light emitting element, the deterioration state of the light emitting element can be improved and the reliability can be improved. In addition, the light emitting element may have an initial failure in which the anode and the cathode are short-circuited due to adhesion of foreign matters, pinholes due to fine protrusions on the anode or the cathode, and non-uniformity of the electroluminescent layer. When such an initial failure occurs, lighting and non-lighting in accordance with the signal are not performed, and most of the current flows through the short-circuit portion, which may cause a phenomenon that the pixel is extinguished. As a result, there arises a problem that the image is not displayed favorably. Further, this short circuit may occur in any pixel. Therefore, as in the present embodiment, a reverse voltage is applied to the light emitting element. Then, a local current flows only in the short circuit part, the short circuit part generates heat, and the short circuit part can be oxidized or carbonized. As a result, it is possible to insulate the short-circuited portion, a current flows in a region outside the short-circuited portion, and luminance corresponding to the signal can be obtained. By applying the reverse voltage in this way, even if an initial failure occurs, the failure can be eliminated and an image can be displayed favorably. Such insulation of the short-circuit portion is preferably performed before shipment.

In addition to the initial failure, a new short circuit between the anode and the cathode may occur over time. Such a defect is also called a progressive defect. Therefore, since a reverse voltage can be periodically applied to the light emitting element, even if a progressive defect occurs, the defect can be eliminated and video display can be performed satisfactorily.

Further, image burn-in can be prevented by applying a reverse voltage. Image burn-in occurs due to the deterioration state of the light emitting element 16, but the deterioration state can be reduced by applying a reverse voltage. As a result, image burn-in can be prevented.

In general, the deterioration of the light emitting element greatly progresses in the initial stage, and the degree of deterioration progresses with time. That is, in a pixel, once a light emitting element has deteriorated, further deterioration is unlikely to occur. Therefore, the deterioration state of all the pixels can be averaged by lighting all the pixels before the shipment or when not displaying an image and causing the pixels that have not deteriorated to deteriorate. In this way, a configuration may be provided in which all pixels are lit when not displayed.

As described above, the lifetime of the light-emitting element can be extended by applying an accurate reverse voltage. Further, according to the driving method of the present invention, potential fluctuation due to unnecessary capacitive coupling during the reverse voltage application period can be prevented, so that the light emitting element can be prevented from being turned on and an accurate driving method of the light emitting device can be provided.

(Embodiment 2)
In this embodiment mode, an entire panel having the above pixels will be described.

As shown in FIG. 11, the light-emitting device of the present invention includes a pixel region 40 in which a plurality of pixels described above are arranged in a matrix, a first scanning line driving circuit 41, a second scanning line driving circuit 42, And a signal line driver circuit 43. The first scanning line driving circuit 41 and the second scanning line driving circuit 42 may be disposed so as to face each other with the pixel region 40 interposed therebetween, or may be disposed in one of the upper, lower, left, and right sides of the pixel region 40.

The signal line driver circuit 43 includes a pulse output circuit 44, a latch 45, and a selection circuit 46. The latch 45 has a first latch 47 and a second latch 48. The selection circuit 46 includes a transistor 49 (hereinafter referred to as TFT 49) and an analog switch 50 as switching means. The TFT 49 and the analog switch 50 are provided in each column corresponding to the signal line. In addition, in the present embodiment, an inverter 51 is provided in each column in order to generate an inverted signal of the WE signal. Note that the inverter 51 may not be provided when an inverted signal of the WE signal is supplied from the outside. The gate electrode of the TFT 49 is connected to the selection signal line 52, one electrode is connected to the signal line, and the other electrode is connected to the power supply 53. The analog switch 50 is provided between the second latch 48 and each signal line. That is, the input node of the analog switch 50 is connected to the second latch 48, and the output node is connected to the signal line. One of the two control nodes of the analog switch 50 is connected to the selection signal line 52, and the other is connected to the selection signal line 52 via the inverter 51. The potential of the power source 53 is a potential for turning off the driving transistor 12 included in the pixel. When the polarity of the driving transistor 12 is n-channel type, the potential of the power source 53 is set to L level, and the driving transistor 12 is p-channel. In the case of the type, the potential of the power supply 53 is set to H level. However, the potential of the power supply 53 is set such that the driving transistor 12 is turned on in the reverse voltage application period. This is because a reverse voltage is applied to the light emitting element.

The first scanning line driving circuit 41 includes a pulse output circuit 54 and a selection circuit 55, and an OR circuit 39 is provided between the pulse output circuit 54 and the selection circuit 55. The second scanning line driving circuit 42 includes a pulse output circuit 56 and a selection circuit 57. Note that in the second scan line driver circuit, an OR circuit may be provided between the pulse output circuit 56 and the selection circuit 57 to input a control signal (GL). Start pulses (G1SP, G2SP) are input to the pulse output circuits 54, 56, respectively. In addition, clock pulses (G1CK, G2CK) and inverted clock pulses (G1CKB, G2CKB) are input to the pulse output circuits 54, 56, respectively.

The selection circuits 55 and 57 are connected to the selection signal line 52. However, the selection circuit 57 included in the second scanning line driving circuit 42 is connected to the selection signal line 52 via the inverter 58. That is, the WE signals input to the selection circuits 55 and 57 via the selection signal line 52 are in an inverted relationship with each other.

Each of the selection circuits 55 and 57 has a tristate buffer circuit. The input nodes of the tristate buffer circuit are connected to the pulse output circuit 54 or the pulse output circuit 56, respectively. One of the control nodes of the tristate buffer circuit is connected to the selection signal line 52 and the other is connected to the output node of the OR circuit 39. Each output node of the tri-state buffer circuit is connected to a scanning line. The tri-state buffer circuit is in an operating state when a signal transmitted from the selection signal line 52 is at an H level, and is in a high impedance state when the signal is at an L level.

One of the input nodes of the OR circuit 39 is connected to a terminal to which a control signal (GL) is input, and the other is connected to each pulse output circuit 54. The switching transistor 11 and the driving transistor 12 can be selected (turned on) in the reverse voltage application period by the OR circuit 39 and the control signal (GL), that is, by the first scanning line driving circuit 41. . Note that in this embodiment, an inverter and an AND circuit may be used instead of the OR circuit.

The pulse output circuit 44 included in the signal line driving circuit 43, the pulse output circuit 54 included in the first scanning line driving circuit 41, and the pulse output circuit 56 included in the second scanning line driving circuit 42 are composed of a plurality of flip-flop circuits. A shift register and a decoder circuit are included. If a decoder circuit is applied as the pulse output circuits 44, 54 and 56, a signal line or a scanning line can be selected at random. If a signal line or a scanning line can be selected at random, it is possible to suppress the generation of a pseudo contour that occurs when the time gray scale method is applied.

The signal line driving circuit 43 can input a non-lighting signal to the signal line Sm during the reverse voltage application period.

Note that the configuration of the signal line driver circuit 43 is not limited to the above description, and a level shifter or a buffer circuit may be provided. Further, the configurations of the first scan line driver circuit 41 and the second scan line driver circuit 42 are not limited to the above description, and a level shifter or a buffer circuit may be provided. In addition, each of the signal line driver circuit 43, the first scan line driver circuit 41, and the second scan line driver circuit 42 may include a protection circuit.

FIG. 12 shows a configuration example of the protection circuit. The protection circuit has a plurality of resistance elements. In this embodiment, p-channel transistors are used as the plurality of resistance elements. The protection circuit can be provided in the signal line driver circuit 43, the first scan line driver circuit 41, or the second scan line driver circuit 42. Preferably, the signal line driver circuit 43 and the first scan line driver circuit are provided. 41 or between the second scan line driver circuit 42 and the pixel region 40. For example, when provided between the signal line driver circuit and the pixel region, the input node of the protection circuit is connected to the signal line driver circuit, and the output node is connected to the signal line. Such a protection circuit can suppress deterioration and destruction of the element due to static electricity.

In the present embodiment, the light emitting device has a power supply control circuit 63. The power supply control circuit 63 includes a power supply circuit 61 that supplies power to the light emitting element 16 and a controller 62. The power supply circuit 61 includes a power supply 17, and the first power supply 17 is connected to the pixel electrode of the light emitting element 16 through the driving transistor 12 and the power supply line Ym. The power supply circuit 61 has a power supply 18, and the second power supply 18 is connected to the light emitting element 16 through a power supply line connected to the counter electrode.

When a forward voltage is applied to the light emitting element 16 and current is caused to flow through the light emitting element 16 to emit light, the potential of the first power supply 17 is set to be higher than the potential of the second power supply 18. On the other hand, when a reverse voltage is applied to the light emitting element 16, the potential of the first power supply 17 is set to be lower than the potential of the second power supply 18. Such setting of the power supply can be performed by supplying a predetermined signal from the controller 62 to the power supply circuit 61. By using such a power supply control circuit 63, a reverse voltage can be applied to the light emitting element 16, and deterioration over time of the light emitting element 16 can be suppressed and reliability can be improved. Specifically, it reduces the initial failure that the anode and the cathode are short-circuited due to adhesion of foreign matters, pinholes due to fine protrusions on the anode or cathode, and non-uniformity of the electroluminescent layer. can do. In addition, it is possible to eliminate the progressive failure in which a short circuit between the anode and the cathode newly occurs with the passage of time, and to display an image satisfactorily. There are no particular restrictions on the timing at which the reverse voltage is applied to the light emitting element 16.

In this embodiment mode, the light-emitting device includes a monitor circuit 64 and a control circuit 65. The monitor circuit 64 operates based on the ambient temperature (hereinafter referred to as environmental temperature). The control circuit 65 has a constant current source and a buffer circuit. In the configuration shown in the drawing, the monitor circuit 64 has a monitor light emitting element (hereinafter referred to as a monitor element).

The control circuit 65 supplies a signal for changing the power supply potential to the power supply control circuit 63 based on the output of the monitor circuit 64. The power supply control circuit 63 changes the power supply potential supplied to the pixel region 40 based on the signal supplied from the control circuit 65. The present invention having the above-described configuration can improve the reliability by suppressing the fluctuation of the current value caused by the change in the environmental temperature. Detailed configurations of the monitor circuit 64 and the control circuit 65 will be described later in the following embodiments.

(Embodiment 3)
In this embodiment, the structure of the first or second scan line driver circuit is described. Note that the configuration of the second scanning line driving circuit 42 is the same as that of the first scanning line driving circuit 41, and thus the description thereof is omitted.

As shown in FIG. 13, the first scanning line driving circuit 41 includes a pulse output circuit 54, a level shifter (GLS) 86, and a selection circuit 55.

A clock signal (GCK, GCKB) and a start pulse (GSP) are input to the pulse output circuit 54. A signal generated from these pulse signals is input to the selection circuit 55 via the NAND circuit 79.

The selection circuit 55 can be formed to include a buffer circuit 80, a tristate buffer circuit, and a protection circuit.

FIG. 14 shows the configuration of the buffer circuit 80. The buffer circuit 80 includes a plurality of inverters, NAND circuits, and transistors. Based on the input of the control signal (GL) and the WE signal, a signal as shown in FIG. 4 is input to each scanning line (Gn). In addition, a control signal is input to the buffer circuit 80 via the connected OR circuit 39, and in addition, a WE signal is input. In the reverse voltage application period, the switching transistor 11 is turned on by the control signal (GL), so that the gate electrode of the driving transistor 12 can be brought into an electrically non-floating state.

The tri-state buffer circuit prevents one of the first scanning line driving circuit 41 and the second scanning line driving circuit 42 from disturbing the output of the other driver when charging / discharging the scanning line. Play a function. Therefore, as the selection circuit 55, an analog switch, a clocked inverter, or the like may be used in addition to the tristate buffer circuit as long as it has the above function.

In addition, when a protection circuit is provided in the first scan line driver circuit 41, even if a clock signal or a data signal input to the input node includes noise, malfunction of the element, deterioration of the element, Destruction can be suppressed.

This embodiment mode can be freely combined with the above embodiment modes.

(Embodiment 4)
In this embodiment, a temperature compensation function will be described.

As shown in FIG. 17, the temperature compensation function is executed by a monitor circuit 64, a control circuit 65, and a power supply control circuit 63 that operate based on the ambient temperature. The monitor circuit 64 has a monitor element 66 in the configuration shown in the figure. One electrode of the monitor element is connected to a power source maintained at a constant potential (grounded in the configuration shown in the figure), and the other electrode is connected to the control circuit 65. The control circuit 65 includes a constant current source 91 and an amplifier 92. The power supply control circuit 63 includes a power supply circuit 61 and a controller 62. The power supply circuit 61 is preferably a variable power supply that can change the power supply potential to be supplied.

A mechanism in which the monitor element detects the environmental temperature will be described. A constant current is supplied from the constant current source 91 between both electrodes of the monitor element. That is, the current value of the monitor element is always constant. When the environmental temperature changes in this state, the resistance value of the monitor element itself changes. When the resistance value of the monitor element changes, the current value of the monitor element is always constant, so that the potential difference between both electrodes of the monitor element changes. A change in the environmental temperature is detected by detecting a change in the potential difference of the monitor element due to this temperature change. More specifically, since the potential of the electrode on the side maintained at a constant potential of the monitor element does not change, a change in the potential of the electrode connected to the constant current source 91 is detected. A signal including information on such a change in potential of the light emitting element is supplied to the amplifier 92, amplified by the amplifier 92, and then output to the power supply control circuit 63. The power supply control circuit 63 changes the potential of the power supplied to the pixel region 40 through the amplifier 92 based on the output of the monitor circuit 64. Then, the power supply potential can be corrected according to the temperature change. That is, the fluctuation of the current value caused by the temperature change can be suppressed.

Note that although the configuration shown in the drawing includes a plurality of monitor elements, the present invention is not limited to this. The number of monitor elements provided in the monitor circuit 64 is not limited. Since such a temperature compensation function does not require any operation by the user, it can be corrected continuously after the display device is passed to the end user, so that the product can have a long life. This embodiment mode can be freely combined with the above embodiment modes.

(Embodiment 5)
In this embodiment, a layout example and a cross-sectional view example of a pixel structure in the case where a thin film transistor (TFT) is used as a transistor will be described.

FIG. 2 shows a layout example of the pixel configuration shown in FIG. A semiconductor film constituting the switching transistor 11 and the driving transistor 12 is formed. After that, a first conductive film is formed through an insulating film functioning as a gate insulating film. The conductive film can be used as the gate electrode of the switching transistor 11 and the driving transistor 12 and can be used as the scanning line 13. At this time, the switching transistor 11 may have a double gate structure.

After that, a second conductive film is formed through an insulating film functioning as an interlayer insulating film. The conductive film can be used as the drain wiring and the source wiring of the switching transistor 11 and the driving transistor 12, and can also be used as the signal line 10 and the power supply line 14. At this time, the capacitor 15 can be formed by a stacked structure of a first conductive film, an insulating film functioning as an interlayer insulating film, and a second conductive film. The gate electrode of the driving transistor and the other electrode of the switching transistor are connected through a contact hole.

A pixel electrode 19 is formed in an opening provided in the pixel. The pixel electrode is connected to the other electrode of the driving transistor. At this time, when an insulating film or the like is provided between the second conductive film and the pixel electrode, the pixel electrode 19 needs to be connected to the other electrode of the driving transistor 12 through a contact hole. In the case where an insulating film or the like is not provided, the pixel electrode can be directly connected to the other electrode of the driving transistor 12.

In the layout as shown in FIG. 2, the first conductive film and the pixel electrode may overlap as in the region 430 in order to ensure a high aperture ratio. In such a region 430, unnecessary coupling capacitance may occur. This coupling capacity is an unnecessary capacity. The driving method of the present invention can prevent potential change due to such unnecessary capacitance.

FIG. 3 shows an example of a cross-sectional view taken along the lines AB and CD shown in FIG.

A patterned semiconductor film is formed on the insulating substrate 20 through a base film. As the insulating substrate 20, for example, a glass substrate such as barium borosilicate glass or alumino borosilicate glass, a quartz substrate, a stainless steel (SUS) substrate, or the like can be used. In addition, substrates made of plastics represented by PET (polyethylene terephthalate), PEN (polyethylene naphthalate), PES (polyethersulfone), and flexible synthetic resins such as acrylic are generally other substrates. However, it can be used as long as it can withstand the processing temperature in the manufacturing process. As the base film, an insulating film such as silicon oxide, silicon nitride, or silicon nitride oxide can be used.

An amorphous semiconductor film is formed over the base film. The thickness of the amorphous semiconductor film is 25 to 100 nm (preferably 30 to 60 nm). As the amorphous semiconductor, not only silicon but also silicon germanium can be used.

Next, the amorphous semiconductor film is crystallized as necessary to form a crystalline semiconductor film. As a method for crystallization, a heating furnace, laser irradiation, irradiation with light emitted from a lamp (hereinafter referred to as lamp annealing), or a combination thereof can be used. For example, a crystalline semiconductor film is formed by adding a metal element to an amorphous semiconductor film and performing heat treatment using a heating furnace. Thus, it is preferable to add a metal element because crystallization can be performed at a low temperature.

The crystalline semiconductor film thus formed is patterned into a predetermined shape. The predetermined shape is a shape that becomes the switching transistor 11 and the driving transistor 12 as shown in FIG.

Next, an insulating film functioning as a gate insulating film is formed. The insulating film is formed so as to cover the semiconductor film with a thickness of 10 to 150 nm, preferably 20 to 40 nm. For example, a silicon oxynitride film, a silicon oxide film, or the like can be used, and a single layer structure or a stacked structure may be used.

Then, a first conductive film functioning as a gate electrode is formed through the gate insulating film. Although the gate electrode may be a single layer or a stacked layer, in this embodiment mode, a stacked structure of conductive films 22a and 22b is used. Each of the conductive films 22a and 22b may be formed of an element selected from Ta, W, Ti, Mo, Al, and Cu, or an alloy material or a compound material containing the element as a main component. In this embodiment, a tantalum nitride film having a thickness of 10 to 50 nm, for example, 30 nm is formed as the conductive film 22a, and a tungsten film having a thickness of 200 to 400 nm, for example, 370 nm is sequentially formed as the conductive film 22b.

An impurity element is added using the gate electrode as a mask. At this time, a low concentration impurity region may be formed in addition to the high concentration impurity region. This is referred to as an LDD (Lightly Doped Drain) structure. In particular, a structure in which a low-concentration impurity region overlaps with a gate electrode is referred to as a GOLD (Gate-drain Overlapped LDD) structure. In particular, the n-channel transistor may have a low concentration impurity region.

An unnecessary capacitance may be formed due to the low concentration impurity region. Therefore, when a pixel is formed using a TFT having an LDD structure or a GOLD structure, it is preferable to use the driving method of the present invention.

Thereafter, insulating films 28 and 29 functioning as the interlayer insulating film 30 are formed. The insulating film 28 may be an insulating film containing nitrogen, and in this embodiment mode, is formed using a 100 nm silicon nitride film by a plasma CVD method. The insulating film 29 can be formed using an organic material or an inorganic material. As the organic material, polyimide, acrylic, polyamide, polyimide amide, resist, benzocyclobutene, siloxane, or polysilazane can be used. Siloxane has a skeleton structure formed of a bond of silicon (Si) and oxygen (O). As a substituent, an organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent. Polysilazane is formed using a liquid material containing a polymer material having a bond of silicon (Si) and nitrogen (N) as a starting material. As the inorganic material, silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide (SiNxOy) (x> y) (x, y = 1, 2,... An insulating film containing oxygen or nitrogen such as ()) can be used. Further, as the insulating film 29, a laminated structure of these insulating films may be used. In particular, when an interlayer insulating film is formed using an organic material, flatness is improved, but moisture and oxygen are absorbed by the organic material. In order to prevent this, an insulating film containing an inorganic material is preferably formed over the organic material. When an insulating film containing nitrogen is used as the inorganic material, entry of alkali ions such as Na can be prevented, which is preferable. When an organic material is used for the insulating film 29, flatness can be improved, which is preferable.

Contact holes are formed in the interlayer insulating film 30. Then, a second conductive film that functions as the switching transistor 11, the source wiring and drain wiring 24 of the driving transistor 12, the signal line 10, and the power supply line 14 is formed. As the second conductive film, a film made of an element of aluminum (Al), titanium (Ti), molybdenum (Mo), tungsten (W), or silicon (Si) or an alloy film using these elements can be used. . In this embodiment mode, a stacked film of a titanium (Ti) film, a titanium nitride (TiN) film, a silicon and aluminum alloy (Al-Si) film, and a titanium (Ti) film is stacked with a thickness of 60 nm, 40 nm, 300 nm, and 100 nm, respectively. Then, a second conductive film is formed.

Thereafter, an insulating film 31 is formed so as to cover the second conductive film. The material shown for the interlayer insulating film 30 can be used for the insulating film 31. By providing the insulating film 31 in this way, the aperture ratio can be increased.

Then, a pixel electrode (also referred to as a first electrode) 19 is formed in the opening provided in the insulating film 31. In order to improve the step coverage of the pixel electrode in the opening, the end surface of the opening may be rounded so as to have a plurality of radii of curvature. For the pixel electrode 19, as a light-transmitting material, indium tin oxide (ITO), IZO (indium zinc oxide) in which 2 to 20% zinc oxide (ZnO) is mixed with indium oxide, oxidation is used. ITO-SiOx (hereinafter referred to as ITSO) in which ₂ to 20% of silicon oxide (SiO2) is mixed with indium, organic indium, organic tin, or the like can also be used. In addition to silver (Ag), an element selected from tantalum, tungsten, titanium, molybdenum, aluminum, and copper, or an alloy material or a compound material containing the element as a main component is used as the non-translucent material. it can. At this time, when the insulating film 31 is formed using an organic material and the flatness is increased, the flatness of the pixel electrode formation surface is improved, so that a uniform voltage can be applied and further a short circuit can be prevented.

In a region 430 where the first conductive film overlaps with the pixel electrode, a coupling capacitance may be generated. This coupling capacity is an unnecessary capacity. According to the driving method of the present invention, it is possible to prevent a potential change due to such unnecessary capacitance.

Thereafter, the electroluminescent layer 33 is formed by a vapor deposition method or an inkjet method. The electroluminescent layer 33 includes an organic material or an inorganic material, and includes an electron injection layer (EIL), an electron transport layer (ETL), a light emitting layer (EML), a hole transport layer (HTL), and a hole injection layer (HIL). ) And the like. Note that the boundaries between the layers are not necessarily clear, and there are cases where the materials constituting the layers are partially mixed and the interface is unclear. Further, the electroluminescent layer is not limited to the above laminated structure.

Then, the second electrode 35 is formed by a sputtering method or an evaporation method. The first electrode (pixel electrode) 19 and the second electrode 35 of the electroluminescent layer (light emitting element) serve as an anode or a cathode depending on the pixel configuration.

As the anode material, it is preferable to use a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like having a high work function (work function of 4.0 eV or more). Specific examples of the anode material include ITO, IZO mixed with 2-20% zinc oxide (ZnO) in indium oxide, gold (Au), platinum (Pt), nickel (Ni), tungsten (W), Chromium (Cr), molybdenum (Mo), iron (Fe), cobalt (Co), copper (Cu), palladium (Pd), nitride of metal material (TiN), or the like can be used.

On the other hand, as the cathode material, it is preferable to use a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like having a low work function (work function of 3.8 eV or less). Specific examples of the cathode material include elements belonging to Group 1 or Group 2 of the element periodic rule, that is, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, and Sr, and alloys containing these (Mg : Ag, Al: Li) and compounds (LiF, CsF, CaF ₂ ), as well as transition metals including rare earth metals. However, since the cathode needs to have translucency, these metals or an alloy containing these metals are formed very thinly, and are formed by lamination with a metal (including an alloy) such as ITO.

Thereafter, a protective film may be formed to cover the second electrode 35. As the protective film, a silicon nitride film or a DLC film can be used.

In this manner, a pixel of the light emitting device can be formed.

(Embodiment 6)
In this embodiment, a cross-sectional view different from the cross-sectional view shown in the above embodiment is illustrated. Note that description overlapping with the configuration shown in FIG. 3 is omitted.

In the cross-sectional view shown in FIG. 9, the interlayer insulating film 30 is formed as in FIG. Then, contact holes are formed in the interlayer insulating film 30, and signal lines 10, source wirings, and drain wirings 24 are formed. Thereafter, the pixel electrode 19 is formed without providing the insulating film 31.

Further, in the cross-sectional view shown in FIG. 10, the interlayer insulating film 30 is formed as in FIG. Then, contact holes are formed in the interlayer insulating film 30, and the pixel electrodes 19 are formed. Thereafter, the signal line 10, the source wiring, and the drain wiring 24 are formed. Also in FIG. 10, the insulating film 31 is not provided.

In the cross-sectional views shown in FIGS. 9 and 10, the insulating film 32, the electroluminescent layer 33, the second electrode 35, and the like can be formed thereafter as in FIG. 3 to form a pixel of the light emitting device.

Even in such a case where the insulating film 31 is not formed, a coupling capacitance may be formed. At that time, the driving method of the present invention can be applied, potential change due to unnecessary capacitance can be prevented, and black floating can be prevented.

(Embodiment 7)
In this embodiment mode, pixel configurations to which the driving method of the present invention can be applied are exemplified. Note that description overlapping with the configuration shown in FIG. 1 is omitted.

FIG. 6 illustrates a pixel configuration in which third transistors 21 are provided at both ends of the capacitor 15 in addition to the pixel configuration illustrated in FIG. 1. The third transistor has a function of discharging charges accumulated in the capacitor 15 during a predetermined period. This third transistor is also referred to as an erasing transistor. The predetermined period is controlled by the scanning line 23 to which the gate electrode of the third transistor 21 is connected.

For example, when a plurality of subframe periods are provided, the charge of the capacitor 15 is discharged by the third transistor in a short subframe period. As a result, the duty ratio can be improved.

Even in such a pixel configuration, the switching transistor 11 is turned on when a reverse voltage is applied. As a result, the gate electrode of the driving transistor becomes electrically non-floating, and potential fluctuation due to unnecessary capacitive coupling can be prevented. Since the switching transistor is on, a non-lighting signal is input from the signal line 10. Then, the light emitting element is turned off. By such driving, even with the pixel configuration shown in FIG. 6, an accurate reverse voltage can be applied and black floating can be prevented.

FIG. 7A shows a pixel configuration in which a fourth transistor 36 is provided between the driving transistor 12 and the light-emitting element 16 in addition to the pixel configuration shown in FIG. . A second power supply line 34 having a fixed potential is connected to the gate electrode of the fourth transistor. Therefore, the current supplied to the light emitting element 16 can be made constant regardless of the gate-source voltage of the driving transistor 12 and the fourth transistor 36. This fourth transistor is also referred to as a current control transistor.

FIG. 7B shows a pixel structure in which the second power supply line 34 having a fixed potential is provided in parallel with the scanning line, unlike FIG. 7A.

7C shows that the gate electrode of the fourth transistor, which is at a fixed potential, is connected to the gate electrode of the driving transistor 12, which is different from FIGS. 7A and 7B. This is a characteristic pixel configuration. In a pixel structure in which a new power supply line is not provided as in FIG. 7C, the aperture ratio can be maintained.

Even in such a pixel configuration, the switching transistor 11 is turned on when a reverse voltage is applied. As a result, the gate electrode of the driving transistor becomes electrically non-floating, and potential fluctuation due to unnecessary capacitive coupling can be prevented. Since the switching transistor is on, a non-lighting signal is input from the signal line 10. Then, the light emitting element is turned off. With such driving, an accurate reverse voltage can be applied and black floating can be prevented even with the pixel configuration shown in FIG.

FIG. 8 shows a pixel configuration in which the erasing transistor shown in FIG. 6 is provided in addition to the pixel configuration shown in FIG. The charge of the capacitor 15 can be discharged by the erasing transistor. Of course, in addition to the pixel structure shown in FIG. 7B or FIG. 7C, an erasing transistor can be provided.

Even in such a pixel configuration, the switching transistor 11 is turned on when a reverse voltage is applied. As a result, the gate electrode of the driving transistor becomes electrically non-floating, and potential fluctuation due to unnecessary capacitive coupling can be prevented. Since the switching transistor is on, a non-lighting signal is input from the signal line 10. Then, the light emitting element is turned off. By such driving, even with the pixel configuration shown in FIG. 8, an accurate reverse voltage can be applied, and black floating can be prevented.

That is, the reverse voltage application method of the present invention can be applied without being limited to the pixel configuration.

(Embodiment 8)
In this embodiment mode, a pixel having only one polarity, that is, a pixel including only a single channel will be described.

FIG. 15A shows a pixel configuration in which the polarity of the switching transistor 11 and the driving transistor 12 is an n-channel type, the pixel electrode 19 is an anode, and the second electrode (counter electrode) is a cathode. In this case, when a forward voltage is applied to the light emitting element 16 in accordance with the forward direction in which the current of the light emitting element 16 flows, the power supply line 14 becomes a high potential power supply, and current flows from the pixel electrode to the counter electrode. When a reverse voltage is applied to the light emitting element 16, the power line 14 becomes a low potential power source, and a current flows from the counter electrode to the pixel electrode. The capacitor element 15 is provided between the pixel electrode of the light emitting element 16 and the gate electrode of the driving transistor 12 in order to hold the gate-source voltage of the driving transistor 12.

FIG. 15B shows a pixel configuration in which the direction of current flowing to the light-emitting element is different from that in FIG. 15A, that is, a pixel configuration in which the pixel electrode 19 is a cathode and a second electrode (counter electrode) is an anode. In this case, when a forward voltage is applied to the light emitting element 16 in accordance with the current flowing direction of the light emitting element 16, the power supply line 14 becomes a low potential power supply, and current flows from the counter electrode to the pixel electrode. When a reverse voltage is applied to the light emitting element 16, the power line 14 becomes a high potential power source, and a current flows from the pixel electrode to the counter electrode. The capacitive element 15 is provided between the power supply line 14 and the gate electrode of the driving transistor 12 in order to hold the gate-source voltage of the driving transistor 12.

A cross-sectional view corresponding to the pixel structure in FIGS. 15A and 15B can have a structure similar to that in FIG. However, in the pixel configuration illustrated in FIG. 15A, the capacitor 15 needs to be formed between the pixel electrode of the light emitting element 16 and the gate electrode of the driving transistor 12. In the case of the pixel structure shown in FIG. 15B, it is necessary to reverse the anode and the cathode. Therefore, it is preferable that the anode provided on the electroluminescent layer 33 be patterned for each pixel because signal input can be easily controlled.

In this embodiment, since both the switching transistor 11 and the driving transistor 12 are n-channel type, it is not necessary to make transistors separately. Therefore, the manufacturing yield of thin film transistors and the like can be improved. As a result, cost reduction of the light emitting device can be achieved.

Such a single-channel pixel structure is suitable when the semiconductor film forming each transistor is amorphous. That is, since it is easy to form an n-channel transistor in amorphous, a single-channel pixel structure is suitable. FIG. 15C is an enlarged view of the driving transistor 12 formed using an amorphous semiconductor film. A conductive film 300 that functions as a gate electrode is provided over an insulating film that functions as a base film and is formed over the insulating substrate 20. An insulating film 301 functioning as a gate insulating film is provided so as to cover this, and an amorphous semiconductor film 302 is provided therethrough. A channel protective film 303 is provided over the amorphous semiconductor film, and an n-channel impurity layer (n + region) can be formed using the channel protective film 303 as a mask. After that, an insulating film 308 that functions as a protective film is formed.

A source wiring and a drain wiring 307 are formed so as to be connected to this impurity region. In this embodiment, the insulating film 309 is formed in order to improve flatness. The insulating film 309 is preferably formed using an organic material because flatness is increased. The source wiring and the drain wiring 307 can be formed over the insulating film 308 or the insulating film 309.

The transistor having an amorphous semiconductor film formed in this manner is patterned with a large area and a gate electrode with a large area is formed in order to increase current supply capability. Therefore, it is more preferable to increase the coupling capacitance and apply the driving method of the present invention.

In the case of using an amorphous semiconductor film, since there is no crystallization step, the cost of a light emitting device or the like can be reduced.

Even in such a pixel configuration, the switching transistor 11 is turned on when a reverse voltage is applied. As a result, the gate electrode of the driving transistor becomes electrically non-floating, and potential fluctuation due to unnecessary capacitive coupling can be prevented. Since the switching transistor is on, a non-lighting signal is input from the signal line 10. Then, the light emitting element is turned off. By such driving, even with the pixel configuration shown in FIG. 15, an accurate reverse voltage can be applied and black floating can be prevented.

Note that although the case of an n-channel type has been described in this embodiment mode, it is needless to say that only a p-channel transistor may be used for a pixel configuration having a single channel.

(Embodiment 9)
Mobile devices such as television devices (TVs, television receivers), digital cameras, digital video cameras, mobile phone devices (mobile phones), PDAs, and the like as electronic devices using display devices having pixel regions including light-emitting elements Examples thereof include a terminal, a portable game machine, a monitor, a computer, an audio playback device such as a car audio, and an image playback device equipped with a recording medium such as a home game machine. A specific example will be described with reference to FIG.

A portable information terminal using the light-emitting device of the present invention illustrated in FIG. 16A includes a main body 9201, a display portion 9202, and the like. According to the present invention, since the reverse voltage can be applied accurately, the lifetime of the light emitting element can be extended. In addition, according to the present invention, black floating can be prevented, and thus a clear video display can be performed.
A digital video camera using the light-emitting device of the present invention illustrated in FIG. 16B includes display portions 9701 and 9702 and the like. According to the present invention, since the reverse voltage can be applied accurately, the lifetime of the light emitting element can be extended. In addition, according to the present invention, black floating can be prevented, and thus a clear video display can be performed.
A portable terminal using the light-emitting device of the present invention illustrated in FIG. 16C includes a main body 9101, a display portion 9102, and the like. According to the present invention, since the reverse voltage can be applied accurately, the lifetime of the light emitting element can be extended. In addition, according to the present invention, black floating can be prevented, and thus a clear video display can be performed.
A portable television device using the light-emitting device of the present invention illustrated in FIG. 16D includes a main body 9301, a display portion 9302, and the like. According to the present invention, since the reverse voltage can be applied accurately, the lifetime of the light emitting element can be extended. In addition, according to the present invention, black floating can be prevented, and thus a clear video display can be performed.
A portable computer using the light-emitting device of the present invention illustrated in FIG. 16E includes a main body 9401, a display portion 9402, and the like. According to the present invention, since the reverse voltage can be applied accurately, the lifetime of the light emitting element can be extended. In addition, according to the present invention, black floating can be prevented, and thus a clear video display can be performed.
A television set using the light-emitting device of the present invention illustrated in FIG. 16F includes a main body 9501, a display portion 9502, and the like. According to the present invention, since the reverse voltage can be applied accurately, the lifetime of the light emitting element can be extended. In addition, according to the present invention, black floating can be prevented, and thus a clear video display can be performed.
Among the electronic devices listed above, those using a battery can extend the usage time of the electronic device by reducing the power consumption, and can save the trouble of charging the battery.

(Embodiment 10)
In this embodiment mode, a structure of a scan line driver circuit to which the driving method of the present invention can be applied will be described.

FIG. 18A illustrates one mode of a flip-flop circuit included in the shift register of the scan line driver circuit. The flip-flop circuit includes a clocked inverter 212, an inverter 210, and a clocked inverter 221. The clocked inverter 212 includes an inverter 207 having a transistor 201 and a transistor 202, a first compensation circuit 208 having a transistor 203 and a transistor 204, and a second compensation circuit 209 having a transistor 205 and a transmission gate 206. .

In the inverter 207, each drain of the transistor 201 and the transistor 202 is connected to the output terminal (OUT 1) of the clocked inverter 212. The source of the transistor 201 is connected to the first power supply, and the power supply voltage VDD is supplied. The source of the transistor 202 is connected to the second power supply and supplied with the power supply voltage VSS. The gate electrode of the transistor 201 is connected to the second compensation circuit 209, and the gate electrode of the transistor 202 is connected to the first compensation circuit 208.

In the first compensation circuit 208, the signal A from the clocked inverter 212 used in the preceding flip-flop circuit is input to the gate electrodes of the transistor 203 and the transistor 204. Further, the signal A2 from the output terminal OUT1 at the preceding stage is input to the source of the transistor 203. Then, the source of the transistor 204 is connected to the second power supply, and the power supply voltage VSS is supplied. Further, the drains of the transistor 203 and the transistor 204 are connected to the gate electrode of the transistor 202.

In the second compensation circuit 209, the signal B from the output terminal OUT2 of the subsequent flip-flop circuit is input to the gate electrode of the transistor 205 and the second control terminal of the transmission gate 206. The source of the transistor 205 is connected to the second power supply, and the power supply voltage VDD is supplied. Further, a signal Bb obtained by inverting the signal B from the output terminal OUT2 at the subsequent stage is input to the first control terminal of the transmission gate 206. The clock signal CK is input to the input terminal of the transmission gate 206. Note that the inverted signal CKb of the clock signal CK may be input to the input terminal of the transmission gate 206 by a flip-flop stage. The drain of the transistor 205 and the output terminal of the transmission gate 206 are connected to the gate electrode of the transistor 201.

The output terminal OUT1 of the clocked inverter 212 is connected to the input terminal of the inverter 210 and the output terminal of the clocked inverter 221. The output terminal of the inverter 210 is connected to the output terminal OUT2 of the flip-flop circuit.

Note that although the transmission gate 206 is used in the second compensation circuit 209, the present invention is not necessarily limited to this configuration. Instead of the transmission gate, another switching element such as a TFT may be used. However, the switching of the switching element is controlled in synchronization with the signal B.

In addition, the signal A input to the gate electrodes of the transistor 203 and the transistor 204 is not necessarily output from the previous stage OUT1, but may be output from any one of the previous stage terminals. The signal A2 input to the source of the transistor 203 is not necessarily output from the preceding stage OUT1, but may be output from any one terminal of the preceding stage. The signal B input to the gate electrode of the transistor 205 and the second control terminal of the transmission gate 206 is not necessarily output from the subsequent stage OUT2, but may be output from any one of the subsequent terminals. .

In addition, the transistor 201, the transistor 203, and the transistor 205 are p-type, and the transistor 202 and the transistor 204 are n-type. As the transistor, a thin film transistor (TFT) can be used.

The clocked inverter 221 includes a third compensation circuit 222 having a transistor 224 and a transmission gate 225, and an inverter 223 having a transistor 226 and a transistor 227.

In the clocked inverter 221, the gate electrode of the transistor 224 and the first control terminal of the transmission gate 225 are connected to the output terminal OUT1 of the clocked inverter 212. The source of the transistor 226 is connected to the first power supply, and the power supply voltage VDD is supplied. Each source of the transistor 224 and the transistor 227 is connected to the second power supply, and the power supply voltage VSS is supplied thereto. A signal CKb obtained by inverting the clock signal is supplied to the input terminal of the transmission gate 225. The output terminal of the transmission gate 225 and the drain of the transistor 224 are connected to the gate electrode of the transistor 226. The transistor 227 has a gate electrode connected to the output terminal OUT2 of the flip-flop circuit. The drains of the transistor 226 and the transistor 227 are connected to the output terminal OUT1 of the clocked inverter 212.

The transistor 226 is p-type, and the transistor 202, the transistor 224, and the transistor 227 are n-type.

18B shows the timing of the signal A, the signal B, the signal A2, the signal Bb, the clock signal CK, the signal output from the output terminal OUT1, and the signal output from the output terminal OUT2 in FIG. A chart is shown.

As can be seen from the timing chart shown in FIG. 18B, the flip-flop circuit shown in FIG. 18A has a so-called falling timing at which the signal changes from the power supply voltage VDD to the power supply voltage VSS at the output terminal OUT1. It can be determined not by the clock signal CK but by the signal A2 from the output terminal OUT1 at the preceding stage. Therefore, by turning on the transistor 102 so as to be synchronized with the signal A2 from the output terminal OUT1 at the preceding stage, the transistor 102 can be completely turned off in the period T1. Therefore, it is possible to prevent the signal from falling early as indicated by the broken line 213.

Note that an n-type transistor that controls supply of the power supply voltage VSS to the output terminal OUT1 included in the clocked inverter 221 and a p-type transistor that controls supply of the power supply voltage VDD to the output terminal OUT1 included in the clocked inverter 212. The transistor 201 is preferably designed so that the channel width W of the former transistor is larger. This is because the current supply capability to the output terminal OUT1 of the clocked inverter 221 can be higher than that of the clocked inverter 212 in the period T3. Therefore, the output terminal OUT1 can be more reliably maintained at the power supply voltage VSS in the period T3.

In the flip-flop circuit shown in FIG. 18A, the input of the clock signal CK is controlled by a switching element (transmission gate 206) that operates in synchronization with the signal B. Accordingly, it is possible to reduce the load on the wiring for supplying the clock signal CK to the flip-flop circuit.

The normal clocked inverter has two n-type transistors connected in series and two p-type transistors connected in series. However, when two transistors are connected in series, the on-current tends to be low. Therefore, in order to increase the on-current, the two transistors connected in series have been designed so that the channel width W is increased. Therefore, it is necessary to design the transistor having the gate (gate capacitance) of the two transistors as a load so that the channel width W is increased. As a result, the load on the entire clocked inverter is increased. It was a hindrance to high frequency operation. However, in the present invention, in order to control the voltage supply to the output terminal of the clocked inverter, it is not necessary to use a double gate transistor (two transistors connected in series), and a single gate transistor is used. it can. As a result, in the present invention, it is not necessary to design a transistor so that the channel width W is increased, and the size of the transistor can be reduced, so that high integration is possible. In addition, since the load on the element having the gate of the transistor as a load can be reduced, the load on the entire clocked inverter is reduced and high-frequency operation is enabled. Furthermore, the current supply capability to the output terminal can be increased while suppressing the channel width W. Therefore, it is possible to prevent the waveform of the signal output from the flip-flop circuit from being dull due to the load of the subsequent circuit.

(Embodiment 11)
In this embodiment mode, a circuit diagram of a switch for inverting the potential of the anode (ANODE) and the potential of the cathode (CATHODE) is shown.

The switch illustrated in FIG. 19A includes a signal converter (FPGA: Field Programmable Logic Device) 801 and a plurality of level shifters 802 and 803 connected thereto. Transistors 804 and 805 constituting an inverter are connected to the level shifter 802, and transistors 806 and 807 constituting an inverter are connected to the level shifter 803, respectively. The transistors 805 and 807 are p-type, and the transistors 804 and 806 are n-type. One electrode of the transistor 805 is connected to an anode power source, one electrode of the transistor 804 is grounded, and an output terminal of an inverter having these is connected to an anode terminal. One electrode of the transistor 807 is connected to the anode power supply, one electrode of the transistor 806 is connected to the cathode, and the output terminal of the inverter having these is connected to the cathode terminal.

FIG. 19B shows waveforms of signals output from the level shifters 802 and 803. After the potential of the signal output from the level shifter 803 is inverted, the potential of the signal output from the level shifter 802 is inverted. Next, the potential of the signal output from the level shifter 802 is restored, and then the potential of the signal output from the level shifter 803 is restored. An accurate reverse voltage can be applied by sequentially inverting the potentials of the anode and the cathode by such a signal.

The present invention can provide a driving method capable of applying an accurate reverse voltage by having such a switch circuit.

It is the figure which showed the pixel circuit of this invention It is the figure which showed the upper surface of the pixel area | region of this invention It is the figure which showed the cross section of the pixel area | region of this invention It is the figure which showed the drive method of this invention It is the figure which showed the pixel circuit of this invention It is the figure which showed the pixel circuit of this invention It is the figure which showed the pixel circuit of this invention It is the figure which showed the pixel circuit of this invention It is the figure which showed the cross section of the pixel area | region of this invention It is the figure which showed the cross section of the pixel area | region of this invention It is the figure which showed the panel of this invention It is the figure which showed the protection circuit of this invention It is the figure which showed the drive circuit of this invention It is the figure which showed the drive circuit of this invention It is the figure which showed the pixel circuit and sectional drawing of this invention It is the figure which showed the electronic device of this invention It is the figure which showed the temperature compensation function of this invention It is the figure which showed the drive circuit of this invention It is the figure which showed the drive circuit of this invention

Claims (18)

A light emitting element, a first transistor for driving the light emitting element, a second transistor for controlling the first transistor,
Means for electrically non-floating a gate electrode of the first transistor when applying a forward voltage after applying a reverse voltage;
And a means for setting the gate electrode of the first transistor to a potential at which the light emitting element does not emit light. A light emitting element, a first transistor for driving the light emitting element, a second transistor for controlling the first transistor,
Means for electrically bringing the gate electrode of the first transistor into a non-floating state when the potential of the anode of the light emitting element and the potential of the cathode are reversed and then returned to the original state;
And a means for setting the gate electrode of the first transistor to a potential at which the light emitting element does not emit light. Having a plurality of pixels,
Each of the pixels includes a light emitting element, a first transistor for driving the light emitting element, a second transistor for controlling the first transistor,
Means for electrically non-floating a gate electrode of the first transistor when applying a forward voltage after applying a reverse voltage;
And a means for setting the gate electrode of the first transistor to a potential at which the light emitting element does not emit light. In any one of Claims 1 thru | or 3,
A capacitor is provided between the gate of the first transistor and one of the electrodes;
A light emitting device comprising a third transistor for discharging the charge of the capacitor. In any one of Claims 1 thru | or 3,
A capacitor is provided between the gate of the first transistor and one of the electrodes;
A third transistor for discharging the charge of the capacitive element;
A fourth transistor between the second transistor and the light emitting element;
The light emitting device according to claim 4, wherein the gate electrode of the fourth transistor has a fixed potential. In any one of Claims 1 thru | or 5,
An insulating film provided on one electrode of the first transistor;
A light-emitting device comprising: one electrode of the light-emitting element connected through a contact hole provided in the insulating film. In any one of Claims 1 thru | or 6,
A light-emitting device having one electrode of the light-emitting element provided over one electrode of the first transistor. In any one of Claims 1 thru | or 7,
The first transistor and the second transistor each include a crystalline semiconductor film. In any one of Claims 1 thru | or 8,
The first transistor and the second transistor each include an amorphous semiconductor film. In any one of Claims 1 thru | or 9,
The light-emitting device is characterized in that the first transistor includes a gate electrode and a low-concentration impurity region overlapping with the gate electrode. A light emitting element; a first transistor for driving the light emitting element; and a second transistor for controlling the first transistor;
After applying a reverse voltage to the light emitting element, when applying a forward voltage, the gate electrode of the first transistor is electrically non-floating,
A driving method of a light-emitting device, wherein the gate electrode of the first transistor is set to a potential at which the light-emitting element is not lit. A light emitting element, a first transistor for driving the light emitting element, and a second transistor for controlling the first transistor,
Applying a forward voltage to the light emitting element;
Applying a reverse voltage to the light emitting element,
After applying the reverse voltage, when applying the forward voltage again, the gate electrode of the first transistor is electrically non-floating,
A driving method of a light-emitting device, wherein the gate electrode of the first transistor is set to a potential at which the light-emitting element is not lit. A light emitting element, a first transistor for driving the light emitting element, and a second transistor for controlling the first transistor,
The potential of the anode of the light emitting element is higher than the potential of the cathode of the light emitting element;
The potential of the anode of the light emitting element is lower than the potential of the cathode of the light emitting element;
When the potential of the anode of the light-emitting element is made higher than the potential of the cathode of the light-emitting element again, the gate electrode of the first transistor is brought into an electrically non-floating state,
A driving method of a light-emitting device, wherein the gate electrode of the first transistor is set to a potential at which the light-emitting element is not lit. Having a plurality of pixels,
Each of the plurality of pixels includes a light emitting element, a first transistor for driving the light emitting element, and a second transistor for controlling the first transistor,
Applying a forward voltage to the light emitting element;
Applying a reverse voltage to the light emitting element,
After applying the reverse voltage, when applying the forward voltage again, the gate electrode of the first transistor is electrically non-floating,
A driving method of a light-emitting device, wherein the gate electrode of the first transistor is set to a potential at which the light-emitting element is not lit. In any one of Claims 11 thru | or 14,
The period for applying the reverse voltage includes a period for turning on all scanning lines before applying the reverse voltage. In any one of Claims 11 thru | or 14,
A driving method of a light emitting device, wherein an erasing period is provided before a period during which all the scanning lines are turned on. In any one of Claims 11 thru | or 14,
A driving method of a light-emitting device, characterized in that a period during which the front scanning line is turned off is provided after a reverse voltage is applied to the light-emitting element. In any one of Claims 11 thru | or 17,
The period for applying the reverse voltage is provided within one frame period,
The one frame period includes m (m is a natural number of 2 or more) subframe periods SF1, SF2,..., SFm,
The SF sub-frame periods SF1, SF2,... SFm have write operation periods Ta1, Ta2,... Tam and display periods Ts1, Ts2,.

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