JP4974492B2 - Light emitting device - Google Patents

Description

The present invention relates to a light emitting device having a self light emitting element and a driving method thereof.

In recent years, the development of light-emitting devices including light-emitting elements typified by EL (Electro Luminescence) elements has been promoted, and a wide range of uses is expected by taking advantage of self-luminous type such as high image quality, wide viewing angle, thinness, and light weight. Has been.

Such a light emitting element may cause deterioration over time or initial failure. In order to prevent deterioration over time and initial failure, a method of wiping the anode surface with a PVA (polyvinyl alcohol) -based porous body, etc., and removing the dust when manufacturing a light emitting element has been proposed. (See Patent Document 1).
JP 2002-318546 A

An object of the present invention is to solve the deterioration with time and initial failure of the light-emitting element by a new method different from that of Patent Document 1.

In view of the above problems, the present invention is characterized in that a monitoring light emitting element is provided in a part of the light emitting device, and a voltage or a current supplied to the light emitting element is corrected in consideration of a variation of the monitoring element.

A specific embodiment of the present invention is that when a plurality of monitor light emitting elements, a monitor line for monitoring a change in potential of an electrode included in the plurality of monitor light emitting elements, and any of the plurality of monitor light emitting elements are short-circuited, And a means for electrically interrupting the current supplied to the monitor light emitting element short-circuited through the monitor line.

In another embodiment of the present invention, a monitor light emitting element, a monitor control transistor having one electrode connected to the monitor light emitting element, an output terminal connected to the gate electrode of the monitor control transistor, and monitor control The light emitting device includes an inverter having an input terminal connected to one electrode of the transistor for transistor and the light emitting element for monitor.

Another embodiment of the present invention includes a light emitting device having a monitor light emitting element and a monitor control transistor connected to the monitor light emitting element, wherein the monitor control transistor is turned off when the monitor light emitting element is short-circuited. This is a driving method.

In order to drive as described above, the inverter is a circuit having a function of turning off the monitor control transistor when the monitor light emitting element is short-circuited. Therefore, the present invention is not limited to an inverter as long as the circuit has the function.

The monitor light-emitting element is manufactured in the same process as the plurality of light-emitting elements provided in the pixel portion. Therefore, the characteristics with respect to the temperature of the environment in which the light emitting device is placed (simply referred to as environmental temperature) and the change with time (generally indicated as deterioration with time) are the same or almost the same. It is.

According to the present invention, it is possible to provide a light-emitting device in which luminance variations due to changes in environmental temperature and deterioration with time are reduced.

Embodiments of the present invention will be described below with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention is not construed as being limited to the description of this embodiment mode. Note that in all the drawings for describing the embodiments, the same portions or portions having similar functions are denoted by the same reference numerals, and repetitive description thereof is omitted.

Note that in this specification, connection between elements indicates that they are electrically connected. For this reason, the elements having a connection relationship may be connected via a semiconductor element, a switching element, or the like.

In this specification, the source electrode and the drain electrode of a transistor are names used to distinguish electrodes other than the gate electrode for the sake of convenience in terms of the structure of the transistor. In the present invention, in the case of a structure that is not limited to the polarity of the transistor, the names of the source electrode and the drain electrode change in consideration of the polarity. Therefore, the source electrode or the drain electrode may be described as one of the one electrode and the other electrode.

(Embodiment 1)
In this embodiment mode, a structure of a panel including a monitor light-emitting element is described.

In FIG. 1, a pixel portion 40, a signal line driving circuit 43, a first scanning line driving circuit 41, a second scanning line driving circuit 42, and a monitor circuit 64 are provided on an insulating substrate 20.

The pixel portion 40 includes a plurality of pixels 10, and each pixel is connected to the light emitting element 13 and the light emitting element 13 and has a function of controlling the supply of current (hereinafter referred to as a driving transistor). 12 is provided. The light emitting element is connected to a power source 18. A more specific configuration of the pixel 10 is exemplified in the following embodiment.

The monitor circuit 64 has a monitor light emitting element 66, a transistor (hereinafter referred to as a monitor control transistor) 111 connected to the monitor light emitting element 66, and an output terminal connected to the gate electrode of the monitor control transistor. In addition, an inverter 112 having an input terminal connected to one electrode of the monitor control transistor and the monitor light emitting element is provided. A constant current source 105 having a function of supplying a constant current is connected to the monitor control transistor 111 via a monitor current line (hereinafter referred to as a monitor line) 113. The monitor control transistor 111 controls the current supply from the monitor line to each of the plurality of monitor light emitting elements, and electrically cuts off the current supplied to the monitor light emitting element short-circuited through the monitor line. Have The inverter 112 has a function of turning off the monitor control transistor when any one of the monitor light emitting elements is short-circuited. Since the monitor line is connected to the electrodes of the plurality of monitor light emitting elements, the monitor line can have a function of monitoring a change in potential of the electrodes. The constant current source only needs to have a function of supplying a constant current to the monitor line.

The monitor light emitting element 66 is manufactured in the same process under the same manufacturing conditions as the light emitting element 13, and has the same configuration. Therefore, it has the same characteristics or almost the same characteristics with respect to changes in environmental temperature and deterioration over time. Such a monitor light emitting element 66 is connected to a power source 18. Here, since the power source connected to the light emitting element 13 and the power source connected to the monitor light emitting element 66 have the same potential, they are referred to as the power source 18 using the same reference numerals. Note that although the polarity of the monitor control transistor 111 is described as a p-channel type in this embodiment mode, the present invention is not limited to this, and an n-channel type may be used. In that case, the surrounding circuit configuration is changed as appropriate.

The position where such a monitor circuit 64 is provided is not limited, and is between the signal line driver circuit 43 and the pixel unit 40 or between the first or second scanning line driver circuits 41 and 42 and the pixel unit 40. It may be provided. In addition, an IC chip provided with COG on an insulating substrate may be applied to the signal line driver circuit and the first or second scanning line driver circuit.

A buffer amplifier circuit 110 is provided between the monitor circuit 64 and the pixel unit 40. The buffer amplifier circuit is a circuit having characteristics that an input and an output have the same potential, a high input impedance, and a high output current capacity. Therefore, the circuit configuration can be determined as appropriate as long as the circuit has such characteristics.

In such a configuration, the buffer amplifier circuit has a function of changing a voltage applied to the light emitting element 13 included in the pixel portion 40 in accordance with a change in potential of one electrode of the monitor light emitting element 66.

In such a configuration, the constant current source 105 and the buffer amplifier circuit 110 may be provided on the same insulating substrate 20 or on different substrates.

In the above configuration, a constant current is supplied from the constant current source 105 to the monitor light emitting element 66. In this state, when the environmental temperature changes or deterioration with time occurs, the resistance value of the monitor light emitting element 66 changes. For example, when deterioration with time occurs, the resistance value of the monitor light emitting element 66 increases. Then, since the current value supplied to the monitor light emitting element 66 is constant, the potential difference between both ends of the monitor light emitting element 66 changes. Specifically, the potential difference between both electrodes of the monitor light emitting element 66 changes. At this time, since the potential of the electrode connected to the power source 18 is fixed, the potential of the electrode connected to the constant current source 105 changes. This change in electrode potential is supplied to the buffer amplifier circuit 110 via the monitor line 113.

That is, the change in the potential of the electrode is input to the input terminal of the buffer amplifier circuit 110. Further, the potential output from the output terminal of the buffer amplifier circuit 110 is supplied to the light emitting element 13 through the driving transistor 12. Specifically, the output potential is given as one potential of an electrode included in the light emitting element 13.

In this way, a change in the monitor light emitting element 66 according to a change in environmental temperature or a change with time is fed back to the light emitting element 13. As a result, the light emitting element 13 can be lit at a luminance corresponding to a change in environmental temperature or a change with time. Therefore, it is possible to provide a light emitting device capable of performing display independent of changes in environmental temperature and changes with time.

Further, since a plurality of monitor light emitting elements 66 are provided, these potential changes can be averaged and supplied to the light emitting element 13. That is, in the present invention, it is preferable to provide a plurality of monitor light emitting elements 66, whereby the change in potential can be averaged.

Further, by providing a plurality of monitor light emitting elements 66, an alternative to the monitor light emitting element in which a short circuit or the like has occurred can be prepared.

Furthermore, the present invention is characterized in that a monitor control transistor 111 and an inverter 112 connected to the monitor light emitting element 66 are provided. This is provided in consideration of an operation failure of the monitor circuit 64 caused by a failure of the monitor light emitting element 66 (including an initial failure and a time-dependent failure). For example, when the constant current source 105 and the monitor control transistor 111 are connected without any other transistor or the like, a monitor light emitting element 66 among the plurality of monitor light emitting elements is defective during the manufacturing process. Consider a case where the anode and the cathode of the monitor light emitting element are short-circuited. Then, a large amount of current from the constant current source 105 is supplied to the shorted monitor light emitting element 66 via the monitor line 113. Since the plurality of monitor light emitting elements are connected in parallel, when a large amount of current is supplied to the shorted monitor light emitting element 66, a predetermined constant current is supplied to the other monitor light emitting elements. Disappear. As a result, an appropriate change in the potential of the monitor light emitting element 66 cannot be supplied to the light emitting element 13.

Such a short circuit of the light emitting element for monitoring occurs when the potential of the anode and the potential of the cathode of the light emitting element for monitoring become the same or approach each other. For example, a short circuit may occur due to dust or the like between the anode and the cathode during the manufacturing process. In addition to the short circuit between the anode and the cathode, the light emitting element for monitoring may be short circuited due to a short circuit between the scanning line and the anode.

Therefore, in the present invention, a monitor control transistor 111 and an inverter 112 are provided. The monitor control transistor 111 stops the supply of current to the shorted monitor light emitting element 66 in order to prevent supply of a large amount of current due to a short circuit of the monitor light emitting element 66 as described above, that is, the shorted monitor light source. The light emitting element and the monitor line are electrically cut off.

The inverter 112 has a function of outputting a potential for turning off the monitor control transistor when any one of the plurality of monitor light emitting elements is short-circuited. In addition, the inverter 112 has a function of outputting a potential for turning on the monitor control transistor when none of the plurality of monitor light emitting elements is short-circuited.

The detailed operation of the monitor circuit 64 will be described with reference to FIG. As shown in FIG. 5A, in the electrode of the monitor light emitting element 66, when the high potential side is the anode electrode 66a and the low potential side is the cathode electrode 66c, the anode electrode 66a is connected to the input terminal of the inverter 112. The cathode electrode 66c is connected to the power source 18 and has a fixed potential. Therefore, when the anode and cathode of the monitor light emitting element 66 are short-circuited, the potential of the anode electrode 66a approaches the potential of the cathode electrode 66c. As a result, since a low potential close to the potential of the cathode electrode 66c is supplied to the inverter 112, the p-channel transistor 112p included in the inverter 112 is turned on. Then, the high potential (Va) is output from the inverter 112 and becomes the gate potential of the monitor control transistor 111. That is, the potential input to the gate of the monitor control transistor 111 is Va, and the monitor control transistor 111 is turned off.

Note that the VDD that is the higher potential (High) is set to be equal to or higher than the anode potential. Further, the low side potential of the inverter 112, the potential of the power source 18, the low side potential of the monitor line 113, and the low side potential applied to Va can all be made equal. In general, the low side potential is ground. However, the present invention is not limited to this, and the low-side potential may be determined so as to have a predetermined potential difference from the high-side potential. The predetermined potential difference can be determined by the current, voltage, luminance characteristics, or device specifications of the luminescent material.

Here, attention is paid to the order in which a constant current is supplied to the monitor light emitting element 66. It is necessary to start flowing a constant current through the monitor line 113 while the monitor control transistor 111 is on. In the present embodiment, as shown in FIG. 5B, current starts to flow through the monitor line 113 while Va is kept low. Va is set to VDD after the potential of the monitor line 113 is saturated. As a result, the monitor line 113 can be charged even when the monitor control transistor 111 is on.

On the other hand, when the monitor light emitting element 66 is not short-circuited, the potential of the anode electrode 66a is supplied to the inverter 112, so that the n-channel transistor 112 is turned on. Then, the low potential side potential is output from the inverter 112, and the monitor control transistor 111 is turned on.

In this way, the current from the constant current source 105 can be prevented from being supplied to the short-circuited monitoring light emitting element 66. Therefore, in the case where there are a plurality of monitor light emitting elements, when the monitor light emitting element is short-circuited, a change in the potential of the monitor line 113 can be minimized by cutting off the current supply to the shorted monitor light emitting element. . As a result, an appropriate change in the potential of the monitoring light emitting element 66 can be supplied to the light emitting element 13.

Note that in this embodiment mode, the constant current source 105 may be any circuit that can supply a constant current and can be manufactured using a transistor, for example.

In this embodiment, the monitor circuit 64 is described as including the plurality of monitor light emitting elements 66, the monitor control transistor 111, and the inverter 112. However, the present invention is not limited to this. For example, if the inverter 112 has a function of detecting when the monitor light emitting element is short-circuited and cutting off the current supplied to the shorted monitor light-emitting element via the monitor line 113, what kind of operation is possible? A simple circuit may be used. Specifically, it is only necessary to have a function of turning off the monitor control transistor in order to cut off the current supplied to the shorted monitor light emitting element.

In this embodiment mode, a plurality of light emitting elements for monitoring 66 are used, which is preferable because a monitoring operation can be performed even if any of them is defective. Furthermore, the monitoring operation can be averaged with a plurality of monitoring light emitting elements, which is preferable.

In this embodiment, the buffer amplifier circuit 110 is provided to prevent potential fluctuation. Accordingly, another circuit may be used instead of the buffer amplifier circuit 110 as long as it is a circuit that can prevent potential fluctuations, such as the buffer amplifier circuit 110. That is, when a circuit for preventing potential fluctuation is provided between the monitoring light emitting element 66 and the light emitting element 13 when the potential of one electrode of the monitoring light emitting element 66 is transmitted to the light emitting element 13, The circuit is not limited to the buffer amplifier circuit 110 described above, and a circuit having any configuration may be used.

(Embodiment 2)
In this embodiment mode, a circuit configuration for turning off the monitor control transistor when the monitor light emitting element is short-circuited and the operation thereof will be described, unlike the above embodiment mode.

A monitoring circuit 64 shown in FIG. 6A includes a p-channel first transistor 80, an n-channel second transistor 81 having a gate electrode common to the first transistor and connected in parallel. An n-channel third transistor 82 is connected in series to the second transistor. The monitor light emitting element 66 is connected to the gate electrodes of the first and second transistors 80 and 81. The gate electrode of the monitor control transistor 111 is connected to the electrode to which the first and second transistors 80 and 81 are connected to each other. Other configurations are the same as those of the monitor circuit 64 shown in FIG.

The potential on the high potential side of the first p-channel transistor 80 is Va, and the potential of the gate electrode of the third n-channel transistor 82 is Vb. Then, the potential of the monitor line 113 and the potentials of Va and Vb are operated as shown in FIG.

First, the potential of the monitor line 113 is saturated, and then the potential of Va is set to High. When the monitor light emitting element 66 is short-circuited, the potential of the anode of the monitor light emitting element 66, that is, the potential at the point D is lowered to the same level as the cathode of the monitor light emitting element 66. Then, a low potential, that is, Low is input to the gate electrodes of the first and second transistors 80 and 81, the n-channel second transistor 81 is turned off, and the p-channel first transistor is turned on. 80 turns on. Then, a high side potential which is one potential of the first transistor 80 is input to the gate electrode of the monitor control transistor 111 and is turned off. As a result, the current from the monitor line 113 is not supplied to the shorted monitor light emitting element 66.

At this time, if the short-circuit state is slight and the potential of the anode slightly decreases, it may be difficult to control which of the first and second transistors 80 and 81 is turned on or off. . Therefore, as shown in FIG. 6, the potential of Vb is supplied to the gate electrode of the third transistor 82. That is, as shown in FIG. 6B, the potential of Vb is set to Low while Va is High. Then, the n-channel third transistor 82 is turned off. As a result, when the potential of the anode is lower than VDD by the threshold voltage of the first transistor, the first transistor 80 can be turned on and the monitor control transistor 111 can be turned off. .

By controlling the potential of Vb in this way, the monitor control transistor 111 can be accurately turned off even when the potential of the anode is slightly lowered.

When the monitor light emitting element is normal, the monitor control transistor 111 is controlled to be turned on. That is, since the potential of the anode is almost the same as the high potential of the monitor line 113, the second transistor 81 is turned on. As a result, since the low potential is applied to the gate electrode of the monitor control transistor 111, the transistor is turned on.

As shown in FIG. 7A, a p-channel first transistor 83, a p-channel second transistor 84 connected in series to the first transistor, a second transistor, and a gate It has an n-channel third transistor 85 having a common electrode, and an n-channel fourth transistor 86 having a common gate electrode and the first transistor and connected in parallel. The monitor light emitting element 66 is connected to the gate electrodes of the second and third transistors 84 and 85. The gate electrode of the monitor control transistor 111 is connected to the electrode to which the second and third transistors 84 and 85 are connected to each other. Further, the gate electrode of the monitor control transistor 111 is connected to one electrode of the fourth transistor 86. Other configurations are the same as those of the monitor circuit 64 shown in FIG.

First, the potential of the monitor line 113 is saturated, and then the potential of Ve is set to Low. When the monitor light emitting element 66 is short-circuited, the potential of the anode of the monitor light emitting element 66, that is, the potential at the point D is lowered to the same level as the cathode of the monitor light emitting element 66. Then, a low potential, that is, Low is input to the gate electrodes of the second and third transistors 84 and 85, the n-channel third transistor 85 is turned off, and the p-channel second transistor is turned on. 84 is turned on. When the potential of Ve is Low, the first transistor 83 is turned on and the fourth transistor 86 is turned off. Then, the high side potential of the first transistor is input to the gate electrode of the monitor control transistor 111 via the second transistor 84 and turned off. As a result, the current from the monitor line 113 is not supplied to the shorted monitor light emitting element 66.

Thus, by controlling the voltage Ve of the gate electrode, the monitor control transistor 111 can be accurately turned off.

(Embodiment 3)
In the present invention, a reverse voltage can be applied to the light emitting element and the monitor light emitting element. Therefore, in this embodiment, a case where a reverse voltage is applied will be described.

The reverse voltage is a voltage obtained by inverting a high-side potential and a low-side potential in a forward voltage when a voltage applied when the light-emitting element 13 or the monitor light-emitting element 66 emits light is a forward voltage. Is applied. Specifically, using the monitor light emitting element 66, the potential applied to the monitor line 113 is made lower than the potential of the power source 18 in order to invert the potentials of the anode electrode 66a and the cathode electrode 66c.

Specifically, as shown in FIG. 13, the potential of the anode electrode 66a (anode potential: Va) is inverted from High to Low, and the potential of the cathode electrode 66c (cathode potential: Vc) is inverted from Low to High. . At the same time, the potential (V ₁₁₃ ) of the monitor line 113 is also inverted from High to Low. A period in which the anode potential and the cathode potential are inverted is referred to as a reverse voltage application period. When the cathode potential is returned from High to Low after a predetermined reverse voltage application period has elapsed, a constant current begins to flow through the monitor line 113, and charging is completed. After the charging is completed, that is, the voltage of the monitor line 113 becomes High, the potential of the anode line is returned from Low to High. At this time, the reason why the potential of the monitor line 113 returns to a curved shape with time is that a plurality of monitor light emitting elements are charged with a constant current, and further parasitic capacitance is charged.

Preferably, the anode potential is inverted, and then the cathode potential is inverted. Then, after a predetermined reverse voltage period has elapsed, the anode potential is returned, and then the cathode potential is returned. Simultaneously with the reversal of the anode potential, the potential of the monitor line 113 is charged to High.

In this reverse voltage application period, the driving transistor 12 and the monitor control transistor 111 must be on.

As a result of applying the reverse voltage to the light emitting element, the defective state of the light emitting element 13 and the monitoring light emitting element 66 can be improved, and the reliability can be improved. In addition, the light emitting element 13 and the monitor light emitting element 66 have an initial stage in which the anode and the cathode are short-circuited due to adhesion of foreign matter, pinholes due to fine protrusions on the anode or the cathode, and non-uniformity of the electroluminescent layer. Defects may occur. When such an initial failure occurs, lighting and non-lighting according to the signal are not performed, and most of the current flows through the shorted element. As a result, there arises a problem that the image is not displayed favorably. In addition, this defect may occur in any pixel.

Therefore, as in the present embodiment, when a reverse voltage is applied to the light emitting element 13 and also to the monitor light emitting element 66, a local current flows through the shorted portion, and the shorted portion generates heat, which is oxidized or carbonized. Can be made. As a result, the shorted portion can be insulated, and a current flows in a region other than that portion, so that the light emitting element 13 or the monitoring light emitting element 66 can be operated normally. By applying the reverse voltage in this way, even if an initial failure occurs, the failure can be eliminated. Such insulation of the short-circuit portion is preferably performed before shipment.

In addition to the initial failure, a short circuit between the anode and the cathode may occur as time passes. Such a defect is also called a progressive defect. Therefore, as in the present invention, by applying a reverse voltage to the light emitting element 13 and the monitoring light emitting element 66 periodically, even if a progressive defect occurs, the defect can be eliminated. 13 or the monitor light emitting element 66 can be operated normally.

In addition, image burn-in can be prevented by applying a reverse voltage. Image burn-in occurs due to the deterioration state of the light emitting element 13, but the deterioration state can be reduced by applying a reverse voltage. As a result, image burn-in can be prevented.

In general, the deterioration of the light emitting element 13 and the monitor light emitting element 66 progresses greatly in the initial stage, and the degree of progress of the deterioration decreases with time. That is, in the pixel, the light-emitting element 13 and the monitor light-emitting element 66 once deteriorated are less likely to be further deteriorated. As a result, each light emitting element 13 varies. Therefore, before shipping or when no image is displayed, all the light-emitting elements 13 and further the monitor light-emitting elements 66 are turned on, and the non-deteriorated elements are deteriorated, whereby the deterioration state of all the elements is changed. Can be averaged. Such a structure for lighting all elements may be provided in the light emitting device.

(Embodiment 4)
In this embodiment, an example of a pixel circuit and a structure is described.

FIG. 2 shows a pixel circuit that can be used in the pixel portion of the present invention. In the pixel portion 40, signal lines Sx, scanning lines Gy, and power supply lines Vx are provided in a matrix, and pixels 10 are provided at intersections thereof. The pixel 10 includes a switching transistor 11, a driving transistor 12, a capacitor 16, and a light emitting element 13.

A connection relationship in the pixel will be described. The switching transistor 11 is provided at the intersection of the signal line Sx and the scanning line Gy. One electrode of the switching transistor 11 is connected to the signal line Sx, and the gate electrode of the switching transistor 11 is connected to the scanning line Gy. Yes. The driving transistor 12 has one electrode connected to the power supply line Vx and the gate electrode connected to the other electrode of the switching transistor 11. The capacitive element 16 is provided to hold the gate-source voltage of the driving transistor 12. In the present embodiment, the capacitor 16 has one electrode connected to Vx and the other electrode connected to the gate electrode of the driving transistor 12. Note that the capacitor 16 need not be provided when the gate capacitance of the driving transistor 12 is large and the leakage current is small. The light emitting element 13 is connected to the other electrode of the driving transistor 12.

A method for driving such a pixel will be described.

First, when the switching transistor 11 is turned on, a video signal is input from the signal line Sx. Based on the video signal, charges are accumulated in the capacitor 16. When the charge accumulated in the capacitor 16 exceeds the gate-source voltage (Vgs) of the driving transistor 12, the driving transistor 12 is turned on. Then, a current is supplied to the light emitting element 13 and it is lit. At this time, the driving transistor 12 can be operated in a linear region or a saturation region. When operating in the saturation region, a constant current can be supplied. Further, when operating in a linear region, it can be operated at a low voltage, and power consumption can be reduced.

Hereinafter, a pixel driving method will be described with reference to a timing chart.

FIG. 8A shows a timing chart of one frame period in which an image of 60 frames is rewritten in one second. In the timing chart, the vertical axis indicates the scanning line G (from the first line to the last line), and the horizontal axis indicates time.

One frame period has m (m is a natural number of 2 or more) subframe periods SF1, SF2,..., SFm, and the m subframe periods SF1, SF2,. ,..., Tam, a display period (lighting period) Ts1, Ts2,..., Tsm, and a reverse voltage application period. In this embodiment mode, as shown in FIG. 8A, in one frame period, subframe periods SF1, SF2, and SF3 and a reverse voltage application period (FRB) are provided. In each subframe period, the writing operation periods Ta1 to Ta3 are sequentially performed, and become display periods Ts1 to Ts3, respectively.

The timing chart illustrated in FIG. 8B illustrates a writing operation period, a display period, and a reverse voltage application period when attention is paid to a certain row (i-th row). After the writing operation period and the display period appear alternately, a reverse voltage application period appears. The period having the writing operation period and the display period is a forward voltage application period.

The write operation period Ta can be divided into a plurality of operation periods. In the present embodiment, the operation is divided into two operation periods, and an erase operation is performed on the one hand and a write operation is performed on the other hand. In order to provide the erase operation and the write operation in this way, a WE (Write Erase) signal is input. Details of other erase operations, write operations, and signals will be described in the following embodiments.

Further, immediately before the reverse voltage application period, a period in which the switching transistors of all the pixels are simultaneously turned on, that is, a period in which all the scanning lines are turned on (on period) is provided.

Immediately after the reverse voltage application period, a period in which the switching transistors of all the pixels are simultaneously turned off, that is, a period in which all the scanning lines are turned off (off period) may be provided.

An erasing period (SE) is provided immediately before the reverse voltage application period. The erasing period can be performed by the same operation as the erasing operation. In the erasing period, an operation of sequentially erasing data written in SF3 in the immediately preceding subframe period, in this embodiment, is sequentially performed. This is because in the on period, the switching transistors are turned on all at once after the display period of the pixels in the last row ends, and thus the pixels in the first row and the like have an unnecessary display period.

In this manner, control for providing the on period, the off period, and the erasing period is performed by a driving circuit such as a scanning line driving circuit or a signal line driving circuit.

Note that the timing of applying the reverse voltage to the light emitting element 13, that is, the reverse voltage application period is not limited to FIGS. That is, it is not necessary to provide a reverse voltage application period for each frame. Further, it is not necessary to provide a reverse voltage application period in the second half of one frame. The on period may be at least immediately before the application period (RB), and the off period may be at least immediately after the application period (RB). Further, the order of reversing the anode potential and the cathode potential of the light-emitting element is not limited to FIGS. 8A and 8B. That is, the anode potential may be lowered after the cathode potential is raised.

FIG. 3 shows a layout example of the pixel circuit shown in FIG. A semiconductor film constituting the switching transistor 11 and the driving transistor 12 is formed. After that, a first conductive film is formed through an insulating film functioning as a gate insulating film. The conductive film can be used as the gate electrode of the switching transistor 11 and the driving transistor 12 and can be used as the scanning line Gy. At this time, the switching transistor 11 may have a double gate structure.

After that, a second conductive film is formed through an insulating film functioning as an interlayer insulating film. The conductive film can be used as a drain wiring and a source wiring of the switching transistor 11 and the driving transistor 12, and can also be used as a signal line Sx and a power supply line Vx. At this time, the capacitor 16 can be formed by a stacked structure of a first conductive film, an insulating film functioning as an interlayer insulating film, and a second conductive film. The gate electrode of the driving transistor 12 and the other electrode of the switching transistor are connected via a contact hole.

A pixel electrode 19 is formed in an opening provided in the pixel. The pixel electrode is connected to the other electrode of the driving transistor 12. At this time, when an insulating film or the like is provided between the second conductive film and the pixel electrode, it is necessary to connect through a contact hole. In the case where an insulating film or the like is not provided, the pixel electrode can be directly connected to the other electrode of the driving transistor 12.

In the layout as illustrated in FIG. 3, the first conductive film and the pixel electrode may overlap as in the region 430 in order to ensure a high aperture ratio. Such a region 430 may cause a coupling capacitance. This coupling capacity is an unnecessary capacity. Such unnecessary capacitance can be removed by the driving method of the present invention.

FIG. 4 shows a cross-sectional example of AB and BC shown in FIG.

A patterned semiconductor film is formed on the insulating substrate 20 through a base film. As the insulating substrate 20, for example, a glass substrate such as barium borosilicate glass or alumino borosilicate glass, a quartz substrate, a stainless steel (SUS) substrate, or the like can be used. In addition, substrates made of plastics such as PET (polyethylene terephthalate), PEN (polyethylene naphthalate), and PES (polyethersulfone) and flexible synthetic resins such as acrylic are generally different from other substrates. Although the heat resistant temperature tends to be low as compared, it can be used as long as it can withstand the processing temperature in the manufacturing process. As the base film, an insulating film such as silicon oxide, silicon nitride, or silicon nitride oxide can be used.

An amorphous semiconductor film is formed over the base film. The thickness of the amorphous semiconductor film is 25 to 100 nm (preferably 30 to 60 nm). As the amorphous semiconductor, not only silicon but also silicon germanium can be used.

Next, the amorphous semiconductor film is crystallized as necessary to form a crystalline semiconductor film. As a method for crystallization, a heating furnace, laser irradiation, irradiation with light emitted from a lamp (hereinafter referred to as lamp annealing), or a combination thereof can be used. For example, a crystalline semiconductor film is formed by adding a metal element to an amorphous semiconductor film and performing heat treatment using a heating furnace. Thus, it is preferable to add a metal element because crystallization can be performed at a low temperature.

The crystalline semiconductor film thus formed is patterned into a predetermined shape. The predetermined shape is a shape that becomes the switching transistor 11 and the driving transistor 12 as shown in FIG.

Next, an insulating film functioning as a gate insulating film is formed. The insulating film is formed so as to cover the semiconductor film with a thickness of 10 to 150 nm, preferably 20 to 40 nm. For example, a silicon oxynitride film, a silicon oxide film, or the like can be used, and a single layer structure or a stacked structure may be used.

Then, a first conductive film functioning as a gate electrode is formed through the gate insulating film. Although the gate electrode may be a single layer or a stacked layer, in this embodiment mode, a stacked structure of conductive films 22a and 22b is used. Each of the conductive films 22a and 22b may be formed of an element selected from Ta, W, Ti, Mo, Al, and Cu, or an alloy material or a compound material containing the element as a main component. In this embodiment, a tantalum nitride film having a thickness of 10 to 50 nm, for example, 30 nm is formed as the conductive film 22a, and a tungsten film having a thickness of 200 to 400 nm, for example, 370 nm is sequentially formed as the conductive film 22b.

An impurity element is added using the gate electrode as a mask. At this time, a low concentration impurity region may be formed in addition to the high concentration impurity region. This is referred to as an LDD (Lightly Doped Drain) structure. In particular, a structure in which a low-concentration impurity region overlaps with a gate electrode is referred to as a GOLD (Gate-drain Overlapped LDD) structure. In particular, the n-channel transistor may have a low concentration impurity region.

An unnecessary capacitance may be formed due to the low concentration impurity region. Therefore, when a pixel is formed using a TFT having an LDD structure or a GOLD structure, it is preferable to use the driving method of the present invention.

Thereafter, insulating films 28 and 29 functioning as the interlayer insulating film 30 are formed. The insulating film 28 may be an insulating film containing nitrogen, and in this embodiment mode, is formed using a 100 nm silicon nitride film by a plasma CVD method. The insulating film 29 can be formed using an organic material or an inorganic material. As the organic material, polyimide, acrylic, polyamide, polyimide amide, resist, benzocyclobutene, siloxane, or polysilazane can be used. Note that siloxane corresponds to a resin including a Si—O—Si bond. Siloxane has a skeleton structure formed of a bond of silicon (Si) and oxygen (O). As a substituent, an organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used. Alternatively, a fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent. Polysilazane is formed using a polymer material having a bond of silicon (Si) and nitrogen (N), that is, a liquid material containing so-called polysilazane as a starting material. Examples of inorganic materials include silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide (SiNxOy) (x> y) (x, y = 1, 2,... An insulating film containing oxygen or nitrogen such as ()) can be used. Alternatively, a stacked structure of these insulating films may be used as the second insulating film 107. In particular, when the second interlayer insulating film is formed using an organic material, the flatness is improved, but moisture and oxygen are absorbed by the organic material. In order to prevent this, an insulating film containing an inorganic material is preferably formed over the organic material. When an insulating film containing nitrogen is used as the inorganic material, entry of alkali ions such as Na can be prevented, which is preferable. When an organic material is used for the insulating film 29, flatness can be improved, which is preferable.

Contact holes are formed in the interlayer insulating film 30. Then, a second conductive film which functions as the switching transistor 11, the source wiring and drain wiring 24 of the driving transistor 12, the signal line Sx, and the power supply line Vx is formed. As the second conductive film, a film made of an element of aluminum (Al), titanium (Ti), molybdenum (Mo), tungsten (W), or silicon (Si) or an alloy film using these elements can be used. . In this embodiment, a titanium film / titanium nitride film / a film having aluminum and silicon / titanium film (Ti / TiN / Al—Si / Ti) are stacked at 60/40/300/100 nm, respectively, to form the second film. A conductive film is formed.

Thereafter, an insulating film 31 is formed so as to cover the second conductive film. The material shown for the interlayer insulating film 30 can be used for the insulating film 31. By providing the insulating film 31 in this way, the aperture ratio can be increased.

Then, a pixel electrode (also referred to as a first electrode) 19 is formed in the opening provided in the insulating film 31. In order to improve the step coverage of the pixel electrode in the opening, the end surface of the opening may be rounded so as to have a plurality of radii of curvature. For the pixel electrode 19, as a light-transmitting material, indium tin oxide (ITO), IZO (indium zinc oxide) in which 2 to 20 atom% of zinc oxide (ZnO) is mixed with indium oxide, oxidation is used. ITO-SiOx (referred to as ITSO for convenience) in which ₂ to 20 atom% silicon oxide (SiO2) is mixed with indium, organic indium, organic tin, or the like can also be used. In addition to silver (Ag), an element selected from tantalum, tungsten, titanium, molybdenum, aluminum, and copper, or an alloy material or a compound material containing the element as a main component is used as the non-translucent material. it can. At this time, when the insulating film 31 is formed using an organic material and the flatness is increased, the flatness of the pixel electrode formation surface is improved, so that a uniform voltage can be applied and further a short circuit can be prevented.

In a region 430 where the first conductive film overlaps with the pixel electrode, a coupling capacitance may be generated. This coupling capacity is an unnecessary capacity. Such unnecessary capacitance can be removed by the driving method of the present invention.

Thereafter, the electroluminescent layer 33 is formed by a vapor deposition method or an inkjet method. The electroluminescent layer 140 includes an organic material or an inorganic material, and includes an electron injection layer (EIL), an electron transport layer (ETL), a light emitting layer (EML), a hole transport layer (HTL), and a hole injection layer (HIL). ) And the like. Note that the boundaries between the layers are not necessarily clear, and there are cases where the materials constituting the layers are partially mixed and the interface is unclear. Further, the electroluminescent layer is not limited to the above laminated structure.

Then, the second electrode 35 is formed by a sputtering method or an evaporation method. The first electrode (pixel electrode) 19 and the second electrode 35 of the electroluminescent layer (light emitting element) serve as an anode or a cathode depending on the pixel configuration.

As the anode material, it is preferable to use a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like having a high work function (work function of 4.0 eV or more). Specific examples of anode materials include ITO, IZO mixed with 2-20% zinc oxide (ZnO) in indium oxide, gold (Au), platinum (Pt), nickel (Ni), tungsten (W), Chromium (Cr), molybdenum (Mo), iron (Fe), cobalt (Co), copper (Cu), palladium (Pd), nitride of metal material (TiN), or the like can be used.

On the other hand, as the cathode material, it is preferable to use a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like having a low work function (work function of 3.8 eV or less). Specific examples of the cathode material include elements belonging to Group 1 or Group 2 of the element periodic rule, that is, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, and Sr, and alloys containing these (Mg : Ag, Al: Li) and compounds (LiF, CsF, CaF ₂ ), as well as transition metals including rare earth metals. However, since the cathode needs to have translucency, these metals or an alloy containing these metals are formed very thinly, and are formed by lamination with a metal (including an alloy) such as ITO.

Among the above materials, the non-translucent material can be applied as a transparent electrode by reducing the film thickness.

Thereafter, a protective film may be formed to cover the second electrode 35. As the protective film, a silicon nitride film or a DLC film can be used.

In this manner, a pixel of the light emitting device can be formed.

(Embodiment 5)
In this embodiment, a structure of the entire panel including the pixel circuit described in the above embodiment is described.

As shown in FIG. 12, the light-emitting device of the present invention includes a pixel portion 40 in which a plurality of the pixels 10 described above are arranged in a matrix, a first scanning line driving circuit 41, a second scanning line driving circuit 42, and the like. And a signal line driver circuit 43. The first scanning line driving circuit 41 and the second scanning line driving circuit 42 may be disposed so as to face each other with the pixel portion 40 interposed therebetween, or may be disposed in one of the upper, lower, left, and right sides of the pixel portion 40.

The signal line driver circuit 43 includes a pulse output circuit 44, a latch 45, and a selection circuit 46. The latch 45 has a first latch 47 and a second latch 48. The selection circuit 46 includes a transistor 49 (hereinafter referred to as TFT 49) and an analog switch 50 as switching means. The TFT 49 and the analog switch 50 are provided in each column corresponding to the signal line. In addition, in this embodiment, an inverter 51 is provided in each column in order to generate an inverted signal of the WE signal. Note that the inverter 51 may not be provided when an inverted signal of the WE signal is supplied from the outside.

The gate electrode of the TFT 49 is connected to the selection signal line 52, one electrode is connected to the signal line, and the other electrode is connected to the power supply 53. The analog switch 50 is provided between the second latch 48 and each signal line. That is, the input terminal of the analog switch 50 is connected to the second latch 48, and the output terminal is connected to the signal line. One of the two control terminals of the analog switch 50 is connected to the selection signal line 52, and the other is connected to the selection signal line 52 via the inverter 51. The potential of the power source 53 is a potential for turning off the driving transistor 12 included in the pixel. When the polarity of the driving transistor 12 is an n-channel type, the potential of the power source 53 is set to Low, and the driving transistor 12 is a p-channel type. In this case, the potential of the power supply 53 is set to High.

The first scanning line driving circuit 41 includes a pulse output circuit 54 and a selection circuit 55. The second scanning line driving circuit 42 includes a pulse output circuit 56 and a selection circuit 57. Start pulses (G1SP, G2SP) are input to the pulse output circuits 54, 56, respectively. In addition, clock pulses (G1CK, G2CK) and inverted clock pulses (G1CKB, G2CKB) are input to the pulse output circuits 54, 56, respectively.

The selection circuits 55 and 57 are connected to the selection signal line 52. However, the selection circuit 57 included in the second scanning line driving circuit 42 is connected to the selection signal line 52 via the inverter 58. That is, the WE signals input to the selection circuits 55 and 57 via the selection signal line 52 are in an inverted relationship with each other.

Each of the selection circuits 55 and 57 has a tristate buffer. The tri-state buffer is in an operating state when a signal transmitted from the selection signal line 52 is at an H level, and is in a high impedance state when the signal is at an L level.

The pulse output circuit 44 included in the signal line driving circuit 43, the pulse output circuit 54 included in the first scanning line driving circuit 41, and the pulse output circuit 56 included in the second scanning line driving circuit 42 are composed of a plurality of flip-flop circuits. A shift register and a decoder circuit are included. If a decoder circuit is applied as the pulse output circuits 44, 54 and 56, a signal line or a scanning line can be selected at random. If a signal line or a scanning line can be selected at random, it is possible to suppress the generation of a pseudo contour that occurs when the time gray scale method is applied.

Note that the configuration of the signal line driver circuit 43 is not limited to the above description, and a level shifter or a buffer may be provided. Further, the configurations of the first scan line driver circuit 41 and the second scan line driver circuit 42 are not limited to the above description, and a level shifter or a buffer may be provided. In addition, each of the signal line driver circuit 43, the first scan line driver circuit 41, and the second scan line driver circuit 42 may include a protection circuit.

In the present invention, a protection circuit may be provided. The protection circuit can be formed to have a plurality of resistance elements. For example, p-channel transistors can be used as the plurality of resistance elements. The protection circuit can be provided in each of the signal line driver circuit 43, the first scan line driver circuit 41, and the second scan line driver circuit 42. Preferably, the signal line driver circuit 43 and the first scan line driver are provided. It is preferable to provide the circuit 41 or between the second scan line driver circuit 42 and the pixel portion 40. Such a protection circuit can suppress deterioration and destruction of the element due to static electricity.

In this embodiment mode, the light emitting device has a power supply control circuit 63. The power supply control circuit 63 includes a power supply circuit 61 that supplies power to the light emitting element 13 and a controller 62. The power supply circuit 61 includes a first power supply 17, and the first power supply 17 is connected to the pixel electrode of the light emitting element 13 through the driving transistor 12 and the power supply line Vx. In addition, the power supply circuit 61 includes a second power supply 18, and the second power supply 18 is connected to the light emitting element 13 through a power supply line connected to the counter electrode.

In such a power supply circuit 61, when a forward voltage is applied to the light emitting element 13 and a current is caused to flow through the light emitting element 13, the potential of the first power supply 17 is higher than the potential of the second power supply 18. Set to be higher. On the other hand, when a reverse voltage is applied to the light emitting element 13, the potential of the first power supply 17 is set to be lower than the potential of the second power supply 18. Such setting of the power supply can be performed by supplying a predetermined signal from the controller 62 to the power supply circuit 61.

In this embodiment mode, the light-emitting device includes a monitor circuit 64 and a control circuit 65. The control circuit 65 has a constant current source and a buffer amplifier circuit. The monitor circuit 64 includes a monitor light emitting element 66, a monitor control transistor 111, and an inverter 112.

The control circuit 65 supplies a signal for correcting the power supply potential to the power supply control circuit 63 based on the output of the monitor circuit 64. The power supply control circuit 63 corrects the power supply potential supplied to the pixel unit 40 based on the signal supplied from the control circuit 65.

The light emitting device of the present invention having the above structure can improve the reliability by suppressing the fluctuation of the current value due to the change of the environmental temperature or the deterioration with time. Further, the monitor control transistor 111 and the inverter 112 can prevent the current from the constant current source 105 from flowing through the shorted monitor light emitting element 66, and supply an accurate current value fluctuation to the light emitting element 13. .

(Embodiment 6)
In this embodiment mode, operation of the light-emitting device of the present invention having the above structure is described with reference to drawings.

First, operation of the signal line driver circuit 43 is described with reference to FIG. The pulse output circuit 44 receives a clock signal (hereinafter referred to as SCK), a clock inversion signal (hereinafter referred to as SCKB), and a start pulse (hereinafter referred to as SSP), and the first latch 47 according to the timing of these signals. Outputs a sampling pulse. The first latch 47 to which data is input holds the video signal from the first column to the last column in accordance with the timing at which the sampling pulse is input. When the latch pulse is input, the second latch 48 transfers the video signals held in the first latch 47 to the second latch 48 all at once.

Here, the operation of the selection circuit 46 in each period will be described with the period T1 when the WE signal transmitted from the selection signal line 52 is L level and the period T2 when the WE signal is H level. The periods T1 and T2 correspond to half the horizontal scanning period, and the period T1 is referred to as a first subgate selection period, and the period T2 is referred to as a second subgate selection period.

In the period T1 (first sub-gate selection period), the WE signal transmitted from the selection signal line 52 is at the L level, the transistor 49 is turned on, and the analog switch 50 is turned off. Then, the plurality of signal lines S1 to Sn are electrically connected to the power source 53 via the transistors 49 arranged in each column. That is, the plurality of signal lines Sx have the same potential as the power supply 53. At this time, the switching transistor 11 included in the selected pixel 10 is turned on, and the potential of the power supply 53 is transmitted to the gate electrode of the driving transistor 12 through the switching transistor 11. Then, the driving transistor 12 is turned off, and no current flows between both electrodes of the light-emitting element 13 so that no light is emitted. In this manner, regardless of the state of the video signal input to the signal line Sx, the potential of the power supply 53 is transmitted to the gate electrode of the driving transistor 12, and the switching transistor 11 is turned off, so that the light emitting element 13 is turned on. The operation for forcibly causing no light emission is the erasing operation.

In the period T2 (second sub-gate selection period), the WE signal transmitted from the selection signal line 52 is at the H level, the transistor 49 is turned off, and the analog switch 50 is turned on. As a result, the video signal held in the second latch 48 is simultaneously transmitted to each signal line Sx for one row. At this time, the switching transistor 11 included in the pixel 10 is turned on, and the video signal is transmitted to the gate electrode of the driving transistor 12 through the switching transistor 11. Then, according to the input video signal, the driving transistor 12 is turned on or off, and the first and second electrodes of the light-emitting element 13 have different potentials or the same potential. More specifically, when the driving transistor 12 is turned on, the first and second electrodes of the light emitting element 13 have different potentials, and a current flows through the light emitting element 13. Then, the light emitting element 13 is turned on. Note that the current flowing through the light emitting element 13 is the same as the current flowing between the source and drain of the driving transistor 12.

On the other hand, when the driving transistor 12 is turned off, the first and second electrodes of the light emitting element 13 have the same potential, and no current flows through the light emitting element 13. That is, the light emitting element 13 does not emit light. In this manner, the writing transistor is an operation in which the driving transistor 12 is turned on or off in accordance with the video signal, and the potentials of the first and second electrodes of the light-emitting element 13 are different or the same. .

Next, operations of the first scanning line driving circuit 41 and the second scanning line driving circuit 42 will be described. G1CK, G1CKB, and G1SP are input to the pulse output circuit 54, and pulses are sequentially output to the selection circuit 55 in accordance with the timing of these signals. G2CK, G2CKB, and G2SP are input to the pulse output circuit 56, and pulses are sequentially output to the selection circuit 57 in accordance with the timing of these signals. FIG. 14B shows each column of the i-th row, j-th row, k-th row, and p-th row (i, j, k, p are natural numbers, 1 ≦ i, j, k, p ≦ n). The potential of the pulse supplied to the selection circuits 55 and 57 is shown.

Here, similarly to the description of the operation of the signal line driver circuit 43, each period is defined as a period T1 when the WE signal transmitted from the selection signal line 52 is at L level and a period T2 when the WE signal is at H level. The operation of the selection circuit 55 included in the first scanning line driving circuit 41 and the selection circuit 57 included in the second scanning line driving circuit 42 will be described. Note that in the timing chart of FIG. 14B, the potential of the gate line Gy (y is a natural number, 1 ≦ y ≦ n) to which a signal is transmitted from the first scan line driver circuit 41 is expressed as VGy (41). The potential of the gate line to which the signal is transmitted from the second scanning line driving circuit 42 is denoted as VGy (42). VGy (41) and VGy (42) can be supplied by the same scanning line Gy.

In the period T1 (first sub-gate selection period), the WE signal transmitted from the selection signal line 52 is at the L level. Then, the L level WE signal is input to the selection circuit 55 included in the first scanning line driving circuit 41, and the selection circuit 55 becomes indefinite. On the other hand, an H level signal obtained by inverting the WE signal is input to the selection circuit 57 included in the second scanning line driving circuit 42, and the selection circuit 57 enters an operating state. That is, the selection circuit 57 transmits an H level signal (row selection signal) to the i-th gate line Gi, and the gate line Gi has the same potential as the H-level signal. That is, the second scanning line driving circuit 42 selects the i-th gate line Gi. As a result, the switching transistor 11 included in the pixel 10 is turned on. Then, the potential of the power supply 53 included in the signal line driver circuit 43 is transmitted to the gate electrode of the driving transistor 12, the driving transistor 12 is turned off, and the potentials of both electrodes of the light emitting element 13 are the same potential. That is, during this period, an erasing operation in which the light emitting element 13 does not emit light is performed.

In the period T2 (second sub-gate selection period), the WE signal transmitted from the selection signal line 52 is at the H level. Then, an H-level WE signal is input to the selection circuit 55 included in the first scanning line driving circuit 41, and the selection circuit 55 enters an operating state. That is, the selection circuit 55 transmits the H level signal to the gate line Gi of the i-th row, and the gate line Gi has the same potential as the H level signal. That is, the first scanning line driving circuit 41 selects the i-th gate line Gi. As a result, the switching transistor 11 included in the pixel 10 is turned on. Then, the video signal is transmitted from the second latch 48 included in the signal line driver circuit 43 to the gate electrode of the driving transistor 12, the driving transistor 12 is turned on or off, and the two electrodes included in the light emitting element 13 are connected. The potentials are different from each other or the same potential. That is, in this period, the writing operation in which the light emitting element 13 emits light or does not emit light is performed. On the other hand, an L level signal is input to the selection circuit 57 included in the second scanning line driving circuit 42, and an indefinite state is set.

As described above, the gate line Gy is selected by the second scanning line driving circuit 42 in the period T1 (first subgate selection period), and the second scanning line driving circuit in the period T2 (second subgate selection period). 42 is selected. That is, the gate lines are complementarily controlled by the first scanning line driving circuit 41 and the second scanning line driving circuit 42. In the first and second sub-gate selection periods, the erase operation is performed on one side and the write operation is performed on the other side.

Note that in a period in which the first scanning line driving circuit 41 selects the i-th gate line Gi, the second scanning line driving circuit 42 is not operating (the selection circuit 57 is in an indefinite state), or the i-th row. A row selection signal is transmitted to the gate lines of other rows except for. Similarly, during a period in which the second scanning line driving circuit 42 transmits a row selection signal to the i-th gate line Gi, the first scanning line driving circuit 41 is in an indefinite state or other rows except the i-th row. A row selection signal is transmitted to the gate line.

In addition, since the light emitting element 13 can be forcibly turned off according to the present invention that performs the above operation, the duty ratio can be improved. Further, although the light emitting element 13 can be forcibly turned off, it is not necessary to provide a TFT for discharging the charge of the capacitor 16, and thus a high aperture ratio is realized. When a high aperture ratio is realized, the luminance of the light-emitting element can be lowered with an increase in the area that emits light. That is, since the driving voltage can be lowered, power consumption can be reduced.

Note that the present invention is not limited to the above-described form in which the gate selection period is divided into two. The gate selection period may be divided into three or more.

(Embodiment 7)
In this embodiment mode, pixel configurations to which the driving method of the present invention can be applied are exemplified. Note that description overlapping with the configuration shown in FIG. 2 is omitted.

FIG. 9 shows a pixel configuration in which third transistors 25 are provided at both ends of the capacitor 16 in addition to the pixel configuration shown in FIG. The third transistor 25 has a function of discharging charges accumulated in the capacitor 16 in a predetermined period. The third transistor 25 is also referred to as an erasing transistor. The predetermined period is controlled by the erasing scan line Ry to which the gate electrode of the third transistor 25 is connected.

For example, when a plurality of subframe periods are provided, the charge of the capacitor 16 is discharged by the third transistor 25 in a short subframe period. As a result, the duty ratio can be improved.

FIG. 10A shows a pixel structure in which a fourth transistor 36 is provided between the driving transistor 12 and the light-emitting element 13 in addition to the pixel structure shown in FIG. . A second power supply line Vax having a fixed potential is connected to the gate electrode of the fourth transistor 36. Therefore, the current supplied to the light emitting element 13 can be constant regardless of the voltage between the gate electrode and the source electrode of the driving transistor 12 or the fourth transistor 36. The fourth transistor 36 is also referred to as a current control transistor.

FIG. 10B shows a pixel structure in which a second power supply line Vax having a fixed potential is provided in parallel with the scanning line Gy unlike FIG. 10A.

In FIG. 10C, unlike FIGS. 10A and 10B, the gate electrode of the fourth transistor 36 having a fixed potential is connected to the gate electrode of the driving transistor 12. This is a pixel configuration characterized by. In a pixel structure in which a new power supply line is not provided as in FIG. 10C, the aperture ratio can be maintained.

FIG. 11 shows a pixel structure in which the erasing transistor shown in FIG. 9 is provided in addition to the pixel structure shown in FIG. The charge of the capacitor 16 can be discharged by the erasing transistor. Of course, in addition to the pixel structure shown in FIG. 10B or FIG. 10C, an erasing transistor can be provided.

That is, the present invention can be applied without being limited to the pixel configuration.

(Embodiment 8)
The present invention can also be applied to a light emitting device that performs constant current driving. In this embodiment, the degree of change with time is detected using the monitor light emitting element 66, and the change with time of the light emitting element is corrected by correcting the video signal or the power supply potential based on the detection result. A case of compensation will be described.

In this embodiment, first and second light emitting elements for monitoring are provided. A constant current is supplied from the first constant current source to the first monitoring light emitting element, and a constant current is supplied from the second constant current source to the second monitoring light emitting element. By changing the current value supplied from the first constant current source and the current value supplied from the second constant current source, the total amount of current flowing through the first and second monitor light emitting elements is different. Then, a difference in change with time occurs between the first and second monitor light emitting elements.

The first and second monitoring light emitting elements are connected to an arithmetic circuit, and the arithmetic circuit calculates a difference in potential between the first monitoring light emitting element and the second monitoring light emitting element. The voltage value calculated by the arithmetic circuit is supplied to the video signal generation circuit. In the video signal generation circuit, the video signal supplied to each pixel is corrected based on the voltage value supplied from the arithmetic circuit. With the above structure, a change with time of the light-emitting element can be compensated.

Note that a circuit such as a buffer amplifier circuit for preventing potential fluctuations may be provided between each monitor light emitting element and each arithmetic circuit.

Note that in this embodiment, as a pixel having a structure for performing constant current driving, for example, there is a pixel using a current mirror circuit.

(Embodiment 9)
The present invention can be applied to a passive matrix light-emitting device. A passive matrix light-emitting device includes a pixel portion, a column signal line driver circuit, a row signal line driver circuit, and a controller that control the driver circuit arranged on the periphery of the pixel portion on an insulating substrate. The column signal line driver circuit, the row signal line driver circuit, or the controller may use an IC chip provided by an COG on an insulating substrate. The pixel portion includes column signal lines arranged in the column direction, row signal lines arranged in the row direction, and a plurality of light emitting elements arranged in a matrix. A monitor circuit 64 can be provided on the insulating substrate on which the pixel portion is formed.

In the light emitting device of this embodiment, the monitor circuit 64 is used to correct the image data input to the column signal line driving circuit or the voltage generated from the constant voltage source according to the temperature change and the change with time. Thus, it is possible to provide a light emitting device in which the influence caused by both temperature change and change with time is reduced.

(Embodiment 10)
As electronic devices including a pixel portion including a light-emitting element, a television device (also simply referred to as a television or a television receiver), a digital camera, a digital video camera, a mobile phone device (also simply referred to as a mobile phone or a mobile phone), Examples thereof include portable information terminals such as PDAs, portable game machines, computer monitors, computers, sound reproduction apparatuses such as car audio, and image reproduction apparatuses equipped with recording media such as home game machines. A specific example thereof will be described with reference to FIG.

A portable information terminal device illustrated in FIG. 15A includes a main body 9201, a display portion 9202, and the like.
The light emitting device of the present invention can be applied to the display portion 9202. That is, a portable information terminal device in which the influence of fluctuations in the current value of a light emitting element due to changes in environmental temperature and changes over time is suppressed by the present invention that corrects the power supply potential applied to the light emitting element using a light emitting element for monitoring Can be provided.

A digital video camera shown in FIG. 15B includes a display portion 9701, a display portion 9702, and the like. The light emitting device of the present invention can be applied to the display portion 9701. Provided is a digital video camera that suppresses the influence of fluctuations in the current value of a light-emitting element due to changes in environmental temperature and changes over time by the present invention that corrects the power supply potential applied to the light-emitting element using a light-emitting element for monitoring. Can do.

A cellular phone shown in FIG. 15C includes a main body 9101, a display portion 9102, and the like. The light emitting device of the present invention can be applied to the display portion 9102. According to the present invention in which a power supply potential applied to a light emitting element is corrected using a light emitting element for monitoring, a mobile phone in which an influence due to a change in current value of the light emitting element due to a change in environmental temperature and a change over time is suppressed can be provided. it can.

A portable television device illustrated in FIG. 15D includes a main body 9301, a display portion 9302, and the like. The light emitting device of the present invention can be applied to the display portion 9302. According to the present invention for correcting a power supply potential applied to a light emitting element by using a light emitting element for monitoring, a portable television device that suppresses the influence of a change in the current value of the light emitting element due to a change in environmental temperature and a change over time is provided. Can be provided. In addition, the present invention can be applied to a wide variety of television devices, from a small one mounted on a portable terminal such as a cellular phone to a medium-sized one that can be carried and a large one (for example, 40 inches or more). The light emitting device can be applied.

A portable computer shown in FIG. 15E includes a main body 9401, a display portion 9402, and the like. The light emitting device of the present invention can be applied to the display portion 9402. According to the present invention for correcting a power supply potential applied to a light emitting element using a light emitting element for monitoring, a portable computer is provided in which the influence of fluctuations in the current value of the light emitting element due to changes in environmental temperature and changes over time is suppressed. be able to.

A television device illustrated in FIG. 15F includes a main body 9501, a display portion 9502, and the like. The light emitting device of the present invention can be applied to the display portion 9502. Provided is a television set in which the influence of fluctuations in the current value of a light emitting element due to changes in environmental temperature and changes over time is suppressed by the present invention in which a power supply potential applied to the light emitting element is corrected using a light emitting element for monitoring. Can do.

(Embodiment 11)
In this embodiment, a structure in which a full-color display can be performed and a monitor light-emitting element is provided for each light-emitting element exhibiting each emission color will be described.

In FIG. 16, the pixel portion 40, the signal line driving circuit 43, the first scanning line driving circuit 41, the second scanning line driving circuit 42, and the monitoring circuits 64R, 64G, and 64B are provided on the insulating substrate 20. A light emitting device is shown. In order to perform full-color display in the pixel portion 40, light emitting elements using light emitting materials exhibiting the respective emission colors are provided in the pixels 10R, 10G, and 10B. Each light emitting element is connected to a power source 18R, 18G, 18B, respectively. Note that light-emitting elements that emit light of the same color are provided in stripes.

Buffer amplifier circuits 110R, 110G, and 110B are provided between the monitoring circuits 64R, 64G, and 64B and the pixels 10R, 10G, and 10B, respectively. Embodiment 1 can be referred to for the operation of the buffer amplifier circuit.

The configuration of the monitoring circuits 64R, 64G, and 64B can be referred to the first embodiment. Specifically, a monitor light emitting element made of a light emitting material exhibiting each light emission, a monitor control transistor connected to the monitor light emitting element, an output terminal connected to the gate electrode of the monitor control transistor, and monitor control An inverter having an input terminal connected to one electrode of the transistor for monitoring and the light emitting element for monitoring. Each light emitting element for monitoring is connected to power supplies 18MR, 18MG, and 18MB, respectively. Each monitor control transistor is connected to a constant current source 105R, 105G, 105B through a monitor line. The monitor control transistor has a function of controlling current supply from the monitor line to each of the plurality of monitor light emitting elements. Since the monitor line is connected to the electrodes of the plurality of monitor light emitting elements, the monitor line can have a function of monitoring a change in potential of the electrodes. The constant current source has a function of supplying a constant current to the monitor line.

In the light-emitting device having such a structure, even when the light-emitting elements exhibiting each light emission have different deteriorations, the deterioration can be compensated for by each monitor light-emitting element. That is, although the degree of deterioration differs depending on the material of the light emitting element, each deterioration can be compensated by providing a monitoring light emitting element for each light emitting element as shown in this embodiment mode. As a result, it is possible to provide a light emitting device in which luminance variation of each color light emitting element due to a change in environmental temperature and a change with time is reduced. Moreover, since the monitor circuits 64R, 64G, and 64B of the present invention have a plurality of monitor light emitting elements, the luminance variation can be corrected from the average value thereof, which is preferable. Even if any of the monitor light emitting elements stops functioning due to a defect or the like, the remaining monitor light emitting elements can be used.

Note that in this embodiment mode, a structure in which light-emitting elements that emit light of the same color are provided in a stripe shape is described; however, the present invention is not limited to this. For example, in a pixel arranged in a delta shape, a configuration in which a monitoring light-emitting element is provided for each light-emitting element exhibiting each emission color can be applied.

Further, in the present embodiment, the monitor circuit 64B for the blue light emitting element is provided on the left side with respect to the pixel unit 40, and the red and green monitor circuits 64R and 64G are provided on the right side with respect to the pixel unit 40. It is not limited to. For example, a monitoring circuit for all light emitting elements may be provided on the left side with respect to the pixel portion, or any one of the monitoring circuits may be provided on the upper side or the lower side with respect to the pixel portion. However, it is preferable that the region where the monitor circuit is provided be provided uniformly and distributed over the entire light emitting device.

It is the figure which showed the light-emitting device of this invention It is the figure which showed the equivalent circuit of the pixel of this invention It is the figure which showed the layout of the pixel of this invention It is the figure which showed the cross section of the pixel of this invention It is the figure which showed the circuit for monitoring of this invention It is the figure which showed the circuit for monitoring of this invention It is the figure which showed the circuit for monitoring of this invention It is the figure which showed the timing chart of this invention It is the figure which showed the equivalent circuit of the pixel of this invention It is the figure which showed the equivalent circuit of the pixel of this invention It is the figure which showed the equivalent circuit of the pixel of this invention It is the figure which showed the panel of this invention It is the figure which showed the timing chart of this invention It is the figure which showed the timing chart of this invention It is the figure which showed the electronic device of this invention It is the figure which showed the light-emitting device of this invention

Claims (6)

A circuit having a light-emitting element including a first electrode and a second electrode, a p-channel transistor, an inverter, and a constant current source;
The first electrode is electrically connected to a terminal having a function of applying a potential lower than the potential of the second electrode ;
The second electrode is electrically connected to one of a source or a drain of the transistor and an input terminal of the inverter;
The other of the source and the drain of the transistor is electrically connected to the constant current source,
The light emitting device, wherein a gate of the transistor is electrically connected to an output terminal of the inverter. A circuit including a light emitting element including a first electrode and a second electrode, a first transistor, a second transistor, a third transistor, and a constant current source;
The first transistor and the second transistor are p-channel transistors,
The third transistor is an n-channel transistor,
The first electrode is electrically connected to a first terminal having a function of applying a potential lower than that of the second electrode ;
The second electrode is electrically connected to one of a source or a drain of the first transistor, a gate of the second transistor, and a gate of the third transistor;
A gate of the first transistor is electrically connected to one of a source or a drain of the second transistor and one of a source or a drain of the third transistor;
The other of the source and the drain of the first transistor is electrically connected to the constant current source,
The other of the source and the drain of the second transistor is electrically connected to a second terminal having a function of supplying a potential for turning off the first transistor ;
The other of the source and the drain of the third transistor is electrically connected to a third terminal having a function of supplying a potential for turning on the first transistor . A circuit including a light-emitting element including a first electrode and a second electrode, a first transistor, a second transistor, a third transistor, a fourth transistor, and a constant current source Have
The first transistor and the second transistor are p-channel transistors,
The third transistor and the fourth transistor are n-channel transistors,
The first electrode is electrically connected to a first terminal having a function of applying a potential lower than that of the second electrode ;
The second electrode is electrically connected to one of a source or a drain of the first transistor, a gate of the second transistor, and a gate of the third transistor;
A gate of the first transistor is electrically connected to one of a source or a drain of the second transistor and one of a source or a drain of the third transistor;
The other of the source and the drain of the first transistor is electrically connected to the constant current source,
The other of the source and the drain of the second transistor is electrically connected to a second terminal having a function of supplying a potential for turning off the first transistor ;
The other of the source and the drain of the third transistor is electrically connected to one of the source and the drain of the fourth transistor;
A gate of the fourth transistor is electrically connected to a third terminal having a function of applying a potential to turn off the fourth transistor ;
The other of the source and the drain of the fourth transistor is electrically connected to a fourth terminal having a function of applying a potential for turning on the first transistor . A light-emitting element including a first electrode and a second electrode, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a constant current source, Having a circuit with
Said first transistor, said second transistor, and the fourth transistor are p-channel transistors,
The third transistor and the fifth transistor are n-channel transistors,
The first electrode is electrically connected to a first terminal having a function of applying a potential lower than that of the second electrode ;
The second electrode is electrically connected to one of a source or a drain of the first transistor, a gate of the second transistor, and a gate of the third transistor;
The gate of the first transistor is electrically connected to one of a source or a drain of the second transistor, one of a source or a drain of the third transistor, and one of a source or a drain of the fifth transistor. ,
The other of the source and the drain of the first transistor is electrically connected to the constant current source,
Wherein the other of the source and the drain of the second transistor, or the source of the fourth transistor is electrically connected to one of the drain,
The other of the source and the drain of the third transistor is electrically connected to a second terminal having a function of applying a potential to turn on the first transistor ;
The gate of the fourth transistor, the fourth transistor on, said third terminal having a function of applying a potential to turn off the fifth transistor, and a gate electrically connected to said fifth transistor And
The other of the source and the drain of the fourth transistor is electrically connected to a fourth terminal having a function of supplying a potential for turning off the first transistor ;
The other of the source and the drain of the fifth transistor is electrically connected to a fifth terminal having a function of applying a potential for turning on the first transistor . In any one of Claims 1 thru | or 4 ,
A light emitting device having a function of insulating a short-circuited portion of the light emitting element by applying a reverse voltage to the light emitting element. In any one of Claims 1 thru | or 5 ,
A light emitting device comprising a plurality of the circuits.

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