JP2006060150A - Manufacturing method of wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide the manufacturing method of a wiring board capable of simply manufacturing the wiring board at a low cost with high reliability because of a few joints between different materials, with ease of minute wiring, and with less wire resistance because of employing a high groove aspect ratio. <P>SOLUTION: The manufacturing method adopts a step wherein grooves and through-via holes are formed to an insulator sheet on the surface of which an exfoliable sheet is formed, conductor paste is filled into the grooves and through-via holes, and the exfoliable sheet is exfoliated. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method of manufacturing a wiring board capable of forming an electronic circuit by mounting or incorporating various electronic components on the surface thereof and electrically connecting them.

  In recent years, as electronic devices have become smaller and more dense, in the field of wiring boards, the structure has shifted from a through-through structure to an inner via (interstitial via) structure in which connection between layers is free.

There are several methods for manufacturing the inner via.
One is called the deposit type, and it is a method of opening holes (blind vias) from the surface to the inner layer conductor in the insulator layer and plating to electrically connect the inner layer conductor and the surface layer conductor. It is.

  In addition, there is a so-called laminated type, in which a hole is made in an independent insulator sheet, a conductive paste is embedded in the hole, the conductive paste is sandwiched between two copper foils, and heated and pressed to move up and down. This is a method of establishing electrical connection of the conductor (copper foil).

In addition, there is a simple construction method in which a groove and a through hole are made in an insulator sheet, and a paste-like conductor is embedded therein to simultaneously form wiring and through through. (See Patent Document 1)
JP 2003-8178 A

  The deposit type, which is the first method described above, makes it difficult to connect a fine via with a high aspect ratio because it is difficult to reliably put the plating solution into the blind via. In addition, there are cases where the number of processes is increased, for example, a via-on-via (a via immediately above a via) cannot be formed unless the dent is filled and smoothed after plating and then the next layer is stacked. Further, since a plating solution is used, it is necessary to take measures against contamination.

  The second laminated type needs to use a thin independent insulator sheet when a fine via is necessary, and is difficult to handle at the time of manufacture, difficult to maintain dimensional accuracy, and difficult to miniaturize. In addition, a large pressure applied during via formation also causes a problem when components are built in. In the method of embedding the paste-like conductor in the groove or the through hole, the excess paste-like conductor on the surface layer cannot be sufficiently removed by the squeegee when embedding. In addition, a polishing process for cleaning and a cleaning process thereof are increased.

  The present invention solves the above-described problems, and is simple and low in cost, and has low reliability because it has few joints between different materials. Therefore, fine wiring is easy and the aspect ratio of the groove can be increased. Another object of the present invention is to provide a method of manufacturing a wiring board that can reduce the resistance of the wiring.

  In order to achieve the above object, in the present invention, a groove or a through via hole is formed in an insulating sheet provided with a peelable sheet on the surface, and a paste-like conductor is embedded in the groove or the through via hole and the sheet can be peeled off. The process of peeling is taken.

  That is, the method for manufacturing a wiring board according to the present invention includes a step of forming a groove or a through via hole in an insulator sheet provided with a peelable sheet at least on the surface, and a step of embedding a paste-like conductor in the groove or the through via hole. And a step of peeling the peelable sheet.

Moreover, the groove depth: the groove width includes an aspect ratio larger than 1.
Moreover, a groove or a through via hole is made by a laser.
The method for producing a multilayer substrate of the present invention includes a step of forming a groove or a through via hole in an insulator sheet provided with a peelable sheet at least on the surface, a step of embedding a paste-like conductor in the groove or the through via hole, A first wiring board is manufactured in the step of peeling off the peelable sheet, and a new insulator sheet provided with a peelable sheet on the surface is laminated and bonded to both sides or one side of the first wiring board. A step, a step of forming a via hole reaching the conductor of the groove or the first wiring board on the surface, a step of embedding a paste-like conductor in the groove or the via hole, and a step of peeling the peelable sheet Are repeated as necessary.

Moreover, the groove depth: the groove width includes an aspect ratio larger than 1.
In addition, a via hole that reaches a groove or a lower conductor is formed by a laser in a new laminated insulating sheet.

  The method for manufacturing a component-embedded substrate of the present invention includes a step of forming a groove or a through-via hole and a via hole reaching the electrode of the electronic component from the surface in an insulator sheet provided with a sheet that can be embedded and peeled at least on the surface. And a step of embedding a paste-like conductor in the groove or through-via hole and the via hole, and a step of peeling the peelable sheet.

In addition, a groove having an aspect ratio of groove depth: groove width larger than 1 is included.
Moreover, a groove or a via hole is made with a laser.
The method for producing a multilayer board with built-in component according to the present invention includes a step of forming a groove or a through-via hole and a via hole reaching the electrode of the electronic component from the surface in an insulator sheet provided with a sheet on which at least an electronic component is embedded and can be peeled off. And manufacturing the first wiring board in the step of embedding the paste-like conductor in the groove or the through-via hole and the via hole, and the step of peeling off the peelable sheet, A step of laminating and bonding a new insulator sheet provided with a peelable sheet on one surface or an insulator sheet embedded with an electronic component provided with a peelable sheet on the surface, and a groove or a first on the surface Forming via holes reaching the conductor of the wiring board and via holes reaching the electrodes of the electronic component from the surface; embedding a paste-like conductor in the groove or via hole; and the peelable sheet It is intended to apply repeatedly if necessary a step of peeling.

Moreover, the groove depth: the groove width includes an aspect ratio larger than 1.
Moreover, a groove or a via hole is made with a laser.
The manufacturing method of the chip size package of the present invention includes a step of forming a via hole reaching from the surface to a groove or an electrode of a silicon wafer on an insulator sheet provided with a sheet on which a silicon wafer on which a circuit is formed is embedded and can be peeled on the surface. The method includes a step of embedding a paste-like conductor in the groove or the via hole and a step of separating the insulating sheet for each chip.

  As described above, the wiring board and the package according to the manufacturing method of the present invention have a high reliability because the manufacturing method is simple, the cost is low, and bonding between different materials is small. If laser processing or the like is used, fine wiring is easy and the aspect ratio of the groove can be increased so that the resistance of the wiring can be reduced.

Details of the present invention will be described with reference to examples.
Example 1
1A to 1E show steps of a method for manufacturing a double-sided wiring board according to an embodiment of the present invention. In FIG. 1A, the insulator 101 has a sheet shape. A thin peelable sheet 110 is attached to the surface of the insulating sheet 101. This is processed to form a structure 104 having a groove 102 and a through via hole 103 as shown in FIG. The insulator 101 is preferably made of a resin that is easy to process.

  This process can be made in various ways. For example, it can be made by mechanical grinding or by using a laser or the like. In the case of fine processing, for example, in the case of a groove width or a through hole of 100 microns or less, a laser is preferable. An excimer laser is particularly convenient. In the case of making by laser or grinding, the peelable sheet 110 is simultaneously removed when the groove is processed, and the portion 111 other than the groove remains.

Although it is conceivable to make a large amount at a low cost using a mold, the structure shown in FIG. 1B cannot be made using a mold because there is a peelable sheet on the surface.
Next, as shown in FIG. 1C, a paste-like conductor 105 is embedded with a squeegee 106. This operation may be performed from one side of the structure body 104, but in this embodiment, paste-like conductors are imprinted with the squeegee 106 from both surfaces of the structure body 104. It is desirable that the embedded paste-like conductor 107 does not contain bubbles. Therefore, it is more preferable to perform the process of FIG.1 (c) in a vacuum.

  Next, as shown in FIG.1 (d), the peelable sheet | seat 111 which was processed and opened the hole is peeled. By doing so, the paste-like conductor residue 112 left on the peelable sheet 111 shown in FIG. 1C can be easily removed. As a paste-like conductor, what is generally well known is one in which fine powders such as gold, silver and copper are mixed in an epoxy resin. Some of them contain a solvent and some do not.

  Since the height of the surface of the embedded conductor 107 is substantially the same as the surface of the peelable sheet, the paste-like conductor 107 jumps out of the surface of the insulator sheet 101. If cured as it is, as shown in FIG. 1 (e), a double-sided wiring substrate 109 in which the cured conductor 108 slightly protrudes from the surface is obtained. The amount of protrusion depends on the curing shrinkage rate of the paste-like conductor.

  It is possible to select whether the paste-like conductor is cured after the peelable sheet is peeled off or peeled after being cured. In the case of peeling after curing, a paste-like conductor whose volume has shrunk and reduced in volume can be supplied. Curing includes heating, irradiating with ultraviolet rays, or leaving at room temperature, but generally heating means are preferred because of a wide selection of materials.

  A feature of this method of manufacturing a wiring board is that it can be easily connected even if the insulator is thick, that is, even if the through via hole is deep and the aspect ratio is large. In the conventional method, when the via hole diameter is as small as 100 microns or less, an aspect ratio of 1 or more has a poor connection yield and is difficult to manufacture. In addition, the metal foil is not connected to a different material such as a paste as in the conventional substrate, but is more reliable because of an integrated structure made of the same material (cured material of a paste-like conductor). Moreover, when not only a resin but also a filler is used as the insulator, it is easy to match the thermal expansion coefficient of the cured conductor, and connection stability of the through via can be obtained.

Normally, the circuit board uses solder for mounting components, but in this case, it is easy to use a conductive adhesive and the cost is low. However, copper or the like can be plated only on the surface layer of the cured conductor 108 so that it can be applied to a conventional mounting method using solder.
(Example 2)
FIGS. 2A to 2E show another embodiment of the present invention, which shows a four-layer substrate process. First, as shown in FIG. 2A, an insulator sheet 201 provided with a peelable sheet 210 is placed on both sides of a double-sided board 109 (first wiring board) made in Example 1. The material of the insulator sheet 201 is preferable because the resin is easily processed. There are various methods for manufacturing the insulator sheet 201, but coating or lamination is common. In the case of coating, a liquid resin can be used, and in the case of lamination, a B-stage sheet-like resin or a resin sheet with an adhesive can be used. The peelable sheet 210 may be formed after the insulating sheets 201 are stacked.

  Next, as shown in FIG. 2B, via holes 203 reaching the grooves 202 and the underlying conductor from the surface are formed by laser processing. In the case of an excimer laser, it is possible to carve the sheet 210 and the insulator sheet 201 that can be peeled off by a pattern through a mask, instead of drawing with one beam. A 10 micron hole or groove width is easy. Further, an aspect ratio of about 10 can be easily obtained for the groove depth. Other lasers are difficult to drill holes and grooves with high aspect ratios. The peelable sheet 210 remains as a sheet 211 having a hole in which the groove portion is cut and the remaining portions are left.

  Next, as shown in FIG. 2C, the paste-like conductor 205 is embedded in the groove and the via hole with the squeegee 206 to obtain a paste-like conductor pattern 207. At this time, a paste-like conductor residue 212 may remain in a portion other than the pattern. As shown in FIG. 2D, this residue can be easily and completely removed by peeling off the sheet 211 having holes. This is heated to fix the insulator sheet 201 to the first wiring substrate 109 and at the same time to cure the paste-like conductor. Then, as shown in FIG. 2E, a four-layer wiring board 209 is obtained in which the cured conductor 208 protrudes slightly from the surface.

As in Example 1, the filling of the paste-like conductor can be repeated twice, the surface can be flattened by polishing, or the surface can be plated with copper. Of course, a via hole with a large aspect ratio is also the same conductor, so that a reliable one can be obtained. In the conventional method, when the electrode at the bottom of the via is a copper foil surface, it was usual to perform a scientific treatment before filling in order to obtain a stable connection and a high yield. Such a treatment is not necessary because the conductors are connected to each other. Similarly, a multilayer wiring board having four or more layers can be obtained by repeating the process of FIG.
(Example 3)
FIGS. 3A to 3E show an example of a wiring board with a built-in component, and shows a manufacturing process of the wiring board with a built-in electronic component. As shown in FIG. 3A, a peelable sheet 310 is attached to the surface of the insulator sheet 301 in which the built-in component 321 is embedded. There are various methods for embedding an electronic component in an insulator, such as molding or coating, and in the case of a thin component, it is cured by being sandwiched between uncured resin sheets.

  As shown in FIG. 3B, a via hole 304 reaching the groove 302, the through via 303 or the electrode of the built-in component from the surface of the peelable sheet 310 is formed by a laser. The peelable sheet 310 on the surface remains as a sheet 311 having holes processed by a laser.

  Next, as shown in FIG. 3C, the paste-like conductor 305 is imprinted into the grooves, through holes, and via holes with a squeegee 306 to obtain a paste-like conductor pattern 307. At this time, the paste-like conductor residue 312 often remains on the surface of the peelable sheet 311 without being scraped off with a squeegee. This residue 312 can be easily removed by peeling off the peelable sheet 311 as shown in FIG. Thereafter, the paste-like conductor is cured to obtain a component built-in wiring board 309 in which the cured conductor 308 slightly protrudes from the surface as shown in FIG.

  Although the electronic component is depicted as an LSI chip in the figure, it may be a chip capacitor, a chip resistor, or a chip inductor. The through via hole is not inevitable. When only one side of the wiring is required as in a semiconductor package, no wiring on the back side or through via hole is required, and there is no need to wrap the entire part with an insulating resin as will be described later.

For electrical connection between the paste-like conductor in the contact via hole and the pad 322 on the LSI chip, the surface of the pad 322 is preferably made of gold or the like. A normal LSI pad is Al, and the surface is oxidized. If this oxide film is not removed, good electrical coupling cannot be obtained. In order to avoid this problem, Ni / Au conversion (lamination) is preferably performed on the surface of the Al electrode. This conversion method is generally well known.
Example 4
4A to 4E show process diagrams of a manufacturing method of a four-layer wiring board in which electronic components are built in multiple layers. As shown in FIG. 4A, the double-sided wiring board 309 with built-in components described in the third embodiment is used as a first wiring board, and an insulator sheet 401 with further built-in parts 421 is laminated on the upper and lower surfaces. A peelable sheet 410 is attached thereon.

  As shown in FIG. 4B, via holes 404 that reach the grooves 402, the through-hole vias 403, and the electrodes 422 of the built-in component 421 from the surface of the sheet 410 are formed. The release sheet 410 on the surface remains as a sheet 411 having holes processed by a laser.

  As shown in FIG. 4C, a paste-like conductor 405 is embedded with a squeegee 406 to obtain a paste-like conductor pattern 407. At this time, the paste-like conductor residue 412 remaining on the surface without being scraped off by the squeegee can be easily removed by peeling the peelable sheet 411 as shown in FIG. Thereafter, the paste-like conductor is cured to obtain a component built-in multilayer wiring board 409 in which the cured conductor 408 slightly protrudes from the surface as shown in FIG.

  In this embodiment, the insulating sheet containing the components is further laminated on the upper and lower surfaces of the core-containing double-sided wiring board. However, it is also possible to laminate an insulating sheet that does not contain the components. That is, a component built-in multilayer wiring board having one component built-in layer can be formed.

In the case of a component-embedded substrate, the aspect ratio of the through-hole is increased due to the thickness of the component. However, since an excimer laser or the like can be used in the present invention, the through-hole is fine and has an aspect ratio (thickness / hole diameter) of 1 or more. Hole connection is also easy.
(Example 5)
5A to 5F show a method for manufacturing a semiconductor package CSP (Chip Scale Package) as an application of the method for manufacturing a component-embedded substrate according to the third embodiment. As shown in FIG. 5A, a peelable sheet 511 is attached to an insulating sheet 501 containing a silicon wafer 521 having a plurality of semiconductor circuits. In this embodiment, the silicon wafer has an insulator on the electrode 522 side and not the back side. Of course, there may also be an insulator on the back.

  As shown in FIG. 5A, via holes 504 and grooves 502 reaching the electrodes 522 are made from the surface of the peelable sheet 511 using a laser or the like. As shown in FIG. 5F, the groove 502 is for forming a conductor to be a bump (conductor) 514 of the final CSP package. A paste-like conductor 505 is embedded with a squeegee 506 to obtain a paste-like conductor pattern 507. In FIG. 5C, the residue remaining on the surface at this time is not drawn.

  The paste-like conductor is cured to obtain a silicon wafer 509 with bumps (conductors) 514 on the electrodes as shown in FIG. As shown in FIG. 5E, if this is divided into unit chips with a cutter 513 and the peelable sheet 511 on the surface is peeled off, a CSP package 510 with bumps 514 with protrusions depending on the thickness of the sheet 511 is obtained. It is done.

  After the state shown in FIG. 5D, the multilayer wiring as described in the second embodiment can be performed to rearrange the pad electrodes. A conductive adhesive is preferable for bonding the bumps 514 to the mother board, but the bumps 514 can be plated to adapt to soldering or the like. Or after FIG. 5 d), after peeling a peeling sheet, a copper foil can be affixed and a paste-form conductor can be hardened, and a copper foil can be formed in the shape of an electrode by chemical etching. In FIG. 5, a low-cost CSP package is possible, such as dividing the paste-like conductor into chips without curing, peeling the release sheet 511 on the mounting site, mounting it on the motherboard, and curing the paste-like conductor. It is.

  Although the present invention has been described with reference to the embodiments, many other modifications are conceivable. It does not deviate from the present invention as long as a groove or a through via hole is formed in an insulating sheet with a release sheet, a paste-like conductor is embedded in the insulating sheet, and the insulating sheet is peeled to form a wiring board or package.

Process drawing of the manufacturing method of the double-sided wiring board which shows Example 1 in embodiment of this invention Process drawing of the manufacturing method of the four-layer wiring board which shows Example 2 in embodiment of this invention Process drawing of the manufacturing method of the wiring board which incorporates components which show Example 3 in embodiment of this invention Process drawing of the manufacturing method of the 4-layer wiring board which incorporates the electronic component which shows Example 4 in embodiment of this invention in multiple layers Process drawing of the manufacturing method of CSP which shows Example 5 in embodiment of this invention

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 Insulator 102 Groove 103 Through-via hole 104 Structure 105 Paste-like conductor 106 Squeegee 107 Embedded paste-like conductor 108 Cured conductor 109 Double-sided wiring board 110 Peelable sheet 111 Processed and opened a hole Removable sheet 112 Residue of paste-like conductor

Claims (13)

A step of forming a groove or a through via hole in an insulator sheet provided with a peelable sheet on at least a surface, a step of embedding a paste-like conductor in the groove or the through via hole, and a step of peeling the peelable sheet A method for manufacturing a wiring board, comprising: The method for manufacturing a wiring board according to claim 1, wherein a groove depth: a groove having an aspect ratio of groove width greater than 1 is included. The method for manufacturing a wiring board according to claim 1, wherein the groove or the through via hole is formed by a laser. A step of forming a groove or a through via hole in an insulator sheet provided with a peelable sheet on at least a surface, a step of embedding a paste-like conductor in the groove or the through via hole, and a step of peeling the peelable sheet Manufacturing a first wiring board and laminating and bonding a new insulator sheet provided with a peelable sheet on both sides or one side of the first wiring board, and grooves or first on the surface. A step of forming a via hole reaching the conductor of the wiring board, a step of embedding a paste-like conductor in the groove or via hole, and a step of peeling the peelable sheet are repeated as necessary. A method for producing a multilayer substrate, which is characterized. 5. The method for producing a multilayer substrate according to claim 4, wherein a groove depth: a groove having an aspect ratio of groove width larger than 1 is included. 6. The method of manufacturing a multi-layer substrate according to claim 4, wherein a via hole reaching a groove or a lower conductor is formed by laser in a new laminated insulating sheet. At least a step of making a groove or a through-via hole and a via hole reaching the electrode of the electronic component from the surface and a paste in the groove or the through-via hole and the via hole in an insulating sheet provided with a sheet that can be embedded and peeled off on the surface. A component-embedded substrate manufacturing method comprising a step of embedding a conductive material and a step of peeling the peelable sheet. The method for manufacturing a component-embedded substrate according to claim 7, comprising grooves having an aspect ratio of groove depth: groove width greater than 1. 9. 9. The method for manufacturing a component-embedded board according to claim 7, wherein the groove or the via hole is formed by a laser. At least a step of making a groove or a through-via hole and a via hole reaching the electrode of the electronic component from the surface and a paste in the groove or the through-via hole and the via hole in an insulating sheet provided with a sheet that can be embedded and peeled off on the surface. The first wiring board was manufactured in the step of embedding the conductive material and the step of peeling off the peelable sheet, and a peelable sheet was provided on both surfaces or one surface of the first wiring board. A process of laminating and bonding a new insulator sheet or an insulator sheet embedded with an electronic component provided with a peelable sheet on the surface, and a via hole reaching the groove or the conductor of the first wiring board on the surface and the surface Repeating the process of creating via holes reaching the electrodes of the electronic component, embedding paste-like conductors in the grooves and via holes, and peeling the peelable sheet as necessary Method for manufacturing a component-embedded multilayer substrate according to claim Succoth. The method for producing a multilayer board with built-in components according to claim 10, comprising grooves having an aspect ratio of groove depth: groove width greater than 1. 11. The method for producing a multilayer board with built-in components according to claim 10 or 11, wherein the groove or the via hole is formed by a laser. A step of forming a via hole reaching the groove or the electrode of the silicon wafer from the surface in an insulator sheet provided with a sheet on which at least a silicon wafer in which a circuit is formed is embedded and peeled off on the surface; and a paste-like conductor in the groove or via hole A method of manufacturing a chip size package, comprising: a step of embedding a semiconductor substrate; and a step of separating an insulator sheet for each chip.

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