JP2006054391A - Method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device whose increase in hysteresis is small using a High-k film. <P>SOLUTION: A first insulating film and a second insulating film are formed on a silicon substrate, and heat treatment is carried out in an atmosphere containing oxygen whose concentration is 0.2 vol.% or higher. The second insulating film is formed as a high dielectric constant insulating film with a film thickness for transmitting oxygen, whose quantity makes it possible to prevent oxidation-reduction reaction from occurring on an interface between the first insulating film and the second insulating film. The second insulating film may be formed as an HfAlO<SB>x</SB>film whose film thickness is 3.0 nm or smaller, and preferably, 2.4 nm or smaller. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having an insulating film having a relative dielectric constant higher than that of a silicon oxide film.

  In recent years, high integration in semiconductor integrated circuit devices has greatly advanced, and high-speed operation and low power consumption of elements such as transistors are demanded in MOS (Metal Oxide Semiconductor) type semiconductor devices.

In order to realize high-speed operation of the element, it is necessary to increase the gate capacitance and increase the drive current. Therefore, in the conventional structure using a silicon oxide film (SiO ₂ film) or a silicon oxynitride film (SiON film) as a gate insulating film, the thickness of the gate insulating film is reduced in order to increase the gate capacitance. It was. However, when the film thickness is 1.5 nm or less, the leakage current flowing through the capacitor increases. For this reason, although high-speed operation can be realized, it is difficult to reduce power consumption, and there is a problem that the original operation of the capacitor for accumulating charges cannot be performed.

For such problems, it has been proposed to use a film made of a material having a relative dielectric constant higher than that of a silicon oxide film (k = 3.9) (hereinafter referred to as a High-k film) as a gate insulating film. Yes. Examples of the high-k film include an aluminum oxide film (Al ₂ O ₃ film, k = 9), a zirconium oxide film (ZrO ₂ film, k = 20), a hafnium oxide film (HfO ₂ film, k = 20), Examples thereof include metal oxide films such as a tantalum oxide film (TaO _x film, k = 25) and a titanium oxide film (TiO _x film, k = 40). In general, as the relative dielectric constant increases, the amount of charge accumulation increases, so that when the gate capacitance is the same, the physical film thickness can be made thicker than the silicon oxide film by using a high-k film. Become. That is, by using the High-k film as a gate insulating film, an increase in the leakage current of the capacitor can be suppressed (see, for example, Non-Patent Document 1).

Journal of Applied Physics (Journal of Applied Physics Society), 2001, Vol. 89, p. 5243

However, when a High-k film is used, there is a problem that an increase in hysteresis in a CV (Capacitance-Voltage) curve becomes remarkable. As the hysteresis increases, not only the reliability decreases, but a shift in the threshold voltage _Vth may occur accordingly. In addition, since the presence of hysteresis indicates that there is a trap in the film, other transistor characteristics such as mobility are often adversely affected. Therefore, in order to obtain good transistor characteristics, it is necessary to suppress an increase in hysteresis.

  The present invention has been made in view of such problems. That is, an object of the present invention is to provide a method for manufacturing a semiconductor device using a high-k film and having a small increase in hysteresis.

  Other objects and advantages of the present invention will become apparent from the following description.

  The method for manufacturing a semiconductor device of the present invention includes a step of forming a first insulating film on a silicon substrate, a step of forming a second insulating film on the first insulating film, and 0.2 vol%. A step of performing a heat treatment on the second insulating film in an atmosphere containing oxygen at the above concentration. The second insulating film is a high dielectric constant insulating film, and the first insulating film and the first insulating film The film is formed with a film thickness that transmits oxygen in an amount that can suppress an oxidation-reduction reaction at the interface with the two insulating films.

In the method for manufacturing a semiconductor device of the present invention, the second insulating film can be an HfAlO _x film having a thickness of 3.0 nm or less. In this case, the film thickness of the HfAlO _x film is preferably 2.4 nm or less.

  In the method for manufacturing a semiconductor device of the present invention, the first insulating film can be a SiON film.

  In the present invention, as described above, the second insulating film has a film thickness that transmits oxygen in an amount capable of suppressing the occurrence of a redox reaction at the interface between the first insulating film and the second insulating film. In addition, since the heat treatment is performed in an atmosphere containing oxygen at a concentration of 0.2% by volume or more, new defects are prevented from occurring in the second insulating film, and the hysteresis in the CV curve is increased. Can be suppressed.

  Conventionally, after the formation of the gate insulating film, a high temperature heat treatment called PDA (Post Deposition Annealing) is performed. By applying PDA, the amount of defects and impurities contained in the High-k film can be reduced. Specifically, defects are filled by the presence of oxygen, or impurities react with oxygen and go out of the High-k film.

  FIG. 1 shows a change in hysteresis with respect to a silicon oxide equivalent film thickness (or equivalent oxide thickness (EOT)) when the oxygen concentration during PDA is changed. As can be seen from the figure, the hysteresis increases as the equivalent silicon oxide film thickness decreases. This is because when the voltage width in the hysteresis measurement is constant, a higher voltage is applied as the equivalent silicon oxide film thickness is smaller.

Moreover, FIG. 1 shows that the amount of increase in hysteresis increases as the oxygen concentration decreases. The reason for this can be considered as follows. That is, in order to reduce defects and impurities in the high-k film by PDA, it is necessary that the high-k film contains a considerable amount of oxygen. When the oxygen concentration in the atmosphere is low, oxygen in the high-k film becomes insufficient, and a reaction (oxidation-reduction reaction) occurs at the interface between the high-k film and the base film. For example, when a HfO ₂ film as a High-k film is oxidized by the HfO ₂ film deprives oxygen from the base film (base film is reduced.). As described above, since the high-k film is oxidized, new defects are generated in the high-k film, and thus an increase in hysteresis is observed. Therefore, by increasing the oxygen concentration in the atmosphere, if the oxygen concentration in the high-k film, particularly at the interface between the high-k film and the base film, exceeds a predetermined value, it is possible to suppress the reaction from occurring at the interface. Thus, it is possible to prevent a defect from occurring in the high-k film.

  In the present invention, the oxygen concentration in the atmosphere during PDA is preferably 0.2% by volume or more. However, when oxygen in the atmosphere reaches the interface between the base film and the silicon substrate, the silicon substrate is oxidized and the film thickness of the entire gate insulating film increases. Therefore, it is necessary to control the oxygen concentration so that the thickness of the gate insulating film is not more than a predetermined value.

As described above, an increase in hysteresis can be suppressed by supplying a predetermined amount of oxygen to the interface between the high-k film and the base film. However, simply increasing the oxygen concentration in the atmosphere does not necessarily increase the oxygen concentration at the interface. Therefore, in the present invention, the oxygen concentration at the interface is increased by setting the thickness of the high-k film to a predetermined value or less. For example, in the case of an HfAlO _x film having a Hf content of 30%, the concentration of oxygen supplied to the interface can be greatly increased by setting the film thickness to 3.0 nm or less, preferably 2.4 nm or less. it can.

FIG. 2 is an example of a CV curve when an HfAlO _x film is used as a gate insulating film. From the figure, it can be seen that when the film thickness of the HfAlO _x film is changed from 3 nm to 2.4 nm, the hysteresis is greatly reduced even though the capacitance is substantially the same. Specifically, the hysteresis is 70 mV when the film thickness of the HfAlO _x film is 3 nm, whereas the hysteresis is 15 mV when the film thickness is 2.4 nm.

In the example of FIG. 2, the oxygen concentration at the time of PDA is 0.2% by volume, and the total thickness of the gate insulating film is increased by 0.15 nm when the silicon substrate is oxidized. Normally, with such a thick film, the hysteresis is not reduced as in the example of FIG. Thus, the results of Figure 2, by reducing the thickness of HfAlO _x film, oxygen is believed to be due to the easily transmitted through the HfAlO _x film. That is, it can be said that by supplying sufficient oxygen to the interface with the base film, the reaction with the base film is suppressed, and the amount of defects newly generated in the high-k film can be reduced.

Embodiments Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  3 to 7 are views for explaining a method of manufacturing a semiconductor device according to the present embodiment. In these drawings, the same reference numerals indicate the same parts.

  First, as shown in FIG. 3, a silicon oxide film is embedded in a predetermined region of the silicon substrate 1 to form an element isolation region 2 having an STI (Shallow Trench Isolation) structure. In place of the silicon substrate 1, another semiconductor substrate such as a silicon germanium (SiGe) substrate or a gallium arsenide (GaAs) substrate may be used. Further, a LOCOS (Local Oxidation of Silicon) structure or the like may be applied instead of the STI structure.

  Next, after implanting impurities into the silicon substrate 1, thermal diffusion is performed to form an N-type or P-type diffusion layer 4. Next, the natural oxide film 3 is removed using a dilute hydrofluoric acid (DHF) aqueous solution in which hydrofluoric acid and water are mixed at a ratio of 1: 100. As a result, the surface of the silicon substrate 1 in the active region is exposed (FIG. 4).

  Next, a first insulating film 5 is formed on the silicon substrate 1 (FIG. 5). The first insulating film 5 is a base film of a second insulating film (High-k film) formed in a later process.

As the first insulating film 5, for example, an oxide film containing silicon such as a silicon oxynitride film (SiON film) and a silicon oxide film (SiO ₂ film) can be used. The SiON film can be formed, for example, by an RTO (Rapid Thermal Oxidation) method using a mixed gas of nitrogen dioxide (NO ₂ ), hydrogen (H ₂ ), and nitrogen (N ₂ ). Further, SiON film may be formed by performing plasma nitriding treatment after forming the SiO ₂ film. The film thickness of the SiON film can be about 0.7 nm, for example. The first insulating film 5 is not limited to an oxide film containing silicon, and a cerium oxide film (CeO ₂ film) or the like may be used.

Next, a second insulating film 6 is formed on the first insulating film 5 (FIG. 6). The second insulating film 6 is a High-k film, and for example, an HfAlO _x film, an Al ₂ O ₃ film, a ZrO ₂ film, an HfO ₂ film, or the like can be used. These films can be formed by an ALD (Atomic Layer Deposition) method, a CVD (Chemical Vapor Deposition) method, a PVD (Physic Vapor Deposition) method, or the like.

The present invention is characterized in that the second insulating film 6 has a film thickness capable of transmitting oxygen in a predetermined amount of atmosphere during the PDA process. Here, the predetermined amount of oxygen means an amount of oxygen that can suppress the occurrence of a redox reaction at the interface between the first insulating film 5 and the second insulating film 6. For example, in the case of an HfAlO _x film having a Hf content of 30%, the film thickness is preferably 3.0 nm or less, and particularly preferably 2.4 nm or less.

  Next, PDA treatment is performed in an atmosphere having a predetermined amount of oxygen concentration (FIG. 7). For example, the heat treatment can be performed at 1,050 ° C. for 1 second in a nitrogen atmosphere containing 0.2 vol% oxygen at a total pressure of 1 atm. The heating pressure, oxygen concentration, heating temperature, and heating time can be appropriately changed as necessary.

  According to the present invention, the second insulating film 6 can transmit oxygen in an amount that can suppress the reaction with the first insulating film 5. In other words, the second insulating film 6 contains an amount of oxygen that can sufficiently reduce the amount of defects and impurities present in the second insulating film 6. Therefore, it is possible to prevent a new defect from occurring in the second insulating film 6 and suppress an increase in hysteresis in the CV curve.

  After the PDA process, a polysilicon film 7 as a gate electrode material is formed on the second insulating film 6 (FIG. 8). The thickness of the polysilicon film 7 can be about 150 nm, for example. In place of the polysilicon film 7, an amorphous silicon film may be formed. Further, a silicon germanium film or the like may be used instead of the (poly or amorphous) silicon film.

  Next, after N-type or P-type impurities are implanted into the polysilicon film 7, the polysilicon film 7, the second insulating film 6, and the first insulating film are used by lithography and RIE (Reactive Ion Etching). The film 5 is processed sequentially. As a result, the gate electrode 8 and the gate insulating film 9 are formed as shown in FIG. In FIG. 9, the gate insulating film 9 is configured by the patterned first insulating film 5 and second insulating film 6.

  Next, an impurity is implanted into the silicon substrate 1 using the gate electrode 8 as a mask to form a P-type or N-type extension region 10. Thereafter, sidewalls 11 are formed on the side walls of the gate electrode 8. Then, after implanting impurities into the silicon substrate 1 using the gate electrode 8 with the sidewalls 11 formed as a mask, activation by heat treatment is performed to form P-type or N-type source / drain regions 12. Furthermore, the structure shown in FIG. 10 is obtained by providing the interlayer insulating film 13.

  The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention.

In this invention, it is an example of the figure which shows the relationship between EOT by oxygen concentration, and CV hysteresis. In this invention, it is an example of the figure which shows the change of the CV curve by the film thickness of a HfAlOx film | membrane. It is sectional drawing which shows the manufacturing method of the semiconductor device in this Embodiment. It is sectional drawing which shows the manufacturing method of the semiconductor device in this Embodiment. It is sectional drawing which shows the manufacturing method of the semiconductor device in this Embodiment. It is sectional drawing which shows the manufacturing method of the semiconductor device in this Embodiment. It is sectional drawing which shows the manufacturing method of the semiconductor device in this Embodiment. It is sectional drawing which shows the manufacturing method of the semiconductor device in this Embodiment. It is sectional drawing which shows the manufacturing method of the semiconductor device in this Embodiment. It is sectional drawing which shows the manufacturing method of the semiconductor device in this Embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 Element isolation region 3 Natural oxide film 4 Diffusion layer 5 1st insulating film 6 2nd insulating film 7 Polysilicon film 8 Gate electrode 9 Gate insulating film 10 Extension region 11 Side wall 12 Source / drain region 13 Interlayer Insulation film

Claims (4)

Forming a first insulating film on the silicon substrate;
Forming a second insulating film on the first insulating film;
A step of performing a heat treatment on the second insulating film in an atmosphere containing oxygen at a concentration of 0.2% by volume or more,
The second insulating film is a high dielectric constant insulating film, and a film that transmits oxygen in an amount capable of suppressing an oxidation-reduction reaction from occurring at the interface between the first insulating film and the second insulating film. A method for manufacturing a semiconductor device, characterized by being formed with a thickness. The method of manufacturing a semiconductor device according to claim 1, wherein the second insulating film is an HfAlO _x film, and the film thickness of the HfAlO _x film is 3.0 nm or less. The method for manufacturing a semiconductor device according to claim 2, wherein the second insulating film is an HfAlO _x film, and the film thickness of the HfAlO _x film is 2.4 nm or less. The method of manufacturing a semiconductor device according to claim 1, wherein the first insulating film is a SiON film.

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