JP2006008432A - Substrate for compound semiconductor growth and producing method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a substrate for compound semiconductor growth where the quality of a compound semiconductor can be upgraded. <P>SOLUTION: A porous Si single crystal layer 4 where holes are open to an outer direction and which is coated with a 3C-SiC single crystal layer 3 having a surface thickness of 0.1-100 nm is formed on an Si single crystal substrate 2. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a vapor phase of a single crystal film such as 3C-SiC (cubic silicon carbide) or AIN (aluminum nitride) used for manufacturing a compound semiconductor, that is, a short wavelength semiconductor light emitting device, a high frequency and high efficiency semiconductor device, and the like. The present invention relates to a substrate used for growth and a manufacturing method thereof.

  Conventionally, as this kind of compound semiconductor growth substrate and its manufacturing method, a Si single crystal substrate having a porous Si (silicon, silicon) single crystal layer is formed by using a porous Si single crystal in a non-oxidizing atmosphere or in a vacuum. A semiconductor substrate manufacturing method for forming a non-porous Si single crystal layer on the surface of a porous Si single crystal layer by heat treatment at a temperature below the melting point of the layer, and a semiconductor substrate manufactured by the method It is known (see Patent Document 1).

Here, the porous Si single crystal is also called porous Si, and is known to contain a large number of fine holes (holes with a diameter of several nm) opened outward in the Si single crystal like a sponge. Yes.
It is known that the porous Si single crystal layer can be formed on the Si single crystal substrate at a depth of several nm to several μm from the surface thereof, or in the entire thickness direction of the Si single crystal substrate. Even if a porous Si single crystal layer is formed over the entire area, the porous Si single crystal layer alone can be used as a substrate. These are called porous Si single crystal substrates.

However, the conventional compound semiconductor growth substrate has no problem when the semiconductor laminated by vapor phase growth is the same type of Si single crystal film as that of the Si single crystal substrate. In the case of a crystal film, crystal defects such as dislocations considered to be caused by lattice mismatch or stress due to a difference in thermal expansion coefficient are generated at a high density, and there is a problem that cannot be put into practical use.
Japanese Patent No. 291031

  It is an object of the present invention to provide a compound semiconductor growth substrate that can make a compound semiconductor of high quality and a method for manufacturing the same.

  The first compound semiconductor growth substrate of the present invention is a porous substrate which is opened outward on a Si single crystal substrate and whose surface is covered with a 3C-SiC single crystal layer having a thickness of 0.1 to 100 nm. A Si single crystal layer is formed.

  The second compound semiconductor growth substrate is characterized in that a porous 3C—SiC single crystal layer opened outward is formed on a Si single crystal substrate.

  In the third compound semiconductor growth substrate, a porous Si single crystal layer opened outward on the Si single crystal substrate, a Si single crystal layer having a thickness of 0.1 to 5 μm, and a 3C-SiC single crystal layer are sequentially formed. It is formed.

  The fourth compound semiconductor growth substrate is characterized in that the Si single crystal substrate is removed from the third compound semiconductor growth substrate by dividing and peeling the porous Si single crystal layer.

  On the other hand, in the first method for manufacturing a compound semiconductor growth substrate, the upper part of the Si single crystal substrate is made porous, and after forming a porous Si single crystal layer opened outward, the porous Si single crystal layer is formed into a porous Si single crystal layer. Heat treatment is performed at a temperature of 800 to 1400 ° C. in a carbon raw material atmosphere, and the surface layer portion is carbonized to a depth of 0.1 to 100 nm from the surface.

  The second method for producing a substrate for semiconductor growth is to form a porous Si single crystal layer having a porous upper portion of the Si single crystal substrate that is open to the outside, and then forming a carbon raw material on the porous Si single crystal layer. A heat treatment is performed at a temperature of 800 to 1400 ° C. in an atmosphere to carbonize the whole.

  According to a third method for manufacturing a compound semiconductor growth substrate, an upper portion of a Si single crystal substrate is made porous to form a porous Si single crystal layer that is opened outward, and then a gas is formed on the porous Si single crystal layer. A Si single crystal layer having a thickness of 0.1 to 5 μm is laminated by phase growth, and thereafter, the Si single crystal layer is subjected to a heat treatment at a temperature of 800 to 1400 ° C. in a carbon raw material atmosphere to carbonize the upper part. And

  The fourth method for manufacturing a compound semiconductor growth substrate is characterized in that after the carbonization of the upper portion of the Si single crystal layer in the third method, the Si single crystal substrate is removed by separating and peeling the porous Si single crystal layer. And

According to the first compound semiconductor growth substrate and the method of manufacturing the same of the present invention, the 3C-SiC single crystal layer on the surface of the porous Si single crystal layer functions as a buffer layer. In this case, the generation of defects in the compound semiconductor due to lattice mismatch can be reduced.
Further, the generation of defects in the compound semiconductor due to the stress caused by the difference in thermal expansion coefficient of the porous Si single crystal layer can be reduced, and the quality of the compound semiconductor can be improved.

According to the second compound semiconductor growth substrate and the manufacturing method thereof, the 3C-SiC single crystal layer functions as a buffer layer. Therefore, when a single crystal film of the compound semiconductor is stacked, a defect of the compound semiconductor is generated due to lattice mismatch. Can be reduced.
Further, the porous 3C—SiC single crystal layer can reduce the occurrence of defects in the compound semiconductor due to stress caused by the difference in thermal expansion coefficient, and the compound semiconductor can be made high quality.

  According to the third compound semiconductor growth substrate and the manufacturing method thereof, the non-porous Si single crystal layer is generated by the porous Si single crystal layer in addition to the effects of the first and the manufacturing method. Since the surface is flattened at the atomic level by filling the step, the generation of defects in the compound semiconductor due to the step can be reduced when the compound semiconductor single crystal film is stacked, and the compound semiconductor is made of higher quality. be able to.

  In addition, according to the fourth compound semiconductor growth substrate and its manufacturing method, the influence of the Si single crystal substrate is completely eliminated. Therefore, when the single crystal film of the compound semiconductor is laminated, the difference in thermal expansion coefficient is caused by lattice mismatch. The generation of defects in the compound semiconductor due to the resulting stress can be eliminated, and the compound semiconductor can be made extremely high quality.

The Si single crystal substrate may be either the (100) plane or the (111) plane. Further, the thickness of the Si single crystal substrate is preferably 100 to 1000 μm, more preferably 300 to 800 μm.
When the thickness of the Si single crystal substrate is less than 100 μm, the mechanical strength is insufficient. On the other hand, when it exceeds 1000 μm, an economic loss occurs.

When the thickness of the 3C—SiC single crystal layer covering the surface of the porous Si single crystal layer is less than 0.1 nm, the function as a buffer layer is insufficient. On the other hand, exceeding 100 nm becomes difficult due to the physical dimensions of porous Si.
The thickness of the 3C—SiC single crystal layer covering the surface of the porous Si single crystal layer is more preferably 1 to 50 nm.
The thickness of the porous Si single crystal layer is preferably 100 nm to 1000 μm, and more preferably 1 to 100 μm.
When the thickness of the porous Si single crystal layer is less than 100 nm, the function as a buffer layer is insufficient. On the other hand, when it exceeds 1000 μm, an economic loss occurs.

The thickness of the porous 3C—SiC single crystal layer is preferably 100 nm to 1000 μm, and more preferably 1 to 100 μm.
When the thickness of the porous 3C—SiC single crystal layer is less than 100 nm, the function as a buffer layer is insufficient. On the other hand, when it exceeds 1000 μm, an economic loss occurs.

When the thickness of the Si single crystal layer is less than 0.1 μm, the surface is not flat. On the other hand, when the thickness exceeds 5 μm, the improvement in quality becomes constant and the raw material is wasted.
The thickness of the Si single crystal layer is more preferably 0.2 to 2 μm.
The thickness of the 3C—SiC single crystal layer is preferably 1 to 100 nm, more preferably 5 to 50 nm.
When the thickness of the 3C—SiC single crystal layer is less than 1 nm, the function as a buffer layer is insufficient. On the other hand, if it exceeds 100 nm, an economic loss occurs.

Examples of the method for making the upper part of the Si single crystal substrate porous include an anodizing method in which an anodizing treatment is performed by a direct current bias in an aqueous solution containing HF (hydrofluoric acid, hydrofluoric acid), ethanol, HNO ₃ (nitric acid), The chemical etching method etc. which immerse a Si single crystal substrate in HF are mentioned.
If the degree of heat treatment for carbonizing the porous Si single crystal layer is less than 800 ° C., no reaction occurs and carbonization is insufficient. On the other hand, when it exceeds 1400 ° C., it becomes physically difficult to exceed the Si melting point.
As for the heat processing temperature which carbonizes a porous Si single crystal layer, 1000-1200 degreeC is more preferable.
The carbon material only needs to contain carbon such as paraffin hydrocarbons such as C ₃ H ₈ (propane), CH ₄ (methane), C ₄ H ₁₀ (butane), etc. It doesn't matter.
The carbon raw material may be diluted with hydrogen or the like.

The vapor phase growth temperature of the non-porous Si single crystal layer is preferably 800 to 1200 ° C, more preferably 900 to 1100 ° C.
When the vapor phase growth temperature of the Si single crystal layer is less than 800 ° C., the raw material is not decomposed and growth does not occur. On the other hand, when it exceeds 1200 ° C., impurity contamination becomes significant.
The raw material gas for vapor phase growth of the Si single crystal layer includes a silicon hydride source material such as SiH ₂ Cl ₂ (dichlorosilane) and SiHCl ₃ (trichlorosilane) as well as a silicon hydride source material such as SiH ₄ (monosilane). Used.

  Thermal shock, laser cutter, ultrasonic cutter, wet etching, or the like is used for parting and peeling of the porous Si single crystal layer whose surface layer is carbonized.

  Compound semiconductors that are vapor-grown on a compound semiconductor growth substrate include 3C-SiC, c-BP (cubic boron phosphide), AIN (aluminum nitride), InN (indium nitride), and cubic or hexagonal. Examples thereof include nitrides such as crystal GaN (gallium nitride).

  FIG. 1 is a conceptual cross-sectional view showing Example 1 of a compound semiconductor growth substrate according to the present invention.

  This compound semiconductor growth substrate 1 has a 3C-SiC single crystal layer 3 having a surface open to the outside (upward in FIG. 1) on a Si single crystal substrate 2 having a thickness of 300 μm and a surface having a thickness of 1 nm. A porous Si single crystal 4 having a thickness of 10 μm and covered with is formed.

  In order to manufacture the above-described compound semiconductor growth substrate 1, first, a 300 μm thick Si single crystal substrate and a platinum lattice electrode (both not shown) are immersed in an aqueous solution containing HF and ethanol. In addition, anodization is performed while feeding power from a DC power source using an aluminum electrode provided on the Si single crystal substrate as an anode and a platinum lattice electrode as a cathode, and 10 μm from the upper surface of the Si single crystal substrate 2 which is a contact surface with HF. The porous Si single crystal layer 4 'is formed by making it porous over the depth (see FIG. 2).

Next, the porous Si single crystal layer 4 ′ is heat-treated in a C ₃ H ₈ gas atmosphere at a temperature of 1000 ° C. (see FIG. 2), and the surface portion of the porous Si single crystal layer 4 ′ is about 1 nm from the surface. The 3C-SiC single crystal layer 3 (see FIG. 1) is formed by carbonizing to a depth of 2 mm.
The thickness of the 3C—SiC single crystal layer 3 can be adjusted by the porosity of the porous Si single crystal layer 4 ′ and the time and temperature in the heat treatment in the carbon raw material atmosphere.

Here, using the compound semiconductor growth substrate 1 described above, with use of SiH4 (monosilane) and C ₃ H ₈ as a material gas, at a temperature of 1150 ° C., 3C-SiC single crystal film having a thickness of 5μm as the compound semiconductor While the crystal defects were examined by vapor deposition and the crystal defects were examined, the porous Si single crystal layer of Example 1 was subjected to oxidation treatment as a conventional compound semiconductor growth substrate for comparison. As in the case, 3C—SiC single crystal films were stacked and their crystal defects were examined. As a result, the defects of the compound semiconductor of Example 1 were reduced to about 1/10 of that of the conventional one.
Incidentally, the reason why the porous Si single crystal layer is oxidized in the conventional compound semiconductor growth substrate is to prevent the porous Si single crystal layer from being reconstructed by heat treatment. _{2 A} heat treatment is performed at a temperature of 300 to 500 ° C. in a (oxygen) gas atmosphere, or a method of immersing in a chemical containing an oxidizing agent (for example, H ₂ O ₂ : hydrogen peroxide solution).

  FIG. 3 is a conceptual cross-sectional view showing Example 2 of a compound semiconductor growth substrate according to the present invention.

  In this compound semiconductor growth substrate 5, a porous 3C—SiC single crystal layer 7 having a thickness of 10 μm opened outward (upward in FIG. 3) is formed on a Si single crystal substrate 6 having a thickness of 300 μm. It is what.

  In order to manufacture the compound semiconductor growth substrate 5 described above, first, the upper portion of the Si single crystal substrate 6 having a thickness of 300 μm is made porous in the same manner as in the first embodiment, and is opened to the outside so as to have a thickness of 10 μm. A Si single crystal layer 7 'is formed (see FIG. 4).

Next, the porous Si single crystal layer 7 ′ is heat-treated at a temperature of 1000 ° C. in a C ₃ H ₈ gas atmosphere (see FIG. 4), and the entire porous Si single crystal layer 7 ′ is carbonized to be porous. It is transformed into a 3C-SiC single crystal layer 7 (see FIG. 3).
The thickness of the porous 3C—SiC single crystal layer 7 can be adjusted by the porosity of the porous Si single crystal layer 7 ′ and the time and temperature in the heat treatment in the carbon raw material atmosphere.

Here, the above-described compound semiconductor growth substrate 5 is used, SiH ₄ and C ₃ H ₈ are used as source gases, and a 3C-SiC single crystal film having a thickness of 5 μm is removed as a compound semiconductor at a temperature of 1150 ° C. Laminated by phase growth and examined for crystal defects, while the porous Si single crystal layer 7 'described above is not carbonized but is subjected to oxidation treatment as a conventional compound semiconductor growth substrate for comparison. Then, as in the case described above, the 3C—SiC single crystal films were stacked and the crystal defects were examined. As a result, the defects of the compound semiconductor of Example 2 were reduced to about 1/10 of that of the conventional one.

  FIG. 5 is a conceptual sectional view showing Example 3 of a compound semiconductor growth substrate according to the present invention.

  This compound semiconductor growth substrate 8 is formed on a 300 μm thick Si single crystal substrate 9, a porous Si single crystal layer 10 having a thickness of 10 μm opened outward (upward in FIG. 5), and having a thickness of 1 μm. A non-porous Si single crystal layer 11 and a 1 C thick 3C-SiC single crystal layer 12 are sequentially formed.

  In order to manufacture the compound semiconductor growth substrate 8 described above, first, the upper part of the Si single crystal substrate 9 having a thickness of 300 μm is made porous in the same manner as in the first embodiment, and is opened to the outside. A porous Si single crystal layer 10 (see FIG. 6A) is formed.

Next, a non-porous Si single crystal layer having a thickness of 1 μm is formed on the porous Si single crystal layer 10 under vapor phase growth conditions of SiH ₄ gas atmosphere and 1000 ° C. (see FIG. 6A). 11 (see FIG. 6B) are stacked.

Next, heat treatment is performed on the Si single crystal layer 11 at a temperature of 1000 ° C. in a C ₃ H ₈ gas atmosphere (see FIG. 6B), and the upper portion of the Si single crystal layer 11 extends to a depth of 1 nm from the surface. It is carbonized and transformed into a 3C—SiC single crystal layer 12 (see FIG. 5).

Here, the above-described compound semiconductor growth substrate 8 is used, SiH ₄ and C ₃ H ₈ are used as source gases, and a 3C—SiC single crystal film having a thickness of 5 μm is removed as a compound semiconductor at a temperature of 1150 ° C. While stacking by phase growth and examining the crystal defects, the above-described Si single crystal layer 11 was left as it was without being carbonized as a conventional compound semiconductor growth substrate for comparison. When the 3C-SiC single crystal film was laminated and the crystal defects were examined in the same manner as in the case of the above, the defect of the compound semiconductor of Example 3 was reduced to about 1/100 of that of the conventional one.

  FIG. 7 is a conceptual sectional view showing Example 4 of the compound semiconductor growth substrate according to the present invention.

  This compound semiconductor growth substrate 13 is a self-supporting substrate, while the substrates of Examples 1 to 3 are those with Si single crystal substrates 2, 6, and 9, and the compound semiconductor growth of Example 3 3C-SiC single crystal layer 12 having a thickness of 100 μm is formed on Si layer single crystal layer 10 having a thickness of 1 μm so that Si single crystal substrate 9 is removed from substrate 8 by partial peeling of porous Si single crystal layer 11. ′ Is formed.

In order to manufacture the compound semiconductor growth substrate 13 described above, first, the compound semiconductor growth substrate 8 of Example 3 is used, SiH ₄ and C ₃ H ₈ are used as source gases, and at a temperature of 1150 ° C. A 3C—SiC single crystal layer 12 ′ having a thickness of 100 μm is stacked by vapor phase growth.
Next, in the temperature lowering process 400 ° C. after the vapor phase growth of the 3C—SiC single crystal layer 12 ′, the Si single crystal layer 11 and the Si single crystal substrate 9 are separated and separated at the porous Si single crystal layer 10 by thermal shock. Then, the Si single crystal substrate 9 is removed, and the remaining porous Si single crystal layer 10 is removed with HF or the like.

Here, using the above-described compound semiconductor growth substrate 13, SiH ₄ and C ₃ H ₈ are used as source gases, and at the temperature of 1150 ° C., a 3 C—SiC single crystal film having a thickness of 5 μm is removed as a compound semiconductor. While stacking by phase growth and examining crystal defects, the compound semiconductor growth substrate 8 of Example 3 described above was used as a conventional compound semiconductor growth substrate for comparison, and 3C- When the SiC single crystal film was laminated and the crystal defects were examined, the defects of the compound semiconductor of Example 4 were reduced to about 1/1000 of that of the conventional one.

1 is a conceptual cross-sectional view showing Example 1 of a compound semiconductor growth substrate according to the present invention. It is explanatory drawing which shows the manufacturing method of the substrate for compound semiconductor growth of FIG. It is a conceptual sectional view showing Example 2 of the substrate for compound semiconductor growth concerning the present invention. It is explanatory drawing which shows the manufacturing method of the substrate for compound semiconductor growth of FIG. It is a conceptual sectional view showing Example 3 of the compound semiconductor growth substrate concerning the present invention. 5A and 5B show a method for manufacturing the compound semiconductor growth substrate of FIG. 5, where FIG. 5A is a first process explanatory diagram and FIG. 5B is a final process explanatory diagram. It is a conceptual sectional view showing Example 4 of the substrate for compound semiconductor growth concerning the present invention.

Explanation of symbols

2 Si single crystal substrate 3 3C-SiC single crystal layer 4 Porous Si single crystal layer 6 Si single crystal substrate 7 Porous 3C-SiC single crystal layer 9 Si single crystal substrate 10 Porous Si single crystal layer 11 Si single crystal layer 12 3C-SiC single crystal layer 12'3C-SiC single crystal layer

Claims (8)

  A porous Si single crystal layer having an outward opening on a Si single crystal substrate and having a surface covered with a 3C-SiC single crystal layer having a thickness of 0.1 to 100 nm is formed. Compound semiconductor growth substrate.   A substrate for growing a compound semiconductor, wherein a porous 3C-SiC single crystal layer opened outward is formed on a Si single crystal substrate.   A compound comprising a porous Si single crystal layer, a Si single crystal layer having a thickness of 0.1 to 5 μm, and a 3C-SiC single crystal layer formed in order on an Si single crystal substrate. Semiconductor growth substrate.   4. The compound semiconductor growth substrate according to claim 3, wherein the Si single crystal substrate is removed from the compound semiconductor growth substrate according to claim 3 by dividing and peeling the porous Si single crystal layer.   After forming a porous Si single crystal layer having a porous upper part of the Si single crystal substrate and opening outward, the porous Si single crystal layer is subjected to heat treatment at a temperature of 800 to 1400 ° C. in a carbon raw material atmosphere. A substrate for growing a compound semiconductor, wherein the surface layer portion is carbonized to a depth of 0.1 to 100 nm from the surface.   After forming a porous Si single crystal layer having a porous upper part of the Si single crystal substrate and opening outward, the porous Si single crystal layer is subjected to heat treatment at a temperature of 800 to 1400 ° C. in a carbon raw material atmosphere. A method for producing a compound semiconductor growth substrate, characterized by carbonizing the whole.   After forming a porous Si single crystal layer having a porous upper portion of the Si single crystal substrate and opening outward, Si single crystal having a thickness of 0.1 to 5 μm is formed on the porous Si single crystal layer by vapor phase growth. A method for producing a substrate for growing a compound semiconductor, comprising: laminating a crystal layer, and thereafter heat-treating the Si single crystal layer at a temperature of 800 to 1400 ° C. in a carbon raw material atmosphere to carbonize the upper part. 8. A compound semiconductor growth substrate according to claim 7, wherein after the carbonization of the upper part of the Si single crystal layer in the compound semiconductor substrate manufacturing method according to claim 7, the Si single crystal substrate is removed by divided peeling of the porous Si single crystal layer. Production method.

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